Corners
Tile CNR.BL
Cells: 2 IRIs: 0
Muxes
Destination | Sources |
---|---|
TCELL0:SINGLE.H0 | TCELL0:IO.DOUBLE.0.S.0, TCELL0:IO.DOUBLE.0.W.2, TCELL0:DEC.V3, TCELL0:OUT.LR.IOB1.I2.S |
TCELL0:SINGLE.H1 | TCELL0:IO.DOUBLE.0.W.1, TCELL0:LONG.IO.V0, TCELL0:OUT.RDBK.DATA |
TCELL0:SINGLE.H2 | TCELL0:IO.DOUBLE.1.S.0, TCELL0:IO.DOUBLE.1.W.2, TCELL0:LONG.IO.V1, TCELL0:OUT.MD0.I |
TCELL0:SINGLE.H3 | TCELL0:IO.DOUBLE.1.W.1, TCELL0:DEC.V2, TCELL0:OUT.LR.IOB1.I1.S |
TCELL0:SINGLE.H4 | TCELL0:IO.DOUBLE.2.S.0, TCELL0:IO.DOUBLE.2.W.2, TCELL0:DEC.V1, TCELL0:OUT.LR.IOB1.I2.S |
TCELL0:SINGLE.H5 | TCELL0:IO.DOUBLE.2.W.1, TCELL0:LONG.IO.V2, TCELL0:OUT.RDBK.DATA |
TCELL0:SINGLE.H6 | TCELL0:IO.DOUBLE.3.S.0, TCELL0:IO.DOUBLE.3.W.2, TCELL0:LONG.IO.V3, TCELL0:OUT.MD0.I |
TCELL0:SINGLE.H7 | TCELL0:IO.DOUBLE.3.W.1, TCELL0:DEC.V0, TCELL0:OUT.LR.IOB1.I1.S |
TCELL0:DOUBLE.H0.0 | TCELL0:IO.DOUBLE.0.S.0, TCELL0:IO.DOUBLE.0.W.1, TCELL0:IO.DOUBLE.0.W.2, TCELL0:OUT.LR.IOB1.I1.S |
TCELL0:DOUBLE.H0.1 | TCELL0:IO.DOUBLE.1.S.0, TCELL0:IO.DOUBLE.1.W.1, TCELL0:IO.DOUBLE.1.W.2, TCELL0:OUT.MD0.I |
TCELL0:DOUBLE.H1.0 | TCELL0:IO.DOUBLE.3.S.0, TCELL0:IO.DOUBLE.3.W.1, TCELL0:IO.DOUBLE.3.W.2, TCELL0:OUT.RDBK.DATA |
TCELL0:DOUBLE.H1.1 | TCELL0:IO.DOUBLE.2.S.0, TCELL0:IO.DOUBLE.2.W.1, TCELL0:IO.DOUBLE.2.W.2, TCELL0:OUT.LR.IOB1.I2.S |
TCELL0:IO.DOUBLE.0.S.0 | TCELL0:SINGLE.H0, TCELL0:DOUBLE.H0.0, TCELL0:IO.DOUBLE.0.W.2, TCELL0:IO.DBUF.V1 |
TCELL0:IO.DOUBLE.0.W.1 | TCELL0:SINGLE.H1, TCELL0:DOUBLE.H0.0 |
TCELL0:IO.DOUBLE.0.W.2 | TCELL0:SINGLE.H0, TCELL0:DOUBLE.H0.0, TCELL0:IO.DOUBLE.0.S.0, TCELL0:IO.DBUF.V0 |
TCELL0:IO.DOUBLE.1.S.0 | TCELL0:SINGLE.H2, TCELL0:DOUBLE.H0.1, TCELL0:IO.DOUBLE.1.W.2, TCELL0:IO.DBUF.V1 |
TCELL0:IO.DOUBLE.1.W.1 | TCELL0:SINGLE.H3, TCELL0:DOUBLE.H0.1 |
TCELL0:IO.DOUBLE.1.W.2 | TCELL0:SINGLE.H2, TCELL0:DOUBLE.H0.1, TCELL0:IO.DOUBLE.1.S.0, TCELL0:IO.DBUF.V0 |
TCELL0:IO.DOUBLE.2.S.0 | TCELL0:SINGLE.H4, TCELL0:DOUBLE.H1.1, TCELL0:IO.DOUBLE.2.W.2, TCELL0:IO.DBUF.V1 |
TCELL0:IO.DOUBLE.2.W.1 | TCELL0:SINGLE.H5, TCELL0:DOUBLE.H1.1 |
TCELL0:IO.DOUBLE.2.W.2 | TCELL0:SINGLE.H4, TCELL0:DOUBLE.H1.1, TCELL0:IO.DOUBLE.2.S.0, TCELL0:IO.DBUF.V0 |
TCELL0:IO.DOUBLE.3.S.0 | TCELL0:SINGLE.H6, TCELL0:DOUBLE.H1.0, TCELL0:IO.DOUBLE.3.W.2, TCELL0:IO.DBUF.V1 |
TCELL0:IO.DOUBLE.3.W.1 | TCELL0:SINGLE.H7, TCELL0:DOUBLE.H1.0 |
TCELL0:IO.DOUBLE.3.W.2 | TCELL0:SINGLE.H6, TCELL0:DOUBLE.H1.0, TCELL0:IO.DOUBLE.3.S.0, TCELL0:IO.DBUF.V0 |
TCELL0:IO.DBUF.V0 | TCELL0:IO.DOUBLE.0.S.0, TCELL0:IO.DOUBLE.1.S.0, TCELL0:IO.DOUBLE.2.S.0, TCELL0:IO.DOUBLE.3.S.0 |
TCELL0:IO.DBUF.V1 | TCELL0:IO.DOUBLE.0.W.2, TCELL0:IO.DOUBLE.1.W.2, TCELL0:IO.DOUBLE.2.W.2, TCELL0:IO.DOUBLE.3.W.2 |
TCELL0:LONG.H3 | TCELL0:LONG.IO.V1, TCELL0:DEC.V1 |
TCELL0:LONG.H4 | TCELL0:LONG.IO.V2, TCELL0:DEC.V2, TCELL0:OUT.RDBK.DATA |
TCELL0:LONG.H5 | TCELL0:LONG.IO.V3, TCELL0:DEC.V3, TCELL0:OUT.RDBK.DATA |
TCELL0:LONG.IO.H0 | TCELL0:LONG.IO.V0, TCELL0:LONG.IO.V2 |
TCELL0:LONG.IO.H1 | TCELL0:LONG.IO.V1, TCELL0:LONG.IO.V3 |
TCELL0:LONG.IO.H2 | TCELL0:LONG.IO.V0, TCELL0:LONG.IO.V2 |
TCELL0:LONG.IO.H3 | TCELL0:LONG.IO.V1, TCELL0:LONG.IO.V3 |
TCELL0:LONG.IO.V0 | TCELL0:SINGLE.H1, TCELL0:LONG.IO.H0, TCELL0:LONG.IO.H2 |
TCELL0:LONG.IO.V1 | TCELL0:SINGLE.H2, TCELL0:LONG.H3, TCELL0:LONG.IO.H1, TCELL0:LONG.IO.H3 |
TCELL0:LONG.IO.V2 | TCELL0:SINGLE.H5, TCELL0:LONG.H4, TCELL0:LONG.IO.H0, TCELL0:LONG.IO.H2 |
TCELL0:LONG.IO.V3 | TCELL0:SINGLE.H6, TCELL0:LONG.H5, TCELL0:LONG.IO.H1, TCELL0:LONG.IO.H3 |
TCELL0:IMUX.IOB1.O1 | TCELL0:SINGLE.H2, TCELL0:SINGLE.H3, TCELL0:SINGLE.H4, TCELL0:SINGLE.H5, TCELL1:DOUBLE.V0.1, TCELL1:DOUBLE.V1.0, TCELL1:LONG.V0, TCELL1:LONG.V1, TCELL1:LONG.V2 |
TCELL0:IMUX.IOB1.IK | TCELL0:DOUBLE.H0.0, TCELL0:DOUBLE.H1.1, TCELL0:LONG.H3, TCELL0:LONG.H4, TCELL0:LONG.H5, TCELL1:SINGLE.V2, TCELL1:SINGLE.V3, TCELL1:SINGLE.V4, TCELL1:SINGLE.V5 |
TCELL0:IMUX.BUFG.H | TCELL0:OUT.IOB.CLKIN.W |
TCELL0:IMUX.BUFG.V | TCELL0:IO.DOUBLE.0.S.0, TCELL0:IO.DOUBLE.0.W.1, TCELL0:IO.DOUBLE.1.S.0, TCELL0:IO.DOUBLE.1.W.1, TCELL0:IO.DOUBLE.2.S.0, TCELL0:IO.DOUBLE.2.W.1, TCELL0:IO.DOUBLE.3.S.0, TCELL0:IO.DOUBLE.3.W.1, TCELL0:OUT.IOB.CLKIN.S |
TCELL0:IMUX.RDBK.TRIG | TCELL0:SINGLE.H2, TCELL0:SINGLE.H3, TCELL0:SINGLE.H4, TCELL0:SINGLE.H5 |
Bel PULLUP_DEC0_H
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.H0 |
Bel PULLUP_DEC1_H
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.H1 |
Bel PULLUP_DEC2_H
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.H2 |
Bel PULLUP_DEC3_H
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.H3 |
Bel PULLUP_DEC0_V
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.V0 |
Bel PULLUP_DEC1_V
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.V1 |
Bel PULLUP_DEC2_V
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.V2 |
Bel PULLUP_DEC3_V
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.V3 |
Bel BUFGLS_H
Pin | Direction | Wires |
---|---|---|
I | input | TCELL0:IMUX.BUFG.H |
Bel BUFGLS_V
Pin | Direction | Wires |
---|---|---|
I | input | TCELL0:IMUX.BUFG.V |
Bel CIN
Pin | Direction | Wires |
---|
Bel MD0
Pin | Direction | Wires |
---|---|---|
I | output | TCELL0:OUT.MD0.I |
Bel MD1
Pin | Direction | Wires |
---|---|---|
O | input | TCELL0:IMUX.IOB1.O1 |
T | input | TCELL0:IMUX.IOB1.IK |
Bel MD2
Pin | Direction | Wires |
---|---|---|
I | output | TCELL0:OUT.BT.IOB1.I1 |
Bel RDBK
Pin | Direction | Wires |
---|---|---|
DATA | output | TCELL0:OUT.RDBK.DATA |
RIP | output | TCELL0:OUT.BT.IOB1.I2 |
TRIG | input | TCELL0:IMUX.RDBK.TRIG |
Bel wires
Wire | Pins |
---|---|
TCELL0:DEC.H0 | PULLUP_DEC0_H.O |
TCELL0:DEC.H1 | PULLUP_DEC1_H.O |
TCELL0:DEC.H2 | PULLUP_DEC2_H.O |
TCELL0:DEC.H3 | PULLUP_DEC3_H.O |
TCELL0:DEC.V0 | PULLUP_DEC0_V.O |
TCELL0:DEC.V1 | PULLUP_DEC1_V.O |
TCELL0:DEC.V2 | PULLUP_DEC2_V.O |
TCELL0:DEC.V3 | PULLUP_DEC3_V.O |
TCELL0:IMUX.IOB1.O1 | MD1.O |
TCELL0:IMUX.IOB1.IK | MD1.T |
TCELL0:IMUX.BUFG.H | BUFGLS_H.I |
TCELL0:IMUX.BUFG.V | BUFGLS_V.I |
TCELL0:IMUX.RDBK.TRIG | RDBK.TRIG |
TCELL0:OUT.BT.IOB1.I1 | MD2.I |
TCELL0:OUT.BT.IOB1.I2 | RDBK.RIP |
TCELL0:OUT.MD0.I | MD0.I |
TCELL0:OUT.RDBK.DATA | RDBK.DATA |
Bitstream
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.S.0 | 0.8.8 |
---|---|
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1 | 0.5.8 |
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2 | 0.2.8 |
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.S.0 | 0.14.12 |
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1 | 0.12.12 |
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2 | 0.10.12 |
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.S.0 | 0.5.12 |
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1 | 0.3.12 |
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2 | 0.1.12 |
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.S.0 | 0.11.8 |
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1 | 0.12.7 |
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2 | 0.10.7 |
INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.W.2 | 0.3.8 |
INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.W.2 | 0.11.12 |
INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.W.2 | 0.11.7 |
INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.W.2 | 0.2.12 |
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.S.0 | 0.9.8 |
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.2 | 0.0.8 |
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.1 | 0.6.8 |
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.S.0 | 0.15.12 |
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2 | 0.9.12 |
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1 | 0.13.12 |
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.S.0 | 0.12.8 |
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.2 | 0.9.7 |
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.1 | 0.13.7 |
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.S.0 | 0.6.12 |
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2 | 0.0.12 |
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1 | 0.4.12 |
INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.S | 0.2.10 |
INT:PASS.DOUBLE.H0.1.0.OUT.MD0.I | 0.5.11 |
INT:PASS.DOUBLE.H1.0.0.OUT.RDBK.DATA | 0.2.9 |
INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S | 0.2.7 |
INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.V1 | 0.10.8 |
INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0 | 0.6.9 |
INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.V1 | 0.10.9 |
INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0 | 0.9.11 |
INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.V1 | 0.13.8 |
INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0 | 0.8.9 |
INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.V1 | 0.3.9 |
INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0 | 0.8.10 |
INT:PASS.SINGLE.H0.0.DEC.V3 | 0.8.7 |
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S | 0.1.7 |
INT:PASS.SINGLE.H1.0.LONG.IO.V0 | 0.3.7 |
INT:PASS.SINGLE.H1.0.OUT.RDBK.DATA | 0.4.7 |
INT:PASS.SINGLE.H2.0.LONG.IO.V1 | 0.12.10 |
INT:PASS.SINGLE.H2.0.OUT.MD0.I | 0.4.10 |
INT:PASS.SINGLE.H3.0.DEC.V2 | 0.16.12 |
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S | 0.10.11 |
INT:PASS.SINGLE.H4.0.DEC.V1 | 0.14.8 |
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S | 0.0.7 |
INT:PASS.SINGLE.H5.0.LONG.IO.V2 | 0.6.7 |
INT:PASS.SINGLE.H5.0.OUT.RDBK.DATA | 0.5.7 |
INT:PASS.SINGLE.H6.0.LONG.IO.V3 | 0.4.11 |
INT:PASS.SINGLE.H6.0.OUT.MD0.I | 0.1.11 |
INT:PASS.SINGLE.H7.0.DEC.V0 | 0.8.12 |
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S | 0.0.11 |
MD1:ENABLE.O | 0.23.10 |
MD1:ENABLE.T | 0.24.10 |
MISC:READ_ABORT | 0.15.3 |
MISC:READ_CAPTURE | 0.13.3 |
MISC:TM_BOT | 0.7.3 |
PULLUP_DEC0_H:ENABLE | 0.0.3 |
PULLUP_DEC0_V:ENABLE | 0.21.11 |
PULLUP_DEC1_H:ENABLE | 0.1.3 |
PULLUP_DEC1_V:ENABLE | 0.22.11 |
PULLUP_DEC2_H:ENABLE | 0.2.3 |
PULLUP_DEC2_V:ENABLE | 0.20.11 |
PULLUP_DEC3_H:ENABLE | 0.3.3 |
PULLUP_DEC3_V:ENABLE | 0.23.11 |
RDBK:ENABLE | 0.23.4 |
inverted | ~[0] |
INT:MUX.IMUX.BUFG.H | 0.22.3 |
---|---|
0.OUT.IOB.CLKIN.W | 0 |
NONE | 1 |
INT:MUX.IMUX.BUFG.V | 0.2.2 | 0.2.1 | 0.0.2 | 0.1.2 | 0.1.1 | 0.0.1 | 0.3.2 |
---|---|---|---|---|---|---|---|
0.IO.DOUBLE.0.S.0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 |
0.IO.DOUBLE.1.S.0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 |
0.IO.DOUBLE.2.S.0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 |
0.IO.DOUBLE.0.W.1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
0.IO.DOUBLE.2.W.1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 |
0.IO.DOUBLE.3.S.0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 |
0.IO.DOUBLE.3.W.1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 |
0.IO.DOUBLE.1.W.1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
0.OUT.IOB.CLKIN.S | 1 | 1 | 0 | 1 | 1 | 1 | 0 |
NONE | 1 | 1 | 0 | 1 | 1 | 1 | 1 |
INT:MUX.IMUX.IOB1.IK | 0.2.6 | 0.0.6 | 0.1.5 | 0.2.5 | 0.1.6 | 0.3.5 |
---|---|---|---|---|---|---|
0.LONG.H3 | 0 | 0 | 0 | 1 | 1 | 1 |
0.LONG.H4 | 0 | 0 | 1 | 0 | 1 | 1 |
0.LONG.H5 | 0 | 0 | 1 | 1 | 0 | 1 |
0.DOUBLE.H0.0 | 0 | 1 | 1 | 1 | 1 | 1 |
1.SINGLE.V2 | 1 | 0 | 0 | 1 | 1 | 1 |
1.SINGLE.V3 | 1 | 0 | 1 | 0 | 1 | 1 |
1.SINGLE.V4 | 1 | 0 | 1 | 1 | 0 | 1 |
1.SINGLE.V5 | 1 | 0 | 1 | 1 | 1 | 0 |
0.DOUBLE.H1.1 | 1 | 1 | 1 | 1 | 1 | 1 |
INT:MUX.IMUX.IOB1.O1 | 0.4.4 | 0.4.2 | 0.5.4 | 0.4.3 | 0.6.4 | 0.7.4 |
---|---|---|---|---|---|---|
1.LONG.V0 | 0 | 0 | 1 | 1 | 1 | 0 |
0.SINGLE.H2 | 0 | 0 | 1 | 1 | 1 | 1 |
1.LONG.V1 | 0 | 1 | 0 | 1 | 1 | 0 |
0.SINGLE.H3 | 0 | 1 | 0 | 1 | 1 | 1 |
1.LONG.V2 | 0 | 1 | 1 | 0 | 1 | 0 |
0.SINGLE.H4 | 0 | 1 | 1 | 0 | 1 | 1 |
0.SINGLE.H5 | 0 | 1 | 1 | 1 | 0 | 1 |
1.DOUBLE.V1.0 | 1 | 1 | 1 | 1 | 1 | 0 |
1.DOUBLE.V0.1 | 1 | 1 | 1 | 1 | 1 | 1 |
INT:MUX.IMUX.RDBK.TRIG | 0.5.3 | 0.6.3 | 0.17.4 | 0.18.4 |
---|---|---|---|---|
0.SINGLE.H3 | 0 | 0 | 1 | 1 |
0.SINGLE.H4 | 0 | 1 | 0 | 1 |
0.SINGLE.H5 | 0 | 1 | 1 | 0 |
0.SINGLE.H2 | 1 | 1 | 1 | 1 |
INT:MUX.IO.DBUF.V0 | 0.9.6 | 0.10.6 | 0.12.6 | 0.11.6 |
---|---|---|---|---|
0.IO.DOUBLE.1.S.0 | 0 | 0 | 1 | 1 |
0.IO.DOUBLE.2.S.0 | 0 | 1 | 0 | 1 |
0.IO.DOUBLE.3.S.0 | 0 | 1 | 1 | 0 |
0.IO.DOUBLE.0.S.0 | 1 | 1 | 1 | 1 |
INT:MUX.IO.DBUF.V1 | 0.14.11 | 0.17.11 | 0.16.11 | 0.15.11 |
---|---|---|---|---|
0.IO.DOUBLE.0.W.2 | 0 | 0 | 1 | 1 |
0.IO.DOUBLE.1.W.2 | 0 | 1 | 0 | 1 |
0.IO.DOUBLE.3.W.2 | 0 | 1 | 1 | 0 |
0.IO.DOUBLE.2.W.2 | 1 | 1 | 1 | 1 |
INT:MUX.LONG.H3 | 0.13.9 | 0.15.10 |
---|---|---|
0.DEC.V1 | 0 | 0 |
0.LONG.IO.V1 | 0 | 1 |
NONE | 1 | 1 |
INT:MUX.LONG.H4 | 0.1.9 | 0.0.9 | 0.3.10 | 0.1.10 |
---|---|---|---|---|
0.LONG.IO.V2 | 0 | 0 | 0 | 1 |
0.DEC.V2 | 0 | 0 | 1 | 0 |
0.OUT.RDBK.DATA | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.H5 | 0.10.10 | 0.5.9 | 0.6.10 | 0.9.10 |
---|---|---|---|---|
0.LONG.IO.V3 | 0 | 0 | 0 | 1 |
0.DEC.V3 | 0 | 0 | 1 | 0 |
0.OUT.RDBK.DATA | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.H0 | 0.12.3 | 0.14.3 |
---|---|---|
0.LONG.IO.V2 | 0 | 0 |
0.LONG.IO.V0 | 0 | 1 |
NONE | 1 | 1 |
INT:MUX.LONG.IO.H1 | 0.19.3 | 0.21.3 |
---|---|---|
0.LONG.IO.V3 | 0 | 0 |
0.LONG.IO.V1 | 0 | 1 |
NONE | 1 | 1 |
INT:MUX.LONG.IO.H2 | 0.10.3 | 0.9.3 |
---|---|---|
0.LONG.IO.V0 | 0 | 0 |
0.LONG.IO.V2 | 0 | 1 |
NONE | 1 | 1 |
INT:MUX.LONG.IO.H3 | 0.17.3 | 0.16.3 |
---|---|---|
0.LONG.IO.V1 | 0 | 0 |
0.LONG.IO.V3 | 0 | 1 |
NONE | 1 | 1 |
INT:MUX.LONG.IO.V0 | 0.22.4 | 0.19.4 | 0.21.4 | 0.20.4 |
---|---|---|---|---|
0.LONG.IO.H0 | 0 | 0 | 0 | 1 |
0.LONG.IO.H2 | 0 | 0 | 1 | 0 |
0.SINGLE.H1 | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.V1 | 0.13.4 | 0.12.4 | 0.15.4 | 0.14.4 | 0.16.4 |
---|---|---|---|---|---|
0.LONG.H3 | 0 | 0 | 0 | 1 | 1 |
0.LONG.IO.H1 | 0 | 0 | 1 | 0 | 1 |
0.LONG.IO.H3 | 0 | 0 | 1 | 1 | 0 |
0.SINGLE.H2 | 0 | 1 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.V2 | 0.4.5 | 0.0.4 | 0.2.4 | 0.1.4 | 0.3.4 |
---|---|---|---|---|---|
0.LONG.H4 | 0 | 0 | 0 | 1 | 1 |
0.LONG.IO.H0 | 0 | 0 | 1 | 0 | 1 |
0.LONG.IO.H2 | 0 | 0 | 1 | 1 | 0 |
0.SINGLE.H5 | 0 | 1 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.V3 | 0.5.5 | 0.8.4 | 0.10.4 | 0.9.4 | 0.11.4 |
---|---|---|---|---|---|
0.LONG.H5 | 0 | 0 | 0 | 1 | 1 |
0.LONG.IO.H1 | 0 | 0 | 1 | 0 | 1 |
0.LONG.IO.H3 | 0 | 0 | 1 | 1 | 0 |
0.SINGLE.H6 | 0 | 1 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 | 1 |
MD1:PULL | 0.25.11 | 0.24.11 |
---|---|---|
PULLUP | 0 | 1 |
PULLDOWN | 1 | 0 |
PULLNONE | 1 | 1 |
Tile CNR.TL
Cells: 4 IRIs: 0
Muxes
Destination | Sources |
---|---|
TCELL0:LONG.H0 | TCELL0:LONG.IO.V0, TCELL0:DEC.V0, TCELL0:OUT.LR.IOB1.I2 |
TCELL0:LONG.H1 | TCELL0:LONG.IO.V1, TCELL0:DEC.V1, TCELL0:OUT.LR.IOB1.I2 |
TCELL0:LONG.H2 | TCELL0:LONG.IO.V2, TCELL0:DEC.V2 |
TCELL0:LONG.IO.H0 | TCELL0:LONG.IO.V0, TCELL0:LONG.IO.V2 |
TCELL0:LONG.IO.H1 | TCELL0:LONG.IO.V1, TCELL0:LONG.IO.V3 |
TCELL0:LONG.IO.H2 | TCELL0:LONG.IO.V0, TCELL0:LONG.IO.V2 |
TCELL0:LONG.IO.H3 | TCELL0:LONG.IO.V1, TCELL0:LONG.IO.V3 |
TCELL0:LONG.IO.V0 | TCELL0:LONG.H0, TCELL0:LONG.IO.H0, TCELL0:LONG.IO.H2 |
TCELL0:LONG.IO.V1 | TCELL0:LONG.H1, TCELL0:LONG.IO.H1, TCELL0:LONG.IO.H3 |
TCELL0:LONG.IO.V2 | TCELL0:LONG.H2, TCELL0:LONG.IO.H0, TCELL0:LONG.IO.H2 |
TCELL0:LONG.IO.V3 | TCELL0:LONG.IO.H1, TCELL0:LONG.IO.H3 |
TCELL0:IMUX.BUFG.H | TCELL0:IO.DOUBLE.0.W.0, TCELL0:IO.DOUBLE.0.W.1, TCELL0:IO.DOUBLE.1.W.0, TCELL0:IO.DOUBLE.1.W.1, TCELL0:IO.DOUBLE.2.W.0, TCELL0:IO.DOUBLE.2.W.1, TCELL0:IO.DOUBLE.3.W.0, TCELL0:IO.DOUBLE.3.W.1, TCELL0:OUT.IOB.CLKIN.W |
TCELL0:IMUX.BUFG.V | TCELL0:OUT.IOB.CLKIN.N |
TCELL0:IMUX.BSCAN.TDO1 | TCELL1:DOUBLE.V0.1, TCELL1:DOUBLE.V1.0, TCELL1:LONG.V0, TCELL1:LONG.V1, TCELL1:LONG.V2, TCELL2:SINGLE.H2, TCELL2:SINGLE.H3, TCELL2:SINGLE.H4, TCELL2:SINGLE.H5 |
TCELL0:IMUX.BSCAN.TDO2 | TCELL0:LONG.H0, TCELL0:LONG.H1, TCELL0:LONG.H2, TCELL1:SINGLE.V2, TCELL1:SINGLE.V3, TCELL1:SINGLE.V4, TCELL1:SINGLE.V5, TCELL2:DOUBLE.H0.1, TCELL2:DOUBLE.H1.0 |
Bel PULLUP_DEC0_H
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.H0 |
Bel PULLUP_DEC1_H
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.H1 |
Bel PULLUP_DEC2_H
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.H2 |
Bel PULLUP_DEC3_H
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.H3 |
Bel PULLUP_DEC0_V
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.V0 |
Bel PULLUP_DEC1_V
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.V1 |
Bel PULLUP_DEC2_V
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.V2 |
Bel PULLUP_DEC3_V
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.V3 |
Bel BUFGLS_H
Pin | Direction | Wires |
---|---|---|
I | input | TCELL0:IMUX.BUFG.H |
Bel BUFGLS_V
Pin | Direction | Wires |
---|---|---|
I | input | TCELL0:IMUX.BUFG.V |
Bel CIN
Pin | Direction | Wires |
---|
Bel BSCAN
Pin | Direction | Wires |
---|---|---|
DRCK | output | TCELL0:OUT.BT.IOB1.I2 |
IDLE | output | TCELL0:OUT.LR.IOB1.I2 |
SEL1 | output | TCELL0:OUT.LR.IOB1.I1 |
SEL2 | output | TCELL0:OUT.BT.IOB1.I1 |
TDO1 | input | TCELL0:IMUX.BSCAN.TDO1 |
TDO2 | input | TCELL0:IMUX.BSCAN.TDO2 |
Bel wires
Wire | Pins |
---|---|
TCELL0:DEC.H0 | PULLUP_DEC0_H.O |
TCELL0:DEC.H1 | PULLUP_DEC1_H.O |
TCELL0:DEC.H2 | PULLUP_DEC2_H.O |
TCELL0:DEC.H3 | PULLUP_DEC3_H.O |
TCELL0:DEC.V0 | PULLUP_DEC0_V.O |
TCELL0:DEC.V1 | PULLUP_DEC1_V.O |
TCELL0:DEC.V2 | PULLUP_DEC2_V.O |
TCELL0:DEC.V3 | PULLUP_DEC3_V.O |
TCELL0:IMUX.BUFG.H | BUFGLS_H.I |
TCELL0:IMUX.BUFG.V | BUFGLS_V.I |
TCELL0:IMUX.BSCAN.TDO1 | BSCAN.TDO1 |
TCELL0:IMUX.BSCAN.TDO2 | BSCAN.TDO2 |
TCELL0:OUT.BT.IOB1.I1 | BSCAN.SEL2 |
TCELL0:OUT.BT.IOB1.I2 | BSCAN.DRCK |
TCELL0:OUT.LR.IOB1.I1 | BSCAN.SEL1 |
TCELL0:OUT.LR.IOB1.I2 | BSCAN.IDLE |
Bitstream
BSCAN:ENABLE | 0.15.3 |
---|---|
non-inverted | [0] |
INT:MUX.IMUX.BSCAN.TDO1 | 0.1.3 | 0.0.3 | 0.2.2 | 0.1.2 | 0.2.3 | 0.3.2 |
---|---|---|---|---|---|---|
1.LONG.V0 | 0 | 0 | 0 | 1 | 1 | 1 |
1.LONG.V1 | 0 | 0 | 1 | 0 | 1 | 1 |
1.LONG.V2 | 0 | 0 | 1 | 1 | 0 | 1 |
1.DOUBLE.V1.0 | 0 | 1 | 1 | 1 | 1 | 1 |
2.SINGLE.H2 | 1 | 0 | 0 | 1 | 1 | 1 |
2.SINGLE.H3 | 1 | 0 | 1 | 0 | 1 | 1 |
2.SINGLE.H4 | 1 | 0 | 1 | 1 | 0 | 1 |
2.SINGLE.H5 | 1 | 0 | 1 | 1 | 1 | 0 |
1.DOUBLE.V0.1 | 1 | 1 | 1 | 1 | 1 | 1 |
INT:MUX.IMUX.BSCAN.TDO2 | 0.0.0 | 0.2.1 | 0.1.1 | 0.2.0 | 0.1.0 | 0.0.1 |
---|---|---|---|---|---|---|
0.LONG.H0 | 0 | 0 | 0 | 1 | 1 | 1 |
0.LONG.H1 | 0 | 0 | 1 | 0 | 1 | 1 |
0.LONG.H2 | 0 | 0 | 1 | 1 | 0 | 1 |
1.SINGLE.V2 | 0 | 1 | 0 | 1 | 1 | 1 |
1.SINGLE.V3 | 0 | 1 | 1 | 0 | 1 | 1 |
1.SINGLE.V4 | 0 | 1 | 1 | 1 | 0 | 1 |
1.SINGLE.V5 | 0 | 1 | 1 | 1 | 1 | 0 |
2.DOUBLE.H1.0 | 1 | 0 | 1 | 1 | 1 | 1 |
2.DOUBLE.H0.1 | 1 | 1 | 1 | 1 | 1 | 1 |
INT:MUX.IMUX.BUFG.H | 0.3.4 | 0.1.5 | 0.0.6 | 0.1.4 | 0.2.4 | 0.0.5 | 0.4.4 |
---|---|---|---|---|---|---|---|
0.IO.DOUBLE.0.W.0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 |
0.IO.DOUBLE.1.W.0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 |
0.IO.DOUBLE.2.W.0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 |
0.IO.DOUBLE.0.W.1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
0.IO.DOUBLE.2.W.1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 |
0.IO.DOUBLE.3.W.0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 |
0.IO.DOUBLE.3.W.1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 |
0.IO.DOUBLE.1.W.1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
0.OUT.IOB.CLKIN.W | 1 | 1 | 0 | 1 | 1 | 1 | 0 |
NONE | 1 | 1 | 0 | 1 | 1 | 1 | 1 |
INT:MUX.IMUX.BUFG.V | 0.19.1 |
---|---|
0.OUT.IOB.CLKIN.N | 0 |
NONE | 1 |
INT:MUX.LONG.H0 | 0.11.2 | 0.12.2 | 0.13.2 | 0.14.2 |
---|---|---|---|---|
0.LONG.IO.V0 | 0 | 0 | 0 | 1 |
0.DEC.V0 | 0 | 0 | 1 | 0 |
0.OUT.LR.IOB1.I2 | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.H1 | 0.18.2 | 0.15.2 | 0.17.2 | 0.16.2 |
---|---|---|---|---|
0.LONG.IO.V1 | 0 | 0 | 0 | 1 |
0.DEC.V1 | 0 | 0 | 1 | 0 |
0.OUT.LR.IOB1.I2 | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.H2 | 0.18.1 | 0.17.1 |
---|---|---|
0.LONG.IO.V2 | 0 | 0 |
0.DEC.V2 | 0 | 1 |
NONE | 1 | 1 |
INT:MUX.LONG.IO.H0 | 0.0.2 | 0.3.1 |
---|---|---|
0.LONG.IO.V2 | 0 | 0 |
0.LONG.IO.V0 | 0 | 1 |
NONE | 1 | 1 |
INT:MUX.LONG.IO.H1 | 0.5.4 | 0.5.3 |
---|---|---|
0.LONG.IO.V3 | 0 | 0 |
0.LONG.IO.V1 | 0 | 1 |
NONE | 1 | 1 |
INT:MUX.LONG.IO.H2 | 0.6.1 | 0.5.1 |
---|---|---|
0.LONG.IO.V0 | 0 | 0 |
0.LONG.IO.V2 | 0 | 1 |
NONE | 1 | 1 |
INT:MUX.LONG.IO.H3 | 0.0.4 | 0.3.3 |
---|---|---|
0.LONG.IO.V1 | 0 | 0 |
0.LONG.IO.V3 | 0 | 1 |
NONE | 1 | 1 |
INT:MUX.LONG.IO.V0 | 0.6.2 | 0.9.1 | 0.10.1 | 0.11.1 |
---|---|---|---|---|
0.LONG.H0 | 0 | 0 | 0 | 1 |
0.LONG.IO.H2 | 0 | 0 | 1 | 0 |
0.LONG.IO.H0 | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.V1 | 0.7.3 | 0.9.3 | 0.10.3 | 0.11.3 |
---|---|---|---|---|
0.LONG.H1 | 0 | 0 | 0 | 1 |
0.LONG.IO.H3 | 0 | 0 | 1 | 0 |
0.LONG.IO.H1 | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.V2 | 0.15.1 | 0.12.1 | 0.14.1 | 0.13.1 |
---|---|---|---|---|
0.LONG.H2 | 0 | 0 | 0 | 1 |
0.LONG.IO.H0 | 0 | 0 | 1 | 0 |
0.LONG.IO.H2 | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.V3 | 0.14.3 | 0.13.3 |
---|---|---|
0.LONG.IO.H1 | 0 | 0 |
0.LONG.IO.H3 | 0 | 1 |
NONE | 1 | 1 |
MISC:INPUT | 0.1.6 |
---|---|
CMOS | 0 |
TTL | 1 |
MISC:TM_LEFT | 0.12.3 |
---|---|
MISC:TM_TOP | 0.6.4 |
PULLUP_DEC0_H:ENABLE | 0.6.3 |
PULLUP_DEC0_V:ENABLE | 0.8.0 |
PULLUP_DEC1_H:ENABLE | 0.4.3 |
PULLUP_DEC1_V:ENABLE | 0.10.0 |
PULLUP_DEC2_H:ENABLE | 0.4.2 |
PULLUP_DEC2_V:ENABLE | 0.9.0 |
PULLUP_DEC3_H:ENABLE | 0.5.2 |
PULLUP_DEC3_V:ENABLE | 0.15.0 |
inverted | ~[0] |
Tile CNR.BR
Cells: 1 IRIs: 0
Muxes
Destination | Sources |
---|---|
SINGLE.H0 | SINGLE.H0.E, SINGLE.V0, SINGLE.V0.S, IO.DOUBLE.0.E.0, IO.DOUBLE.0.S.1, DEC.V0, OUT.LR.IOB1.I2.S |
SINGLE.H0.E | SINGLE.H0, SINGLE.V0, SINGLE.V0.S |
SINGLE.H1 | SINGLE.H1.E, SINGLE.V1, SINGLE.V1.S, IO.DOUBLE.0.E.1, LONG.IO.V0, OUT.STARTUP.Q3 |
SINGLE.H1.E | SINGLE.H1, SINGLE.V1, SINGLE.V1.S, LONG.V0 |
SINGLE.H2 | SINGLE.H2.E, SINGLE.V2, SINGLE.V2.S, IO.DOUBLE.1.E.0, IO.DOUBLE.1.S.1, LONG.IO.V1, OUT.STARTUP.Q1Q4 |
SINGLE.H2.E | SINGLE.H2, SINGLE.V2, SINGLE.V2.S, LONG.V1 |
SINGLE.H3 | SINGLE.H3.E, SINGLE.V3, SINGLE.V3.S, IO.DOUBLE.1.E.1, DEC.V1, OUT.LR.IOB1.I1.S |
SINGLE.H3.E | SINGLE.H3, SINGLE.V3, SINGLE.V3.S, LONG.V2 |
SINGLE.H4 | SINGLE.H4.E, SINGLE.V4, SINGLE.V4.S, IO.DOUBLE.2.E.0, IO.DOUBLE.2.S.1, LONG.V3, DEC.V2, OUT.LR.IOB1.I2.S |
SINGLE.H4.E | SINGLE.H4, SINGLE.V4, SINGLE.V4.S |
SINGLE.H5 | SINGLE.H5.E, SINGLE.V5, SINGLE.V5.S, IO.DOUBLE.2.E.1, LONG.V4, LONG.IO.V2, OUT.STARTUP.Q3 |
SINGLE.H5.E | SINGLE.H5, SINGLE.V5, SINGLE.V5.S |
SINGLE.H6 | SINGLE.H6.E, SINGLE.V6, SINGLE.V6.S, IO.DOUBLE.3.E.0, IO.DOUBLE.3.S.1, LONG.V5, LONG.IO.V3, OUT.STARTUP.Q1Q4 |
SINGLE.H6.E | SINGLE.H6, SINGLE.V6, SINGLE.V6.S |
SINGLE.H7 | SINGLE.H7.E, SINGLE.V7, SINGLE.V7.S, IO.DOUBLE.3.E.1, DEC.V3, OUT.LR.IOB1.I1.S |
SINGLE.H7.E | SINGLE.H7, SINGLE.V7, SINGLE.V7.S |
SINGLE.V0 | GND, SINGLE.H0, SINGLE.H0.E, SINGLE.V0.S, IO.DOUBLE.0.S.1, DEC.H3, OUT.BT.IOB1.I2.E |
SINGLE.V0.S | SINGLE.H0, SINGLE.H0.E, SINGLE.V0 |
SINGLE.V1 | SINGLE.H1, SINGLE.H1.E, SINGLE.V1.S, IO.DOUBLE.0.E.1, IO.DOUBLE.0.S.2, LONG.IO.H0, OUT.STARTUP.DONEIN |
SINGLE.V1.S | SINGLE.H1, SINGLE.H1.E, SINGLE.V1 |
SINGLE.V2 | SINGLE.H2, SINGLE.H2.E, SINGLE.V2.S, IO.DOUBLE.1.S.1, LONG.IO.H1, OUT.STARTUP.Q2 |
SINGLE.V2.S | SINGLE.H2, SINGLE.H2.E, SINGLE.V2 |
SINGLE.V3 | SINGLE.H3, SINGLE.H3.E, SINGLE.V3.S, IO.DOUBLE.1.E.1, IO.DOUBLE.1.S.2, DEC.H2, OUT.BT.IOB1.I1.E |
SINGLE.V3.S | SINGLE.H3, SINGLE.H3.E, SINGLE.V3 |
SINGLE.V4 | SINGLE.H4, SINGLE.H4.E, SINGLE.V4.S, IO.DOUBLE.2.S.1, LONG.H3, DEC.H1, OUT.BT.IOB1.I2.E |
SINGLE.V4.S | SINGLE.H4, SINGLE.H4.E, SINGLE.V4 |
SINGLE.V5 | SINGLE.H5, SINGLE.H5.E, SINGLE.V5.S, IO.DOUBLE.2.E.1, IO.DOUBLE.2.S.2, LONG.H4, LONG.IO.H2, OUT.STARTUP.DONEIN |
SINGLE.V5.S | SINGLE.H5, SINGLE.H5.E, SINGLE.V5 |
SINGLE.V6 | SINGLE.H6, SINGLE.H6.E, SINGLE.V6.S, IO.DOUBLE.3.S.1, LONG.H5, LONG.IO.H3, OUT.STARTUP.Q2 |
SINGLE.V6.S | SINGLE.H6, SINGLE.H6.E, SINGLE.V6 |
SINGLE.V7 | GND, SINGLE.H7, SINGLE.H7.E, SINGLE.V7.S, IO.DOUBLE.3.E.1, IO.DOUBLE.3.S.2, DEC.H0, OUT.BT.IOB1.I1.E |
SINGLE.V7.S | SINGLE.H7, SINGLE.H7.E, SINGLE.V7 |
DOUBLE.H0.0 | DOUBLE.H0.2, DOUBLE.V0.0, DOUBLE.V0.2, IO.DOUBLE.1.E.0, IO.DOUBLE.1.E.1, IO.DOUBLE.1.S.1, OUT.STARTUP.Q1Q4 |
DOUBLE.H0.1 | IO.DOUBLE.0.E.0, IO.DOUBLE.0.E.1, IO.DOUBLE.0.S.1, OUT.LR.IOB1.I1.S |
DOUBLE.H0.2 | DOUBLE.H0.0, DOUBLE.V0.0, DOUBLE.V0.2 |
DOUBLE.H1.0 | DOUBLE.H1.2, DOUBLE.V1.0, DOUBLE.V1.2, IO.DOUBLE.2.E.0, IO.DOUBLE.2.E.1, IO.DOUBLE.2.S.1, OUT.LR.IOB1.I2.S |
DOUBLE.H1.1 | IO.DOUBLE.3.E.0, IO.DOUBLE.3.E.1, IO.DOUBLE.3.S.1, OUT.STARTUP.Q3 |
DOUBLE.H1.2 | DOUBLE.H1.0, DOUBLE.V1.0, DOUBLE.V1.2 |
DOUBLE.V0.0 | DOUBLE.H0.0, DOUBLE.H0.2, DOUBLE.V0.2, IO.DOUBLE.1.E.1, IO.DOUBLE.1.S.1, IO.DOUBLE.1.S.2, OUT.BT.IOB1.I1.E |
DOUBLE.V0.1 | IO.DOUBLE.0.E.1, IO.DOUBLE.0.S.1, IO.DOUBLE.0.S.2, OUT.STARTUP.Q2 |
DOUBLE.V0.2 | DOUBLE.H0.0, DOUBLE.H0.2, DOUBLE.V0.0 |
DOUBLE.V1.0 | DOUBLE.H1.0, DOUBLE.H1.2, DOUBLE.V1.2, IO.DOUBLE.2.E.1, IO.DOUBLE.2.S.1, IO.DOUBLE.2.S.2, OUT.STARTUP.DONEIN |
DOUBLE.V1.1 | IO.DOUBLE.3.E.1, IO.DOUBLE.3.S.1, IO.DOUBLE.3.S.2, OUT.BT.IOB1.I2.E |
DOUBLE.V1.2 | DOUBLE.H1.0, DOUBLE.H1.2, DOUBLE.V1.0 |
IO.DOUBLE.0.E.0 | SINGLE.H0, DOUBLE.H0.1, IO.DOUBLE.0.S.1, IO.DBUF.V0 |
IO.DOUBLE.0.E.1 | SINGLE.H1, SINGLE.V1, DOUBLE.H0.1, DOUBLE.V0.1, IO.DOUBLE.0.S.2, IO.DBUF.H1 |
IO.DOUBLE.0.S.1 | SINGLE.H0, SINGLE.V0, DOUBLE.H0.1, DOUBLE.V0.1, IO.DOUBLE.0.E.0, IO.DBUF.V1 |
IO.DOUBLE.0.S.2 | SINGLE.V1, DOUBLE.V0.1, IO.DOUBLE.0.E.1, IO.DBUF.H0 |
IO.DOUBLE.1.E.0 | SINGLE.H2, DOUBLE.H0.0, IO.DOUBLE.1.S.1, IO.DBUF.V0 |
IO.DOUBLE.1.E.1 | SINGLE.H3, SINGLE.V3, DOUBLE.H0.0, DOUBLE.V0.0, IO.DOUBLE.1.S.2, IO.DBUF.H1 |
IO.DOUBLE.1.S.1 | SINGLE.H2, SINGLE.V2, DOUBLE.H0.0, DOUBLE.V0.0, IO.DOUBLE.1.E.0, IO.DBUF.V1 |
IO.DOUBLE.1.S.2 | SINGLE.V3, DOUBLE.V0.0, IO.DOUBLE.1.E.1, IO.DBUF.H0 |
IO.DOUBLE.2.E.0 | SINGLE.H4, DOUBLE.H1.0, IO.DOUBLE.2.S.1, IO.DBUF.V0 |
IO.DOUBLE.2.E.1 | SINGLE.H5, SINGLE.V5, DOUBLE.H1.0, DOUBLE.V1.0, IO.DOUBLE.2.S.2, IO.DBUF.H1 |
IO.DOUBLE.2.S.1 | SINGLE.H4, SINGLE.V4, DOUBLE.H1.0, DOUBLE.V1.0, IO.DOUBLE.2.E.0, IO.DBUF.V1 |
IO.DOUBLE.2.S.2 | SINGLE.V5, DOUBLE.V1.0, IO.DOUBLE.2.E.1, IO.DBUF.H0 |
IO.DOUBLE.3.E.0 | SINGLE.H6, DOUBLE.H1.1, IO.DOUBLE.3.S.1, IO.DBUF.V0 |
IO.DOUBLE.3.E.1 | SINGLE.H7, SINGLE.V7, DOUBLE.H1.1, DOUBLE.V1.1, IO.DOUBLE.3.S.2, IO.DBUF.H1 |
IO.DOUBLE.3.S.1 | SINGLE.H6, SINGLE.V6, DOUBLE.H1.1, DOUBLE.V1.1, IO.DOUBLE.3.E.0, IO.DBUF.V1 |
IO.DOUBLE.3.S.2 | SINGLE.V7, DOUBLE.V1.1, IO.DOUBLE.3.E.1, IO.DBUF.H0 |
IO.DBUF.H0 | IO.DOUBLE.0.E.1, IO.DOUBLE.1.E.1, IO.DOUBLE.2.E.1, IO.DOUBLE.3.E.1 |
IO.DBUF.H1 | IO.DOUBLE.0.S.2, IO.DOUBLE.1.S.2, IO.DOUBLE.2.S.2, IO.DOUBLE.3.S.2 |
IO.DBUF.V0 | IO.DOUBLE.0.S.1, IO.DOUBLE.1.S.1, IO.DOUBLE.2.S.1, IO.DOUBLE.3.S.1 |
IO.DBUF.V1 | IO.DOUBLE.0.E.0, IO.DOUBLE.1.E.0, IO.DOUBLE.2.E.0, IO.DOUBLE.3.E.0 |
LONG.H3 | SINGLE.V4, LONG.IO.V1, DEC.V2 |
LONG.H4 | SINGLE.V5, LONG.IO.V2, DEC.V1, OUT.STARTUP.Q3 |
LONG.H5 | SINGLE.V6, LONG.IO.V3, DEC.V0, OUT.STARTUP.Q3 |
LONG.V0 | SINGLE.H1.E, LONG.IO.H0, DEC.H0, OUT.BT.IOB1.I2.E |
LONG.V1 | SINGLE.H2.E, LONG.IO.H1, DEC.H1, OUT.BT.IOB1.I2.E |
LONG.V2 | SINGLE.H3.E, LONG.IO.H2, DEC.H2, OUT.BT.IOB1.I2.E |
LONG.V3 | SINGLE.H4, LONG.IO.H1, DEC.H1, OUT.STARTUP.DONEIN |
LONG.V4 | SINGLE.H5, LONG.IO.H2, DEC.H2, OUT.STARTUP.DONEIN |
LONG.V5 | SINGLE.H6, LONG.IO.H3, DEC.H3, OUT.STARTUP.DONEIN |
LONG.IO.H0 | SINGLE.V1, LONG.V0, LONG.IO.V0, LONG.IO.V2 |
LONG.IO.H1 | SINGLE.V2, LONG.V1, LONG.V3, LONG.IO.V1, LONG.IO.V3 |
LONG.IO.H2 | SINGLE.V5, LONG.V2, LONG.V4, LONG.IO.V0, LONG.IO.V2 |
LONG.IO.H3 | SINGLE.V6, LONG.V5, LONG.IO.V1, LONG.IO.V3 |
LONG.IO.V0 | SINGLE.H1, LONG.IO.H0, LONG.IO.H2 |
LONG.IO.V1 | SINGLE.H2, LONG.H3, LONG.IO.H1, LONG.IO.H3 |
LONG.IO.V2 | SINGLE.H5, LONG.H4, LONG.IO.H0, LONG.IO.H2 |
LONG.IO.V3 | SINGLE.H6, LONG.H5, LONG.IO.H1, LONG.IO.H3 |
IMUX.STARTUP.CLK | SINGLE.V2, SINGLE.V3, SINGLE.V4, SINGLE.V5 |
IMUX.STARTUP.GSR | SINGLE.H2, SINGLE.H3, SINGLE.H4, SINGLE.H5, DOUBLE.V0.0, DOUBLE.V1.1, LONG.V3, LONG.V4, LONG.V5 |
IMUX.STARTUP.GTS | SINGLE.V2, SINGLE.V3, SINGLE.V4, SINGLE.V5, DOUBLE.H0.1, DOUBLE.H1.0, LONG.H3, LONG.H4, LONG.H5 |
IMUX.READCLK.I | SINGLE.H2, SINGLE.H3, SINGLE.H4, SINGLE.H5 |
IMUX.BUFG.H | IO.DOUBLE.0.E.1, IO.DOUBLE.0.S.1, IO.DOUBLE.1.E.1, IO.DOUBLE.1.S.1, IO.DOUBLE.2.E.1, IO.DOUBLE.2.S.1, IO.DOUBLE.3.E.1, IO.DOUBLE.3.S.1, OUT.IOB.CLKIN.E |
IMUX.BUFG.V | OUT.IOB.CLKIN.S |
Bel PULLUP_DEC0_H
Pin | Direction | Wires |
---|---|---|
O | output | DEC.H0 |
Bel PULLUP_DEC1_H
Pin | Direction | Wires |
---|---|---|
O | output | DEC.H1 |
Bel PULLUP_DEC2_H
Pin | Direction | Wires |
---|---|---|
O | output | DEC.H2 |
Bel PULLUP_DEC3_H
Pin | Direction | Wires |
---|---|---|
O | output | DEC.H3 |
Bel PULLUP_DEC0_V
Pin | Direction | Wires |
---|---|---|
O | output | DEC.V0 |
Bel PULLUP_DEC1_V
Pin | Direction | Wires |
---|---|---|
O | output | DEC.V1 |
Bel PULLUP_DEC2_V
Pin | Direction | Wires |
---|---|---|
O | output | DEC.V2 |
Bel PULLUP_DEC3_V
Pin | Direction | Wires |
---|---|---|
O | output | DEC.V3 |
Bel BUFGLS_H
Pin | Direction | Wires |
---|---|---|
I | input | IMUX.BUFG.H |
Bel BUFGLS_V
Pin | Direction | Wires |
---|---|---|
I | input | IMUX.BUFG.V |
Bel COUT
Pin | Direction | Wires |
---|
Bel STARTUP
Pin | Direction | Wires |
---|---|---|
CLK | input | IMUX.STARTUP.CLK |
DONEIN | output | OUT.STARTUP.DONEIN |
GSR | input | IMUX.STARTUP.GSR |
GTS | input | IMUX.STARTUP.GTS |
Q1Q4 | output | OUT.STARTUP.Q1Q4 |
Q2 | output | OUT.STARTUP.Q2 |
Q3 | output | OUT.STARTUP.Q3 |
Bel READCLK
Pin | Direction | Wires |
---|---|---|
I | input | IMUX.READCLK.I |
Bel wires
Wire | Pins |
---|---|
DEC.H0 | PULLUP_DEC0_H.O |
DEC.H1 | PULLUP_DEC1_H.O |
DEC.H2 | PULLUP_DEC2_H.O |
DEC.H3 | PULLUP_DEC3_H.O |
DEC.V0 | PULLUP_DEC0_V.O |
DEC.V1 | PULLUP_DEC1_V.O |
DEC.V2 | PULLUP_DEC2_V.O |
DEC.V3 | PULLUP_DEC3_V.O |
IMUX.STARTUP.CLK | STARTUP.CLK |
IMUX.STARTUP.GSR | STARTUP.GSR |
IMUX.STARTUP.GTS | STARTUP.GTS |
IMUX.READCLK.I | READCLK.I |
IMUX.BUFG.H | BUFGLS_H.I |
IMUX.BUFG.V | BUFGLS_V.I |
OUT.STARTUP.DONEIN | STARTUP.DONEIN |
OUT.STARTUP.Q1Q4 | STARTUP.Q1Q4 |
OUT.STARTUP.Q2 | STARTUP.Q2 |
OUT.STARTUP.Q3 | STARTUP.Q3 |
Bitstream
DONE:PULL | 0.6.0 |
---|---|
PULLUP | 0 |
PULLNONE | 1 |
INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2 | 0.29.12 |
---|---|
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0 | 0.27.12 |
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2 | 0.28.12 |
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0 | 0.3.12 |
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1 | 0.3.9 |
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.S.1 | 0.1.12 |
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0 | 0.14.9 |
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1 | 0.11.12 |
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.S.1 | 0.16.12 |
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0 | 0.29.10 |
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2 | 0.29.11 |
INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2 | 0.33.9 |
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0 | 0.32.9 |
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2 | 0.33.7 |
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0 | 0.2.10 |
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1 | 0.4.9 |
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.S.1 | 0.2.9 |
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0 | 0.23.12 |
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1 | 0.20.12 |
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.S.1 | 0.19.12 |
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0 | 0.33.8 |
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2 | 0.34.8 |
INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2 | 0.27.11 |
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.E.1 | 0.28.1 |
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1 | 0.26.2 |
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2 | 0.30.1 |
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.E.1 | 0.25.1 |
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1 | 0.25.2 |
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2 | 0.26.1 |
INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2 | 0.34.7 |
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.E.1 | 0.27.0 |
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1 | 0.29.0 |
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2 | 0.32.1 |
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.E.1 | 0.36.0 |
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1 | 0.34.1 |
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2 | 0.36.1 |
INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.S.1 | 0.10.12 |
INT:BIPASS.IO.DOUBLE.0.E.1.IO.DOUBLE.0.S.2 | 0.24.2 |
INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.S.1 | 0.2.12 |
INT:BIPASS.IO.DOUBLE.1.E.1.IO.DOUBLE.1.S.2 | 0.27.2 |
INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.S.1 | 0.1.10 |
INT:BIPASS.IO.DOUBLE.2.E.1.IO.DOUBLE.2.S.2 | 0.30.0 |
INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.S.1 | 0.21.12 |
INT:BIPASS.IO.DOUBLE.3.E.1.IO.DOUBLE.3.S.2 | 0.35.1 |
INT:BIPASS.SINGLE.H0.E.SINGLE.V0 | 0.26.8 |
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S | 0.28.8 |
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.0 | 0.13.9 |
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.S.1 | 0.17.12 |
INT:BIPASS.SINGLE.H0.SINGLE.H0.E | 0.28.9 |
INT:BIPASS.SINGLE.H0.SINGLE.V0 | 0.27.8 |
INT:BIPASS.SINGLE.H0.SINGLE.V0.S | 0.30.7 |
INT:BIPASS.SINGLE.H1.E.SINGLE.V1 | 0.30.9 |
INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S | 0.31.8 |
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.1 | 0.15.12 |
INT:BIPASS.SINGLE.H1.SINGLE.H1.E | 0.30.8 |
INT:BIPASS.SINGLE.H1.SINGLE.V1 | 0.29.8 |
INT:BIPASS.SINGLE.H1.SINGLE.V1.S | 0.29.7 |
INT:BIPASS.SINGLE.H2.E.SINGLE.V2 | 0.31.12 |
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S | 0.32.12 |
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0 | 0.4.12 |
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.S.1 | 0.0.12 |
INT:BIPASS.SINGLE.H2.SINGLE.H2.E | 0.32.11 |
INT:BIPASS.SINGLE.H2.SINGLE.V2 | 0.31.11 |
INT:BIPASS.SINGLE.H2.SINGLE.V2.S | 0.33.11 |
INT:BIPASS.SINGLE.H3.E.SINGLE.V3 | 0.32.10 |
INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S | 0.33.10 |
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1 | 0.3.8 |
INT:BIPASS.SINGLE.H3.SINGLE.H3.E | 0.31.10 |
INT:BIPASS.SINGLE.H3.SINGLE.V3 | 0.28.10 |
INT:BIPASS.SINGLE.H3.SINGLE.V3.S | 0.30.10 |
INT:BIPASS.SINGLE.H4.E.SINGLE.V4 | 0.39.11 |
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S | 0.37.9 |
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.0 | 0.3.10 |
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.S.1 | 0.1.9 |
INT:BIPASS.SINGLE.H4.SINGLE.H4.E | 0.36.9 |
INT:BIPASS.SINGLE.H4.SINGLE.V4 | 0.39.9 |
INT:BIPASS.SINGLE.H4.SINGLE.V4.S | 0.35.9 |
INT:BIPASS.SINGLE.H5.E.SINGLE.V5 | 0.36.8 |
INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S | 0.38.8 |
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.1 | 0.2.8 |
INT:BIPASS.SINGLE.H5.SINGLE.H5.E | 0.35.8 |
INT:BIPASS.SINGLE.H5.SINGLE.V5 | 0.36.7 |
INT:BIPASS.SINGLE.H5.SINGLE.V5.S | 0.37.8 |
INT:BIPASS.SINGLE.H6.E.SINGLE.V6 | 0.34.10 |
INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S | 0.37.10 |
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0 | 0.24.12 |
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.S.1 | 0.18.12 |
INT:BIPASS.SINGLE.H6.SINGLE.H6.E | 0.35.10 |
INT:BIPASS.SINGLE.H6.SINGLE.V6 | 0.36.11 |
INT:BIPASS.SINGLE.H6.SINGLE.V6.S | 0.36.10 |
INT:BIPASS.SINGLE.H7.E.SINGLE.V7 | 0.37.12 |
INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S | 0.39.12 |
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1 | 0.22.12 |
INT:BIPASS.SINGLE.H7.SINGLE.H7.E | 0.38.12 |
INT:BIPASS.SINGLE.H7.SINGLE.V7 | 0.35.12 |
INT:BIPASS.SINGLE.H7.SINGLE.V7.S | 0.37.11 |
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.1 | 0.24.0 |
INT:BIPASS.SINGLE.V0.SINGLE.V0.S | 0.29.9 |
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.E.1 | 0.24.1 |
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2 | 0.27.1 |
INT:BIPASS.SINGLE.V1.SINGLE.V1.S | 0.31.7 |
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1 | 0.29.1 |
INT:BIPASS.SINGLE.V2.SINGLE.V2.S | 0.30.12 |
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.E.1 | 0.25.0 |
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.2 | 0.31.1 |
INT:BIPASS.SINGLE.V3.SINGLE.V3.S | 0.27.10 |
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1 | 0.26.0 |
INT:BIPASS.SINGLE.V4.SINGLE.V4.S | 0.38.9 |
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.E.1 | 0.28.0 |
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.2 | 0.33.1 |
INT:BIPASS.SINGLE.V5.SINGLE.V5.S | 0.39.8 |
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1 | 0.37.0 |
INT:BIPASS.SINGLE.V6.SINGLE.V6.S | 0.38.10 |
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.E.1 | 0.35.0 |
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2 | 0.37.1 |
INT:BIPASS.SINGLE.V7.SINGLE.V7.S | 0.36.12 |
INT:BUF.LONG.H3.0.SINGLE.V4 | 0.24.6 |
INT:BUF.LONG.H4.0.SINGLE.V5 | 0.19.8 |
INT:BUF.LONG.H5.0.SINGLE.V6 | 0.18.9 |
INT:BUF.LONG.V0.0.SINGLE.H1.E | 0.17.8 |
INT:BUF.LONG.V1.0.SINGLE.H2.E | 0.38.11 |
INT:BUF.LONG.V2.0.SINGLE.H3.E | 0.19.9 |
INT:BUF.LONG.V3.0.SINGLE.H4 | 0.15.8 |
INT:BUF.LONG.V4.0.SINGLE.H5 | 0.16.8 |
INT:BUF.LONG.V5.0.SINGLE.H6 | 0.35.11 |
INT:PASS.DOUBLE.H0.0.0.OUT.STARTUP.Q1Q4 | 0.7.10 |
INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.S | 0.12.8 |
INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S | 0.25.9 |
INT:PASS.DOUBLE.H1.1.0.OUT.STARTUP.Q3 | 0.21.9 |
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E | 0.13.3 |
INT:PASS.DOUBLE.V0.1.0.OUT.STARTUP.Q2 | 0.13.6 |
INT:PASS.DOUBLE.V1.0.0.OUT.STARTUP.DONEIN | 0.29.3 |
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E | 0.38.6 |
INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0 | 0.14.8 |
INT:PASS.IO.DOUBLE.0.E.1.0.IO.DBUF.H1 | 0.23.1 |
INT:PASS.IO.DOUBLE.0.S.1.0.IO.DBUF.V1 | 0.10.9 |
INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0 | 0.31.0 |
INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0 | 0.13.8 |
INT:PASS.IO.DOUBLE.1.E.1.0.IO.DBUF.H1 | 0.21.1 |
INT:PASS.IO.DOUBLE.1.S.1.0.IO.DBUF.V1 | 0.7.9 |
INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0 | 0.32.0 |
INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0 | 0.11.9 |
INT:PASS.IO.DOUBLE.2.E.1.0.IO.DBUF.H1 | 0.22.1 |
INT:PASS.IO.DOUBLE.2.S.1.0.IO.DBUF.V1 | 0.9.9 |
INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0 | 0.33.0 |
INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0 | 0.12.9 |
INT:PASS.IO.DOUBLE.3.E.1.0.IO.DBUF.H1 | 0.23.0 |
INT:PASS.IO.DOUBLE.3.S.1.0.IO.DBUF.V1 | 0.8.9 |
INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0 | 0.34.0 |
INT:PASS.SINGLE.H0.0.DEC.V0 | 0.10.8 |
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S | 0.24.9 |
INT:PASS.SINGLE.H1.0.LONG.IO.V0 | 0.16.9 |
INT:PASS.SINGLE.H1.0.OUT.STARTUP.Q3 | 0.20.9 |
INT:PASS.SINGLE.H1.E.0.LONG.V0 | 0.32.8 |
INT:PASS.SINGLE.H2.0.LONG.IO.V1 | 0.8.12 |
INT:PASS.SINGLE.H2.0.OUT.STARTUP.Q1Q4 | 0.6.10 |
INT:PASS.SINGLE.H2.E.0.LONG.V1 | 0.40.12 |
INT:PASS.SINGLE.H3.0.DEC.V1 | 0.5.10 |
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S | 0.11.8 |
INT:PASS.SINGLE.H3.E.0.LONG.V2 | 0.34.9 |
INT:PASS.SINGLE.H4.0.DEC.V2 | 0.8.8 |
INT:PASS.SINGLE.H4.0.LONG.V3 | 0.35.7 |
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S | 0.23.9 |
INT:PASS.SINGLE.H5.0.LONG.IO.V2 | 0.9.8 |
INT:PASS.SINGLE.H5.0.LONG.V4 | 0.28.7 |
INT:PASS.SINGLE.H5.0.OUT.STARTUP.Q3 | 0.22.9 |
INT:PASS.SINGLE.H6.0.LONG.IO.V3 | 0.15.9 |
INT:PASS.SINGLE.H6.0.LONG.V5 | 0.34.12 |
INT:PASS.SINGLE.H6.0.OUT.STARTUP.Q1Q4 | 0.8.10 |
INT:PASS.SINGLE.H7.0.DEC.V3 | 0.5.9 |
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S | 0.6.9 |
INT:PASS.SINGLE.V0.0.DEC.H3 | 0.14.3 |
INT:PASS.SINGLE.V0.0.GND | 0.26.9 |
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E | 0.26.4 |
INT:PASS.SINGLE.V1.0.LONG.IO.H0 | 0.18.3 |
INT:PASS.SINGLE.V1.0.OUT.STARTUP.DONEIN | 0.27.6 |
INT:PASS.SINGLE.V2.0.LONG.IO.H1 | 0.19.3 |
INT:PASS.SINGLE.V2.0.OUT.STARTUP.Q2 | 0.12.6 |
INT:PASS.SINGLE.V3.0.DEC.H2 | 0.36.6 |
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E | 0.30.3 |
INT:PASS.SINGLE.V4.0.DEC.H1 | 0.39.6 |
INT:PASS.SINGLE.V4.0.LONG.H3 | 0.26.10 |
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E | 0.40.6 |
INT:PASS.SINGLE.V5.0.LONG.H4 | 0.40.8 |
INT:PASS.SINGLE.V5.0.LONG.IO.H2 | 0.28.3 |
INT:PASS.SINGLE.V5.0.OUT.STARTUP.DONEIN | 0.27.3 |
INT:PASS.SINGLE.V6.0.LONG.H5 | 0.40.10 |
INT:PASS.SINGLE.V6.0.LONG.IO.H3 | 0.10.4 |
INT:PASS.SINGLE.V6.0.OUT.STARTUP.Q2 | 0.11.6 |
INT:PASS.SINGLE.V7.0.DEC.H0 | 0.34.3 |
INT:PASS.SINGLE.V7.0.GND | 0.26.12 |
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E | 0.36.3 |
MISC:TCTEST | 0.4.0 |
PULLUP_DEC0_H:ENABLE | 0.39.2 |
PULLUP_DEC0_V:ENABLE | 0.8.4 |
PULLUP_DEC1_H:ENABLE | 0.37.3 |
PULLUP_DEC1_V:ENABLE | 0.11.4 |
PULLUP_DEC2_H:ENABLE | 0.38.3 |
PULLUP_DEC2_V:ENABLE | 0.9.4 |
PULLUP_DEC3_H:ENABLE | 0.39.3 |
PULLUP_DEC3_V:ENABLE | 0.12.4 |
STARTUP:CRC | 0.0.1 |
STARTUP:ENABLE.GSR | 0.8.0 |
STARTUP:ENABLE.GTS | 0.5.0 |
STARTUP:INV.GSR | 0.9.0 |
STARTUP:INV.GTS | 0.7.0 |
STARTUP:SYNC_TO_DONE | 0.11.0 |
inverted | ~[0] |
INT:MUX.IMUX.BUFG.H | 0.16.6 | 0.17.6 | 0.19.6 | 0.18.6 | 0.20.6 | 0.17.4 | 0.15.6 |
---|---|---|---|---|---|---|---|
0.IO.DOUBLE.3.E.1 | 0 | 0 | 0 | 1 | 1 | 0 | 1 |
0.IO.DOUBLE.0.E.1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 |
0.IO.DOUBLE.2.S.1 | 0 | 0 | 1 | 0 | 1 | 0 | 1 |
0.IO.DOUBLE.0.S.1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 |
0.IO.DOUBLE.3.S.1 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
0.IO.DOUBLE.1.E.1 | 0 | 0 | 1 | 1 | 0 | 1 | 1 |
0.IO.DOUBLE.1.S.1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 |
0.IO.DOUBLE.2.E.1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
0.OUT.IOB.CLKIN.E | 1 | 0 | 1 | 1 | 1 | 1 | 0 |
NONE | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
INT:MUX.IMUX.BUFG.V | 0.20.1 |
---|---|
0.OUT.IOB.CLKIN.S | 0 |
NONE | 1 |
INT:MUX.IMUX.READCLK.I | 0.4.8 | 0.7.8 | 0.6.8 | 0.5.8 |
---|---|---|---|---|
0.SINGLE.H2 | 0 | 0 | 1 | 1 |
0.SINGLE.H3 | 0 | 1 | 0 | 1 |
0.SINGLE.H4 | 0 | 1 | 1 | 0 |
0.SINGLE.H5 | 1 | 1 | 1 | 1 |
INT:MUX.IMUX.STARTUP.CLK | 0.37.7 | 0.38.7 | 0.39.7 | 0.40.7 |
---|---|---|---|---|
0.SINGLE.V3 | 0 | 0 | 1 | 1 |
0.SINGLE.V4 | 0 | 1 | 0 | 1 |
0.SINGLE.V5 | 0 | 1 | 1 | 0 |
0.SINGLE.V2 | 1 | 1 | 1 | 1 |
INT:MUX.IMUX.STARTUP.GSR | 0.29.6 | 0.28.6 | 0.33.6 | 0.31.6 | 0.30.6 | 0.32.6 |
---|---|---|---|---|---|---|
0.SINGLE.H2 | 0 | 0 | 0 | 1 | 1 | 1 |
0.SINGLE.H3 | 0 | 0 | 1 | 0 | 1 | 1 |
0.LONG.V4 | 0 | 0 | 1 | 1 | 1 | 0 |
0.LONG.V5 | 0 | 1 | 0 | 1 | 1 | 1 |
0.DOUBLE.V1.1 | 0 | 1 | 1 | 0 | 1 | 1 |
0.SINGLE.H4 | 0 | 1 | 1 | 1 | 0 | 1 |
0.LONG.V3 | 0 | 1 | 1 | 1 | 1 | 0 |
0.DOUBLE.V0.0 | 1 | 0 | 1 | 1 | 1 | 1 |
0.SINGLE.H5 | 1 | 1 | 1 | 1 | 1 | 1 |
INT:MUX.IMUX.STARTUP.GTS | 0.30.4 | 0.31.4 | 0.32.4 | 0.33.4 | 0.34.4 | 0.29.4 |
---|---|---|---|---|---|---|
0.LONG.H3 | 0 | 0 | 1 | 1 | 1 | 0 |
0.SINGLE.V2 | 0 | 0 | 1 | 1 | 1 | 1 |
0.SINGLE.V3 | 0 | 1 | 0 | 1 | 1 | 1 |
0.LONG.H5 | 0 | 1 | 1 | 0 | 1 | 0 |
0.SINGLE.V4 | 0 | 1 | 1 | 0 | 1 | 1 |
0.LONG.H4 | 0 | 1 | 1 | 1 | 0 | 0 |
0.SINGLE.V5 | 0 | 1 | 1 | 1 | 0 | 1 |
0.DOUBLE.H1.0 | 1 | 1 | 1 | 1 | 1 | 0 |
0.DOUBLE.H0.1 | 1 | 1 | 1 | 1 | 1 | 1 |
INT:MUX.IO.DBUF.H0 | 0.7.3 | 0.11.3 | 0.8.3 | 0.9.3 |
---|---|---|---|---|
0.IO.DOUBLE.0.E.1 | 0 | 0 | 1 | 1 |
0.IO.DOUBLE.2.E.1 | 0 | 1 | 0 | 1 |
0.IO.DOUBLE.3.E.1 | 0 | 1 | 1 | 0 |
0.IO.DOUBLE.1.E.1 | 1 | 1 | 1 | 1 |
INT:MUX.IO.DBUF.H1 | 0.38.1 | 0.39.1 | 0.38.0 | 0.39.0 |
---|---|---|---|---|
0.IO.DOUBLE.1.S.2 | 0 | 0 | 1 | 1 |
0.IO.DOUBLE.2.S.2 | 0 | 1 | 0 | 1 |
0.IO.DOUBLE.3.S.2 | 0 | 1 | 1 | 0 |
0.IO.DOUBLE.0.S.2 | 1 | 1 | 1 | 1 |
INT:MUX.IO.DBUF.V0 | 0.4.10 | 0.5.12 | 0.7.12 | 0.6.12 |
---|---|---|---|---|
0.IO.DOUBLE.1.S.1 | 0 | 0 | 1 | 1 |
0.IO.DOUBLE.2.S.1 | 0 | 1 | 0 | 1 |
0.IO.DOUBLE.3.S.1 | 0 | 1 | 1 | 0 |
0.IO.DOUBLE.0.S.1 | 1 | 1 | 1 | 1 |
INT:MUX.IO.DBUF.V1 | 0.9.12 | 0.13.12 | 0.12.12 | 0.14.12 |
---|---|---|---|---|
0.IO.DOUBLE.0.E.0 | 0 | 0 | 1 | 1 |
0.IO.DOUBLE.1.E.0 | 0 | 1 | 0 | 1 |
0.IO.DOUBLE.3.E.0 | 0 | 1 | 1 | 0 |
0.IO.DOUBLE.2.E.0 | 1 | 1 | 1 | 1 |
INT:MUX.LONG.H3 | 0.21.4 | 0.22.6 |
---|---|---|
0.LONG.IO.V1 | 0 | 0 |
0.DEC.V2 | 0 | 1 |
NONE | 1 | 1 |
INT:MUX.LONG.H4 | 0.10.6 | 0.6.6 | 0.9.6 | 0.7.6 |
---|---|---|---|---|
0.LONG.IO.V2 | 0 | 0 | 0 | 1 |
0.DEC.V1 | 0 | 0 | 1 | 0 |
0.OUT.STARTUP.Q3 | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.H5 | 0.18.4 | 0.19.4 | 0.21.6 | 0.20.4 |
---|---|---|---|---|
0.LONG.IO.V3 | 0 | 0 | 0 | 1 |
0.DEC.V0 | 0 | 0 | 1 | 0 |
0.OUT.STARTUP.Q3 | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.H0 | 0.29.2 | 0.28.2 | 0.23.2 | 0.22.2 |
---|---|---|---|---|
0.LONG.V0 | 0 | 0 | 1 | 1 |
0.SINGLE.V1 | 0 | 1 | 1 | 1 |
0.LONG.IO.V2 | 1 | 1 | 0 | 0 |
0.LONG.IO.V0 | 1 | 1 | 0 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.H1 | 0.33.2 | 0.30.2 | 0.32.2 | 0.31.2 | 0.14.2 | 0.13.2 |
---|---|---|---|---|---|---|
0.LONG.V1 | 0 | 0 | 0 | 1 | 1 | 1 |
0.LONG.V3 | 0 | 0 | 1 | 0 | 1 | 1 |
0.SINGLE.V2 | 0 | 1 | 1 | 1 | 1 | 1 |
0.LONG.IO.V3 | 1 | 1 | 1 | 1 | 0 | 0 |
0.LONG.IO.V1 | 1 | 1 | 1 | 1 | 0 | 1 |
NONE | 1 | 1 | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.H2 | 0.36.2 | 0.34.2 | 0.38.2 | 0.37.2 | 0.19.2 | 0.20.2 |
---|---|---|---|---|---|---|
0.LONG.V2 | 0 | 0 | 0 | 1 | 1 | 1 |
0.LONG.V4 | 0 | 0 | 1 | 0 | 1 | 1 |
0.SINGLE.V5 | 0 | 1 | 1 | 1 | 1 | 1 |
0.LONG.IO.V0 | 1 | 1 | 1 | 1 | 0 | 0 |
0.LONG.IO.V2 | 1 | 1 | 1 | 1 | 0 | 1 |
NONE | 1 | 1 | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.H3 | 0.35.2 | 0.26.3 | 0.10.2 | 0.11.2 |
---|---|---|---|---|
0.LONG.V5 | 0 | 0 | 1 | 1 |
0.SINGLE.V6 | 0 | 1 | 1 | 1 |
0.LONG.IO.V1 | 1 | 1 | 0 | 0 |
0.LONG.IO.V3 | 1 | 1 | 0 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.V0 | 0.21.3 | 0.15.4 | 0.15.3 | 0.16.3 |
---|---|---|---|---|
0.LONG.IO.H0 | 0 | 0 | 0 | 1 |
0.LONG.IO.H2 | 0 | 0 | 1 | 0 |
0.SINGLE.H1 | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.V1 | 0.10.3 | 0.5.3 | 0.7.4 | 0.5.4 | 0.6.4 |
---|---|---|---|---|---|
0.LONG.H3 | 0 | 0 | 0 | 1 | 1 |
0.LONG.IO.H1 | 0 | 0 | 1 | 0 | 1 |
0.LONG.IO.H3 | 0 | 0 | 1 | 1 | 0 |
0.SINGLE.H2 | 0 | 1 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.V2 | 0.23.3 | 0.4.4 | 0.16.4 | 0.14.4 | 0.13.4 |
---|---|---|---|---|---|
0.LONG.H4 | 0 | 0 | 0 | 1 | 1 |
0.LONG.IO.H0 | 0 | 0 | 1 | 0 | 1 |
0.LONG.IO.H2 | 0 | 0 | 1 | 1 | 0 |
0.SINGLE.H5 | 0 | 1 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.V3 | 0.17.3 | 0.3.4 | 0.6.3 | 0.4.3 | 0.12.3 |
---|---|---|---|---|---|
0.LONG.H5 | 0 | 0 | 0 | 1 | 1 |
0.LONG.IO.H1 | 0 | 0 | 1 | 0 | 1 |
0.LONG.IO.H3 | 0 | 0 | 1 | 1 | 0 |
0.SINGLE.H6 | 0 | 1 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 | 1 |
INT:MUX.LONG.V0 | 0.20.3 | 0.22.3 | 0.24.3 | 0.25.3 |
---|---|---|---|---|
0.LONG.IO.H0 | 0 | 0 | 0 | 1 |
0.DEC.H0 | 0 | 0 | 1 | 0 |
0.OUT.BT.IOB1.I2.E | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.V1 | 0.38.4 | 0.37.6 | 0.37.4 | 0.39.4 |
---|---|---|---|---|
0.LONG.IO.H1 | 0 | 0 | 0 | 1 |
0.DEC.H1 | 0 | 0 | 1 | 0 |
0.OUT.BT.IOB1.I2.E | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.V2 | 0.28.4 | 0.25.6 | 0.27.4 | 0.26.6 |
---|---|---|---|---|
0.LONG.IO.H2 | 0 | 0 | 0 | 1 |
0.DEC.H2 | 0 | 0 | 1 | 0 |
0.OUT.BT.IOB1.I2.E | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.V3 | 0.35.4 | 0.34.6 | 0.35.6 | 0.36.4 |
---|---|---|---|---|
0.LONG.IO.H1 | 0 | 0 | 0 | 1 |
0.DEC.H1 | 0 | 0 | 1 | 0 |
0.OUT.STARTUP.DONEIN | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.V4 | 0.25.4 | 0.22.4 | 0.23.4 | 0.24.4 |
---|---|---|---|---|
0.LONG.IO.H2 | 0 | 0 | 0 | 1 |
0.DEC.H2 | 0 | 0 | 1 | 0 |
0.OUT.STARTUP.DONEIN | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.V5 | 0.35.3 | 0.31.3 | 0.33.3 | 0.32.3 |
---|---|---|---|---|
0.LONG.IO.H3 | 0 | 0 | 0 | 1 |
0.DEC.H3 | 0 | 0 | 1 | 0 |
0.OUT.STARTUP.DONEIN | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
OSC:ENABLE | 0.0.3 |
---|---|
non-inverted | [0] |
OSC:MUX.OUT0 | 0.1.3 | 0.0.10 | 0.1.8 | 0.1.4 |
---|---|---|---|---|
OSC:MUX.OUT1 | 0.3.3 | 0.0.9 | 0.0.8 | 0.0.4 |
F500K | 0 | 0 | 1 | 1 |
F16K | 0 | 1 | 0 | 1 |
F490 | 0 | 1 | 1 | 0 |
F15 | 1 | 1 | 1 | 1 |
STARTUP:CONFIG_RATE | 0.0.0 |
---|---|
FAST | 0 |
SLOW | 1 |
STARTUP:DONE_ACTIVE | 0.12.2 | 0.12.0 |
---|---|---|
Q2 | 0 | 0 |
Q3 | 0 | 1 |
Q1Q4 | 1 | 0 |
Q0 | 1 | 1 |
STARTUP:GSR_INACTIVE | 0.15.2 | 0.16.2 |
---|---|---|
DONE_IN | 0 | 0 |
Q3 | 0 | 1 |
Q1Q4 | 1 | 0 |
Q2 | 1 | 1 |
STARTUP:OUTPUTS_ACTIVE | 0.18.2 | 0.17.2 |
---|---|---|
Q3 | 0 | 0 |
DONE_IN | 0 | 1 |
Q2 | 1 | 0 |
Q1Q4 | 1 | 1 |
STARTUP:STARTUP_CLK | 0.10.0 |
---|---|
CCLK | 0 |
USERCLK | 1 |
Tile CNR.TR
Cells: 2 IRIs: 0
Muxes
Destination | Sources |
---|---|
TCELL0:SINGLE.V0 | TCELL0:IO.DOUBLE.0.E.1, TCELL0:DEC.H0, TCELL0:OUT.BT.IOB1.I2.E |
TCELL0:SINGLE.V1 | TCELL0:IO.DOUBLE.0.N.0, TCELL0:IO.DOUBLE.0.E.2, TCELL0:LONG.H0, TCELL0:LONG.IO.H0, TCELL0:OUT.OSC.MUX1 |
TCELL0:SINGLE.V2 | TCELL0:IO.DOUBLE.1.E.1, TCELL0:LONG.H1, TCELL0:LONG.IO.H1, TCELL0:OUT.UPDATE.O |
TCELL0:SINGLE.V3 | TCELL0:IO.DOUBLE.1.N.0, TCELL0:IO.DOUBLE.1.E.2, TCELL0:LONG.H2, TCELL0:DEC.H1, TCELL0:OUT.BT.IOB1.I1.E |
TCELL0:SINGLE.V4 | TCELL0:IO.DOUBLE.2.E.1, TCELL0:DEC.H2, TCELL0:OUT.BT.IOB1.I2.E |
TCELL0:SINGLE.V5 | TCELL0:IO.DOUBLE.2.N.0, TCELL0:IO.DOUBLE.2.E.2, TCELL0:LONG.IO.H2, TCELL0:OUT.OSC.MUX1 |
TCELL0:SINGLE.V6 | TCELL0:IO.DOUBLE.3.E.1, TCELL0:LONG.IO.H3, TCELL0:OUT.UPDATE.O |
TCELL0:SINGLE.V7 | TCELL0:IO.DOUBLE.3.N.0, TCELL0:IO.DOUBLE.3.E.2, TCELL0:DEC.H3, TCELL0:OUT.BT.IOB1.I1.E |
TCELL0:DOUBLE.V0.0 | TCELL0:IO.DOUBLE.1.N.0, TCELL0:IO.DOUBLE.1.E.1, TCELL0:IO.DOUBLE.1.E.2, TCELL0:OUT.BT.IOB1.I1.E |
TCELL0:DOUBLE.V0.1 | TCELL0:IO.DOUBLE.0.N.0, TCELL0:IO.DOUBLE.0.E.1, TCELL0:IO.DOUBLE.0.E.2, TCELL0:OUT.UPDATE.O |
TCELL0:DOUBLE.V1.0 | TCELL0:IO.DOUBLE.2.N.0, TCELL0:IO.DOUBLE.2.E.1, TCELL0:IO.DOUBLE.2.E.2, TCELL0:OUT.OSC.MUX1 |
TCELL0:DOUBLE.V1.1 | TCELL0:IO.DOUBLE.3.N.0, TCELL0:IO.DOUBLE.3.E.1, TCELL0:IO.DOUBLE.3.E.2, TCELL0:OUT.BT.IOB1.I2.E |
TCELL0:IO.DOUBLE.0.N.0 | TCELL0:SINGLE.V1, TCELL0:DOUBLE.V0.1, TCELL0:IO.DOUBLE.0.E.2, TCELL0:IO.DBUF.H0 |
TCELL0:IO.DOUBLE.0.E.1 | TCELL0:SINGLE.V0, TCELL0:DOUBLE.V0.1 |
TCELL0:IO.DOUBLE.0.E.2 | TCELL0:SINGLE.V1, TCELL0:DOUBLE.V0.1, TCELL0:IO.DOUBLE.0.N.0, TCELL0:IO.DBUF.H1 |
TCELL0:IO.DOUBLE.1.N.0 | TCELL0:SINGLE.V3, TCELL0:DOUBLE.V0.0, TCELL0:IO.DOUBLE.1.E.2, TCELL0:IO.DBUF.H0 |
TCELL0:IO.DOUBLE.1.E.1 | TCELL0:SINGLE.V2, TCELL0:DOUBLE.V0.0 |
TCELL0:IO.DOUBLE.1.E.2 | TCELL0:SINGLE.V3, TCELL0:DOUBLE.V0.0, TCELL0:IO.DOUBLE.1.N.0, TCELL0:IO.DBUF.H1 |
TCELL0:IO.DOUBLE.2.N.0 | TCELL0:SINGLE.V5, TCELL0:DOUBLE.V1.0, TCELL0:IO.DOUBLE.2.E.2, TCELL0:IO.DBUF.H0 |
TCELL0:IO.DOUBLE.2.E.1 | TCELL0:SINGLE.V4, TCELL0:DOUBLE.V1.0 |
TCELL0:IO.DOUBLE.2.E.2 | TCELL0:SINGLE.V5, TCELL0:DOUBLE.V1.0, TCELL0:IO.DOUBLE.2.N.0, TCELL0:IO.DBUF.H1 |
TCELL0:IO.DOUBLE.3.N.0 | TCELL0:SINGLE.V7, TCELL0:DOUBLE.V1.1, TCELL0:IO.DOUBLE.3.E.2, TCELL0:IO.DBUF.H0 |
TCELL0:IO.DOUBLE.3.E.1 | TCELL0:SINGLE.V6, TCELL0:DOUBLE.V1.1 |
TCELL0:IO.DOUBLE.3.E.2 | TCELL0:SINGLE.V7, TCELL0:DOUBLE.V1.1, TCELL0:IO.DOUBLE.3.N.0, TCELL0:IO.DBUF.H1 |
TCELL0:IO.DBUF.H0 | TCELL0:IO.DOUBLE.0.E.2, TCELL0:IO.DOUBLE.1.E.2, TCELL0:IO.DOUBLE.2.E.2, TCELL0:IO.DOUBLE.3.E.2 |
TCELL0:IO.DBUF.H1 | TCELL0:IO.DOUBLE.0.N.0, TCELL0:IO.DOUBLE.1.N.0, TCELL0:IO.DOUBLE.2.N.0, TCELL0:IO.DOUBLE.3.N.0 |
TCELL0:LONG.H0 | TCELL0:SINGLE.V1, TCELL0:LONG.IO.V0, TCELL0:DEC.V3, TCELL0:OUT.LR.IOB1.I2 |
TCELL0:LONG.H1 | TCELL0:SINGLE.V2, TCELL0:LONG.IO.V1, TCELL0:DEC.V2, TCELL0:OUT.LR.IOB1.I2 |
TCELL0:LONG.H2 | TCELL0:SINGLE.V3, TCELL0:LONG.IO.V2, TCELL0:DEC.V1 |
TCELL0:LONG.V0 | TCELL0:LONG.IO.H0, TCELL0:DEC.H3, TCELL0:OUT.BT.IOB1.I2.E |
TCELL0:LONG.V1 | TCELL0:LONG.IO.H1, TCELL0:DEC.H2, TCELL0:OUT.BT.IOB1.I2.E |
TCELL0:LONG.V2 | TCELL0:LONG.IO.H2, TCELL0:DEC.H1, TCELL0:OUT.BT.IOB1.I2.E |
TCELL0:LONG.V3 | TCELL0:LONG.IO.H1, TCELL0:DEC.H2, TCELL0:OUT.OSC.MUX1 |
TCELL0:LONG.V4 | TCELL0:LONG.IO.H2, TCELL0:DEC.H1, TCELL0:OUT.OSC.MUX1 |
TCELL0:LONG.V5 | TCELL0:LONG.IO.H3, TCELL0:DEC.H0, TCELL0:OUT.OSC.MUX1 |
TCELL0:LONG.IO.H0 | TCELL0:SINGLE.V1, TCELL0:LONG.V0, TCELL0:LONG.IO.V0, TCELL0:LONG.IO.V2 |
TCELL0:LONG.IO.H1 | TCELL0:SINGLE.V2, TCELL0:LONG.V1, TCELL0:LONG.V3, TCELL0:LONG.IO.V1, TCELL0:LONG.IO.V3 |
TCELL0:LONG.IO.H2 | TCELL0:SINGLE.V5, TCELL0:LONG.V2, TCELL0:LONG.V4, TCELL0:LONG.IO.V0, TCELL0:LONG.IO.V2 |
TCELL0:LONG.IO.H3 | TCELL0:SINGLE.V6, TCELL0:LONG.V5, TCELL0:LONG.IO.V1, TCELL0:LONG.IO.V3 |
TCELL0:LONG.IO.V0 | TCELL0:LONG.H0, TCELL0:LONG.IO.H0, TCELL0:LONG.IO.H2 |
TCELL0:LONG.IO.V1 | TCELL0:LONG.H1, TCELL0:LONG.IO.H1, TCELL0:LONG.IO.H3 |
TCELL0:LONG.IO.V2 | TCELL0:LONG.H2, TCELL0:LONG.IO.H0, TCELL0:LONG.IO.H2 |
TCELL0:LONG.IO.V3 | TCELL0:LONG.IO.H1, TCELL0:LONG.IO.H3 |
TCELL0:IMUX.BUFG.H | TCELL0:OUT.IOB.CLKIN.E |
TCELL0:IMUX.BUFG.V | TCELL0:IO.DOUBLE.0.E.1, TCELL0:IO.DOUBLE.0.E.2, TCELL0:IO.DOUBLE.1.E.1, TCELL0:IO.DOUBLE.1.E.2, TCELL0:IO.DOUBLE.2.E.1, TCELL0:IO.DOUBLE.2.E.2, TCELL0:IO.DOUBLE.3.E.1, TCELL0:IO.DOUBLE.3.E.2, TCELL0:OUT.IOB.CLKIN.N |
TCELL0:IMUX.TDO.O | TCELL0:SINGLE.V2, TCELL0:SINGLE.V3, TCELL0:SINGLE.V4, TCELL0:SINGLE.V5, TCELL0:LONG.H0, TCELL0:LONG.H1, TCELL0:LONG.H2, TCELL1:DOUBLE.H0.0, TCELL1:DOUBLE.H1.1 |
TCELL0:IMUX.TDO.T | TCELL0:DOUBLE.V0.0, TCELL0:DOUBLE.V1.1, TCELL0:LONG.V3, TCELL0:LONG.V4, TCELL0:LONG.V5, TCELL1:SINGLE.H2, TCELL1:SINGLE.H3, TCELL1:SINGLE.H4, TCELL1:SINGLE.H5 |
Bel PULLUP_DEC0_H
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.H0 |
Bel PULLUP_DEC1_H
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.H1 |
Bel PULLUP_DEC2_H
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.H2 |
Bel PULLUP_DEC3_H
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.H3 |
Bel PULLUP_DEC0_V
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.V0 |
Bel PULLUP_DEC1_V
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.V1 |
Bel PULLUP_DEC2_V
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.V2 |
Bel PULLUP_DEC3_V
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:DEC.V3 |
Bel BUFGLS_H
Pin | Direction | Wires |
---|---|---|
I | input | TCELL0:IMUX.BUFG.H |
Bel BUFGLS_V
Pin | Direction | Wires |
---|---|---|
I | input | TCELL0:IMUX.BUFG.V |
Bel COUT
Pin | Direction | Wires |
---|
Bel UPDATE
Pin | Direction | Wires |
---|---|---|
O | output | TCELL0:OUT.UPDATE.O |
Bel OSC
Pin | Direction | Wires |
---|---|---|
F8M | output | TCELL0:OUT.LR.IOB1.I1 |
OUT0 | output | TCELL0:OUT.LR.IOB1.I2 |
OUT1 | output | TCELL0:OUT.OSC.MUX1 |
Bel TDO
Pin | Direction | Wires |
---|---|---|
O | input | TCELL0:IMUX.TDO.O |
T | input | TCELL0:IMUX.TDO.T |
Bel wires
Wire | Pins |
---|---|
TCELL0:DEC.H0 | PULLUP_DEC0_H.O |
TCELL0:DEC.H1 | PULLUP_DEC1_H.O |
TCELL0:DEC.H2 | PULLUP_DEC2_H.O |
TCELL0:DEC.H3 | PULLUP_DEC3_H.O |
TCELL0:DEC.V0 | PULLUP_DEC0_V.O |
TCELL0:DEC.V1 | PULLUP_DEC1_V.O |
TCELL0:DEC.V2 | PULLUP_DEC2_V.O |
TCELL0:DEC.V3 | PULLUP_DEC3_V.O |
TCELL0:IMUX.BUFG.H | BUFGLS_H.I |
TCELL0:IMUX.BUFG.V | BUFGLS_V.I |
TCELL0:IMUX.TDO.O | TDO.O |
TCELL0:IMUX.TDO.T | TDO.T |
TCELL0:OUT.LR.IOB1.I1 | OSC.F8M |
TCELL0:OUT.LR.IOB1.I2 | OSC.OUT0 |
TCELL0:OUT.OSC.MUX1 | OSC.OUT1 |
TCELL0:OUT.UPDATE.O | UPDATE.O |
Bitstream
Bit | Frame | ||||||||||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
34 | 33 | 32 | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
9 | - | ~INT:PASS.SINGLE.V3.0.LONG.H2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
8 | ~INT:PASS.SINGLE.V2.0.LONG.H1 | - | - | - | ~INT:BUF.LONG.H1.0.SINGLE.V2 | - | ~INT:PASS.SINGLE.V1.0.LONG.H0 | - | ~INT:BUF.LONG.H0.0.SINGLE.V1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
BSCAN:ENABLE | 0.17.4 |
---|---|
non-inverted | [0] |
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.E.1 | 0.26.4 |
---|---|
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.E.2 | 0.28.5 |
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0 | 0.30.5 |
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.E.1 | 0.25.4 |
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.E.2 | 0.25.5 |
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0 | 0.26.5 |
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.E.1 | 0.29.6 |
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.E.2 | 0.27.6 |
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0 | 0.32.5 |
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.E.1 | 0.34.5 |
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.E.2 | 0.36.6 |
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0 | 0.36.5 |
INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.E.2 | 0.24.4 |
INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.E.2 | 0.27.4 |
INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.E.2 | 0.30.6 |
INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.E.2 | 0.35.5 |
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.E.1 | 0.24.6 |
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.E.2 | 0.24.5 |
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0 | 0.27.5 |
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.E.1 | 0.29.5 |
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.E.2 | 0.25.6 |
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.0 | 0.31.5 |
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.E.1 | 0.26.6 |
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.E.2 | 0.28.6 |
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.0 | 0.33.5 |
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.E.1 | 0.37.6 |
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.E.2 | 0.35.6 |
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0 | 0.37.5 |
INT:BUF.LONG.H0.0.SINGLE.V1 | 1.26.8 |
INT:BUF.LONG.H1.0.SINGLE.V2 | 1.30.8 |
INT:BUF.LONG.H2.0.SINGLE.V3 | 0.24.0 |
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E | 0.13.3 |
INT:PASS.DOUBLE.V0.1.0.OUT.UPDATE.O | 0.13.0 |
INT:PASS.DOUBLE.V1.0.0.OUT.OSC.MUX1 | 0.29.3 |
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E | 0.38.0 |
INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.H1 | 0.23.5 |
INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0 | 0.31.6 |
INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.H1 | 0.21.5 |
INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0 | 0.32.6 |
INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.H1 | 0.22.5 |
INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0 | 0.33.6 |
INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.H1 | 0.23.6 |
INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0 | 0.34.6 |
INT:PASS.SINGLE.V0.0.DEC.H0 | 0.14.3 |
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E | 0.26.2 |
INT:PASS.SINGLE.V1.0.LONG.H0 | 1.28.8 |
INT:PASS.SINGLE.V1.0.LONG.IO.H0 | 0.18.3 |
INT:PASS.SINGLE.V1.0.OUT.OSC.MUX1 | 0.27.0 |
INT:PASS.SINGLE.V2.0.LONG.H1 | 1.34.8 |
INT:PASS.SINGLE.V2.0.LONG.IO.H1 | 0.19.3 |
INT:PASS.SINGLE.V2.0.OUT.UPDATE.O | 0.12.0 |
INT:PASS.SINGLE.V3.0.DEC.H1 | 0.36.0 |
INT:PASS.SINGLE.V3.0.LONG.H2 | 1.33.9 |
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E | 0.30.3 |
INT:PASS.SINGLE.V4.0.DEC.H2 | 0.39.0 |
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E | 0.40.0 |
INT:PASS.SINGLE.V5.0.LONG.IO.H2 | 0.28.3 |
INT:PASS.SINGLE.V5.0.OUT.OSC.MUX1 | 0.27.3 |
INT:PASS.SINGLE.V6.0.LONG.IO.H3 | 0.10.2 |
INT:PASS.SINGLE.V6.0.OUT.UPDATE.O | 0.11.0 |
INT:PASS.SINGLE.V7.0.DEC.H3 | 0.34.3 |
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E | 0.36.3 |
MISC:TAC | 0.15.4 |
MISC:TM_RIGHT | 0.14.0 |
PULLUP_DEC0_H:ENABLE | 0.39.3 |
PULLUP_DEC0_V:ENABLE | 0.8.2 |
PULLUP_DEC1_H:ENABLE | 0.38.3 |
PULLUP_DEC1_V:ENABLE | 0.11.2 |
PULLUP_DEC2_H:ENABLE | 0.37.3 |
PULLUP_DEC2_V:ENABLE | 0.9.2 |
PULLUP_DEC3_H:ENABLE | 0.39.4 |
PULLUP_DEC3_V:ENABLE | 0.12.2 |
TDO:ENABLE.O | 0.8.4 |
TDO:ENABLE.T | 0.7.4 |
inverted | ~[0] |
INT:MUX.IMUX.BUFG.H | 0.20.5 |
---|---|
0.OUT.IOB.CLKIN.E | 0 |
NONE | 1 |
INT:MUX.IMUX.BUFG.V | 0.16.0 | 0.17.0 | 0.18.0 | 0.19.0 | 0.17.2 | 0.20.0 | 0.15.0 |
---|---|---|---|---|---|---|---|
0.IO.DOUBLE.2.E.1 | 0 | 0 | 0 | 1 | 0 | 1 | 1 |
0.IO.DOUBLE.0.E.1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 |
0.IO.DOUBLE.3.E.2 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
0.IO.DOUBLE.0.E.2 | 0 | 0 | 1 | 0 | 1 | 1 | 1 |
0.IO.DOUBLE.3.E.1 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
0.IO.DOUBLE.1.E.2 | 0 | 0 | 1 | 1 | 1 | 0 | 1 |
0.IO.DOUBLE.1.E.1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 |
0.IO.DOUBLE.2.E.2 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
0.OUT.IOB.CLKIN.N | 1 | 0 | 1 | 1 | 1 | 1 | 0 |
NONE | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
INT:MUX.IMUX.TDO.O | 0.30.2 | 0.31.2 | 0.32.2 | 0.33.2 | 0.34.2 | 0.29.2 |
---|---|---|---|---|---|---|
0.LONG.H0 | 0 | 0 | 1 | 1 | 1 | 0 |
0.SINGLE.V2 | 0 | 0 | 1 | 1 | 1 | 1 |
0.SINGLE.V3 | 0 | 1 | 0 | 1 | 1 | 1 |
0.LONG.H1 | 0 | 1 | 1 | 0 | 1 | 0 |
0.SINGLE.V4 | 0 | 1 | 1 | 0 | 1 | 1 |
0.LONG.H2 | 0 | 1 | 1 | 1 | 0 | 0 |
0.SINGLE.V5 | 0 | 1 | 1 | 1 | 0 | 1 |
1.DOUBLE.H1.1 | 1 | 1 | 1 | 1 | 1 | 0 |
1.DOUBLE.H0.0 | 1 | 1 | 1 | 1 | 1 | 1 |
INT:MUX.IMUX.TDO.T | 0.28.0 | 0.29.0 | 0.31.0 | 0.32.0 | 0.33.0 | 0.30.0 |
---|---|---|---|---|---|---|
1.SINGLE.H3 | 0 | 0 | 0 | 1 | 1 | 1 |
0.LONG.V4 | 0 | 0 | 1 | 0 | 1 | 1 |
1.SINGLE.H2 | 0 | 0 | 1 | 1 | 0 | 1 |
0.DOUBLE.V0.0 | 0 | 1 | 1 | 1 | 1 | 1 |
0.DOUBLE.V1.1 | 1 | 0 | 0 | 1 | 1 | 1 |
0.LONG.V3 | 1 | 0 | 1 | 0 | 1 | 1 |
0.LONG.V5 | 1 | 0 | 1 | 1 | 0 | 1 |
1.SINGLE.H4 | 1 | 0 | 1 | 1 | 1 | 0 |
1.SINGLE.H5 | 1 | 1 | 1 | 1 | 1 | 1 |
INT:MUX.IO.DBUF.H0 | 0.7.3 | 0.11.3 | 0.8.3 | 0.9.3 |
---|---|---|---|---|
0.IO.DOUBLE.0.E.2 | 0 | 0 | 1 | 1 |
0.IO.DOUBLE.2.E.2 | 0 | 1 | 0 | 1 |
0.IO.DOUBLE.3.E.2 | 0 | 1 | 1 | 0 |
0.IO.DOUBLE.1.E.2 | 1 | 1 | 1 | 1 |
INT:MUX.IO.DBUF.H1 | 0.38.5 | 0.39.5 | 0.38.6 | 0.39.6 |
---|---|---|---|---|
0.IO.DOUBLE.1.N.0 | 0 | 0 | 1 | 1 |
0.IO.DOUBLE.2.N.0 | 0 | 1 | 0 | 1 |
0.IO.DOUBLE.3.N.0 | 0 | 1 | 1 | 0 |
0.IO.DOUBLE.0.N.0 | 1 | 1 | 1 | 1 |
INT:MUX.LONG.H0 | 0.18.2 | 0.19.2 | 0.21.0 | 0.20.2 |
---|---|---|---|---|
0.LONG.IO.V0 | 0 | 0 | 0 | 1 |
0.DEC.V3 | 0 | 0 | 1 | 0 |
0.OUT.LR.IOB1.I2 | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.H1 | 0.10.0 | 0.6.0 | 0.9.0 | 0.7.0 |
---|---|---|---|---|
0.LONG.IO.V1 | 0 | 0 | 0 | 1 |
0.DEC.V2 | 0 | 0 | 1 | 0 |
0.OUT.LR.IOB1.I2 | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.H2 | 0.21.2 | 0.22.0 |
---|---|---|
0.LONG.IO.V2 | 0 | 0 |
0.DEC.V1 | 0 | 1 |
NONE | 1 | 1 |
INT:MUX.LONG.IO.H0 | 0.29.4 | 0.28.4 | 0.23.4 | 0.22.4 |
---|---|---|---|---|
0.LONG.V0 | 0 | 0 | 1 | 1 |
0.SINGLE.V1 | 0 | 1 | 1 | 1 |
0.LONG.IO.V2 | 1 | 1 | 0 | 0 |
0.LONG.IO.V0 | 1 | 1 | 0 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.H1 | 0.33.4 | 0.30.4 | 0.32.4 | 0.31.4 | 0.14.4 | 0.13.4 |
---|---|---|---|---|---|---|
0.LONG.V1 | 0 | 0 | 0 | 1 | 1 | 1 |
0.LONG.V3 | 0 | 0 | 1 | 0 | 1 | 1 |
0.SINGLE.V2 | 0 | 1 | 1 | 1 | 1 | 1 |
0.LONG.IO.V3 | 1 | 1 | 1 | 1 | 0 | 0 |
0.LONG.IO.V1 | 1 | 1 | 1 | 1 | 0 | 1 |
NONE | 1 | 1 | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.H2 | 0.36.4 | 0.34.4 | 0.38.4 | 0.37.4 | 0.19.4 | 0.20.4 |
---|---|---|---|---|---|---|
0.LONG.V2 | 0 | 0 | 0 | 1 | 1 | 1 |
0.LONG.V4 | 0 | 0 | 1 | 0 | 1 | 1 |
0.SINGLE.V5 | 0 | 1 | 1 | 1 | 1 | 1 |
0.LONG.IO.V0 | 1 | 1 | 1 | 1 | 0 | 0 |
0.LONG.IO.V2 | 1 | 1 | 1 | 1 | 0 | 1 |
NONE | 1 | 1 | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.H3 | 0.35.4 | 0.26.3 | 0.10.4 | 0.11.4 |
---|---|---|---|---|
0.LONG.V5 | 0 | 0 | 1 | 1 |
0.SINGLE.V6 | 0 | 1 | 1 | 1 |
0.LONG.IO.V1 | 1 | 1 | 0 | 0 |
0.LONG.IO.V3 | 1 | 1 | 0 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.V0 | 0.21.3 | 0.15.3 | 0.15.2 | 0.16.3 |
---|---|---|---|---|
0.LONG.H0 | 0 | 0 | 0 | 1 |
0.LONG.IO.H2 | 0 | 0 | 1 | 0 |
0.LONG.IO.H0 | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.V1 | 0.10.3 | 0.5.2 | 0.7.2 | 0.6.2 |
---|---|---|---|---|
0.LONG.H1 | 0 | 0 | 0 | 1 |
0.LONG.IO.H3 | 0 | 0 | 1 | 0 |
0.LONG.IO.H1 | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.V2 | 0.23.3 | 0.13.2 | 0.16.2 | 0.14.2 |
---|---|---|---|---|
0.LONG.H2 | 0 | 0 | 0 | 1 |
0.LONG.IO.H0 | 0 | 0 | 1 | 0 |
0.LONG.IO.H2 | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.IO.V3 | 0.17.3 | 0.12.3 |
---|---|---|
0.LONG.IO.H1 | 0 | 0 |
0.LONG.IO.H3 | 0 | 1 |
NONE | 1 | 1 |
INT:MUX.LONG.V0 | 0.20.3 | 0.22.3 | 0.24.3 | 0.25.3 |
---|---|---|---|---|
0.LONG.IO.H0 | 0 | 0 | 0 | 1 |
0.DEC.H3 | 0 | 0 | 1 | 0 |
0.OUT.BT.IOB1.I2.E | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.V1 | 0.38.2 | 0.37.0 | 0.37.2 | 0.39.2 |
---|---|---|---|---|
0.LONG.IO.H1 | 0 | 0 | 0 | 1 |
0.DEC.H2 | 0 | 0 | 1 | 0 |
0.OUT.BT.IOB1.I2.E | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.V2 | 0.28.2 | 0.25.0 | 0.27.2 | 0.26.0 |
---|---|---|---|---|
0.LONG.IO.H2 | 0 | 0 | 0 | 1 |
0.DEC.H1 | 0 | 0 | 1 | 0 |
0.OUT.BT.IOB1.I2.E | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.V3 | 0.35.2 | 0.34.0 | 0.35.0 | 0.36.2 |
---|---|---|---|---|
0.LONG.IO.H1 | 0 | 0 | 0 | 1 |
0.DEC.H2 | 0 | 0 | 1 | 0 |
0.OUT.OSC.MUX1 | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.V4 | 0.25.2 | 0.22.2 | 0.23.2 | 0.24.2 |
---|---|---|---|---|
0.LONG.IO.H2 | 0 | 0 | 0 | 1 |
0.DEC.H1 | 0 | 0 | 1 | 0 |
0.OUT.OSC.MUX1 | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
INT:MUX.LONG.V5 | 0.35.3 | 0.31.3 | 0.33.3 | 0.32.3 |
---|---|---|---|---|
0.LONG.IO.H3 | 0 | 0 | 0 | 1 |
0.DEC.H0 | 0 | 0 | 1 | 0 |
0.OUT.OSC.MUX1 | 0 | 1 | 1 | 1 |
NONE | 1 | 1 | 1 | 1 |
READCLK:READ_CLK | 0.12.4 |
---|---|
RDBK | 0 |
CCLK | 1 |
TDO:PULL | 0.18.4 | 0.16.4 |
---|---|---|
PULLUP | 0 | 1 |
PULLDOWN | 1 | 0 |
PULLNONE | 1 | 1 |