Clock interconnect
Todo
describe this madness
CLK_HROW
CLK_HROW bittile 2 | |||
---|---|---|---|
Row | Column | ||
0 | 1 | 2 | |
0 | - | - | - |
1 | - | - | - |
2 | - | - | - |
3 | - | - | - |
4 | - | - | - |
5 | - | - | - |
6 | - | - | - |
7 | - | - | - |
8 | - | - | - |
9 | - | - | - |
10 | - | - | - |
11 | - | - | - |
12 | CLK_HROW:BUF.GCLK0 | CLK_HROW:BUF.GCLK1 | CLK_HROW:BUF.GCLK26 |
13 | CLK_HROW:BUF.GCLK2 | CLK_HROW:BUF.GCLK3 | CLK_HROW:BUF.GCLK27 |
14 | CLK_HROW:BUF.GCLK4 | CLK_HROW:BUF.GCLK5 | CLK_HROW:BUF.GCLK28 |
15 | CLK_HROW:BUF.GCLK6 | CLK_HROW:BUF.GCLK7 | CLK_HROW:BUF.GCLK29 |
CLK_HROW:BUF.GCLK0 | [2, 0, 12] |
---|---|
CLK_HROW:BUF.GCLK1 | [2, 1, 12] |
CLK_HROW:BUF.GCLK10 | [0, 0, 7] |
CLK_HROW:BUF.GCLK11 | [0, 0, 8] |
CLK_HROW:BUF.GCLK12 | [1, 0, 8] |
CLK_HROW:BUF.GCLK13 | [1, 0, 7] |
CLK_HROW:BUF.GCLK14 | [1, 0, 6] |
CLK_HROW:BUF.GCLK15 | [1, 0, 5] |
CLK_HROW:BUF.GCLK16 | [0, 0, 9] |
CLK_HROW:BUF.GCLK17 | [0, 0, 4] |
CLK_HROW:BUF.GCLK18 | [0, 0, 3] |
CLK_HROW:BUF.GCLK19 | [0, 0, 2] |
CLK_HROW:BUF.GCLK2 | [2, 0, 13] |
CLK_HROW:BUF.GCLK20 | [1, 0, 2] |
CLK_HROW:BUF.GCLK21 | [1, 0, 3] |
CLK_HROW:BUF.GCLK22 | [1, 0, 4] |
CLK_HROW:BUF.GCLK23 | [1, 0, 9] |
CLK_HROW:BUF.GCLK24 | [0, 0, 0] |
CLK_HROW:BUF.GCLK25 | [0, 0, 1] |
CLK_HROW:BUF.GCLK26 | [2, 2, 12] |
CLK_HROW:BUF.GCLK27 | [2, 2, 13] |
CLK_HROW:BUF.GCLK28 | [2, 2, 14] |
CLK_HROW:BUF.GCLK29 | [2, 2, 15] |
CLK_HROW:BUF.GCLK3 | [2, 1, 13] |
CLK_HROW:BUF.GCLK30 | [1, 0, 1] |
CLK_HROW:BUF.GCLK31 | [1, 0, 0] |
CLK_HROW:BUF.GCLK4 | [2, 0, 14] |
CLK_HROW:BUF.GCLK5 | [2, 1, 14] |
CLK_HROW:BUF.GCLK6 | [2, 0, 15] |
CLK_HROW:BUF.GCLK7 | [2, 1, 15] |
CLK_HROW:BUF.GCLK8 | [0, 0, 5] |
CLK_HROW:BUF.GCLK9 | [0, 0, 6] |
Non-inverted | [0] |
CLK_HROW:MUX.HCLK_L0 | [1, 0, 11] | [1, 1, 13] | [1, 1, 14] | [1, 1, 12] | [1, 1, 0] | [1, 1, 2] | [1, 1, 3] | [1, 1, 6] | [1, 1, 7] | [1, 1, 8] | [1, 1, 9] | [1, 1, 11] | [1, 1, 19] | [1, 1, 18] | [1, 1, 17] | [1, 1, 16] | [1, 1, 15] | [1, 1, 5] | [1, 1, 4] | [1, 1, 1] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
CLK_HROW:MUX.HCLK_L1 | [0, 0, 71] | [0, 1, 73] | [0, 1, 74] | [0, 1, 72] | [0, 1, 60] | [0, 1, 62] | [0, 1, 63] | [0, 1, 66] | [0, 1, 67] | [0, 1, 68] | [0, 1, 69] | [0, 1, 71] | [0, 1, 79] | [0, 1, 78] | [0, 1, 77] | [0, 1, 76] | [0, 1, 75] | [0, 1, 65] | [0, 1, 64] | [0, 1, 61] |
CLK_HROW:MUX.HCLK_L2 | [1, 0, 31] | [1, 1, 33] | [1, 1, 34] | [1, 1, 32] | [1, 1, 20] | [1, 1, 22] | [1, 1, 23] | [1, 1, 26] | [1, 1, 27] | [1, 1, 28] | [1, 1, 29] | [1, 1, 31] | [1, 1, 39] | [1, 1, 38] | [1, 1, 37] | [1, 1, 36] | [1, 1, 35] | [1, 1, 25] | [1, 1, 24] | [1, 1, 21] |
CLK_HROW:MUX.HCLK_L3 | [0, 0, 51] | [0, 1, 53] | [0, 1, 54] | [0, 1, 52] | [0, 1, 40] | [0, 1, 42] | [0, 1, 43] | [0, 1, 46] | [0, 1, 47] | [0, 1, 48] | [0, 1, 49] | [0, 1, 51] | [0, 1, 59] | [0, 1, 58] | [0, 1, 57] | [0, 1, 56] | [0, 1, 55] | [0, 1, 45] | [0, 1, 44] | [0, 1, 41] |
CLK_HROW:MUX.HCLK_L4 | [1, 0, 51] | [1, 1, 53] | [1, 1, 54] | [1, 1, 52] | [1, 1, 40] | [1, 1, 42] | [1, 1, 43] | [1, 1, 46] | [1, 1, 47] | [1, 1, 48] | [1, 1, 49] | [1, 1, 51] | [1, 1, 59] | [1, 1, 58] | [1, 1, 57] | [1, 1, 56] | [1, 1, 55] | [1, 1, 45] | [1, 1, 44] | [1, 1, 41] |
CLK_HROW:MUX.HCLK_L5 | [0, 0, 31] | [0, 1, 33] | [0, 1, 34] | [0, 1, 32] | [0, 1, 20] | [0, 1, 22] | [0, 1, 23] | [0, 1, 26] | [0, 1, 27] | [0, 1, 28] | [0, 1, 29] | [0, 1, 31] | [0, 1, 39] | [0, 1, 38] | [0, 1, 37] | [0, 1, 36] | [0, 1, 35] | [0, 1, 25] | [0, 1, 24] | [0, 1, 21] |
CLK_HROW:MUX.HCLK_L6 | [1, 0, 71] | [1, 1, 73] | [1, 1, 74] | [1, 1, 72] | [1, 1, 60] | [1, 1, 62] | [1, 1, 63] | [1, 1, 66] | [1, 1, 67] | [1, 1, 68] | [1, 1, 69] | [1, 1, 71] | [1, 1, 79] | [1, 1, 78] | [1, 1, 77] | [1, 1, 76] | [1, 1, 75] | [1, 1, 65] | [1, 1, 64] | [1, 1, 61] |
CLK_HROW:MUX.HCLK_L7 | [0, 0, 11] | [0, 1, 13] | [0, 1, 14] | [0, 1, 12] | [0, 1, 0] | [0, 1, 2] | [0, 1, 3] | [0, 1, 6] | [0, 1, 7] | [0, 1, 8] | [0, 1, 9] | [0, 1, 11] | [0, 1, 19] | [0, 1, 18] | [0, 1, 17] | [0, 1, 16] | [0, 1, 15] | [0, 1, 5] | [0, 1, 4] | [0, 1, 1] |
CLK_HROW:MUX.HCLK_R0 | [1, 0, 10] | [1, 2, 13] | [1, 2, 14] | [1, 2, 12] | [1, 2, 0] | [1, 2, 2] | [1, 2, 3] | [1, 2, 6] | [1, 2, 7] | [1, 2, 8] | [1, 2, 9] | [1, 2, 11] | [1, 2, 19] | [1, 2, 18] | [1, 2, 17] | [1, 2, 16] | [1, 2, 15] | [1, 2, 5] | [1, 2, 4] | [1, 2, 1] |
CLK_HROW:MUX.HCLK_R1 | [0, 0, 70] | [0, 2, 73] | [0, 2, 74] | [0, 2, 72] | [0, 2, 60] | [0, 2, 62] | [0, 2, 63] | [0, 2, 66] | [0, 2, 67] | [0, 2, 68] | [0, 2, 69] | [0, 2, 71] | [0, 2, 79] | [0, 2, 78] | [0, 2, 77] | [0, 2, 76] | [0, 2, 75] | [0, 2, 65] | [0, 2, 64] | [0, 2, 61] |
CLK_HROW:MUX.HCLK_R2 | [1, 0, 30] | [1, 2, 33] | [1, 2, 34] | [1, 2, 32] | [1, 2, 20] | [1, 2, 22] | [1, 2, 23] | [1, 2, 26] | [1, 2, 27] | [1, 2, 28] | [1, 2, 29] | [1, 2, 31] | [1, 2, 39] | [1, 2, 38] | [1, 2, 37] | [1, 2, 36] | [1, 2, 35] | [1, 2, 25] | [1, 2, 24] | [1, 2, 21] |
CLK_HROW:MUX.HCLK_R3 | [0, 0, 50] | [0, 2, 53] | [0, 2, 54] | [0, 2, 52] | [0, 2, 40] | [0, 2, 42] | [0, 2, 43] | [0, 2, 46] | [0, 2, 47] | [0, 2, 48] | [0, 2, 49] | [0, 2, 51] | [0, 2, 59] | [0, 2, 58] | [0, 2, 57] | [0, 2, 56] | [0, 2, 55] | [0, 2, 45] | [0, 2, 44] | [0, 2, 41] |
CLK_HROW:MUX.HCLK_R4 | [1, 0, 50] | [1, 2, 53] | [1, 2, 54] | [1, 2, 52] | [1, 2, 40] | [1, 2, 42] | [1, 2, 43] | [1, 2, 46] | [1, 2, 47] | [1, 2, 48] | [1, 2, 49] | [1, 2, 51] | [1, 2, 59] | [1, 2, 58] | [1, 2, 57] | [1, 2, 56] | [1, 2, 55] | [1, 2, 45] | [1, 2, 44] | [1, 2, 41] |
CLK_HROW:MUX.HCLK_R5 | [0, 0, 30] | [0, 2, 33] | [0, 2, 34] | [0, 2, 32] | [0, 2, 20] | [0, 2, 22] | [0, 2, 23] | [0, 2, 26] | [0, 2, 27] | [0, 2, 28] | [0, 2, 29] | [0, 2, 31] | [0, 2, 39] | [0, 2, 38] | [0, 2, 37] | [0, 2, 36] | [0, 2, 35] | [0, 2, 25] | [0, 2, 24] | [0, 2, 21] |
CLK_HROW:MUX.HCLK_R6 | [1, 0, 70] | [1, 2, 73] | [1, 2, 74] | [1, 2, 72] | [1, 2, 60] | [1, 2, 62] | [1, 2, 63] | [1, 2, 66] | [1, 2, 67] | [1, 2, 68] | [1, 2, 69] | [1, 2, 71] | [1, 2, 79] | [1, 2, 78] | [1, 2, 77] | [1, 2, 76] | [1, 2, 75] | [1, 2, 65] | [1, 2, 64] | [1, 2, 61] |
CLK_HROW:MUX.HCLK_R7 | [0, 0, 10] | [0, 2, 13] | [0, 2, 14] | [0, 2, 12] | [0, 2, 0] | [0, 2, 2] | [0, 2, 3] | [0, 2, 6] | [0, 2, 7] | [0, 2, 8] | [0, 2, 9] | [0, 2, 11] | [0, 2, 19] | [0, 2, 18] | [0, 2, 17] | [0, 2, 16] | [0, 2, 15] | [0, 2, 5] | [0, 2, 4] | [0, 2, 1] |
NONE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
GCLK0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK3 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK4 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK5 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK6 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK7 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK8 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK9 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK10 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK11 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK12 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK13 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK14 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK15 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK16 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK17 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK18 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK19 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK20 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK21 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK22 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK23 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK28 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK29 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK30 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
GCLK31 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
HCLK
HCLK bittile 0 | |||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Row | Column | ||||||||||||||||||
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
12 | - | - | - | - | - | - | - | - | - | HCLK:BUF.HCLK3 | - | - | - | HCLK:BUF.HCLK7 | - | - | - | - | - |
13 | - | - | - | - | - | - | - | - | - | HCLK:BUF.HCLK2 | - | - | - | HCLK:BUF.HCLK6 | - | - | - | - | - |
14 | - | - | - | - | - | - | - | - | - | HCLK:BUF.HCLK1 | - | - | - | HCLK:BUF.HCLK5 | - | - | - | - | HCLK:BUF.RCLK0 |
15 | - | - | - | - | - | - | - | - | - | HCLK:BUF.HCLK0 | - | - | - | HCLK:BUF.HCLK4 | - | - | - | - | HCLK:BUF.RCLK1 |
HCLK:BUF.HCLK0 | [0, 9, 15] |
---|---|
HCLK:BUF.HCLK1 | [0, 9, 14] |
HCLK:BUF.HCLK2 | [0, 9, 13] |
HCLK:BUF.HCLK3 | [0, 9, 12] |
HCLK:BUF.HCLK4 | [0, 13, 15] |
HCLK:BUF.HCLK5 | [0, 13, 14] |
HCLK:BUF.HCLK6 | [0, 13, 13] |
HCLK:BUF.HCLK7 | [0, 13, 12] |
HCLK:BUF.RCLK0 | [0, 18, 14] |
HCLK:BUF.RCLK1 | [0, 18, 15] |
Non-inverted | [0] |
Spine clock terminators
CLK_TERM_B
CLK_TERM_B bittile 0 | |
---|---|
Row | Column |
0 | |
0 | - |
1 | - |
2 | - |
3 | - |
4 | - |
5 | - |
6 | - |
7 | - |
8 | - |
9 | - |
10 | - |
11 | - |
12 | CLK_TERM:GIOB_ENABLE |
13 | - |
14 | - |
15 | - |
16 | - |
17 | - |
18 | - |
19 | - |
20 | - |
21 | - |
22 | - |
23 | - |
24 | - |
25 | - |
26 | - |
27 | - |
28 | - |
29 | - |
30 | - |
31 | - |
32 | - |
33 | - |
34 | - |
35 | - |
36 | - |
37 | - |
38 | - |
39 | - |
40 | - |
41 | - |
42 | - |
43 | - |
44 | - |
45 | - |
46 | - |
47 | - |
48 | - |
49 | - |
50 | - |
51 | - |
52 | - |
53 | - |
54 | - |
55 | - |
56 | - |
57 | - |
58 | - |
59 | - |
60 | - |
61 | - |
62 | - |
63 | - |
64 | - |
65 | - |
66 | - |
67 | - |
68 | - |
69 | - |
70 | - |
71 | - |
72 | - |
73 | - |
74 | - |
75 | - |
76 | - |
77 | - |
78 | - |
79 | CLK_TERM:GCLK_ENABLE |
CLK_TERM:GCLK_ENABLE | [0, 0, 79] |
---|---|
CLK_TERM:GIOB_ENABLE | [0, 0, 12] |
Non-inverted | [0] |
CLK_TERM_T
CLK_TERM_T bittile 0 | |
---|---|
Row | Column |
0 | |
0 | - |
1 | - |
2 | - |
3 | - |
4 | - |
5 | - |
6 | - |
7 | - |
8 | - |
9 | - |
10 | - |
11 | - |
12 | CLK_TERM:GIOB_ENABLE |
13 | - |
14 | - |
15 | - |
16 | - |
17 | - |
18 | - |
19 | - |
20 | - |
21 | - |
22 | - |
23 | - |
24 | - |
25 | - |
26 | - |
27 | - |
28 | - |
29 | - |
30 | - |
31 | - |
32 | - |
33 | - |
34 | - |
35 | - |
36 | - |
37 | - |
38 | - |
39 | - |
40 | - |
41 | - |
42 | - |
43 | - |
44 | - |
45 | - |
46 | - |
47 | - |
48 | - |
49 | - |
50 | - |
51 | - |
52 | - |
53 | - |
54 | - |
55 | - |
56 | - |
57 | - |
58 | - |
59 | - |
60 | - |
61 | - |
62 | - |
63 | - |
64 | - |
65 | - |
66 | - |
67 | - |
68 | - |
69 | - |
70 | - |
71 | - |
72 | - |
73 | - |
74 | - |
75 | - |
76 | - |
77 | - |
78 | - |
79 | CLK_TERM:GCLK_ENABLE |
CLK_TERM:GCLK_ENABLE | [0, 0, 79] |
---|---|
CLK_TERM:GIOB_ENABLE | [0, 0, 12] |
Non-inverted | [0] |
Spine muxes — IOB
CLK_IOB_B
CLK_IOB_B bittile 0 |
---|
Row | Column |
CLK_IOB_B bittile 3 |
---|
Row | Column |
CLK_IOB_B bittile 4 |
---|
Row | Column |
CLK_IOB_B bittile 5 |
---|
Row | Column |
CLK_IOB_B bittile 6 |
---|
Row | Column |
CLK_IOB_B bittile 7 |
---|
Row | Column |
CLK_IOB_B bittile 8 |
---|
Row | Column |
CLK_IOB_B bittile 9 |
---|
Row | Column |
CLK_IOB_B bittile 10 |
---|
Row | Column |
CLK_IOB:BUF.GIOB0 | [1, 0, 18] | [1, 0, 16] | [1, 0, 15] | [1, 0, 14] | [1, 0, 11] |
---|---|---|---|---|---|
CLK_IOB:BUF.GIOB1 | [1, 0, 38] | [1, 0, 36] | [1, 0, 35] | [1, 0, 34] | [1, 0, 31] |
CLK_IOB:BUF.GIOB10 | [2, 2, 18] | [2, 2, 16] | [2, 2, 15] | [2, 2, 14] | [2, 2, 11] |
CLK_IOB:BUF.GIOB11 | [2, 2, 38] | [2, 2, 36] | [2, 2, 35] | [2, 2, 34] | [2, 2, 31] |
CLK_IOB:BUF.GIOB12 | [2, 0, 58] | [2, 0, 56] | [2, 0, 55] | [2, 0, 54] | [2, 0, 51] |
CLK_IOB:BUF.GIOB13 | [2, 0, 78] | [2, 0, 76] | [2, 0, 75] | [2, 0, 74] | [2, 0, 71] |
CLK_IOB:BUF.GIOB14 | [2, 2, 58] | [2, 2, 56] | [2, 2, 55] | [2, 2, 54] | [2, 2, 51] |
CLK_IOB:BUF.GIOB15 | [2, 2, 78] | [2, 2, 76] | [2, 2, 75] | [2, 2, 74] | [2, 2, 71] |
CLK_IOB:BUF.GIOB2 | [1, 2, 18] | [1, 2, 16] | [1, 2, 15] | [1, 2, 14] | [1, 2, 11] |
CLK_IOB:BUF.GIOB3 | [1, 2, 38] | [1, 2, 36] | [1, 2, 35] | [1, 2, 34] | [1, 2, 31] |
CLK_IOB:BUF.GIOB4 | [1, 0, 58] | [1, 0, 56] | [1, 0, 55] | [1, 0, 54] | [1, 0, 51] |
CLK_IOB:BUF.GIOB5 | [1, 0, 78] | [1, 0, 76] | [1, 0, 75] | [1, 0, 74] | [1, 0, 71] |
CLK_IOB:BUF.GIOB6 | [1, 2, 58] | [1, 2, 56] | [1, 2, 55] | [1, 2, 54] | [1, 2, 51] |
CLK_IOB:BUF.GIOB7 | [1, 2, 78] | [1, 2, 76] | [1, 2, 75] | [1, 2, 74] | [1, 2, 71] |
CLK_IOB:BUF.GIOB8 | [2, 0, 18] | [2, 0, 16] | [2, 0, 15] | [2, 0, 14] | [2, 0, 11] |
CLK_IOB:BUF.GIOB9 | [2, 0, 38] | [2, 0, 36] | [2, 0, 35] | [2, 0, 34] | [2, 0, 31] |
Non-inverted | [4] | [3] | [2] | [1] | [0] |
CLK_IOB:MUX.MUXBUS0 | [11, 0, 4] | [11, 0, 19] | [11, 0, 18] | [11, 0, 17] | [11, 0, 16] | [11, 0, 0] | [11, 2, 15] | [11, 2, 13] | [11, 0, 13] | [11, 0, 14] | [11, 0, 10] | [11, 0, 7] | [11, 0, 6] | [11, 0, 5] | [11, 0, 2] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
CLK_IOB:MUX.MUXBUS1 | [11, 2, 4] | [11, 2, 19] | [11, 2, 18] | [11, 2, 17] | [11, 2, 16] | [11, 2, 0] | [11, 2, 14] | [11, 2, 12] | [11, 0, 12] | [11, 0, 15] | [11, 2, 10] | [11, 2, 7] | [11, 2, 6] | [11, 2, 5] | [11, 2, 2] |
CLK_IOB:MUX.MUXBUS10 | [12, 0, 24] | [12, 0, 39] | [12, 0, 38] | [12, 0, 37] | [12, 0, 36] | [12, 0, 20] | [12, 2, 35] | [12, 2, 33] | [12, 0, 33] | [12, 0, 34] | [12, 0, 30] | [12, 0, 27] | [12, 0, 26] | [12, 0, 25] | [12, 0, 22] |
CLK_IOB:MUX.MUXBUS11 | [12, 2, 24] | [12, 2, 39] | [12, 2, 38] | [12, 2, 37] | [12, 2, 36] | [12, 2, 20] | [12, 2, 34] | [12, 2, 32] | [12, 0, 32] | [12, 0, 35] | [12, 2, 30] | [12, 2, 27] | [12, 2, 26] | [12, 2, 25] | [12, 2, 22] |
CLK_IOB:MUX.MUXBUS12 | [12, 0, 44] | [12, 0, 59] | [12, 0, 58] | [12, 0, 57] | [12, 0, 56] | [12, 0, 40] | [12, 2, 55] | [12, 2, 53] | [12, 0, 53] | [12, 0, 54] | [12, 0, 50] | [12, 0, 47] | [12, 0, 46] | [12, 0, 45] | [12, 0, 42] |
CLK_IOB:MUX.MUXBUS13 | [12, 2, 44] | [12, 2, 59] | [12, 2, 58] | [12, 2, 57] | [12, 2, 56] | [12, 2, 40] | [12, 2, 54] | [12, 2, 52] | [12, 0, 52] | [12, 0, 55] | [12, 2, 50] | [12, 2, 47] | [12, 2, 46] | [12, 2, 45] | [12, 2, 42] |
CLK_IOB:MUX.MUXBUS14 | [12, 0, 64] | [12, 0, 79] | [12, 0, 78] | [12, 0, 77] | [12, 0, 76] | [12, 0, 60] | [12, 2, 75] | [12, 2, 73] | [12, 0, 73] | [12, 0, 74] | [12, 0, 70] | [12, 0, 67] | [12, 0, 66] | [12, 0, 65] | [12, 0, 62] |
CLK_IOB:MUX.MUXBUS15 | [12, 2, 64] | [12, 2, 79] | [12, 2, 78] | [12, 2, 77] | [12, 2, 76] | [12, 2, 60] | [12, 2, 74] | [12, 2, 72] | [12, 0, 72] | [12, 0, 75] | [12, 2, 70] | [12, 2, 67] | [12, 2, 66] | [12, 2, 65] | [12, 2, 62] |
CLK_IOB:MUX.MUXBUS16 | [13, 0, 4] | [13, 0, 19] | [13, 0, 18] | [13, 0, 17] | [13, 0, 16] | [13, 0, 0] | [13, 2, 15] | [13, 2, 13] | [13, 0, 13] | [13, 0, 14] | [13, 0, 10] | [13, 0, 7] | [13, 0, 6] | [13, 0, 5] | [13, 0, 2] |
CLK_IOB:MUX.MUXBUS17 | [13, 2, 4] | [13, 2, 19] | [13, 2, 18] | [13, 2, 17] | [13, 2, 16] | [13, 2, 0] | [13, 2, 14] | [13, 2, 12] | [13, 0, 12] | [13, 0, 15] | [13, 2, 10] | [13, 2, 7] | [13, 2, 6] | [13, 2, 5] | [13, 2, 2] |
CLK_IOB:MUX.MUXBUS18 | [13, 0, 24] | [13, 0, 39] | [13, 0, 38] | [13, 0, 37] | [13, 0, 36] | [13, 0, 20] | [13, 2, 35] | [13, 2, 33] | [13, 0, 33] | [13, 0, 34] | [13, 0, 30] | [13, 0, 27] | [13, 0, 26] | [13, 0, 25] | [13, 0, 22] |
CLK_IOB:MUX.MUXBUS19 | [13, 2, 24] | [13, 2, 39] | [13, 2, 38] | [13, 2, 37] | [13, 2, 36] | [13, 2, 20] | [13, 2, 34] | [13, 2, 32] | [13, 0, 32] | [13, 0, 35] | [13, 2, 30] | [13, 2, 27] | [13, 2, 26] | [13, 2, 25] | [13, 2, 22] |
CLK_IOB:MUX.MUXBUS2 | [11, 0, 24] | [11, 0, 39] | [11, 0, 38] | [11, 0, 37] | [11, 0, 36] | [11, 0, 20] | [11, 2, 35] | [11, 2, 33] | [11, 0, 33] | [11, 0, 34] | [11, 0, 30] | [11, 0, 27] | [11, 0, 26] | [11, 0, 25] | [11, 0, 22] |
CLK_IOB:MUX.MUXBUS20 | [13, 0, 44] | [13, 0, 59] | [13, 0, 58] | [13, 0, 57] | [13, 0, 56] | [13, 0, 40] | [13, 2, 55] | [13, 2, 53] | [13, 0, 53] | [13, 0, 54] | [13, 0, 50] | [13, 0, 47] | [13, 0, 46] | [13, 0, 45] | [13, 0, 42] |
CLK_IOB:MUX.MUXBUS21 | [13, 2, 44] | [13, 2, 59] | [13, 2, 58] | [13, 2, 57] | [13, 2, 56] | [13, 2, 40] | [13, 2, 54] | [13, 2, 52] | [13, 0, 52] | [13, 0, 55] | [13, 2, 50] | [13, 2, 47] | [13, 2, 46] | [13, 2, 45] | [13, 2, 42] |
CLK_IOB:MUX.MUXBUS22 | [13, 0, 64] | [13, 0, 79] | [13, 0, 78] | [13, 0, 77] | [13, 0, 76] | [13, 0, 60] | [13, 2, 75] | [13, 2, 73] | [13, 0, 73] | [13, 0, 74] | [13, 0, 70] | [13, 0, 67] | [13, 0, 66] | [13, 0, 65] | [13, 0, 62] |
CLK_IOB:MUX.MUXBUS23 | [13, 2, 64] | [13, 2, 79] | [13, 2, 78] | [13, 2, 77] | [13, 2, 76] | [13, 2, 60] | [13, 2, 74] | [13, 2, 72] | [13, 0, 72] | [13, 0, 75] | [13, 2, 70] | [13, 2, 67] | [13, 2, 66] | [13, 2, 65] | [13, 2, 62] |
CLK_IOB:MUX.MUXBUS24 | [14, 0, 4] | [14, 0, 19] | [14, 0, 18] | [14, 0, 17] | [14, 0, 16] | [14, 0, 0] | [14, 2, 15] | [14, 2, 13] | [14, 0, 13] | [14, 0, 14] | [14, 0, 10] | [14, 0, 7] | [14, 0, 6] | [14, 0, 5] | [14, 0, 2] |
CLK_IOB:MUX.MUXBUS25 | [14, 2, 4] | [14, 2, 19] | [14, 2, 18] | [14, 2, 17] | [14, 2, 16] | [14, 2, 0] | [14, 2, 14] | [14, 2, 12] | [14, 0, 12] | [14, 0, 15] | [14, 2, 10] | [14, 2, 7] | [14, 2, 6] | [14, 2, 5] | [14, 2, 2] |
CLK_IOB:MUX.MUXBUS26 | [14, 0, 24] | [14, 0, 39] | [14, 0, 38] | [14, 0, 37] | [14, 0, 36] | [14, 0, 20] | [14, 2, 35] | [14, 2, 33] | [14, 0, 33] | [14, 0, 34] | [14, 0, 30] | [14, 0, 27] | [14, 0, 26] | [14, 0, 25] | [14, 0, 22] |
CLK_IOB:MUX.MUXBUS27 | [14, 2, 24] | [14, 2, 39] | [14, 2, 38] | [14, 2, 37] | [14, 2, 36] | [14, 2, 20] | [14, 2, 34] | [14, 2, 32] | [14, 0, 32] | [14, 0, 35] | [14, 2, 30] | [14, 2, 27] | [14, 2, 26] | [14, 2, 25] | [14, 2, 22] |
CLK_IOB:MUX.MUXBUS28 | [14, 0, 44] | [14, 0, 59] | [14, 0, 58] | [14, 0, 57] | [14, 0, 56] | [14, 0, 40] | [14, 2, 55] | [14, 2, 53] | [14, 0, 53] | [14, 0, 54] | [14, 0, 50] | [14, 0, 47] | [14, 0, 46] | [14, 0, 45] | [14, 0, 42] |
CLK_IOB:MUX.MUXBUS29 | [14, 2, 44] | [14, 2, 59] | [14, 2, 58] | [14, 2, 57] | [14, 2, 56] | [14, 2, 40] | [14, 2, 54] | [14, 2, 52] | [14, 0, 52] | [14, 0, 55] | [14, 2, 50] | [14, 2, 47] | [14, 2, 46] | [14, 2, 45] | [14, 2, 42] |
CLK_IOB:MUX.MUXBUS3 | [11, 2, 24] | [11, 2, 39] | [11, 2, 38] | [11, 2, 37] | [11, 2, 36] | [11, 2, 20] | [11, 2, 34] | [11, 2, 32] | [11, 0, 32] | [11, 0, 35] | [11, 2, 30] | [11, 2, 27] | [11, 2, 26] | [11, 2, 25] | [11, 2, 22] |
CLK_IOB:MUX.MUXBUS30 | [14, 0, 64] | [14, 0, 79] | [14, 0, 78] | [14, 0, 77] | [14, 0, 76] | [14, 0, 60] | [14, 2, 75] | [14, 2, 73] | [14, 0, 73] | [14, 0, 74] | [14, 0, 70] | [14, 0, 67] | [14, 0, 66] | [14, 0, 65] | [14, 0, 62] |
CLK_IOB:MUX.MUXBUS31 | [14, 2, 64] | [14, 2, 79] | [14, 2, 78] | [14, 2, 77] | [14, 2, 76] | [14, 2, 60] | [14, 2, 74] | [14, 2, 72] | [14, 0, 72] | [14, 0, 75] | [14, 2, 70] | [14, 2, 67] | [14, 2, 66] | [14, 2, 65] | [14, 2, 62] |
CLK_IOB:MUX.MUXBUS4 | [11, 0, 44] | [11, 0, 59] | [11, 0, 58] | [11, 0, 57] | [11, 0, 56] | [11, 0, 40] | [11, 2, 55] | [11, 2, 53] | [11, 0, 53] | [11, 0, 54] | [11, 0, 50] | [11, 0, 47] | [11, 0, 46] | [11, 0, 45] | [11, 0, 42] |
CLK_IOB:MUX.MUXBUS5 | [11, 2, 44] | [11, 2, 59] | [11, 2, 58] | [11, 2, 57] | [11, 2, 56] | [11, 2, 40] | [11, 2, 54] | [11, 2, 52] | [11, 0, 52] | [11, 0, 55] | [11, 2, 50] | [11, 2, 47] | [11, 2, 46] | [11, 2, 45] | [11, 2, 42] |
CLK_IOB:MUX.MUXBUS6 | [11, 0, 64] | [11, 0, 79] | [11, 0, 78] | [11, 0, 77] | [11, 0, 76] | [11, 0, 60] | [11, 2, 75] | [11, 2, 73] | [11, 0, 73] | [11, 0, 74] | [11, 0, 70] | [11, 0, 67] | [11, 0, 66] | [11, 0, 65] | [11, 0, 62] |
CLK_IOB:MUX.MUXBUS7 | [11, 2, 64] | [11, 2, 79] | [11, 2, 78] | [11, 2, 77] | [11, 2, 76] | [11, 2, 60] | [11, 2, 74] | [11, 2, 72] | [11, 0, 72] | [11, 0, 75] | [11, 2, 70] | [11, 2, 67] | [11, 2, 66] | [11, 2, 65] | [11, 2, 62] |
CLK_IOB:MUX.MUXBUS8 | [12, 0, 4] | [12, 0, 19] | [12, 0, 18] | [12, 0, 17] | [12, 0, 16] | [12, 0, 0] | [12, 2, 15] | [12, 2, 13] | [12, 0, 13] | [12, 0, 14] | [12, 0, 10] | [12, 0, 7] | [12, 0, 6] | [12, 0, 5] | [12, 0, 2] |
CLK_IOB:MUX.MUXBUS9 | [12, 2, 4] | [12, 2, 19] | [12, 2, 18] | [12, 2, 17] | [12, 2, 16] | [12, 2, 0] | [12, 2, 14] | [12, 2, 12] | [12, 0, 12] | [12, 0, 15] | [12, 2, 10] | [12, 2, 7] | [12, 2, 6] | [12, 2, 5] | [12, 2, 2] |
NONE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
GIOB0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
GIOB4 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB8 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB12 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
GIOB5 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB9 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB13 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB2 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
GIOB6 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB10 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB14 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
GIOB7 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB11 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB15 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
PASS | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
CLK_IOB_T
CLK_IOB_T bittile 0 |
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CLK_IOB_T bittile 6 |
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CLK_IOB_T bittile 7 |
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CLK_IOB_T bittile 8 |
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CLK_IOB_T bittile 9 |
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CLK_IOB_T bittile 10 |
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CLK_IOB_T bittile 11 |
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CLK_IOB_T bittile 12 |
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CLK_IOB:MUX.MUXBUS0 | [4, 0, 79] | [4, 0, 60] | [4, 0, 61] | [4, 0, 62] | [4, 0, 63] | [4, 0, 75] | [4, 2, 64] | [4, 2, 66] | [4, 0, 66] | [4, 0, 65] | [4, 0, 77] | [4, 0, 74] | [4, 0, 73] | [4, 0, 72] | [4, 0, 69] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
CLK_IOB:MUX.MUXBUS1 | [4, 2, 79] | [4, 2, 60] | [4, 2, 61] | [4, 2, 62] | [4, 2, 63] | [4, 2, 75] | [4, 2, 65] | [4, 2, 67] | [4, 0, 67] | [4, 0, 64] | [4, 2, 77] | [4, 2, 74] | [4, 2, 73] | [4, 2, 72] | [4, 2, 69] |
CLK_IOB:MUX.MUXBUS10 | [3, 0, 59] | [3, 0, 40] | [3, 0, 41] | [3, 0, 42] | [3, 0, 43] | [3, 0, 55] | [3, 2, 44] | [3, 2, 46] | [3, 0, 46] | [3, 0, 45] | [3, 0, 57] | [3, 0, 54] | [3, 0, 53] | [3, 0, 52] | [3, 0, 49] |
CLK_IOB:MUX.MUXBUS11 | [3, 2, 59] | [3, 2, 40] | [3, 2, 41] | [3, 2, 42] | [3, 2, 43] | [3, 2, 55] | [3, 2, 45] | [3, 2, 47] | [3, 0, 47] | [3, 0, 44] | [3, 2, 57] | [3, 2, 54] | [3, 2, 53] | [3, 2, 52] | [3, 2, 49] |
CLK_IOB:MUX.MUXBUS12 | [3, 0, 39] | [3, 0, 20] | [3, 0, 21] | [3, 0, 22] | [3, 0, 23] | [3, 0, 35] | [3, 2, 24] | [3, 2, 26] | [3, 0, 26] | [3, 0, 25] | [3, 0, 37] | [3, 0, 34] | [3, 0, 33] | [3, 0, 32] | [3, 0, 29] |
CLK_IOB:MUX.MUXBUS13 | [3, 2, 39] | [3, 2, 20] | [3, 2, 21] | [3, 2, 22] | [3, 2, 23] | [3, 2, 35] | [3, 2, 25] | [3, 2, 27] | [3, 0, 27] | [3, 0, 24] | [3, 2, 37] | [3, 2, 34] | [3, 2, 33] | [3, 2, 32] | [3, 2, 29] |
CLK_IOB:MUX.MUXBUS14 | [3, 0, 19] | [3, 0, 0] | [3, 0, 1] | [3, 0, 2] | [3, 0, 3] | [3, 0, 15] | [3, 2, 4] | [3, 2, 6] | [3, 0, 6] | [3, 0, 5] | [3, 0, 17] | [3, 0, 14] | [3, 0, 13] | [3, 0, 12] | [3, 0, 9] |
CLK_IOB:MUX.MUXBUS15 | [3, 2, 19] | [3, 2, 0] | [3, 2, 1] | [3, 2, 2] | [3, 2, 3] | [3, 2, 15] | [3, 2, 5] | [3, 2, 7] | [3, 0, 7] | [3, 0, 4] | [3, 2, 17] | [3, 2, 14] | [3, 2, 13] | [3, 2, 12] | [3, 2, 9] |
CLK_IOB:MUX.MUXBUS16 | [2, 0, 79] | [2, 0, 60] | [2, 0, 61] | [2, 0, 62] | [2, 0, 63] | [2, 0, 75] | [2, 2, 64] | [2, 2, 66] | [2, 0, 66] | [2, 0, 65] | [2, 0, 77] | [2, 0, 74] | [2, 0, 73] | [2, 0, 72] | [2, 0, 69] |
CLK_IOB:MUX.MUXBUS17 | [2, 2, 79] | [2, 2, 60] | [2, 2, 61] | [2, 2, 62] | [2, 2, 63] | [2, 2, 75] | [2, 2, 65] | [2, 2, 67] | [2, 0, 67] | [2, 0, 64] | [2, 2, 77] | [2, 2, 74] | [2, 2, 73] | [2, 2, 72] | [2, 2, 69] |
CLK_IOB:MUX.MUXBUS18 | [2, 0, 59] | [2, 0, 40] | [2, 0, 41] | [2, 0, 42] | [2, 0, 43] | [2, 0, 55] | [2, 2, 44] | [2, 2, 46] | [2, 0, 46] | [2, 0, 45] | [2, 0, 57] | [2, 0, 54] | [2, 0, 53] | [2, 0, 52] | [2, 0, 49] |
CLK_IOB:MUX.MUXBUS19 | [2, 2, 59] | [2, 2, 40] | [2, 2, 41] | [2, 2, 42] | [2, 2, 43] | [2, 2, 55] | [2, 2, 45] | [2, 2, 47] | [2, 0, 47] | [2, 0, 44] | [2, 2, 57] | [2, 2, 54] | [2, 2, 53] | [2, 2, 52] | [2, 2, 49] |
CLK_IOB:MUX.MUXBUS2 | [4, 0, 59] | [4, 0, 40] | [4, 0, 41] | [4, 0, 42] | [4, 0, 43] | [4, 0, 55] | [4, 2, 44] | [4, 2, 46] | [4, 0, 46] | [4, 0, 45] | [4, 0, 57] | [4, 0, 54] | [4, 0, 53] | [4, 0, 52] | [4, 0, 49] |
CLK_IOB:MUX.MUXBUS20 | [2, 0, 39] | [2, 0, 20] | [2, 0, 21] | [2, 0, 22] | [2, 0, 23] | [2, 0, 35] | [2, 2, 24] | [2, 2, 26] | [2, 0, 26] | [2, 0, 25] | [2, 0, 37] | [2, 0, 34] | [2, 0, 33] | [2, 0, 32] | [2, 0, 29] |
CLK_IOB:MUX.MUXBUS21 | [2, 2, 39] | [2, 2, 20] | [2, 2, 21] | [2, 2, 22] | [2, 2, 23] | [2, 2, 35] | [2, 2, 25] | [2, 2, 27] | [2, 0, 27] | [2, 0, 24] | [2, 2, 37] | [2, 2, 34] | [2, 2, 33] | [2, 2, 32] | [2, 2, 29] |
CLK_IOB:MUX.MUXBUS22 | [2, 0, 19] | [2, 0, 0] | [2, 0, 1] | [2, 0, 2] | [2, 0, 3] | [2, 0, 15] | [2, 2, 4] | [2, 2, 6] | [2, 0, 6] | [2, 0, 5] | [2, 0, 17] | [2, 0, 14] | [2, 0, 13] | [2, 0, 12] | [2, 0, 9] |
CLK_IOB:MUX.MUXBUS23 | [2, 2, 19] | [2, 2, 0] | [2, 2, 1] | [2, 2, 2] | [2, 2, 3] | [2, 2, 15] | [2, 2, 5] | [2, 2, 7] | [2, 0, 7] | [2, 0, 4] | [2, 2, 17] | [2, 2, 14] | [2, 2, 13] | [2, 2, 12] | [2, 2, 9] |
CLK_IOB:MUX.MUXBUS24 | [1, 0, 79] | [1, 0, 60] | [1, 0, 61] | [1, 0, 62] | [1, 0, 63] | [1, 0, 75] | [1, 2, 64] | [1, 2, 66] | [1, 0, 66] | [1, 0, 65] | [1, 0, 77] | [1, 0, 74] | [1, 0, 73] | [1, 0, 72] | [1, 0, 69] |
CLK_IOB:MUX.MUXBUS25 | [1, 2, 79] | [1, 2, 60] | [1, 2, 61] | [1, 2, 62] | [1, 2, 63] | [1, 2, 75] | [1, 2, 65] | [1, 2, 67] | [1, 0, 67] | [1, 0, 64] | [1, 2, 77] | [1, 2, 74] | [1, 2, 73] | [1, 2, 72] | [1, 2, 69] |
CLK_IOB:MUX.MUXBUS26 | [1, 0, 59] | [1, 0, 40] | [1, 0, 41] | [1, 0, 42] | [1, 0, 43] | [1, 0, 55] | [1, 2, 44] | [1, 2, 46] | [1, 0, 46] | [1, 0, 45] | [1, 0, 57] | [1, 0, 54] | [1, 0, 53] | [1, 0, 52] | [1, 0, 49] |
CLK_IOB:MUX.MUXBUS27 | [1, 2, 59] | [1, 2, 40] | [1, 2, 41] | [1, 2, 42] | [1, 2, 43] | [1, 2, 55] | [1, 2, 45] | [1, 2, 47] | [1, 0, 47] | [1, 0, 44] | [1, 2, 57] | [1, 2, 54] | [1, 2, 53] | [1, 2, 52] | [1, 2, 49] |
CLK_IOB:MUX.MUXBUS28 | [1, 0, 39] | [1, 0, 20] | [1, 0, 21] | [1, 0, 22] | [1, 0, 23] | [1, 0, 35] | [1, 2, 24] | [1, 2, 26] | [1, 0, 26] | [1, 0, 25] | [1, 0, 37] | [1, 0, 34] | [1, 0, 33] | [1, 0, 32] | [1, 0, 29] |
CLK_IOB:MUX.MUXBUS29 | [1, 2, 39] | [1, 2, 20] | [1, 2, 21] | [1, 2, 22] | [1, 2, 23] | [1, 2, 35] | [1, 2, 25] | [1, 2, 27] | [1, 0, 27] | [1, 0, 24] | [1, 2, 37] | [1, 2, 34] | [1, 2, 33] | [1, 2, 32] | [1, 2, 29] |
CLK_IOB:MUX.MUXBUS3 | [4, 2, 59] | [4, 2, 40] | [4, 2, 41] | [4, 2, 42] | [4, 2, 43] | [4, 2, 55] | [4, 2, 45] | [4, 2, 47] | [4, 0, 47] | [4, 0, 44] | [4, 2, 57] | [4, 2, 54] | [4, 2, 53] | [4, 2, 52] | [4, 2, 49] |
CLK_IOB:MUX.MUXBUS30 | [1, 0, 19] | [1, 0, 0] | [1, 0, 1] | [1, 0, 2] | [1, 0, 3] | [1, 0, 15] | [1, 2, 4] | [1, 2, 6] | [1, 0, 6] | [1, 0, 5] | [1, 0, 17] | [1, 0, 14] | [1, 0, 13] | [1, 0, 12] | [1, 0, 9] |
CLK_IOB:MUX.MUXBUS31 | [1, 2, 19] | [1, 2, 0] | [1, 2, 1] | [1, 2, 2] | [1, 2, 3] | [1, 2, 15] | [1, 2, 5] | [1, 2, 7] | [1, 0, 7] | [1, 0, 4] | [1, 2, 17] | [1, 2, 14] | [1, 2, 13] | [1, 2, 12] | [1, 2, 9] |
CLK_IOB:MUX.MUXBUS4 | [4, 0, 39] | [4, 0, 20] | [4, 0, 21] | [4, 0, 22] | [4, 0, 23] | [4, 0, 35] | [4, 2, 24] | [4, 2, 26] | [4, 0, 26] | [4, 0, 25] | [4, 0, 37] | [4, 0, 34] | [4, 0, 33] | [4, 0, 32] | [4, 0, 29] |
CLK_IOB:MUX.MUXBUS5 | [4, 2, 39] | [4, 2, 20] | [4, 2, 21] | [4, 2, 22] | [4, 2, 23] | [4, 2, 35] | [4, 2, 25] | [4, 2, 27] | [4, 0, 27] | [4, 0, 24] | [4, 2, 37] | [4, 2, 34] | [4, 2, 33] | [4, 2, 32] | [4, 2, 29] |
CLK_IOB:MUX.MUXBUS6 | [4, 0, 19] | [4, 0, 0] | [4, 0, 1] | [4, 0, 2] | [4, 0, 3] | [4, 0, 15] | [4, 2, 4] | [4, 2, 6] | [4, 0, 6] | [4, 0, 5] | [4, 0, 17] | [4, 0, 14] | [4, 0, 13] | [4, 0, 12] | [4, 0, 9] |
CLK_IOB:MUX.MUXBUS7 | [4, 2, 19] | [4, 2, 0] | [4, 2, 1] | [4, 2, 2] | [4, 2, 3] | [4, 2, 15] | [4, 2, 5] | [4, 2, 7] | [4, 0, 7] | [4, 0, 4] | [4, 2, 17] | [4, 2, 14] | [4, 2, 13] | [4, 2, 12] | [4, 2, 9] |
CLK_IOB:MUX.MUXBUS8 | [3, 0, 79] | [3, 0, 60] | [3, 0, 61] | [3, 0, 62] | [3, 0, 63] | [3, 0, 75] | [3, 2, 64] | [3, 2, 66] | [3, 0, 66] | [3, 0, 65] | [3, 0, 77] | [3, 0, 74] | [3, 0, 73] | [3, 0, 72] | [3, 0, 69] |
CLK_IOB:MUX.MUXBUS9 | [3, 2, 79] | [3, 2, 60] | [3, 2, 61] | [3, 2, 62] | [3, 2, 63] | [3, 2, 75] | [3, 2, 65] | [3, 2, 67] | [3, 0, 67] | [3, 0, 64] | [3, 2, 77] | [3, 2, 74] | [3, 2, 73] | [3, 2, 72] | [3, 2, 69] |
NONE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
GIOB0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
GIOB4 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB8 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB12 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
GIOB5 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB9 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB13 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB2 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
GIOB6 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB10 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB14 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
GIOB7 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB11 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
GIOB15 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
PASS | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
CLK_IOB:BUF.GIOB0 | [14, 0, 68] | [14, 0, 65] | [14, 0, 64] | [14, 0, 63] | [14, 0, 61] |
---|---|---|---|---|---|
CLK_IOB:BUF.GIOB1 | [14, 0, 48] | [14, 0, 45] | [14, 0, 44] | [14, 0, 43] | [14, 0, 41] |
CLK_IOB:BUF.GIOB10 | [13, 2, 68] | [13, 2, 65] | [13, 2, 64] | [13, 2, 63] | [13, 2, 61] |
CLK_IOB:BUF.GIOB11 | [13, 2, 48] | [13, 2, 45] | [13, 2, 44] | [13, 2, 43] | [13, 2, 41] |
CLK_IOB:BUF.GIOB12 | [13, 0, 28] | [13, 0, 25] | [13, 0, 24] | [13, 0, 23] | [13, 0, 21] |
CLK_IOB:BUF.GIOB13 | [13, 0, 8] | [13, 0, 5] | [13, 0, 4] | [13, 0, 3] | [13, 0, 1] |
CLK_IOB:BUF.GIOB14 | [13, 2, 28] | [13, 2, 25] | [13, 2, 24] | [13, 2, 23] | [13, 2, 21] |
CLK_IOB:BUF.GIOB15 | [13, 2, 8] | [13, 2, 5] | [13, 2, 4] | [13, 2, 3] | [13, 2, 1] |
CLK_IOB:BUF.GIOB2 | [14, 2, 68] | [14, 2, 65] | [14, 2, 64] | [14, 2, 63] | [14, 2, 61] |
CLK_IOB:BUF.GIOB3 | [14, 2, 48] | [14, 2, 45] | [14, 2, 44] | [14, 2, 43] | [14, 2, 41] |
CLK_IOB:BUF.GIOB4 | [14, 0, 28] | [14, 0, 25] | [14, 0, 24] | [14, 0, 23] | [14, 0, 21] |
CLK_IOB:BUF.GIOB5 | [14, 0, 8] | [14, 0, 5] | [14, 0, 4] | [14, 0, 3] | [14, 0, 1] |
CLK_IOB:BUF.GIOB6 | [14, 2, 28] | [14, 2, 25] | [14, 2, 24] | [14, 2, 23] | [14, 2, 21] |
CLK_IOB:BUF.GIOB7 | [14, 2, 8] | [14, 2, 5] | [14, 2, 4] | [14, 2, 3] | [14, 2, 1] |
CLK_IOB:BUF.GIOB8 | [13, 0, 68] | [13, 0, 65] | [13, 0, 64] | [13, 0, 63] | [13, 0, 61] |
CLK_IOB:BUF.GIOB9 | [13, 0, 48] | [13, 0, 45] | [13, 0, 44] | [13, 0, 43] | [13, 0, 41] |
Non-inverted | [4] | [3] | [2] | [1] | [0] |
Spine muxes — DCM
CLK_DCM_B
CLK_DCM_B bittile 0 |
---|
Row | Column |
CLK_DCM_B bittile 1 |
---|
Row | Column |
CLK_DCM:MUX.MUXBUS0 | [2, 0, 6] | [2, 0, 10] | [2, 0, 11] | [2, 0, 12] | [2, 0, 13] | [2, 0, 7] | [2, 0, 19] | [2, 0, 18] | [2, 0, 17] | [2, 0, 16] | [2, 0, 15] | [2, 0, 14] | [2, 0, 8] | [2, 0, 5] | [2, 0, 4] | [2, 0, 3] | [2, 0, 0] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
CLK_DCM:MUX.MUXBUS1 | [2, 2, 6] | [2, 2, 10] | [2, 2, 11] | [2, 2, 12] | [2, 2, 13] | [2, 2, 7] | [2, 2, 19] | [2, 2, 18] | [2, 2, 17] | [2, 2, 16] | [2, 2, 15] | [2, 2, 14] | [2, 2, 8] | [2, 2, 5] | [2, 2, 4] | [2, 2, 3] | [2, 2, 0] |
CLK_DCM:MUX.MUXBUS10 | [3, 0, 26] | [3, 0, 30] | [3, 0, 31] | [3, 0, 32] | [3, 0, 33] | [3, 0, 27] | [3, 0, 39] | [3, 0, 38] | [3, 0, 37] | [3, 0, 36] | [3, 0, 35] | [3, 0, 34] | [3, 0, 28] | [3, 0, 25] | [3, 0, 24] | [3, 0, 23] | [3, 0, 20] |
CLK_DCM:MUX.MUXBUS11 | [3, 2, 26] | [3, 2, 30] | [3, 2, 31] | [3, 2, 32] | [3, 2, 33] | [3, 2, 27] | [3, 2, 39] | [3, 2, 38] | [3, 2, 37] | [3, 2, 36] | [3, 2, 35] | [3, 2, 34] | [3, 2, 28] | [3, 2, 25] | [3, 2, 24] | [3, 2, 23] | [3, 2, 20] |
CLK_DCM:MUX.MUXBUS12 | [3, 0, 46] | [3, 0, 50] | [3, 0, 51] | [3, 0, 52] | [3, 0, 53] | [3, 0, 47] | [3, 0, 59] | [3, 0, 58] | [3, 0, 57] | [3, 0, 56] | [3, 0, 55] | [3, 0, 54] | [3, 0, 48] | [3, 0, 45] | [3, 0, 44] | [3, 0, 43] | [3, 0, 40] |
CLK_DCM:MUX.MUXBUS13 | [3, 2, 46] | [3, 2, 50] | [3, 2, 51] | [3, 2, 52] | [3, 2, 53] | [3, 2, 47] | [3, 2, 59] | [3, 2, 58] | [3, 2, 57] | [3, 2, 56] | [3, 2, 55] | [3, 2, 54] | [3, 2, 48] | [3, 2, 45] | [3, 2, 44] | [3, 2, 43] | [3, 2, 40] |
CLK_DCM:MUX.MUXBUS14 | [3, 0, 66] | [3, 0, 70] | [3, 0, 71] | [3, 0, 72] | [3, 0, 73] | [3, 0, 67] | [3, 0, 79] | [3, 0, 78] | [3, 0, 77] | [3, 0, 76] | [3, 0, 75] | [3, 0, 74] | [3, 0, 68] | [3, 0, 65] | [3, 0, 64] | [3, 0, 63] | [3, 0, 60] |
CLK_DCM:MUX.MUXBUS15 | [3, 2, 66] | [3, 2, 70] | [3, 2, 71] | [3, 2, 72] | [3, 2, 73] | [3, 2, 67] | [3, 2, 79] | [3, 2, 78] | [3, 2, 77] | [3, 2, 76] | [3, 2, 75] | [3, 2, 74] | [3, 2, 68] | [3, 2, 65] | [3, 2, 64] | [3, 2, 63] | [3, 2, 60] |
CLK_DCM:MUX.MUXBUS16 | [4, 0, 6] | [4, 0, 10] | [4, 0, 11] | [4, 0, 12] | [4, 0, 13] | [4, 0, 7] | [4, 0, 19] | [4, 0, 18] | [4, 0, 17] | [4, 0, 16] | [4, 0, 15] | [4, 0, 14] | [4, 0, 8] | [4, 0, 5] | [4, 0, 4] | [4, 0, 3] | [4, 0, 0] |
CLK_DCM:MUX.MUXBUS17 | [4, 2, 6] | [4, 2, 10] | [4, 2, 11] | [4, 2, 12] | [4, 2, 13] | [4, 2, 7] | [4, 2, 19] | [4, 2, 18] | [4, 2, 17] | [4, 2, 16] | [4, 2, 15] | [4, 2, 14] | [4, 2, 8] | [4, 2, 5] | [4, 2, 4] | [4, 2, 3] | [4, 2, 0] |
CLK_DCM:MUX.MUXBUS18 | [4, 0, 26] | [4, 0, 30] | [4, 0, 31] | [4, 0, 32] | [4, 0, 33] | [4, 0, 27] | [4, 0, 39] | [4, 0, 38] | [4, 0, 37] | [4, 0, 36] | [4, 0, 35] | [4, 0, 34] | [4, 0, 28] | [4, 0, 25] | [4, 0, 24] | [4, 0, 23] | [4, 0, 20] |
CLK_DCM:MUX.MUXBUS19 | [4, 2, 26] | [4, 2, 30] | [4, 2, 31] | [4, 2, 32] | [4, 2, 33] | [4, 2, 27] | [4, 2, 39] | [4, 2, 38] | [4, 2, 37] | [4, 2, 36] | [4, 2, 35] | [4, 2, 34] | [4, 2, 28] | [4, 2, 25] | [4, 2, 24] | [4, 2, 23] | [4, 2, 20] |
CLK_DCM:MUX.MUXBUS2 | [2, 0, 26] | [2, 0, 30] | [2, 0, 31] | [2, 0, 32] | [2, 0, 33] | [2, 0, 27] | [2, 0, 39] | [2, 0, 38] | [2, 0, 37] | [2, 0, 36] | [2, 0, 35] | [2, 0, 34] | [2, 0, 28] | [2, 0, 25] | [2, 0, 24] | [2, 0, 23] | [2, 0, 20] |
CLK_DCM:MUX.MUXBUS20 | [4, 0, 46] | [4, 0, 50] | [4, 0, 51] | [4, 0, 52] | [4, 0, 53] | [4, 0, 47] | [4, 0, 59] | [4, 0, 58] | [4, 0, 57] | [4, 0, 56] | [4, 0, 55] | [4, 0, 54] | [4, 0, 48] | [4, 0, 45] | [4, 0, 44] | [4, 0, 43] | [4, 0, 40] |
CLK_DCM:MUX.MUXBUS21 | [4, 2, 46] | [4, 2, 50] | [4, 2, 51] | [4, 2, 52] | [4, 2, 53] | [4, 2, 47] | [4, 2, 59] | [4, 2, 58] | [4, 2, 57] | [4, 2, 56] | [4, 2, 55] | [4, 2, 54] | [4, 2, 48] | [4, 2, 45] | [4, 2, 44] | [4, 2, 43] | [4, 2, 40] |
CLK_DCM:MUX.MUXBUS22 | [4, 0, 66] | [4, 0, 70] | [4, 0, 71] | [4, 0, 72] | [4, 0, 73] | [4, 0, 67] | [4, 0, 79] | [4, 0, 78] | [4, 0, 77] | [4, 0, 76] | [4, 0, 75] | [4, 0, 74] | [4, 0, 68] | [4, 0, 65] | [4, 0, 64] | [4, 0, 63] | [4, 0, 60] |
CLK_DCM:MUX.MUXBUS23 | [4, 2, 66] | [4, 2, 70] | [4, 2, 71] | [4, 2, 72] | [4, 2, 73] | [4, 2, 67] | [4, 2, 79] | [4, 2, 78] | [4, 2, 77] | [4, 2, 76] | [4, 2, 75] | [4, 2, 74] | [4, 2, 68] | [4, 2, 65] | [4, 2, 64] | [4, 2, 63] | [4, 2, 60] |
CLK_DCM:MUX.MUXBUS24 | [5, 0, 6] | [5, 0, 10] | [5, 0, 11] | [5, 0, 12] | [5, 0, 13] | [5, 0, 7] | [5, 0, 19] | [5, 0, 18] | [5, 0, 17] | [5, 0, 16] | [5, 0, 15] | [5, 0, 14] | [5, 0, 8] | [5, 0, 5] | [5, 0, 4] | [5, 0, 3] | [5, 0, 0] |
CLK_DCM:MUX.MUXBUS25 | [5, 2, 6] | [5, 2, 10] | [5, 2, 11] | [5, 2, 12] | [5, 2, 13] | [5, 2, 7] | [5, 2, 19] | [5, 2, 18] | [5, 2, 17] | [5, 2, 16] | [5, 2, 15] | [5, 2, 14] | [5, 2, 8] | [5, 2, 5] | [5, 2, 4] | [5, 2, 3] | [5, 2, 0] |
CLK_DCM:MUX.MUXBUS26 | [5, 0, 26] | [5, 0, 30] | [5, 0, 31] | [5, 0, 32] | [5, 0, 33] | [5, 0, 27] | [5, 0, 39] | [5, 0, 38] | [5, 0, 37] | [5, 0, 36] | [5, 0, 35] | [5, 0, 34] | [5, 0, 28] | [5, 0, 25] | [5, 0, 24] | [5, 0, 23] | [5, 0, 20] |
CLK_DCM:MUX.MUXBUS27 | [5, 2, 26] | [5, 2, 30] | [5, 2, 31] | [5, 2, 32] | [5, 2, 33] | [5, 2, 27] | [5, 2, 39] | [5, 2, 38] | [5, 2, 37] | [5, 2, 36] | [5, 2, 35] | [5, 2, 34] | [5, 2, 28] | [5, 2, 25] | [5, 2, 24] | [5, 2, 23] | [5, 2, 20] |
CLK_DCM:MUX.MUXBUS28 | [5, 0, 46] | [5, 0, 50] | [5, 0, 51] | [5, 0, 52] | [5, 0, 53] | [5, 0, 47] | [5, 0, 59] | [5, 0, 58] | [5, 0, 57] | [5, 0, 56] | [5, 0, 55] | [5, 0, 54] | [5, 0, 48] | [5, 0, 45] | [5, 0, 44] | [5, 0, 43] | [5, 0, 40] |
CLK_DCM:MUX.MUXBUS29 | [5, 2, 46] | [5, 2, 50] | [5, 2, 51] | [5, 2, 52] | [5, 2, 53] | [5, 2, 47] | [5, 2, 59] | [5, 2, 58] | [5, 2, 57] | [5, 2, 56] | [5, 2, 55] | [5, 2, 54] | [5, 2, 48] | [5, 2, 45] | [5, 2, 44] | [5, 2, 43] | [5, 2, 40] |
CLK_DCM:MUX.MUXBUS3 | [2, 2, 26] | [2, 2, 30] | [2, 2, 31] | [2, 2, 32] | [2, 2, 33] | [2, 2, 27] | [2, 2, 39] | [2, 2, 38] | [2, 2, 37] | [2, 2, 36] | [2, 2, 35] | [2, 2, 34] | [2, 2, 28] | [2, 2, 25] | [2, 2, 24] | [2, 2, 23] | [2, 2, 20] |
CLK_DCM:MUX.MUXBUS30 | [5, 0, 66] | [5, 0, 70] | [5, 0, 71] | [5, 0, 72] | [5, 0, 73] | [5, 0, 67] | [5, 0, 79] | [5, 0, 78] | [5, 0, 77] | [5, 0, 76] | [5, 0, 75] | [5, 0, 74] | [5, 0, 68] | [5, 0, 65] | [5, 0, 64] | [5, 0, 63] | [5, 0, 60] |
CLK_DCM:MUX.MUXBUS31 | [5, 2, 66] | [5, 2, 70] | [5, 2, 71] | [5, 2, 72] | [5, 2, 73] | [5, 2, 67] | [5, 2, 79] | [5, 2, 78] | [5, 2, 77] | [5, 2, 76] | [5, 2, 75] | [5, 2, 74] | [5, 2, 68] | [5, 2, 65] | [5, 2, 64] | [5, 2, 63] | [5, 2, 60] |
CLK_DCM:MUX.MUXBUS4 | [2, 0, 46] | [2, 0, 50] | [2, 0, 51] | [2, 0, 52] | [2, 0, 53] | [2, 0, 47] | [2, 0, 59] | [2, 0, 58] | [2, 0, 57] | [2, 0, 56] | [2, 0, 55] | [2, 0, 54] | [2, 0, 48] | [2, 0, 45] | [2, 0, 44] | [2, 0, 43] | [2, 0, 40] |
CLK_DCM:MUX.MUXBUS5 | [2, 2, 46] | [2, 2, 50] | [2, 2, 51] | [2, 2, 52] | [2, 2, 53] | [2, 2, 47] | [2, 2, 59] | [2, 2, 58] | [2, 2, 57] | [2, 2, 56] | [2, 2, 55] | [2, 2, 54] | [2, 2, 48] | [2, 2, 45] | [2, 2, 44] | [2, 2, 43] | [2, 2, 40] |
CLK_DCM:MUX.MUXBUS6 | [2, 0, 66] | [2, 0, 70] | [2, 0, 71] | [2, 0, 72] | [2, 0, 73] | [2, 0, 67] | [2, 0, 79] | [2, 0, 78] | [2, 0, 77] | [2, 0, 76] | [2, 0, 75] | [2, 0, 74] | [2, 0, 68] | [2, 0, 65] | [2, 0, 64] | [2, 0, 63] | [2, 0, 60] |
CLK_DCM:MUX.MUXBUS7 | [2, 2, 66] | [2, 2, 70] | [2, 2, 71] | [2, 2, 72] | [2, 2, 73] | [2, 2, 67] | [2, 2, 79] | [2, 2, 78] | [2, 2, 77] | [2, 2, 76] | [2, 2, 75] | [2, 2, 74] | [2, 2, 68] | [2, 2, 65] | [2, 2, 64] | [2, 2, 63] | [2, 2, 60] |
CLK_DCM:MUX.MUXBUS8 | [3, 0, 6] | [3, 0, 10] | [3, 0, 11] | [3, 0, 12] | [3, 0, 13] | [3, 0, 7] | [3, 0, 19] | [3, 0, 18] | [3, 0, 17] | [3, 0, 16] | [3, 0, 15] | [3, 0, 14] | [3, 0, 8] | [3, 0, 5] | [3, 0, 4] | [3, 0, 3] | [3, 0, 0] |
CLK_DCM:MUX.MUXBUS9 | [3, 2, 6] | [3, 2, 10] | [3, 2, 11] | [3, 2, 12] | [3, 2, 13] | [3, 2, 7] | [3, 2, 19] | [3, 2, 18] | [3, 2, 17] | [3, 2, 16] | [3, 2, 15] | [3, 2, 14] | [3, 2, 8] | [3, 2, 5] | [3, 2, 4] | [3, 2, 3] | [3, 2, 0] |
NONE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
DCM0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
DCM1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM2 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM3 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM4 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM5 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM6 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
DCM7 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM8 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM9 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM10 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM11 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM12 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
DCM13 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM14 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM15 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM16 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM17 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM18 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
DCM19 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM20 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM21 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM22 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM23 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
PASS | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
CLK_DCM_T
CLK_DCM_T bittile 0 |
---|
Row | Column |
CLK_DCM_T bittile 1 |
---|
Row | Column |
CLK_DCM:MUX.MUXBUS0 | [5, 0, 72] | [5, 0, 69] | [5, 0, 68] | [5, 0, 67] | [5, 0, 66] | [5, 0, 73] | [5, 0, 60] | [5, 0, 61] | [5, 0, 62] | [5, 0, 63] | [5, 0, 64] | [5, 0, 65] | [5, 0, 79] | [5, 0, 76] | [5, 0, 75] | [5, 0, 74] | [5, 0, 71] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
CLK_DCM:MUX.MUXBUS1 | [5, 2, 72] | [5, 2, 69] | [5, 2, 68] | [5, 2, 67] | [5, 2, 66] | [5, 2, 73] | [5, 2, 60] | [5, 2, 61] | [5, 2, 62] | [5, 2, 63] | [5, 2, 64] | [5, 2, 65] | [5, 2, 79] | [5, 2, 76] | [5, 2, 75] | [5, 2, 74] | [5, 2, 71] |
CLK_DCM:MUX.MUXBUS10 | [4, 0, 52] | [4, 0, 49] | [4, 0, 48] | [4, 0, 47] | [4, 0, 46] | [4, 0, 53] | [4, 0, 40] | [4, 0, 41] | [4, 0, 42] | [4, 0, 43] | [4, 0, 44] | [4, 0, 45] | [4, 0, 59] | [4, 0, 56] | [4, 0, 55] | [4, 0, 54] | [4, 0, 51] |
CLK_DCM:MUX.MUXBUS11 | [4, 2, 52] | [4, 2, 49] | [4, 2, 48] | [4, 2, 47] | [4, 2, 46] | [4, 2, 53] | [4, 2, 40] | [4, 2, 41] | [4, 2, 42] | [4, 2, 43] | [4, 2, 44] | [4, 2, 45] | [4, 2, 59] | [4, 2, 56] | [4, 2, 55] | [4, 2, 54] | [4, 2, 51] |
CLK_DCM:MUX.MUXBUS12 | [4, 0, 32] | [4, 0, 29] | [4, 0, 28] | [4, 0, 27] | [4, 0, 26] | [4, 0, 33] | [4, 0, 20] | [4, 0, 21] | [4, 0, 22] | [4, 0, 23] | [4, 0, 24] | [4, 0, 25] | [4, 0, 39] | [4, 0, 36] | [4, 0, 35] | [4, 0, 34] | [4, 0, 31] |
CLK_DCM:MUX.MUXBUS13 | [4, 2, 32] | [4, 2, 29] | [4, 2, 28] | [4, 2, 27] | [4, 2, 26] | [4, 2, 33] | [4, 2, 20] | [4, 2, 21] | [4, 2, 22] | [4, 2, 23] | [4, 2, 24] | [4, 2, 25] | [4, 2, 39] | [4, 2, 36] | [4, 2, 35] | [4, 2, 34] | [4, 2, 31] |
CLK_DCM:MUX.MUXBUS14 | [4, 0, 12] | [4, 0, 9] | [4, 0, 8] | [4, 0, 7] | [4, 0, 6] | [4, 0, 13] | [4, 0, 0] | [4, 0, 1] | [4, 0, 2] | [4, 0, 3] | [4, 0, 4] | [4, 0, 5] | [4, 0, 19] | [4, 0, 16] | [4, 0, 15] | [4, 0, 14] | [4, 0, 11] |
CLK_DCM:MUX.MUXBUS15 | [4, 2, 12] | [4, 2, 9] | [4, 2, 8] | [4, 2, 7] | [4, 2, 6] | [4, 2, 13] | [4, 2, 0] | [4, 2, 1] | [4, 2, 2] | [4, 2, 3] | [4, 2, 4] | [4, 2, 5] | [4, 2, 19] | [4, 2, 16] | [4, 2, 15] | [4, 2, 14] | [4, 2, 11] |
CLK_DCM:MUX.MUXBUS16 | [3, 0, 72] | [3, 0, 69] | [3, 0, 68] | [3, 0, 67] | [3, 0, 66] | [3, 0, 73] | [3, 0, 60] | [3, 0, 61] | [3, 0, 62] | [3, 0, 63] | [3, 0, 64] | [3, 0, 65] | [3, 0, 79] | [3, 0, 76] | [3, 0, 75] | [3, 0, 74] | [3, 0, 71] |
CLK_DCM:MUX.MUXBUS17 | [3, 2, 72] | [3, 2, 69] | [3, 2, 68] | [3, 2, 67] | [3, 2, 66] | [3, 2, 73] | [3, 2, 60] | [3, 2, 61] | [3, 2, 62] | [3, 2, 63] | [3, 2, 64] | [3, 2, 65] | [3, 2, 79] | [3, 2, 76] | [3, 2, 75] | [3, 2, 74] | [3, 2, 71] |
CLK_DCM:MUX.MUXBUS18 | [3, 0, 52] | [3, 0, 49] | [3, 0, 48] | [3, 0, 47] | [3, 0, 46] | [3, 0, 53] | [3, 0, 40] | [3, 0, 41] | [3, 0, 42] | [3, 0, 43] | [3, 0, 44] | [3, 0, 45] | [3, 0, 59] | [3, 0, 56] | [3, 0, 55] | [3, 0, 54] | [3, 0, 51] |
CLK_DCM:MUX.MUXBUS19 | [3, 2, 52] | [3, 2, 49] | [3, 2, 48] | [3, 2, 47] | [3, 2, 46] | [3, 2, 53] | [3, 2, 40] | [3, 2, 41] | [3, 2, 42] | [3, 2, 43] | [3, 2, 44] | [3, 2, 45] | [3, 2, 59] | [3, 2, 56] | [3, 2, 55] | [3, 2, 54] | [3, 2, 51] |
CLK_DCM:MUX.MUXBUS2 | [5, 0, 52] | [5, 0, 49] | [5, 0, 48] | [5, 0, 47] | [5, 0, 46] | [5, 0, 53] | [5, 0, 40] | [5, 0, 41] | [5, 0, 42] | [5, 0, 43] | [5, 0, 44] | [5, 0, 45] | [5, 0, 59] | [5, 0, 56] | [5, 0, 55] | [5, 0, 54] | [5, 0, 51] |
CLK_DCM:MUX.MUXBUS20 | [3, 0, 32] | [3, 0, 29] | [3, 0, 28] | [3, 0, 27] | [3, 0, 26] | [3, 0, 33] | [3, 0, 20] | [3, 0, 21] | [3, 0, 22] | [3, 0, 23] | [3, 0, 24] | [3, 0, 25] | [3, 0, 39] | [3, 0, 36] | [3, 0, 35] | [3, 0, 34] | [3, 0, 31] |
CLK_DCM:MUX.MUXBUS21 | [3, 2, 32] | [3, 2, 29] | [3, 2, 28] | [3, 2, 27] | [3, 2, 26] | [3, 2, 33] | [3, 2, 20] | [3, 2, 21] | [3, 2, 22] | [3, 2, 23] | [3, 2, 24] | [3, 2, 25] | [3, 2, 39] | [3, 2, 36] | [3, 2, 35] | [3, 2, 34] | [3, 2, 31] |
CLK_DCM:MUX.MUXBUS22 | [3, 0, 12] | [3, 0, 9] | [3, 0, 8] | [3, 0, 7] | [3, 0, 6] | [3, 0, 13] | [3, 0, 0] | [3, 0, 1] | [3, 0, 2] | [3, 0, 3] | [3, 0, 4] | [3, 0, 5] | [3, 0, 19] | [3, 0, 16] | [3, 0, 15] | [3, 0, 14] | [3, 0, 11] |
CLK_DCM:MUX.MUXBUS23 | [3, 2, 12] | [3, 2, 9] | [3, 2, 8] | [3, 2, 7] | [3, 2, 6] | [3, 2, 13] | [3, 2, 0] | [3, 2, 1] | [3, 2, 2] | [3, 2, 3] | [3, 2, 4] | [3, 2, 5] | [3, 2, 19] | [3, 2, 16] | [3, 2, 15] | [3, 2, 14] | [3, 2, 11] |
CLK_DCM:MUX.MUXBUS24 | [2, 0, 72] | [2, 0, 69] | [2, 0, 68] | [2, 0, 67] | [2, 0, 66] | [2, 0, 73] | [2, 0, 60] | [2, 0, 61] | [2, 0, 62] | [2, 0, 63] | [2, 0, 64] | [2, 0, 65] | [2, 0, 79] | [2, 0, 76] | [2, 0, 75] | [2, 0, 74] | [2, 0, 71] |
CLK_DCM:MUX.MUXBUS25 | [2, 2, 72] | [2, 2, 69] | [2, 2, 68] | [2, 2, 67] | [2, 2, 66] | [2, 2, 73] | [2, 2, 60] | [2, 2, 61] | [2, 2, 62] | [2, 2, 63] | [2, 2, 64] | [2, 2, 65] | [2, 2, 79] | [2, 2, 76] | [2, 2, 75] | [2, 2, 74] | [2, 2, 71] |
CLK_DCM:MUX.MUXBUS26 | [2, 0, 52] | [2, 0, 49] | [2, 0, 48] | [2, 0, 47] | [2, 0, 46] | [2, 0, 53] | [2, 0, 40] | [2, 0, 41] | [2, 0, 42] | [2, 0, 43] | [2, 0, 44] | [2, 0, 45] | [2, 0, 59] | [2, 0, 56] | [2, 0, 55] | [2, 0, 54] | [2, 0, 51] |
CLK_DCM:MUX.MUXBUS27 | [2, 2, 52] | [2, 2, 49] | [2, 2, 48] | [2, 2, 47] | [2, 2, 46] | [2, 2, 53] | [2, 2, 40] | [2, 2, 41] | [2, 2, 42] | [2, 2, 43] | [2, 2, 44] | [2, 2, 45] | [2, 2, 59] | [2, 2, 56] | [2, 2, 55] | [2, 2, 54] | [2, 2, 51] |
CLK_DCM:MUX.MUXBUS28 | [2, 0, 32] | [2, 0, 29] | [2, 0, 28] | [2, 0, 27] | [2, 0, 26] | [2, 0, 33] | [2, 0, 20] | [2, 0, 21] | [2, 0, 22] | [2, 0, 23] | [2, 0, 24] | [2, 0, 25] | [2, 0, 39] | [2, 0, 36] | [2, 0, 35] | [2, 0, 34] | [2, 0, 31] |
CLK_DCM:MUX.MUXBUS29 | [2, 2, 32] | [2, 2, 29] | [2, 2, 28] | [2, 2, 27] | [2, 2, 26] | [2, 2, 33] | [2, 2, 20] | [2, 2, 21] | [2, 2, 22] | [2, 2, 23] | [2, 2, 24] | [2, 2, 25] | [2, 2, 39] | [2, 2, 36] | [2, 2, 35] | [2, 2, 34] | [2, 2, 31] |
CLK_DCM:MUX.MUXBUS3 | [5, 2, 52] | [5, 2, 49] | [5, 2, 48] | [5, 2, 47] | [5, 2, 46] | [5, 2, 53] | [5, 2, 40] | [5, 2, 41] | [5, 2, 42] | [5, 2, 43] | [5, 2, 44] | [5, 2, 45] | [5, 2, 59] | [5, 2, 56] | [5, 2, 55] | [5, 2, 54] | [5, 2, 51] |
CLK_DCM:MUX.MUXBUS30 | [2, 0, 12] | [2, 0, 9] | [2, 0, 8] | [2, 0, 7] | [2, 0, 6] | [2, 0, 13] | [2, 0, 0] | [2, 0, 1] | [2, 0, 2] | [2, 0, 3] | [2, 0, 4] | [2, 0, 5] | [2, 0, 19] | [2, 0, 16] | [2, 0, 15] | [2, 0, 14] | [2, 0, 11] |
CLK_DCM:MUX.MUXBUS31 | [2, 2, 12] | [2, 2, 9] | [2, 2, 8] | [2, 2, 7] | [2, 2, 6] | [2, 2, 13] | [2, 2, 0] | [2, 2, 1] | [2, 2, 2] | [2, 2, 3] | [2, 2, 4] | [2, 2, 5] | [2, 2, 19] | [2, 2, 16] | [2, 2, 15] | [2, 2, 14] | [2, 2, 11] |
CLK_DCM:MUX.MUXBUS4 | [5, 0, 32] | [5, 0, 29] | [5, 0, 28] | [5, 0, 27] | [5, 0, 26] | [5, 0, 33] | [5, 0, 20] | [5, 0, 21] | [5, 0, 22] | [5, 0, 23] | [5, 0, 24] | [5, 0, 25] | [5, 0, 39] | [5, 0, 36] | [5, 0, 35] | [5, 0, 34] | [5, 0, 31] |
CLK_DCM:MUX.MUXBUS5 | [5, 2, 32] | [5, 2, 29] | [5, 2, 28] | [5, 2, 27] | [5, 2, 26] | [5, 2, 33] | [5, 2, 20] | [5, 2, 21] | [5, 2, 22] | [5, 2, 23] | [5, 2, 24] | [5, 2, 25] | [5, 2, 39] | [5, 2, 36] | [5, 2, 35] | [5, 2, 34] | [5, 2, 31] |
CLK_DCM:MUX.MUXBUS6 | [5, 0, 12] | [5, 0, 9] | [5, 0, 8] | [5, 0, 7] | [5, 0, 6] | [5, 0, 13] | [5, 0, 0] | [5, 0, 1] | [5, 0, 2] | [5, 0, 3] | [5, 0, 4] | [5, 0, 5] | [5, 0, 19] | [5, 0, 16] | [5, 0, 15] | [5, 0, 14] | [5, 0, 11] |
CLK_DCM:MUX.MUXBUS7 | [5, 2, 12] | [5, 2, 9] | [5, 2, 8] | [5, 2, 7] | [5, 2, 6] | [5, 2, 13] | [5, 2, 0] | [5, 2, 1] | [5, 2, 2] | [5, 2, 3] | [5, 2, 4] | [5, 2, 5] | [5, 2, 19] | [5, 2, 16] | [5, 2, 15] | [5, 2, 14] | [5, 2, 11] |
CLK_DCM:MUX.MUXBUS8 | [4, 0, 72] | [4, 0, 69] | [4, 0, 68] | [4, 0, 67] | [4, 0, 66] | [4, 0, 73] | [4, 0, 60] | [4, 0, 61] | [4, 0, 62] | [4, 0, 63] | [4, 0, 64] | [4, 0, 65] | [4, 0, 79] | [4, 0, 76] | [4, 0, 75] | [4, 0, 74] | [4, 0, 71] |
CLK_DCM:MUX.MUXBUS9 | [4, 2, 72] | [4, 2, 69] | [4, 2, 68] | [4, 2, 67] | [4, 2, 66] | [4, 2, 73] | [4, 2, 60] | [4, 2, 61] | [4, 2, 62] | [4, 2, 63] | [4, 2, 64] | [4, 2, 65] | [4, 2, 79] | [4, 2, 76] | [4, 2, 75] | [4, 2, 74] | [4, 2, 71] |
NONE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
DCM0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
DCM1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM2 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM3 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM4 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM5 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM6 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
DCM7 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM8 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM9 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM10 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM11 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM12 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
DCM13 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM14 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM15 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM16 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM17 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM18 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
DCM19 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM20 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM21 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM22 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
DCM23 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
PASS | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
MGT clock repeater
HCLK_MGT_REPEATER bittile 0 | |||||||
---|---|---|---|---|---|---|---|
Row | Column | ||||||
0 | 1 | 2 | 3 | 4 | 5 | 6 | |
0 | - | - | - | - | - | - | - |
1 | - | - | - | - | - | - | - |
2 | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - |
4 | - | - | - | - | - | - | - |
5 | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - |
7 | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - |
9 | - | - | - | - | - | - | - |
10 | - | - | - | - | - | - | - |
11 | - | - | - | - | - | - | - |
12 | - | - | - | - | - | - | HCLK_MGT_REPEATER:BUF.MGT0 |
13 | - | - | - | - | - | - | HCLK_MGT_REPEATER:BUF.MGT1 |
HCLK_MGT_REPEATER:BUF.MGT0 | [0, 6, 12] |
---|---|
HCLK_MGT_REPEATER:BUF.MGT1 | [0, 6, 13] |
Non-inverted | [0] |
Row clock terminators
HCLK_TERM_L
HCLK_TERM_L bittile 0 | |||||||
---|---|---|---|---|---|---|---|
Row | Column | ||||||
0 | 1 | 2 | 3 | 4 | 5 | 6 | |
0 | - | - | - | - | - | - | - |
1 | - | - | - | - | - | - | - |
2 | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - |
4 | - | - | - | - | - | - | - |
5 | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - |
7 | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - |
9 | - | - | - | - | - | - | - |
10 | - | - | - | - | - | - | - |
11 | - | - | - | - | - | - | - |
12 | - | - | - | - | - | - | HCLK_TERM:HCLK_ENABLE[0] |
13 | - | - | - | - | - | - | HCLK_TERM:HCLK_ENABLE[1] |
14 | - | - | - | - | - | - | HCLK_TERM:HCLK_ENABLE[2] |
HCLK_TERM:HCLK_ENABLE | [0, 6, 14] | [0, 6, 13] | [0, 6, 12] |
---|---|---|---|
Non-inverted | [2] | [1] | [0] |
HCLK_TERM_R
HCLK_TERM_R bittile 0 | |||||||
---|---|---|---|---|---|---|---|
Row | Column | ||||||
0 | 1 | 2 | 3 | 4 | 5 | 6 | |
0 | - | - | - | - | - | - | - |
1 | - | - | - | - | - | - | - |
2 | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - |
4 | - | - | - | - | - | - | - |
5 | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - |
7 | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - |
9 | - | - | - | - | - | - | - |
10 | - | - | - | - | - | - | - |
11 | - | - | - | - | - | - | - |
12 | - | - | - | - | - | - | HCLK_TERM:HCLK_ENABLE[0] |
13 | - | - | - | - | - | - | HCLK_TERM:HCLK_ENABLE[1] |
14 | - | - | - | - | - | - | HCLK_TERM:HCLK_ENABLE[2] |
HCLK_TERM:HCLK_ENABLE | [0, 6, 14] | [0, 6, 13] | [0, 6, 12] |
---|---|---|---|
Non-inverted | [2] | [1] | [0] |
IO clock nodes
HCLK_IOIS_LVDS
LVDS:LVDSBIAS | [0, 3, 12] | [0, 11, 13] | [0, 2, 14] | [0, 5, 15] | [0, 3, 13] | [0, 3, 14] | [0, 2, 13] | [0, 3, 15] | [0, 5, 14] | [0, 5, 12] |
---|---|---|---|---|---|---|---|---|---|---|
Non-inverted | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
BUFR0:ENABLE | [0, 21, 14] |
---|---|
BUFR1:ENABLE | [0, 21, 13] |
IDELAYCTRL:ENABLE | [0, 11, 12] |
IOCLK:BUF.HCLK0 | [0, 7, 12] |
IOCLK:BUF.HCLK1 | [0, 7, 13] |
IOCLK:BUF.HCLK2 | [0, 7, 14] |
IOCLK:BUF.HCLK3 | [0, 7, 15] |
IOCLK:BUF.HCLK4 | [0, 8, 12] |
IOCLK:BUF.HCLK5 | [0, 8, 13] |
IOCLK:BUF.HCLK6 | [0, 8, 14] |
IOCLK:BUF.HCLK7 | [0, 8, 15] |
IOCLK:BUF.IOCLK_N0 | [0, 17, 15] |
IOCLK:BUF.IOCLK_N1 | [0, 17, 12] |
IOCLK:BUF.IOCLK_S0 | [0, 17, 14] |
IOCLK:BUF.IOCLK_S1 | [0, 17, 13] |
IOCLK:BUF.RCLK0 | [0, 21, 15] |
IOCLK:BUF.RCLK1 | [0, 24, 15] |
IOCLK:BUF.VIOCLK0 | [0, 16, 14] |
IOCLK:BUF.VIOCLK1 | [0, 16, 15] |
Non-inverted | [0] |
BUFR0:BUFR_DIVIDE | [0, 14, 14] | [0, 14, 13] | [0, 14, 12] | [0, 14, 15] |
---|---|---|---|---|
BUFR1:BUFR_DIVIDE | [0, 22, 14] | [0, 22, 13] | [0, 22, 12] | [0, 22, 15] |
BYPASS | 0 | 0 | 0 | 0 |
1 | 0 | 0 | 0 | 1 |
2 | 0 | 0 | 1 | 1 |
3 | 0 | 1 | 0 | 1 |
4 | 0 | 1 | 1 | 1 |
5 | 1 | 0 | 0 | 1 |
6 | 1 | 0 | 1 | 1 |
7 | 1 | 1 | 0 | 1 |
8 | 1 | 1 | 1 | 1 |
IOCLK:VIOCLK_ENABLE | [0, 20, 13] | [0, 15, 15] | [0, 15, 14] | [0, 15, 13] |
---|---|---|---|---|
Non-inverted | [3] | [2] | [1] | [0] |
BUFR0:MUX.I | [0, 19, 15] | [0, 19, 14] |
---|---|---|
BUFR1:MUX.I | [0, 19, 12] | [0, 19, 13] |
BUFIO0 | 0 | 0 |
CKINT0 | 0 | 1 |
CKINT1 | 1 | 0 |
BUFIO1 | 1 | 1 |
RCLK:MUX.RCLK0 | [0, 25, 12] | [0, 25, 14] | [0, 25, 13] | [0, 25, 15] |
---|---|---|---|---|
RCLK:MUX.RCLK1 | [0, 23, 12] | [0, 23, 14] | [0, 23, 13] | [0, 23, 15] |
NONE | 0 | 0 | 0 | 0 |
VRCLK_N0 | 0 | 0 | 0 | 1 |
VRCLK0 | 0 | 0 | 1 | 1 |
VRCLK_S0 | 0 | 1 | 0 | 1 |
VRCLK_N1 | 1 | 0 | 0 | 1 |
VRCLK1 | 1 | 0 | 1 | 1 |
VRCLK_S1 | 1 | 1 | 0 | 1 |
IDELAYCTRL:MUX.REFCLK | [0, 24, 14] | [0, 24, 13] | [0, 24, 12] |
---|---|---|---|
HCLK0 | 0 | 0 | 0 |
HCLK1 | 0 | 0 | 1 |
HCLK2 | 0 | 1 | 0 |
HCLK3 | 0 | 1 | 1 |
HCLK4 | 1 | 0 | 0 |
HCLK5 | 1 | 0 | 1 |
HCLK6 | 1 | 1 | 0 |
HCLK7 | 1 | 1 | 1 |
HCLK_IOIS_DCI
BUFR0:ENABLE | [0, 21, 14] |
---|---|
BUFR1:ENABLE | [0, 21, 13] |
DCI:ENABLE | [0, 0, 14] |
DCI:QUIET | [0, 5, 12] |
IDELAYCTRL:ENABLE | [0, 11, 12] |
IOCLK:BUF.HCLK0 | [0, 7, 12] |
IOCLK:BUF.HCLK1 | [0, 7, 13] |
IOCLK:BUF.HCLK2 | [0, 7, 14] |
IOCLK:BUF.HCLK3 | [0, 7, 15] |
IOCLK:BUF.HCLK4 | [0, 8, 12] |
IOCLK:BUF.HCLK5 | [0, 8, 13] |
IOCLK:BUF.HCLK6 | [0, 8, 14] |
IOCLK:BUF.HCLK7 | [0, 8, 15] |
IOCLK:BUF.IOCLK_N0 | [0, 17, 15] |
IOCLK:BUF.IOCLK_N1 | [0, 17, 12] |
IOCLK:BUF.IOCLK_S0 | [0, 17, 14] |
IOCLK:BUF.IOCLK_S1 | [0, 17, 13] |
IOCLK:BUF.RCLK0 | [0, 21, 15] |
IOCLK:BUF.RCLK1 | [0, 24, 15] |
IOCLK:BUF.VIOCLK0 | [0, 16, 14] |
IOCLK:BUF.VIOCLK1 | [0, 16, 15] |
Non-inverted | [0] |
DCI:LVDIV2 | [0, 27, 14] | [0, 27, 13] |
---|---|---|
DCI:NREF | [0, 27, 12] | [0, 27, 15] |
DCI:TEST_ENABLE | [0, 5, 13] | [0, 0, 15] |
Non-inverted | [1] | [0] |
DCI:PREF | [0, 1, 12] | [0, 1, 13] | [0, 1, 14] | [0, 1, 15] |
---|---|---|---|---|
IOCLK:VIOCLK_ENABLE | [0, 20, 13] | [0, 15, 15] | [0, 15, 14] | [0, 15, 13] |
Non-inverted | [3] | [2] | [1] | [0] |
DCI:NMASK_TERM_SPLIT | [0, 10, 12] | [0, 12, 15] | [0, 12, 14] | [0, 12, 13] | [0, 12, 12] |
---|---|---|---|---|---|
DCI:PMASK_TERM_SPLIT | [0, 11, 15] | [0, 10, 15] | [0, 11, 14] | [0, 10, 14] | [0, 10, 13] |
DCI:PMASK_TERM_VCC | [0, 2, 12] | [0, 4, 15] | [0, 4, 14] | [0, 4, 13] | [0, 4, 12] |
Non-inverted | [4] | [3] | [2] | [1] | [0] |
BUFR0:BUFR_DIVIDE | [0, 14, 14] | [0, 14, 13] | [0, 14, 12] | [0, 14, 15] |
---|---|---|---|---|
BUFR1:BUFR_DIVIDE | [0, 22, 14] | [0, 22, 13] | [0, 22, 12] | [0, 22, 15] |
BYPASS | 0 | 0 | 0 | 0 |
1 | 0 | 0 | 0 | 1 |
2 | 0 | 0 | 1 | 1 |
3 | 0 | 1 | 0 | 1 |
4 | 0 | 1 | 1 | 1 |
5 | 1 | 0 | 0 | 1 |
6 | 1 | 0 | 1 | 1 |
7 | 1 | 1 | 0 | 1 |
8 | 1 | 1 | 1 | 1 |
BUFR0:MUX.I | [0, 19, 15] | [0, 19, 14] |
---|---|---|
BUFR1:MUX.I | [0, 19, 12] | [0, 19, 13] |
BUFIO0 | 0 | 0 |
CKINT0 | 0 | 1 |
CKINT1 | 1 | 0 |
BUFIO1 | 1 | 1 |
RCLK:MUX.RCLK0 | [0, 25, 12] | [0, 25, 14] | [0, 25, 13] | [0, 25, 15] |
---|---|---|---|---|
RCLK:MUX.RCLK1 | [0, 23, 12] | [0, 23, 14] | [0, 23, 13] | [0, 23, 15] |
NONE | 0 | 0 | 0 | 0 |
VRCLK_N0 | 0 | 0 | 0 | 1 |
VRCLK0 | 0 | 0 | 1 | 1 |
VRCLK_S0 | 0 | 1 | 0 | 1 |
VRCLK_N1 | 1 | 0 | 0 | 1 |
VRCLK1 | 1 | 0 | 1 | 1 |
VRCLK_S1 | 1 | 1 | 0 | 1 |
IDELAYCTRL:MUX.REFCLK | [0, 24, 14] | [0, 24, 13] | [0, 24, 12] |
---|---|---|---|
HCLK0 | 0 | 0 | 0 |
HCLK1 | 0 | 0 | 1 |
HCLK2 | 0 | 1 | 0 |
HCLK3 | 0 | 1 | 1 |
HCLK4 | 1 | 0 | 0 |
HCLK5 | 1 | 0 | 1 |
HCLK6 | 1 | 1 | 0 |
HCLK7 | 1 | 1 | 1 |
HCLK_CENTER
DCI:CASCADE_FROM_ABOVE | [0, 0, 13] |
---|---|
DCI:CASCADE_FROM_BELOW | [0, 0, 12] |
DCI:ENABLE | [0, 0, 14] |
DCI:QUIET | [0, 5, 12] |
IDELAYCTRL:ENABLE | [0, 11, 12] |
IOCLK:BUF.HCLK0 | [0, 7, 12] |
IOCLK:BUF.HCLK1 | [0, 7, 13] |
IOCLK:BUF.HCLK2 | [0, 7, 14] |
IOCLK:BUF.HCLK3 | [0, 7, 15] |
IOCLK:BUF.HCLK4 | [0, 8, 12] |
IOCLK:BUF.HCLK5 | [0, 8, 13] |
IOCLK:BUF.HCLK6 | [0, 8, 14] |
IOCLK:BUF.HCLK7 | [0, 8, 15] |
IOCLK:BUF.IOCLK_N0 | [0, 17, 15] |
IOCLK:BUF.IOCLK_N1 | [0, 17, 12] |
IOCLK:BUF.IOCLK_S0 | [0, 17, 14] |
IOCLK:BUF.IOCLK_S1 | [0, 17, 13] |
IOCLK:BUF.RCLK0 | [0, 21, 15] |
IOCLK:BUF.RCLK1 | [0, 24, 15] |
IOCLK:BUF.VIOCLK0 | [0, 16, 14] |
IOCLK:BUF.VIOCLK1 | [0, 16, 15] |
Non-inverted | [0] |
DCI:LVDIV2 | [0, 27, 14] | [0, 27, 13] |
---|---|---|
DCI:NREF | [0, 27, 12] | [0, 27, 15] |
DCI:TEST_ENABLE | [0, 5, 13] | [0, 0, 15] |
Non-inverted | [1] | [0] |
DCI:PREF | [0, 1, 12] | [0, 1, 13] | [0, 1, 14] | [0, 1, 15] |
---|---|---|---|---|
IOCLK:VIOCLK_ENABLE | [0, 20, 13] | [0, 15, 15] | [0, 15, 14] | [0, 15, 13] |
Non-inverted | [3] | [2] | [1] | [0] |
DCI:NMASK_TERM_SPLIT | [0, 10, 12] | [0, 12, 15] | [0, 12, 14] | [0, 12, 13] | [0, 12, 12] |
---|---|---|---|---|---|
DCI:PMASK_TERM_SPLIT | [0, 11, 15] | [0, 10, 15] | [0, 11, 14] | [0, 10, 14] | [0, 10, 13] |
DCI:PMASK_TERM_VCC | [0, 2, 12] | [0, 4, 15] | [0, 4, 14] | [0, 4, 13] | [0, 4, 12] |
Non-inverted | [4] | [3] | [2] | [1] | [0] |
IDELAYCTRL:MUX.REFCLK | [0, 24, 14] | [0, 24, 13] | [0, 24, 12] |
---|---|---|---|
HCLK0 | 0 | 0 | 0 |
HCLK1 | 0 | 0 | 1 |
HCLK2 | 0 | 1 | 0 |
HCLK3 | 0 | 1 | 1 |
HCLK4 | 1 | 0 | 0 |
HCLK5 | 1 | 0 | 1 |
HCLK6 | 1 | 1 | 0 |
HCLK7 | 1 | 1 | 1 |
HCLK_CENTER_ABOVE_CFG
DCI:CASCADE_FROM_ABOVE | [0, 0, 13] |
---|---|
DCI:ENABLE | [0, 0, 14] |
DCI:QUIET | [0, 5, 12] |
IDELAYCTRL:ENABLE | [0, 11, 12] |
IOCLK:BUF.HCLK0 | [0, 7, 12] |
IOCLK:BUF.HCLK1 | [0, 7, 13] |
IOCLK:BUF.HCLK2 | [0, 7, 14] |
IOCLK:BUF.HCLK3 | [0, 7, 15] |
IOCLK:BUF.HCLK4 | [0, 8, 12] |
IOCLK:BUF.HCLK5 | [0, 8, 13] |
IOCLK:BUF.HCLK6 | [0, 8, 14] |
IOCLK:BUF.HCLK7 | [0, 8, 15] |
IOCLK:BUF.IOCLK_N0 | [0, 17, 15] |
IOCLK:BUF.IOCLK_N1 | [0, 17, 12] |
IOCLK:BUF.IOCLK_S0 | [0, 17, 14] |
IOCLK:BUF.IOCLK_S1 | [0, 17, 13] |
IOCLK:BUF.RCLK0 | [0, 21, 15] |
IOCLK:BUF.RCLK1 | [0, 24, 15] |
IOCLK:BUF.VIOCLK0 | [0, 16, 14] |
IOCLK:BUF.VIOCLK1 | [0, 16, 15] |
Non-inverted | [0] |
DCI:LVDIV2 | [0, 27, 14] | [0, 27, 13] |
---|---|---|
DCI:NREF | [0, 27, 12] | [0, 27, 15] |
DCI:TEST_ENABLE | [0, 5, 13] | [0, 0, 15] |
Non-inverted | [1] | [0] |
DCI:PREF | [0, 1, 12] | [0, 1, 13] | [0, 1, 14] | [0, 1, 15] |
---|---|---|---|---|
IOCLK:VIOCLK_ENABLE | [0, 20, 13] | [0, 15, 15] | [0, 15, 14] | [0, 15, 13] |
Non-inverted | [3] | [2] | [1] | [0] |
DCI:NMASK_TERM_SPLIT | [0, 10, 12] | [0, 12, 15] | [0, 12, 14] | [0, 12, 13] | [0, 12, 12] |
---|---|---|---|---|---|
DCI:PMASK_TERM_SPLIT | [0, 11, 15] | [0, 10, 15] | [0, 11, 14] | [0, 10, 14] | [0, 10, 13] |
DCI:PMASK_TERM_VCC | [0, 2, 12] | [0, 4, 15] | [0, 4, 14] | [0, 4, 13] | [0, 4, 12] |
Non-inverted | [4] | [3] | [2] | [1] | [0] |
IDELAYCTRL:MUX.REFCLK | [0, 24, 14] | [0, 24, 13] | [0, 24, 12] |
---|---|---|---|
HCLK0 | 0 | 0 | 0 |
HCLK1 | 0 | 0 | 1 |
HCLK2 | 0 | 1 | 0 |
HCLK3 | 0 | 1 | 1 |
HCLK4 | 1 | 0 | 0 |
HCLK5 | 1 | 0 | 1 |
HCLK6 | 1 | 1 | 0 |
HCLK7 | 1 | 1 | 1 |
HCLK_IOBDCM
DCI:ENABLE | [0, 0, 14] |
---|---|
DCI:QUIET | [0, 5, 12] |
HCLK_DCM_N:BUF.GIOB_U0 | [0, 3, 13] |
HCLK_DCM_N:BUF.GIOB_U1 | [0, 21, 14] |
HCLK_DCM_N:BUF.GIOB_U10 | [0, 26, 13] |
HCLK_DCM_N:BUF.GIOB_U11 | [0, 25, 14] |
HCLK_DCM_N:BUF.GIOB_U12 | [0, 25, 15] |
HCLK_DCM_N:BUF.GIOB_U13 | [0, 19, 12] |
HCLK_DCM_N:BUF.GIOB_U14 | [0, 3, 14] |
HCLK_DCM_N:BUF.GIOB_U15 | [0, 3, 15] |
HCLK_DCM_N:BUF.GIOB_U2 | [0, 22, 13] |
HCLK_DCM_N:BUF.GIOB_U3 | [0, 19, 13] |
HCLK_DCM_N:BUF.GIOB_U4 | [0, 28, 13] |
HCLK_DCM_N:BUF.GIOB_U5 | [0, 28, 12] |
HCLK_DCM_N:BUF.GIOB_U6 | [0, 25, 12] |
HCLK_DCM_N:BUF.GIOB_U7 | [0, 23, 14] |
HCLK_DCM_N:BUF.GIOB_U8 | [0, 23, 12] |
HCLK_DCM_N:BUF.GIOB_U9 | [0, 22, 12] |
HCLK_DCM_N:BUF.HCLK_U0 | [0, 21, 12] |
HCLK_DCM_N:BUF.HCLK_U1 | [0, 25, 13] |
HCLK_DCM_N:BUF.HCLK_U2 | [0, 22, 15] |
HCLK_DCM_N:BUF.HCLK_U3 | [0, 14, 15] |
HCLK_DCM_N:BUF.HCLK_U4 | [0, 19, 14] |
HCLK_DCM_N:BUF.HCLK_U5 | [0, 23, 13] |
HCLK_DCM_N:BUF.HCLK_U6 | [0, 22, 14] |
HCLK_DCM_N:BUF.HCLK_U7 | [0, 26, 12] |
HCLK_DCM_N:BUF.MGT_U0 | [0, 14, 13] |
HCLK_DCM_N:BUF.MGT_U1 | [0, 26, 14] |
HCLK_DCM_N:BUF.MGT_U2 | [0, 26, 15] |
HCLK_DCM_N:BUF.MGT_U3 | [0, 23, 15] |
HCLK_DCM_N:COMMON_MGT | [0, 16, 12] |
IDELAYCTRL:ENABLE | [0, 11, 12] |
IOCLK:BUF.HCLK0 | [0, 7, 12] |
IOCLK:BUF.HCLK1 | [0, 7, 13] |
IOCLK:BUF.HCLK2 | [0, 7, 14] |
IOCLK:BUF.HCLK3 | [0, 7, 15] |
IOCLK:BUF.HCLK4 | [0, 8, 12] |
IOCLK:BUF.HCLK5 | [0, 8, 13] |
IOCLK:BUF.HCLK6 | [0, 8, 14] |
IOCLK:BUF.HCLK7 | [0, 8, 15] |
IOCLK:BUF.IOCLK_N0 | [0, 17, 15] |
IOCLK:BUF.IOCLK_N1 | [0, 17, 12] |
IOCLK:BUF.IOCLK_S0 | [0, 17, 14] |
IOCLK:BUF.IOCLK_S1 | [0, 17, 13] |
IOCLK:BUF.RCLK0 | [0, 21, 15] |
IOCLK:BUF.RCLK1 | [0, 24, 15] |
IOCLK:BUF.VIOCLK0 | [0, 16, 14] |
IOCLK:BUF.VIOCLK1 | [0, 16, 15] |
Non-inverted | [0] |
DCI:LVDIV2 | [0, 27, 14] | [0, 27, 13] |
---|---|---|
DCI:NREF | [0, 27, 12] | [0, 27, 15] |
DCI:TEST_ENABLE | [0, 5, 13] | [0, 0, 15] |
Non-inverted | [1] | [0] |
DCI:PREF | [0, 1, 12] | [0, 1, 13] | [0, 1, 14] | [0, 1, 15] |
---|---|---|---|---|
IOCLK:VIOCLK_ENABLE | [0, 20, 13] | [0, 15, 15] | [0, 15, 14] | [0, 15, 13] |
Non-inverted | [3] | [2] | [1] | [0] |
DCI:NMASK_TERM_SPLIT | [0, 10, 12] | [0, 12, 15] | [0, 12, 14] | [0, 12, 13] | [0, 12, 12] |
---|---|---|---|---|---|
DCI:PMASK_TERM_SPLIT | [0, 11, 15] | [0, 10, 15] | [0, 11, 14] | [0, 10, 14] | [0, 10, 13] |
DCI:PMASK_TERM_VCC | [0, 2, 12] | [0, 4, 15] | [0, 4, 14] | [0, 4, 13] | [0, 4, 12] |
Non-inverted | [4] | [3] | [2] | [1] | [0] |
HCLK_DCM_N:COMMON | [0, 21, 13] | [0, 19, 15] | [0, 14, 14] |
---|---|---|---|
Non-inverted | [2] | [1] | [0] |
IDELAYCTRL:MUX.REFCLK | [0, 24, 14] | [0, 24, 13] | [0, 24, 12] |
---|---|---|---|
HCLK0 | 0 | 0 | 0 |
HCLK1 | 0 | 0 | 1 |
HCLK2 | 0 | 1 | 0 |
HCLK3 | 0 | 1 | 1 |
HCLK4 | 1 | 0 | 0 |
HCLK5 | 1 | 0 | 1 |
HCLK6 | 1 | 1 | 0 |
HCLK7 | 1 | 1 | 1 |
HCLK_DCMIOB
DCI:ENABLE | [0, 0, 14] |
---|---|
DCI:QUIET | [0, 5, 12] |
HCLK_DCM_S:BUF.GIOB_D0 | [0, 3, 13] |
HCLK_DCM_S:BUF.GIOB_D1 | [0, 21, 14] |
HCLK_DCM_S:BUF.GIOB_D10 | [0, 26, 13] |
HCLK_DCM_S:BUF.GIOB_D11 | [0, 25, 14] |
HCLK_DCM_S:BUF.GIOB_D12 | [0, 25, 15] |
HCLK_DCM_S:BUF.GIOB_D13 | [0, 19, 12] |
HCLK_DCM_S:BUF.GIOB_D14 | [0, 3, 14] |
HCLK_DCM_S:BUF.GIOB_D15 | [0, 3, 15] |
HCLK_DCM_S:BUF.GIOB_D2 | [0, 22, 13] |
HCLK_DCM_S:BUF.GIOB_D3 | [0, 19, 13] |
HCLK_DCM_S:BUF.GIOB_D4 | [0, 28, 13] |
HCLK_DCM_S:BUF.GIOB_D5 | [0, 28, 12] |
HCLK_DCM_S:BUF.GIOB_D6 | [0, 25, 12] |
HCLK_DCM_S:BUF.GIOB_D7 | [0, 23, 14] |
HCLK_DCM_S:BUF.GIOB_D8 | [0, 23, 12] |
HCLK_DCM_S:BUF.GIOB_D9 | [0, 22, 12] |
HCLK_DCM_S:BUF.HCLK_D0 | [0, 21, 12] |
HCLK_DCM_S:BUF.HCLK_D1 | [0, 25, 13] |
HCLK_DCM_S:BUF.HCLK_D2 | [0, 22, 15] |
HCLK_DCM_S:BUF.HCLK_D3 | [0, 14, 15] |
HCLK_DCM_S:BUF.HCLK_D4 | [0, 19, 14] |
HCLK_DCM_S:BUF.HCLK_D5 | [0, 23, 13] |
HCLK_DCM_S:BUF.HCLK_D6 | [0, 22, 14] |
HCLK_DCM_S:BUF.HCLK_D7 | [0, 26, 12] |
HCLK_DCM_S:BUF.MGT_D0 | [0, 14, 13] |
HCLK_DCM_S:BUF.MGT_D1 | [0, 26, 14] |
HCLK_DCM_S:BUF.MGT_D2 | [0, 26, 15] |
HCLK_DCM_S:BUF.MGT_D3 | [0, 23, 15] |
HCLK_DCM_S:COMMON_MGT | [0, 16, 12] |
IDELAYCTRL:ENABLE | [0, 11, 12] |
IOCLK:BUF.HCLK0 | [0, 7, 12] |
IOCLK:BUF.HCLK1 | [0, 7, 13] |
IOCLK:BUF.HCLK2 | [0, 7, 14] |
IOCLK:BUF.HCLK3 | [0, 7, 15] |
IOCLK:BUF.HCLK4 | [0, 8, 12] |
IOCLK:BUF.HCLK5 | [0, 8, 13] |
IOCLK:BUF.HCLK6 | [0, 8, 14] |
IOCLK:BUF.HCLK7 | [0, 8, 15] |
IOCLK:BUF.IOCLK_N0 | [0, 17, 15] |
IOCLK:BUF.IOCLK_N1 | [0, 17, 12] |
IOCLK:BUF.IOCLK_S0 | [0, 17, 14] |
IOCLK:BUF.IOCLK_S1 | [0, 17, 13] |
IOCLK:BUF.RCLK0 | [0, 21, 15] |
IOCLK:BUF.RCLK1 | [0, 24, 15] |
IOCLK:BUF.VIOCLK0 | [0, 16, 14] |
IOCLK:BUF.VIOCLK1 | [0, 16, 15] |
Non-inverted | [0] |
DCI:LVDIV2 | [0, 27, 14] | [0, 27, 13] |
---|---|---|
DCI:NREF | [0, 27, 12] | [0, 27, 15] |
DCI:TEST_ENABLE | [0, 5, 13] | [0, 0, 15] |
Non-inverted | [1] | [0] |
DCI:PREF | [0, 1, 12] | [0, 1, 13] | [0, 1, 14] | [0, 1, 15] |
---|---|---|---|---|
IOCLK:VIOCLK_ENABLE | [0, 20, 13] | [0, 15, 15] | [0, 15, 14] | [0, 15, 13] |
Non-inverted | [3] | [2] | [1] | [0] |
DCI:NMASK_TERM_SPLIT | [0, 10, 12] | [0, 12, 15] | [0, 12, 14] | [0, 12, 13] | [0, 12, 12] |
---|---|---|---|---|---|
DCI:PMASK_TERM_SPLIT | [0, 11, 15] | [0, 10, 15] | [0, 11, 14] | [0, 10, 14] | [0, 10, 13] |
DCI:PMASK_TERM_VCC | [0, 2, 12] | [0, 4, 15] | [0, 4, 14] | [0, 4, 13] | [0, 4, 12] |
Non-inverted | [4] | [3] | [2] | [1] | [0] |
HCLK_DCM_S:COMMON | [0, 21, 13] | [0, 19, 15] | [0, 14, 14] |
---|---|---|---|
Non-inverted | [2] | [1] | [0] |
IDELAYCTRL:MUX.REFCLK | [0, 24, 14] | [0, 24, 13] | [0, 24, 12] |
---|---|---|---|
HCLK0 | 0 | 0 | 0 |
HCLK1 | 0 | 0 | 1 |
HCLK2 | 0 | 1 | 0 |
HCLK3 | 0 | 1 | 1 |
HCLK4 | 1 | 0 | 0 |
HCLK5 | 1 | 0 | 1 |
HCLK6 | 1 | 1 | 0 |
HCLK7 | 1 | 1 | 1 |
HCLK_DCM
HCLK_DCM:BUF.GIOB_D0 | [0, 20, 14] |
---|---|
HCLK_DCM:BUF.GIOB_D1 | [0, 24, 12] |
HCLK_DCM:BUF.GIOB_D10 | [0, 3, 13] |
HCLK_DCM:BUF.GIOB_D11 | [0, 3, 15] |
HCLK_DCM:BUF.GIOB_D12 | [0, 10, 13] |
HCLK_DCM:BUF.GIOB_D13 | [0, 10, 12] |
HCLK_DCM:BUF.GIOB_D14 | [0, 11, 13] |
HCLK_DCM:BUF.GIOB_D15 | [0, 11, 12] |
HCLK_DCM:BUF.GIOB_D2 | [0, 23, 15] |
HCLK_DCM:BUF.GIOB_D3 | [0, 22, 13] |
HCLK_DCM:BUF.GIOB_D4 | [0, 20, 15] |
HCLK_DCM:BUF.GIOB_D5 | [0, 24, 13] |
HCLK_DCM:BUF.GIOB_D6 | [0, 22, 12] |
HCLK_DCM:BUF.GIOB_D7 | [0, 22, 14] |
HCLK_DCM:BUF.GIOB_D8 | [0, 12, 14] |
HCLK_DCM:BUF.GIOB_D9 | [0, 12, 12] |
HCLK_DCM:BUF.GIOB_U0 | [0, 17, 15] |
HCLK_DCM:BUF.GIOB_U1 | [0, 25, 14] |
HCLK_DCM:BUF.GIOB_U10 | [0, 16, 12] |
HCLK_DCM:BUF.GIOB_U11 | [0, 16, 14] |
HCLK_DCM:BUF.GIOB_U12 | [0, 10, 14] |
HCLK_DCM:BUF.GIOB_U13 | [0, 5, 13] |
HCLK_DCM:BUF.GIOB_U14 | [0, 11, 14] |
HCLK_DCM:BUF.GIOB_U15 | [0, 16, 13] |
HCLK_DCM:BUF.GIOB_U2 | [0, 14, 13] |
HCLK_DCM:BUF.GIOB_U3 | [0, 26, 12] |
HCLK_DCM:BUF.GIOB_U4 | [0, 17, 12] |
HCLK_DCM:BUF.GIOB_U5 | [0, 25, 15] |
HCLK_DCM:BUF.GIOB_U6 | [0, 14, 12] |
HCLK_DCM:BUF.GIOB_U7 | [0, 26, 15] |
HCLK_DCM:BUF.GIOB_U8 | [0, 5, 12] |
HCLK_DCM:BUF.GIOB_U9 | [0, 5, 14] |
HCLK_DCM:BUF.HCLK_D0 | [0, 20, 12] |
HCLK_DCM:BUF.HCLK_D1 | [0, 24, 15] |
HCLK_DCM:BUF.HCLK_D2 | [0, 23, 13] |
HCLK_DCM:BUF.HCLK_D3 | [0, 21, 15] |
HCLK_DCM:BUF.HCLK_D4 | [0, 20, 13] |
HCLK_DCM:BUF.HCLK_D5 | [0, 24, 14] |
HCLK_DCM:BUF.HCLK_D6 | [0, 23, 14] |
HCLK_DCM:BUF.HCLK_D7 | [0, 22, 15] |
HCLK_DCM:BUF.HCLK_U0 | [0, 17, 14] |
HCLK_DCM:BUF.HCLK_U1 | [0, 25, 12] |
HCLK_DCM:BUF.HCLK_U2 | [0, 14, 15] |
HCLK_DCM:BUF.HCLK_U3 | [0, 26, 14] |
HCLK_DCM:BUF.HCLK_U4 | [0, 17, 13] |
HCLK_DCM:BUF.HCLK_U5 | [0, 25, 13] |
HCLK_DCM:BUF.HCLK_U6 | [0, 14, 14] |
HCLK_DCM:BUF.HCLK_U7 | [0, 26, 13] |
HCLK_DCM:BUF.MGT_D0 | [0, 12, 15] |
HCLK_DCM:BUF.MGT_D1 | [0, 12, 13] |
HCLK_DCM:BUF.MGT_D2 | [0, 3, 12] |
HCLK_DCM:BUF.MGT_D3 | [0, 3, 14] |
HCLK_DCM:BUF.MGT_U0 | [0, 10, 15] |
HCLK_DCM:BUF.MGT_U1 | [0, 5, 15] |
HCLK_DCM:BUF.MGT_U2 | [0, 11, 15] |
HCLK_DCM:BUF.MGT_U3 | [0, 16, 15] |
HCLK_DCM:COMMON | [0, 27, 15] |
HCLK_DCM:COMMON_MGT | [0, 27, 14] |
Non-inverted | [0] |
HCLK_DCM:COMMON_HCLK_GIOB | [0, 27, 13] | [0, 21, 12] | [0, 19, 12] |
---|---|---|---|
Non-inverted | [2] | [1] | [0] |
HCLK_MGT
HCLK_MGT bittile 0 | ||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Row | Column | |||||||||||||||||||
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | HCLK_MGT:BUF.HCLK0 | - | HCLK_MGT:BUF.HCLK4 |
13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | HCLK_MGT:BUF.HCLK1 | - | HCLK_MGT:BUF.HCLK5 |
14 | - | - | - | - | - | - | - | - | HCLK_MGT:BUF.MGT0 | - | - | - | - | - | - | - | - | HCLK_MGT:BUF.HCLK2 | - | HCLK_MGT:BUF.HCLK6 |
15 | - | - | - | - | - | - | - | - | HCLK_MGT:BUF.MGT1 | - | - | - | - | - | - | - | - | HCLK_MGT:BUF.HCLK3 | - | HCLK_MGT:BUF.HCLK7 |
HCLK_MGT:BUF.HCLK0 | [0, 17, 12] |
---|---|
HCLK_MGT:BUF.HCLK1 | [0, 17, 13] |
HCLK_MGT:BUF.HCLK2 | [0, 17, 14] |
HCLK_MGT:BUF.HCLK3 | [0, 17, 15] |
HCLK_MGT:BUF.HCLK4 | [0, 19, 12] |
HCLK_MGT:BUF.HCLK5 | [0, 19, 13] |
HCLK_MGT:BUF.HCLK6 | [0, 19, 14] |
HCLK_MGT:BUF.HCLK7 | [0, 19, 15] |
HCLK_MGT:BUF.MGT0 | [0, 8, 14] |
HCLK_MGT:BUF.MGT1 | [0, 8, 15] |
Non-inverted | [0] |
I/O standard data
Name | IOSTD:LVDSBIAS | |||||||||
---|---|---|---|---|---|---|---|---|---|---|
[9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] | |
LDT_25 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 |
LVDSEXT_25 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 |
LVDSEXT_25_DCI | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 |
LVDS_25 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 |
LVDS_25_DCI | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 |
OFF | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
RSDS_25 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 |
ULVDS_25 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 |
Name | IOSTD:DCI:LVDIV2 | |
---|---|---|
[1] | [0] | |
LVDCI_DV2_15 | 0 | 0 |
LVDCI_DV2_18 | 1 | 0 |
LVDCI_DV2_25 | 0 | 1 |
OFF | 0 | 0 |
Name | IOSTD:DCI:PMASK_TERM_VCC | ||||
---|---|---|---|---|---|
[4] | [3] | [2] | [1] | [0] | |
GTLP_DCI | 0 | 0 | 0 | 0 | 0 |
GTL_DCI | 0 | 0 | 0 | 0 | 0 |
HSTL_III_DCI | 0 | 0 | 0 | 0 | 0 |
HSTL_III_DCI_18 | 0 | 0 | 0 | 0 | 0 |
HSTL_IV_DCI | 0 | 0 | 1 | 0 | 0 |
HSTL_IV_DCI_18 | 0 | 0 | 1 | 0 | 0 |
OFF | 0 | 0 | 0 | 0 | 0 |
Name | IOSTD:DCI:PMASK_TERM_SPLIT | IOSTD:DCI:NMASK_TERM_SPLIT | ||||||||
---|---|---|---|---|---|---|---|---|---|---|
[4] | [3] | [2] | [1] | [0] | [4] | [3] | [2] | [1] | [0] | |
HSTL_II_DCI | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |
HSTL_II_DCI_18 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 0 |
HSTL_II_T_DCI | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
HSTL_II_T_DCI_18 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | 0 |
HSTL_I_DCI | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
HSTL_I_DCI_18 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
LVDSEXT_25_DCI | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
LVDS_25_DCI | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
OFF | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
SSTL18_II_DCI | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | 0 |
SSTL18_II_T_DCI | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
SSTL18_I_DCI | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
SSTL2_II_DCI | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 |
SSTL2_II_T_DCI | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
SSTL2_I_DCI | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |