Input/Output

IO.L

IO.L bittile 0
RowColumn
012345678910111213141516171819202122232425
0 INT:MUX.LONG.H0[0]-INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[0]-INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]-INT:MUX.LONG.H1[1]--INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[2]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1 INT:MUX.LONG.H0[1]INT:MUX.LONG.H0[2]INT:MUX.IMUX.TBUF0.I[4]-INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[0]-INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[0]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3 ~TBUF0:DRIVE1INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[0]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[3]-INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IMUX.IOB1.TS[5]~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1INT:MUX.IMUX.IOB1.TS[3]~TBUF1:DRIVE1-INT:MUX.IMUX.IOB1.IK[7]-~IOB1:IFF_SRVAL-INT:MUX.IMUX.IOB1.IK[5]-IOB1:DRIVE~IOB1:READBACK_I1~IOB1:READBACK_I2~IOB1:INV.IFF_CLKIOB1:I2MUX[0]IOB1:IFF_D[0]
4 ~INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S~INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S~INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S~INT:PASS.SINGLE.H1.0.LONG.IO.V0~INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.H5.0.LONG.IO.V2INT:MUX.IMUX.IOB0.TS[0]~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2~INT:BIPASS.IO.DOUBLE.2.W.0.IO.DOUBLE.2.W.2~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.1~INT:PASS.IO.DOUBLE.2.W.0.0.IO.DBUF.V1------IOB1:TMUXIOB1:5V_TOLERANT_IO~IOB1:IFF_CE_ENABLE_NO_IQIOB1:I1MUX[0]IOB1:IFF_D[1]IOB1:I2MUX[1]IOB1:I1MUX[1]
5 ~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.2INT:MUX.LONG.IO.V0[0]~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2~INT:BIPASS.IO.DOUBLE.0.W.0.IO.DOUBLE.0.W.2INT:MUX.LONG.IO.V0[1]~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.1-~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.0~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.0~INT:PASS.IO.DOUBLE.0.W.0.0.IO.DBUF.V1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.0~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.0----INT:MUX.IMUX.IOB0.OK[6]-IOB0:5V_TOLERANT_IO-IOB0:TMUXIOB0:I1MUX[0]IOB0:I1MUX[1]IOB0:IFF_D[1]IOB0:I2MUX[1]
6 INT:MUX.LONG.H4[0]INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB0.I2~INT:PASS.IO.DOUBLE.3.W.0.0.IO.DBUF.V1INT:MUX.LONG.H5[0]-~INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0~IOB1:OFF_CE_ENABLE~INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0INT:MUX.IMUX.IOB0.OK[7]~INT:PASS.IO.DOUBLE.1.W.0.0.IO.DBUF.V1INT:MUX.IMUX.IOB0.OK[1]INT:MUX.IMUX.IOB0.OK[4]-INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]IOB0:PULL[1]INT:MUX.IMUX.IOB0.OK[5]IOB0:DRIVE~IOB0:IFF_CE_ENABLE_NO_IQIOB0:SYNC_D~IOB0:IFF_SRVAL~IOB0:INV.IFF_CLKIOB0:I2MUX[0]IOB0:IFF_D[0]
7 --~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[2]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[6]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8 ~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[0]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9 ~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE-~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0-INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
IO.L bittile 1
RowColumn
0
0 -
1 -
2 -
3 -
4 -
5 -
6 -
7 ~PULLUP.TBUF0:ENABLE
INT:MUX.LONG.H0[0, 1, 1][0, 0, 1][0, 0, 0]
0.LONG.IO.V0000
0.OUT.LR.IOB1.I2011
NONE111
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.0[0, 8, 5]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1[0, 5, 5]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2[0, 2, 5]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0[0, 14, 9]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1[0, 12, 9]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2[0, 10, 9]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0[0, 5, 9]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1[0, 3, 9]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2[0, 1, 9]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.0[0, 11, 5]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1[0, 10, 3]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2[0, 9, 4]
INT:BIPASS.IO.DOUBLE.0.W.0.IO.DOUBLE.0.W.2[0, 3, 5]
INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2[0, 11, 9]
INT:BIPASS.IO.DOUBLE.2.W.0.IO.DOUBLE.2.W.2[0, 10, 4]
INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2[0, 2, 9]
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.0[0, 9, 5]
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.2[0, 0, 5]
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.1[0, 6, 5]
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0[0, 15, 9]
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2[0, 9, 9]
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1[0, 13, 9]
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.0[0, 12, 5]
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.2[0, 8, 4]
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.1[0, 11, 4]
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0[0, 6, 9]
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2[0, 0, 9]
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1[0, 4, 9]
INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.S[0, 2, 7]
INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1[0, 5, 7]
INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB0.I2[0, 2, 6]
INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S[0, 2, 4]
INT:PASS.IO.DOUBLE.0.W.0.0.IO.DBUF.V1[0, 10, 5]
INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0[0, 6, 6]
INT:PASS.IO.DOUBLE.1.W.0.0.IO.DBUF.V1[0, 10, 6]
INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0[0, 9, 7]
INT:PASS.IO.DOUBLE.2.W.0.0.IO.DBUF.V1[0, 12, 4]
INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0[0, 8, 6]
INT:PASS.IO.DOUBLE.3.W.0.0.IO.DBUF.V1[0, 3, 6]
INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0[0, 8, 7]
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S[0, 1, 4]
INT:PASS.SINGLE.H1.0.LONG.IO.V0[0, 3, 4]
INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2[0, 4, 4]
INT:PASS.SINGLE.H2.0.LONG.IO.V1[0, 12, 7]
INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1[0, 4, 7]
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S[0, 10, 8]
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S[0, 0, 4]
INT:PASS.SINGLE.H5.0.LONG.IO.V2[0, 6, 4]
INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2[0, 5, 4]
INT:PASS.SINGLE.H6.0.LONG.IO.V3[0, 8, 8]
INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1[0, 1, 8]
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S[0, 0, 8]
IOB0:IFF_CE_ENABLE[0, 7, 8]
IOB0:IFF_CE_ENABLE_NO_IQ[0, 20, 6]
IOB0:IFF_SRVAL[0, 22, 6]
IOB0:INV.IFF_CLK[0, 23, 6]
IOB0:INV.OFF_CLK[0, 24, 9]
IOB0:INV.OFF_D[0, 22, 7]
IOB0:INV.T[0, 25, 9]
IOB0:OFF_CE_ENABLE[0, 7, 9]
IOB0:OFF_SRVAL[0, 24, 7]
IOB0:READBACK_I1[0, 25, 8]
IOB0:READBACK_I2[0, 23, 8]
IOB0:READBACK_OFF[0, 22, 8]
IOB1:IFF_CE_ENABLE[0, 7, 7]
IOB1:IFF_CE_ENABLE_NO_IQ[0, 21, 4]
IOB1:IFF_SRVAL[0, 16, 3]
IOB1:INV.IFF_CLK[0, 23, 3]
IOB1:INV.OFF_CLK[0, 23, 0]
IOB1:INV.OFF_D[0, 24, 2]
IOB1:INV.T[0, 24, 0]
IOB1:OFF_CE_ENABLE[0, 7, 6]
IOB1:OFF_SRVAL[0, 24, 1]
IOB1:READBACK_I1[0, 21, 3]
IOB1:READBACK_I2[0, 22, 3]
IOB1:READBACK_OFF[0, 23, 2]
PULLUP.TBUF0:ENABLE[1, 0, 7]
PULLUP.TBUF1:ENABLE[0, 11, 7]
TBUF0:DRIVE1[0, 0, 3]
TBUF1:DRIVE1[0, 12, 3]
Inverted~[0]
INT:MUX.LONG.H4[0, 1, 6][0, 3, 7][0, 0, 6]
0.LONG.IO.V2000
0.OUT.LR.IOB0.I2011
NONE111
INT:MUX.LONG.IO.V0[0, 4, 5][0, 1, 5]
0.LONG.H000
0.SINGLE.H101
NONE11
INT:MUX.IMUX.TBUF0.I[0, 2, 1][0, 2, 0][0, 4, 0][0, 4, 1][0, 3, 0]
0.IO.DOUBLE.2.W.100011
0.OUT.LR.IOB0.I200101
0.LONG.IO.V200110
0.IO.DOUBLE.2.W.001111
0.IO.DOUBLE.3.W.110011
0.IO.DOUBLE.3.W.010101
0.OUT.LR.IOB1.I210110
GND11111
INT:MUX.IO.DBUF.V0[0, 1, 2][0, 3, 2][0, 4, 3][0, 3, 3]
0.IO.DOUBLE.1.W.00011
0.IO.DOUBLE.2.W.00101
0.IO.DOUBLE.3.W.00110
0.IO.DOUBLE.0.W.01111
INT:MUX.LONG.IO.V2[0, 5, 8][0, 2, 8][0, 4, 8][0, 3, 8]
0.LONG.H2.BUF0001
0.LONG.H40010
0.SINGLE.H50111
NONE1111
INT:MUX.LONG.H5[0, 10, 7][0, 6, 7][0, 4, 6]
0.LONG.IO.V3000
0.OUT.LR.IOB0.I2011
NONE111
INT:MUX.IMUX.TBUF0.TS[0, 5, 0][0, 5, 1][0, 8, 0][0, 6, 1][0, 6, 0]
0.IO.DOUBLE.1.W.000011
0.LONG.IO.V300101
VCC00110
0.IO.DOUBLE.0.W.001111
0.IO.DOUBLE.1.W.110011
0.LONG.IO.V210101
GND10110
0.IO.DOUBLE.0.W.111111
INT:MUX.IMUX.IOB1.TS[0, 2, 2][0, 8, 3][0, 9, 3][0, 0, 2][0, 11, 3][0, 9, 2][0, 10, 2][0, 7, 2]
0.LONG.IO.V000101011
0.IO.DOUBLE.0.W.000111111
0.IO.DOUBLE.1.W.001000111
0.LONG.IO.V201001011
0.IO.DOUBLE.1.W.101011111
GND01101110
0.LONG.IO.V111100111
0.LONG.IO.V311101011
0.GCLK011101101
0.IO.DOUBLE.0.W.111111111
INT:MUX.IMUX.IOB0.TS[0, 4, 2][0, 6, 2][0, 1, 3][0, 2, 3][0, 6, 3][0, 5, 2][0, 5, 3][0, 7, 4]
0.LONG.IO.V300001111
0.LONG.IO.V100011011
0.GCLK000011101
0.IO.DOUBLE.0.W.100111111
0.LONG.IO.V001000111
GND01011110
0.IO.DOUBLE.1.W.101110111
0.IO.DOUBLE.1.W.011001111
0.LONG.IO.V211011011
0.IO.DOUBLE.0.W.011111111
INT:MUX.IMUX.TBUF1.TS[0, 7, 1][0, 10, 0][0, 10, 1][0, 9, 0][0, 8, 1]
0.IO.DOUBLE.0.W.100011
0.IO.DOUBLE.0.W.000111
0.LONG.IO.V201001
VCC01010
0.LONG.IO.V301101
GND01110
0.IO.DOUBLE.1.W.111011
0.IO.DOUBLE.1.W.011111
INT:MUX.LONG.IO.V3[0, 6, 8][0, 9, 8]
0.LONG.H500
0.SINGLE.H601
NONE11
INT:MUX.IMUX.TBUF1.I[0, 13, 0][0, 11, 1][0, 13, 1][0, 11, 0][0, 12, 0][0, 12, 1]
0.IO.DOUBLE.2.W.0000111
0.OUT.LR.IOB0.I2001011
0.LONG.IO.V1001101
0.IO.DOUBLE.2.W.1011111
0.IO.DOUBLE.3.W.1100111
0.IO.DOUBLE.3.W.0101011
0.OUT.LR.IOB1.I2101110
GND111111
INT:MUX.LONG.H1[0, 15, 1][0, 15, 0][0, 14, 1]
0.LONG.IO.V1000
0.OUT.LR.IOB1.I2011
NONE111
INT:MUX.IMUX.IOB1.IK[0, 14, 3][0, 18, 1][0, 18, 3][0, 14, 2][0, 19, 1][0, 17, 1][0, 20, 1][0, 15, 2]
0.GCLK000111111
0.GCLK101011111
0.GCLK201101111
0.GCLK301110111
1.SINGLE.H201111011
1.SINGLE.H301111101
1.SINGLE.H401111110
1.SINGLE.H511111111
INT:MUX.IO.DBUF.V1[0, 14, 8][0, 17, 8][0, 18, 8][0, 15, 8]
0.IO.DOUBLE.0.W.20011
0.IO.DOUBLE.1.W.20101
0.IO.DOUBLE.3.W.20110
0.IO.DOUBLE.2.W.21111
INT:MUX.IMUX.IOB0.OK[0, 9, 6][0, 17, 5][0, 18, 6][0, 12, 6][0, 15, 6][0, 14, 6][0, 11, 6][0, 16, 6]
0.SINGLE.H300111111
0.SINGLE.H401011111
0.SINGLE.H501101111
0.GCLK001110111
0.GCLK101111011
0.GCLK201111101
0.GCLK301111110
0.SINGLE.H211111111
INT:MUX.LONG.IO.V1[0, 13, 8][0, 11, 8][0, 12, 8][0, 17, 9]
0.LONG.H10001
0.LONG.H3.BUF0010
0.SINGLE.H20111
NONE1111
INT:MUX.IMUX.IOB1.O1[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0]
0.LONG.H00001
0.LONG.H10010
1.DOUBLE.H1.00101
0.LONG.H2.BUF0110
1.DOUBLE.H0.11011
GND1111
IOB0:TMUX[0, 21, 5]
IOB1:TMUX[0, 19, 4]
TFF0
T1
IOB0:5V_TOLERANT_IO[0, 19, 5]
IOB0:OFF_USED[0, 21, 7]
IOB1:5V_TOLERANT_IO[0, 20, 4]
IOB1:OFF_USED[0, 22, 2]
Non-inverted[0]
IOB0:DRIVE[0, 19, 6]
IOB1:DRIVE[0, 20, 3]
240
121
INT:MUX.IMUX.IOB0.IK[0, 13, 7][0, 20, 7][0, 14, 7][0, 16, 7][0, 18, 7][0, 17, 7][0, 15, 7][0, 19, 7]
0.SINGLE.H200111111
0.SINGLE.H301011111
0.SINGLE.H501101111
0.GCLK001110111
0.GCLK101111011
0.GCLK201111101
0.GCLK301111110
0.SINGLE.H411111111
INT:MUX.IMUX.IOB1.OK[0, 11, 2][0, 18, 2][0, 17, 2][0, 13, 2][0, 19, 2][0, 12, 2][0, 16, 2][0, 20, 2]
0.GCLK000111111
0.GCLK101011111
0.GCLK201101111
0.GCLK301110111
1.SINGLE.H201111011
1.SINGLE.H401111101
1.SINGLE.H501111110
1.SINGLE.H311111111
INT:MUX.IMUX.IOB0.O1[0, 16, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
0.DOUBLE.H0.0001111
0.LONG.H3.BUF011011
0.LONG.H4011101
0.LONG.H5011110
0.DOUBLE.H1.1110111
GND111111
IOB0:OMUX[0, 24, 8][0, 21, 8][0, 22, 9][0, 21, 9]
IOB1:OMUX[0, 22, 1][0, 21, 1][0, 22, 0][0, 21, 0]
CE0000
CE.INV0001
OFF0010
O0111
MUX1011
O.INV1111
IOB0:SYNC_D[0, 21, 6]
IOB1:SYNC_D[0, 21, 2]
DELAY0
I1
IOB0:I1MUX[0, 23, 5][0, 22, 5]
IOB0:I2MUX[0, 25, 5][0, 24, 6]
IOB1:I1MUX[0, 25, 4][0, 22, 4]
IOB1:I2MUX[0, 24, 4][0, 24, 3]
I01
IQL10
IQ11
IOB0:PULL[0, 17, 6][0, 23, 7]
IOB1:PULL[0, 25, 1][0, 23, 1]
PULLUP01
PULLDOWN10
NONE11
IOB0:SLEW[0, 23, 9]
IOB1:SLEW[0, 25, 0]
FAST0
SLOW1
IOB0:MUX.OFF_D[0, 25, 7]
IOB1:MUX.OFF_D[0, 25, 2]
O0
CE1
IOB0:IFF_D[0, 24, 5][0, 25, 6]
IOB1:IFF_D[0, 23, 4][0, 25, 3]
DELAY00
MEDDELAY01
SYNC10
I11

IO.L.T

IO.L.T bittile 0
RowColumn
012345678910111213141516171819202122232425
0 INT:MUX.LONG.H0[0]-INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[0]-INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]-INT:MUX.LONG.H1[1]--INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[2]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1 INT:MUX.LONG.H0[1]INT:MUX.LONG.H0[2]INT:MUX.IMUX.TBUF0.I[4]-INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[0]-INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[0]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3 ~TBUF0:DRIVE1INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[0]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[3]-INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IMUX.IOB1.TS[5]~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1INT:MUX.IMUX.IOB1.TS[3]~TBUF1:DRIVE1-INT:MUX.IMUX.IOB1.IK[7]-~IOB1:IFF_SRVAL-INT:MUX.IMUX.IOB1.IK[5]-IOB1:DRIVE~IOB1:READBACK_I1~IOB1:READBACK_I2~IOB1:INV.IFF_CLKIOB1:I2MUX[0]IOB1:IFF_D[0]
4 ~INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S~INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S~INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S~INT:PASS.SINGLE.H1.0.LONG.IO.V0~INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.H5.0.LONG.IO.V2INT:MUX.IMUX.IOB0.TS[0]~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2~INT:BIPASS.IO.DOUBLE.2.W.0.IO.DOUBLE.2.W.2~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.1~INT:PASS.IO.DOUBLE.2.W.0.0.IO.DBUF.V1------IOB1:TMUXIOB1:5V_TOLERANT_IO~IOB1:IFF_CE_ENABLE_NO_IQIOB1:I1MUX[0]IOB1:IFF_D[1]IOB1:I2MUX[1]IOB1:I1MUX[1]
5 ~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.2INT:MUX.LONG.IO.V0[0]~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2~INT:BIPASS.IO.DOUBLE.0.W.0.IO.DOUBLE.0.W.2INT:MUX.LONG.IO.V0[1]~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.1-~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.0~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.0~INT:PASS.IO.DOUBLE.0.W.0.0.IO.DBUF.V1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.0~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.0----INT:MUX.IMUX.IOB0.OK[6]-IOB0:5V_TOLERANT_IO-IOB0:TMUXIOB0:I1MUX[0]IOB0:I1MUX[1]IOB0:IFF_D[1]IOB0:I2MUX[1]
6 INT:MUX.LONG.H4[0]INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB0.I2~INT:PASS.IO.DOUBLE.3.W.0.0.IO.DBUF.V1INT:MUX.LONG.H5[0]-~INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0~IOB1:OFF_CE_ENABLE~INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0INT:MUX.IMUX.IOB0.OK[7]~INT:PASS.IO.DOUBLE.1.W.0.0.IO.DBUF.V1INT:MUX.IMUX.IOB0.OK[1]INT:MUX.IMUX.IOB0.OK[4]-INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]IOB0:PULL[1]INT:MUX.IMUX.IOB0.OK[5]IOB0:DRIVE~IOB0:IFF_CE_ENABLE_NO_IQIOB0:SYNC_D~IOB0:IFF_SRVAL~IOB0:INV.IFF_CLKIOB0:I2MUX[0]IOB0:IFF_D[0]
7 --~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[2]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[6]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8 ~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[0]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9 ~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE-~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0-INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
IO.L.T bittile 1
RowColumn
0
0 -
1 -
2 -
3 -
4 -
5 -
6 -
7 ~PULLUP.TBUF0:ENABLE
INT:MUX.LONG.H0[0, 1, 1][0, 0, 1][0, 0, 0]
0.LONG.IO.V0000
0.OUT.LR.IOB1.I2011
NONE111
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.0[0, 8, 5]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1[0, 5, 5]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2[0, 2, 5]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0[0, 14, 9]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1[0, 12, 9]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2[0, 10, 9]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0[0, 5, 9]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1[0, 3, 9]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2[0, 1, 9]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.0[0, 11, 5]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1[0, 10, 3]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2[0, 9, 4]
INT:BIPASS.IO.DOUBLE.0.W.0.IO.DOUBLE.0.W.2[0, 3, 5]
INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2[0, 11, 9]
INT:BIPASS.IO.DOUBLE.2.W.0.IO.DOUBLE.2.W.2[0, 10, 4]
INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2[0, 2, 9]
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.0[0, 9, 5]
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.2[0, 0, 5]
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.1[0, 6, 5]
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0[0, 15, 9]
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2[0, 9, 9]
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1[0, 13, 9]
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.0[0, 12, 5]
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.2[0, 8, 4]
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.1[0, 11, 4]
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0[0, 6, 9]
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2[0, 0, 9]
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1[0, 4, 9]
INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.S[0, 2, 7]
INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1[0, 5, 7]
INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB0.I2[0, 2, 6]
INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S[0, 2, 4]
INT:PASS.IO.DOUBLE.0.W.0.0.IO.DBUF.V1[0, 10, 5]
INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0[0, 6, 6]
INT:PASS.IO.DOUBLE.1.W.0.0.IO.DBUF.V1[0, 10, 6]
INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0[0, 9, 7]
INT:PASS.IO.DOUBLE.2.W.0.0.IO.DBUF.V1[0, 12, 4]
INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0[0, 8, 6]
INT:PASS.IO.DOUBLE.3.W.0.0.IO.DBUF.V1[0, 3, 6]
INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0[0, 8, 7]
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S[0, 1, 4]
INT:PASS.SINGLE.H1.0.LONG.IO.V0[0, 3, 4]
INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2[0, 4, 4]
INT:PASS.SINGLE.H2.0.LONG.IO.V1[0, 12, 7]
INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1[0, 4, 7]
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S[0, 10, 8]
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S[0, 0, 4]
INT:PASS.SINGLE.H5.0.LONG.IO.V2[0, 6, 4]
INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2[0, 5, 4]
INT:PASS.SINGLE.H6.0.LONG.IO.V3[0, 8, 8]
INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1[0, 1, 8]
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S[0, 0, 8]
IOB0:IFF_CE_ENABLE[0, 7, 8]
IOB0:IFF_CE_ENABLE_NO_IQ[0, 20, 6]
IOB0:IFF_SRVAL[0, 22, 6]
IOB0:INV.IFF_CLK[0, 23, 6]
IOB0:INV.OFF_CLK[0, 24, 9]
IOB0:INV.OFF_D[0, 22, 7]
IOB0:INV.T[0, 25, 9]
IOB0:OFF_CE_ENABLE[0, 7, 9]
IOB0:OFF_SRVAL[0, 24, 7]
IOB0:READBACK_I1[0, 25, 8]
IOB0:READBACK_I2[0, 23, 8]
IOB0:READBACK_OFF[0, 22, 8]
IOB1:IFF_CE_ENABLE[0, 7, 7]
IOB1:IFF_CE_ENABLE_NO_IQ[0, 21, 4]
IOB1:IFF_SRVAL[0, 16, 3]
IOB1:INV.IFF_CLK[0, 23, 3]
IOB1:INV.OFF_CLK[0, 23, 0]
IOB1:INV.OFF_D[0, 24, 2]
IOB1:INV.T[0, 24, 0]
IOB1:OFF_CE_ENABLE[0, 7, 6]
IOB1:OFF_SRVAL[0, 24, 1]
IOB1:READBACK_I1[0, 21, 3]
IOB1:READBACK_I2[0, 22, 3]
IOB1:READBACK_OFF[0, 23, 2]
PULLUP.TBUF0:ENABLE[1, 0, 7]
PULLUP.TBUF1:ENABLE[0, 11, 7]
TBUF0:DRIVE1[0, 0, 3]
TBUF1:DRIVE1[0, 12, 3]
Inverted~[0]
INT:MUX.LONG.H4[0, 1, 6][0, 3, 7][0, 0, 6]
0.LONG.IO.V2000
0.OUT.LR.IOB0.I2011
NONE111
INT:MUX.LONG.IO.V0[0, 4, 5][0, 1, 5]
0.LONG.H000
0.SINGLE.H101
NONE11
INT:MUX.IMUX.TBUF0.I[0, 2, 1][0, 2, 0][0, 4, 0][0, 4, 1][0, 3, 0]
0.IO.DOUBLE.2.W.100011
0.OUT.LR.IOB0.I200101
0.LONG.IO.V200110
0.IO.DOUBLE.2.W.001111
0.IO.DOUBLE.3.W.110011
0.IO.DOUBLE.3.W.010101
0.OUT.LR.IOB1.I210110
GND11111
INT:MUX.IO.DBUF.V0[0, 1, 2][0, 3, 2][0, 4, 3][0, 3, 3]
0.IO.DOUBLE.1.W.00011
0.IO.DOUBLE.2.W.00101
0.IO.DOUBLE.3.W.00110
0.IO.DOUBLE.0.W.01111
INT:MUX.LONG.IO.V2[0, 5, 8][0, 2, 8][0, 4, 8][0, 3, 8]
0.LONG.H2.BUF0001
0.LONG.H40010
0.SINGLE.H50111
NONE1111
INT:MUX.LONG.H5[0, 10, 7][0, 6, 7][0, 4, 6]
0.LONG.IO.V3000
0.OUT.LR.IOB0.I2011
NONE111
INT:MUX.IMUX.TBUF0.TS[0, 5, 0][0, 5, 1][0, 8, 0][0, 6, 1][0, 6, 0]
0.IO.DOUBLE.1.W.000011
0.LONG.IO.V300101
VCC00110
0.IO.DOUBLE.0.W.001111
0.IO.DOUBLE.1.W.110011
0.LONG.IO.V210101
GND10110
0.IO.DOUBLE.0.W.111111
INT:MUX.IMUX.IOB1.TS[0, 2, 2][0, 8, 3][0, 9, 3][0, 0, 2][0, 11, 3][0, 9, 2][0, 10, 2][0, 7, 2]
0.LONG.IO.V000101011
0.IO.DOUBLE.0.W.000111111
0.IO.DOUBLE.1.W.001000111
0.LONG.IO.V201001011
0.IO.DOUBLE.1.W.101011111
GND01101110
0.LONG.IO.V111100111
0.LONG.IO.V311101011
0.GCLK011101101
0.IO.DOUBLE.0.W.111111111
INT:MUX.IMUX.IOB0.TS[0, 4, 2][0, 6, 2][0, 1, 3][0, 2, 3][0, 6, 3][0, 5, 2][0, 5, 3][0, 7, 4]
0.LONG.IO.V300001111
0.LONG.IO.V100011011
0.GCLK000011101
0.IO.DOUBLE.0.W.100111111
0.LONG.IO.V001000111
GND01011110
0.IO.DOUBLE.1.W.101110111
0.IO.DOUBLE.1.W.011001111
0.LONG.IO.V211011011
0.IO.DOUBLE.0.W.011111111
INT:MUX.IMUX.TBUF1.TS[0, 7, 1][0, 10, 0][0, 10, 1][0, 9, 0][0, 8, 1]
0.IO.DOUBLE.0.W.100011
0.IO.DOUBLE.0.W.000111
0.LONG.IO.V201001
VCC01010
0.LONG.IO.V301101
GND01110
0.IO.DOUBLE.1.W.111011
0.IO.DOUBLE.1.W.011111
INT:MUX.LONG.IO.V3[0, 6, 8][0, 9, 8]
0.LONG.H500
0.SINGLE.H601
NONE11
INT:MUX.IMUX.TBUF1.I[0, 13, 0][0, 11, 1][0, 13, 1][0, 11, 0][0, 12, 0][0, 12, 1]
0.IO.DOUBLE.2.W.0000111
0.OUT.LR.IOB0.I2001011
0.LONG.IO.V1001101
0.IO.DOUBLE.2.W.1011111
0.IO.DOUBLE.3.W.1100111
0.IO.DOUBLE.3.W.0101011
0.OUT.LR.IOB1.I2101110
GND111111
INT:MUX.LONG.H1[0, 15, 1][0, 15, 0][0, 14, 1]
0.LONG.IO.V1000
0.OUT.LR.IOB1.I2011
NONE111
INT:MUX.IMUX.IOB1.IK[0, 14, 3][0, 18, 1][0, 18, 3][0, 14, 2][0, 19, 1][0, 17, 1][0, 20, 1][0, 15, 2]
0.GCLK000111111
0.GCLK101011111
0.GCLK201101111
0.GCLK301110111
1.SINGLE.H201111011
1.SINGLE.H301111101
1.SINGLE.H401111110
1.SINGLE.H511111111
INT:MUX.IO.DBUF.V1[0, 14, 8][0, 17, 8][0, 18, 8][0, 15, 8]
0.IO.DOUBLE.0.W.20011
0.IO.DOUBLE.1.W.20101
0.IO.DOUBLE.3.W.20110
0.IO.DOUBLE.2.W.21111
INT:MUX.IMUX.IOB0.OK[0, 9, 6][0, 17, 5][0, 18, 6][0, 12, 6][0, 15, 6][0, 14, 6][0, 11, 6][0, 16, 6]
0.SINGLE.H300111111
0.SINGLE.H401011111
0.SINGLE.H501101111
0.GCLK001110111
0.GCLK101111011
0.GCLK201111101
0.GCLK301111110
0.SINGLE.H211111111
INT:MUX.LONG.IO.V1[0, 13, 8][0, 11, 8][0, 12, 8][0, 17, 9]
0.LONG.H10001
0.LONG.H3.BUF0010
0.SINGLE.H20111
NONE1111
INT:MUX.IMUX.IOB1.O1[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0]
0.LONG.H00001
0.LONG.H10010
1.DOUBLE.H1.00101
0.LONG.H2.BUF0110
1.DOUBLE.H0.11011
GND1111
IOB0:TMUX[0, 21, 5]
IOB1:TMUX[0, 19, 4]
TFF0
T1
IOB0:5V_TOLERANT_IO[0, 19, 5]
IOB0:OFF_USED[0, 21, 7]
IOB1:5V_TOLERANT_IO[0, 20, 4]
IOB1:OFF_USED[0, 22, 2]
Non-inverted[0]
IOB0:DRIVE[0, 19, 6]
IOB1:DRIVE[0, 20, 3]
240
121
INT:MUX.IMUX.IOB0.IK[0, 13, 7][0, 20, 7][0, 14, 7][0, 16, 7][0, 18, 7][0, 17, 7][0, 15, 7][0, 19, 7]
0.SINGLE.H200111111
0.SINGLE.H301011111
0.SINGLE.H501101111
0.GCLK001110111
0.GCLK101111011
0.GCLK201111101
0.GCLK301111110
0.SINGLE.H411111111
INT:MUX.IMUX.IOB1.OK[0, 11, 2][0, 18, 2][0, 17, 2][0, 13, 2][0, 19, 2][0, 12, 2][0, 16, 2][0, 20, 2]
0.GCLK000111111
0.GCLK101011111
0.GCLK201101111
0.GCLK301110111
1.SINGLE.H201111011
1.SINGLE.H401111101
1.SINGLE.H501111110
1.SINGLE.H311111111
INT:MUX.IMUX.IOB0.O1[0, 16, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
0.DOUBLE.H0.0001111
0.LONG.H3.BUF011011
0.LONG.H4011101
0.LONG.H5011110
0.DOUBLE.H1.1110111
GND111111
IOB0:OMUX[0, 24, 8][0, 21, 8][0, 22, 9][0, 21, 9]
IOB1:OMUX[0, 22, 1][0, 21, 1][0, 22, 0][0, 21, 0]
CE0000
CE.INV0001
OFF0010
O0111
MUX1011
O.INV1111
IOB0:SYNC_D[0, 21, 6]
IOB1:SYNC_D[0, 21, 2]
DELAY0
I1
IOB0:I1MUX[0, 23, 5][0, 22, 5]
IOB0:I2MUX[0, 25, 5][0, 24, 6]
IOB1:I1MUX[0, 25, 4][0, 22, 4]
IOB1:I2MUX[0, 24, 4][0, 24, 3]
I01
IQL10
IQ11
IOB0:PULL[0, 17, 6][0, 23, 7]
IOB1:PULL[0, 25, 1][0, 23, 1]
PULLUP01
PULLDOWN10
NONE11
IOB0:SLEW[0, 23, 9]
IOB1:SLEW[0, 25, 0]
FAST0
SLOW1
IOB0:MUX.OFF_D[0, 25, 7]
IOB1:MUX.OFF_D[0, 25, 2]
O0
CE1
IOB0:IFF_D[0, 24, 5][0, 25, 6]
IOB1:IFF_D[0, 23, 4][0, 25, 3]
DELAY00
MEDDELAY01
SYNC10
I11

IO.LS

IO.LS bittile 0
RowColumn
012345678910111213141516171819202122232425
0 INT:MUX.LONG.H0[0]-INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[0]-INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]-INT:MUX.LONG.H1[1]--INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[2]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1 INT:MUX.LONG.H0[1]INT:MUX.LONG.H0[2]INT:MUX.IMUX.TBUF0.I[4]-INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[0]-INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[0]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3 ~TBUF0:DRIVE1INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[0]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[3]-INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IMUX.IOB1.TS[5]~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1INT:MUX.IMUX.IOB1.TS[3]~TBUF1:DRIVE1-INT:MUX.IMUX.IOB1.IK[7]-~IOB1:IFF_SRVAL-INT:MUX.IMUX.IOB1.IK[5]-IOB1:DRIVE~IOB1:READBACK_I1~IOB1:READBACK_I2~IOB1:INV.IFF_CLKIOB1:I2MUX[0]IOB1:IFF_D[0]
4 ~INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S~INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S~INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S~INT:PASS.SINGLE.H1.0.LONG.IO.V0~INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.H5.0.LONG.IO.V2INT:MUX.IMUX.IOB0.TS[0]~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2~INT:BIPASS.IO.DOUBLE.2.W.0.IO.DOUBLE.2.W.2~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.1~INT:PASS.IO.DOUBLE.2.W.0.0.IO.DBUF.V1------IOB1:TMUXIOB1:5V_TOLERANT_IO~IOB1:IFF_CE_ENABLE_NO_IQIOB1:I1MUX[0]IOB1:IFF_D[1]IOB1:I2MUX[1]IOB1:I1MUX[1]
5 ~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.2INT:MUX.LONG.IO.V0[0]~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2~INT:BIPASS.IO.DOUBLE.0.W.0.IO.DOUBLE.0.W.2INT:MUX.LONG.IO.V0[1]~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.1-~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.0~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.0~INT:PASS.IO.DOUBLE.0.W.0.0.IO.DBUF.V1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.0~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.0----INT:MUX.IMUX.IOB0.OK[6]-IOB0:5V_TOLERANT_IO-IOB0:TMUXIOB0:I1MUX[0]IOB0:I1MUX[1]IOB0:IFF_D[1]IOB0:I2MUX[1]
6 INT:MUX.LONG.H4[0]INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB0.I2~INT:PASS.IO.DOUBLE.3.W.0.0.IO.DBUF.V1INT:MUX.LONG.H5[0]-~INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0~IOB1:OFF_CE_ENABLE~INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0INT:MUX.IMUX.IOB0.OK[7]~INT:PASS.IO.DOUBLE.1.W.0.0.IO.DBUF.V1INT:MUX.IMUX.IOB0.OK[1]INT:MUX.IMUX.IOB0.OK[4]-INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]IOB0:PULL[1]INT:MUX.IMUX.IOB0.OK[5]IOB0:DRIVE~IOB0:IFF_CE_ENABLE_NO_IQIOB0:SYNC_D~IOB0:IFF_SRVAL~IOB0:INV.IFF_CLKIOB0:I2MUX[0]IOB0:IFF_D[0]
7 --~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[2]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[6]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8 ~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[0]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9 ~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE-~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0-INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
IO.LS bittile 1
RowColumn
0
0 -
1 -
2 -
3 -
4 -
5 -
6 -
7 ~PULLUP.TBUF0:ENABLE
INT:MUX.LONG.H0[0, 1, 1][0, 0, 1][0, 0, 0]
0.LONG.IO.V0000
0.OUT.LR.IOB1.I2011
NONE111
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.0[0, 8, 5]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1[0, 5, 5]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2[0, 2, 5]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0[0, 14, 9]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1[0, 12, 9]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2[0, 10, 9]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0[0, 5, 9]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1[0, 3, 9]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2[0, 1, 9]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.0[0, 11, 5]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1[0, 10, 3]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2[0, 9, 4]
INT:BIPASS.IO.DOUBLE.0.W.0.IO.DOUBLE.0.W.2[0, 3, 5]
INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2[0, 11, 9]
INT:BIPASS.IO.DOUBLE.2.W.0.IO.DOUBLE.2.W.2[0, 10, 4]
INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2[0, 2, 9]
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.1[0, 6, 5]
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.0[0, 9, 5]
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.2[0, 0, 5]
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1[0, 13, 9]
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0[0, 15, 9]
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2[0, 9, 9]
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.1[0, 11, 4]
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.0[0, 12, 5]
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.2[0, 8, 4]
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1[0, 4, 9]
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0[0, 6, 9]
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2[0, 0, 9]
INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.S[0, 2, 7]
INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1[0, 5, 7]
INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB0.I2[0, 2, 6]
INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S[0, 2, 4]
INT:PASS.IO.DOUBLE.0.W.0.0.IO.DBUF.V1[0, 10, 5]
INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0[0, 6, 6]
INT:PASS.IO.DOUBLE.1.W.0.0.IO.DBUF.V1[0, 10, 6]
INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0[0, 9, 7]
INT:PASS.IO.DOUBLE.2.W.0.0.IO.DBUF.V1[0, 12, 4]
INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0[0, 8, 6]
INT:PASS.IO.DOUBLE.3.W.0.0.IO.DBUF.V1[0, 3, 6]
INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0[0, 8, 7]
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S[0, 1, 4]
INT:PASS.SINGLE.H1.0.LONG.IO.V0[0, 3, 4]
INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2[0, 4, 4]
INT:PASS.SINGLE.H2.0.LONG.IO.V1[0, 12, 7]
INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1[0, 4, 7]
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S[0, 10, 8]
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S[0, 0, 4]
INT:PASS.SINGLE.H5.0.LONG.IO.V2[0, 6, 4]
INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2[0, 5, 4]
INT:PASS.SINGLE.H6.0.LONG.IO.V3[0, 8, 8]
INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1[0, 1, 8]
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S[0, 0, 8]
IOB0:IFF_CE_ENABLE[0, 7, 8]
IOB0:IFF_CE_ENABLE_NO_IQ[0, 20, 6]
IOB0:IFF_SRVAL[0, 22, 6]
IOB0:INV.IFF_CLK[0, 23, 6]
IOB0:INV.OFF_CLK[0, 24, 9]
IOB0:INV.OFF_D[0, 22, 7]
IOB0:INV.T[0, 25, 9]
IOB0:OFF_CE_ENABLE[0, 7, 9]
IOB0:OFF_SRVAL[0, 24, 7]
IOB0:READBACK_I1[0, 25, 8]
IOB0:READBACK_I2[0, 23, 8]
IOB0:READBACK_OFF[0, 22, 8]
IOB1:IFF_CE_ENABLE[0, 7, 7]
IOB1:IFF_CE_ENABLE_NO_IQ[0, 21, 4]
IOB1:IFF_SRVAL[0, 16, 3]
IOB1:INV.IFF_CLK[0, 23, 3]
IOB1:INV.OFF_CLK[0, 23, 0]
IOB1:INV.OFF_D[0, 24, 2]
IOB1:INV.T[0, 24, 0]
IOB1:OFF_CE_ENABLE[0, 7, 6]
IOB1:OFF_SRVAL[0, 24, 1]
IOB1:READBACK_I1[0, 21, 3]
IOB1:READBACK_I2[0, 22, 3]
IOB1:READBACK_OFF[0, 23, 2]
PULLUP.TBUF0:ENABLE[1, 0, 7]
PULLUP.TBUF1:ENABLE[0, 11, 7]
TBUF0:DRIVE1[0, 0, 3]
TBUF1:DRIVE1[0, 12, 3]
Inverted~[0]
INT:MUX.LONG.H4[0, 1, 6][0, 3, 7][0, 0, 6]
0.LONG.IO.V2000
0.OUT.LR.IOB0.I2011
NONE111
INT:MUX.LONG.IO.V0[0, 4, 5][0, 1, 5]
0.LONG.H000
0.SINGLE.H101
NONE11
INT:MUX.IMUX.TBUF0.I[0, 2, 1][0, 2, 0][0, 4, 0][0, 4, 1][0, 3, 0]
0.IO.DOUBLE.2.W.100011
0.OUT.LR.IOB0.I200101
0.LONG.IO.V200110
0.IO.DOUBLE.2.W.001111
0.IO.DOUBLE.3.W.110011
0.IO.DOUBLE.3.W.010101
0.OUT.LR.IOB1.I210110
GND11111
INT:MUX.IO.DBUF.V0[0, 1, 2][0, 3, 2][0, 4, 3][0, 3, 3]
0.IO.DOUBLE.1.W.00011
0.IO.DOUBLE.2.W.00101
0.IO.DOUBLE.3.W.00110
0.IO.DOUBLE.0.W.01111
INT:MUX.LONG.IO.V2[0, 5, 8][0, 2, 8][0, 4, 8][0, 3, 8]
0.LONG.H2.BUF0001
0.LONG.H40010
0.SINGLE.H50111
NONE1111
INT:MUX.LONG.H5[0, 10, 7][0, 6, 7][0, 4, 6]
0.LONG.IO.V3000
0.OUT.LR.IOB0.I2011
NONE111
INT:MUX.IMUX.TBUF0.TS[0, 5, 0][0, 5, 1][0, 8, 0][0, 6, 1][0, 6, 0]
0.IO.DOUBLE.1.W.000011
0.LONG.IO.V300101
VCC00110
0.IO.DOUBLE.0.W.001111
0.IO.DOUBLE.1.W.110011
0.LONG.IO.V210101
GND10110
0.IO.DOUBLE.0.W.111111
INT:MUX.IMUX.IOB1.TS[0, 2, 2][0, 8, 3][0, 9, 3][0, 0, 2][0, 11, 3][0, 9, 2][0, 10, 2][0, 7, 2]
0.LONG.IO.V000101011
0.IO.DOUBLE.0.W.000111111
0.IO.DOUBLE.1.W.001000111
0.LONG.IO.V201001011
0.IO.DOUBLE.1.W.101011111
GND01101110
0.LONG.IO.V111100111
0.LONG.IO.V311101011
0.GCLK011101101
0.IO.DOUBLE.0.W.111111111
INT:MUX.IMUX.IOB0.TS[0, 4, 2][0, 6, 2][0, 1, 3][0, 2, 3][0, 6, 3][0, 5, 2][0, 5, 3][0, 7, 4]
0.LONG.IO.V300001111
0.LONG.IO.V100011011
0.GCLK000011101
0.IO.DOUBLE.0.W.100111111
0.LONG.IO.V001000111
GND01011110
0.IO.DOUBLE.1.W.101110111
0.IO.DOUBLE.1.W.011001111
0.LONG.IO.V211011011
0.IO.DOUBLE.0.W.011111111
INT:MUX.IMUX.TBUF1.TS[0, 7, 1][0, 10, 0][0, 10, 1][0, 9, 0][0, 8, 1]
0.IO.DOUBLE.0.W.100011
0.IO.DOUBLE.0.W.000111
0.LONG.IO.V201001
VCC01010
0.LONG.IO.V301101
GND01110
0.IO.DOUBLE.1.W.111011
0.IO.DOUBLE.1.W.011111
INT:MUX.LONG.IO.V3[0, 6, 8][0, 9, 8]
0.LONG.H500
0.SINGLE.H601
NONE11
INT:MUX.IMUX.TBUF1.I[0, 13, 0][0, 11, 1][0, 13, 1][0, 11, 0][0, 12, 0][0, 12, 1]
0.IO.DOUBLE.2.W.0000111
0.OUT.LR.IOB0.I2001011
0.LONG.IO.V1001101
0.IO.DOUBLE.2.W.1011111
0.IO.DOUBLE.3.W.1100111
0.IO.DOUBLE.3.W.0101011
0.OUT.LR.IOB1.I2101110
GND111111
INT:MUX.LONG.H1[0, 15, 1][0, 15, 0][0, 14, 1]
0.LONG.IO.V1000
0.OUT.LR.IOB1.I2011
NONE111
INT:MUX.IMUX.IOB1.IK[0, 14, 3][0, 18, 1][0, 18, 3][0, 14, 2][0, 19, 1][0, 17, 1][0, 20, 1][0, 15, 2]
0.GCLK000111111
0.GCLK101011111
0.GCLK201101111
0.GCLK301110111
1.SINGLE.H201111011
1.SINGLE.H301111101
1.SINGLE.H401111110
1.SINGLE.H511111111
INT:MUX.IO.DBUF.V1[0, 14, 8][0, 17, 8][0, 18, 8][0, 15, 8]
0.IO.DOUBLE.0.W.20011
0.IO.DOUBLE.1.W.20101
0.IO.DOUBLE.3.W.20110
0.IO.DOUBLE.2.W.21111
INT:MUX.IMUX.IOB0.OK[0, 9, 6][0, 17, 5][0, 18, 6][0, 12, 6][0, 15, 6][0, 14, 6][0, 11, 6][0, 16, 6]
0.SINGLE.H300111111
0.SINGLE.H401011111
0.SINGLE.H501101111
0.GCLK001110111
0.GCLK101111011
0.GCLK201111101
0.GCLK301111110
0.SINGLE.H211111111
INT:MUX.LONG.IO.V1[0, 13, 8][0, 11, 8][0, 12, 8][0, 17, 9]
0.LONG.H10001
0.LONG.H3.BUF0010
0.SINGLE.H20111
NONE1111
INT:MUX.IMUX.IOB1.O1[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0]
0.LONG.H00001
0.LONG.H10010
1.DOUBLE.H1.00101
0.LONG.H2.BUF0110
1.DOUBLE.H0.11011
GND1111
IOB0:TMUX[0, 21, 5]
IOB1:TMUX[0, 19, 4]
TFF0
T1
IOB0:5V_TOLERANT_IO[0, 19, 5]
IOB0:OFF_USED[0, 21, 7]
IOB1:5V_TOLERANT_IO[0, 20, 4]
IOB1:OFF_USED[0, 22, 2]
Non-inverted[0]
IOB0:DRIVE[0, 19, 6]
IOB1:DRIVE[0, 20, 3]
240
121
INT:MUX.IMUX.IOB0.IK[0, 13, 7][0, 20, 7][0, 14, 7][0, 16, 7][0, 18, 7][0, 17, 7][0, 15, 7][0, 19, 7]
0.SINGLE.H200111111
0.SINGLE.H301011111
0.SINGLE.H501101111
0.GCLK001110111
0.GCLK101111011
0.GCLK201111101
0.GCLK301111110
0.SINGLE.H411111111
INT:MUX.IMUX.IOB1.OK[0, 11, 2][0, 18, 2][0, 17, 2][0, 13, 2][0, 19, 2][0, 12, 2][0, 16, 2][0, 20, 2]
0.GCLK000111111
0.GCLK101011111
0.GCLK201101111
0.GCLK301110111
1.SINGLE.H201111011
1.SINGLE.H401111101
1.SINGLE.H501111110
1.SINGLE.H311111111
INT:MUX.IMUX.IOB0.O1[0, 16, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
0.DOUBLE.H0.0001111
0.LONG.H3.BUF011011
0.LONG.H4011101
0.LONG.H5011110
0.DOUBLE.H1.1110111
GND111111
IOB0:OMUX[0, 24, 8][0, 21, 8][0, 22, 9][0, 21, 9]
IOB1:OMUX[0, 22, 1][0, 21, 1][0, 22, 0][0, 21, 0]
CE0000
CE.INV0001
OFF0010
O0111
MUX1011
O.INV1111
IOB0:SYNC_D[0, 21, 6]
IOB1:SYNC_D[0, 21, 2]
DELAY0
I1
IOB0:I1MUX[0, 23, 5][0, 22, 5]
IOB0:I2MUX[0, 25, 5][0, 24, 6]
IOB1:I1MUX[0, 25, 4][0, 22, 4]
IOB1:I2MUX[0, 24, 4][0, 24, 3]
I01
IQL10
IQ11
IOB0:PULL[0, 17, 6][0, 23, 7]
IOB1:PULL[0, 25, 1][0, 23, 1]
PULLUP01
PULLDOWN10
NONE11
IOB0:SLEW[0, 23, 9]
IOB1:SLEW[0, 25, 0]
FAST0
SLOW1
IOB0:MUX.OFF_D[0, 25, 7]
IOB1:MUX.OFF_D[0, 25, 2]
O0
CE1
IOB0:IFF_D[0, 24, 5][0, 25, 6]
IOB1:IFF_D[0, 23, 4][0, 25, 3]
DELAY00
MEDDELAY01
SYNC10
I11

IO.LS.B

IO.LS.B bittile 0
RowColumn
012345678910111213141516171819202122232425
0 INT:MUX.LONG.H0[0]-INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[0]-INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]-INT:MUX.LONG.H1[1]--INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[2]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1 INT:MUX.LONG.H0[1]INT:MUX.LONG.H0[2]INT:MUX.IMUX.TBUF0.I[4]-INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[0]-INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[0]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3 ~TBUF0:DRIVE1INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[0]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[3]-INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IMUX.IOB1.TS[5]~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1INT:MUX.IMUX.IOB1.TS[3]~TBUF1:DRIVE1-INT:MUX.IMUX.IOB1.IK[7]-~IOB1:IFF_SRVAL-INT:MUX.IMUX.IOB1.IK[5]-IOB1:DRIVE~IOB1:READBACK_I1~IOB1:READBACK_I2~IOB1:INV.IFF_CLKIOB1:I2MUX[0]IOB1:IFF_D[0]
4 ~INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S~INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S~INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S~INT:PASS.SINGLE.H1.0.LONG.IO.V0~INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.H5.0.LONG.IO.V2INT:MUX.IMUX.IOB0.TS[0]~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2~INT:BIPASS.IO.DOUBLE.2.W.0.IO.DOUBLE.2.W.2~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.1~INT:PASS.IO.DOUBLE.2.W.0.0.IO.DBUF.V1------IOB1:TMUXIOB1:5V_TOLERANT_IO~IOB1:IFF_CE_ENABLE_NO_IQIOB1:I1MUX[0]IOB1:IFF_D[1]IOB1:I2MUX[1]IOB1:I1MUX[1]
5 ~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.2INT:MUX.LONG.IO.V0[0]~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2~INT:BIPASS.IO.DOUBLE.0.W.0.IO.DOUBLE.0.W.2INT:MUX.LONG.IO.V0[1]~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.1-~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.0~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.0~INT:PASS.IO.DOUBLE.0.W.0.0.IO.DBUF.V1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.0~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.0----INT:MUX.IMUX.IOB0.OK[6]-IOB0:5V_TOLERANT_IO-IOB0:TMUXIOB0:I1MUX[0]IOB0:I1MUX[1]IOB0:IFF_D[1]IOB0:I2MUX[1]
6 INT:MUX.LONG.H4[0]INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB0.I2~INT:PASS.IO.DOUBLE.3.W.0.0.IO.DBUF.V1INT:MUX.LONG.H5[0]-~INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0~IOB1:OFF_CE_ENABLE~INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0INT:MUX.IMUX.IOB0.OK[7]~INT:PASS.IO.DOUBLE.1.W.0.0.IO.DBUF.V1INT:MUX.IMUX.IOB0.OK[1]INT:MUX.IMUX.IOB0.OK[4]-INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]IOB0:PULL[1]INT:MUX.IMUX.IOB0.OK[5]IOB0:DRIVE~IOB0:IFF_CE_ENABLE_NO_IQIOB0:SYNC_D~IOB0:IFF_SRVAL~IOB0:INV.IFF_CLKIOB0:I2MUX[0]IOB0:IFF_D[0]
7 --~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[2]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[6]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8 ~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[0]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9 ~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE-~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0-INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
IO.LS.B bittile 1
RowColumn
0
0 -
1 -
2 -
3 -
4 -
5 -
6 -
7 -
8 -
9 -
10 ~PULLUP.TBUF0:ENABLE
INT:MUX.LONG.H0[0, 1, 1][0, 0, 1][0, 0, 0]
0.LONG.IO.V0000
0.OUT.LR.IOB1.I2011
NONE111
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.0[0, 8, 5]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.1[0, 5, 5]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.0.W.2[0, 2, 5]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0[0, 14, 9]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1[0, 12, 9]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2[0, 10, 9]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0[0, 5, 9]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1[0, 3, 9]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2[0, 1, 9]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.0[0, 11, 5]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.1[0, 10, 3]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.2.W.2[0, 9, 4]
INT:BIPASS.IO.DOUBLE.0.W.0.IO.DOUBLE.0.W.2[0, 3, 5]
INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2[0, 11, 9]
INT:BIPASS.IO.DOUBLE.2.W.0.IO.DOUBLE.2.W.2[0, 10, 4]
INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2[0, 2, 9]
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.W.1[0, 6, 5]
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.0[0, 9, 5]
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.W.2[0, 0, 5]
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1[0, 13, 9]
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0[0, 15, 9]
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2[0, 9, 9]
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.W.1[0, 11, 4]
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.0[0, 12, 5]
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.W.2[0, 8, 4]
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1[0, 4, 9]
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0[0, 6, 9]
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2[0, 0, 9]
INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.S[0, 2, 7]
INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1[0, 5, 7]
INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB0.I2[0, 2, 6]
INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB1.I2.S[0, 2, 4]
INT:PASS.IO.DOUBLE.0.W.0.0.IO.DBUF.V1[0, 10, 5]
INT:PASS.IO.DOUBLE.0.W.2.0.IO.DBUF.V0[0, 6, 6]
INT:PASS.IO.DOUBLE.1.W.0.0.IO.DBUF.V1[0, 10, 6]
INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0[0, 9, 7]
INT:PASS.IO.DOUBLE.2.W.0.0.IO.DBUF.V1[0, 12, 4]
INT:PASS.IO.DOUBLE.2.W.2.0.IO.DBUF.V0[0, 8, 6]
INT:PASS.IO.DOUBLE.3.W.0.0.IO.DBUF.V1[0, 3, 6]
INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0[0, 8, 7]
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S[0, 1, 4]
INT:PASS.SINGLE.H1.0.LONG.IO.V0[0, 3, 4]
INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2[0, 4, 4]
INT:PASS.SINGLE.H2.0.LONG.IO.V1[0, 12, 7]
INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1[0, 4, 7]
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S[0, 10, 8]
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S[0, 0, 4]
INT:PASS.SINGLE.H5.0.LONG.IO.V2[0, 6, 4]
INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2[0, 5, 4]
INT:PASS.SINGLE.H6.0.LONG.IO.V3[0, 8, 8]
INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1[0, 1, 8]
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S[0, 0, 8]
IOB0:IFF_CE_ENABLE[0, 7, 8]
IOB0:IFF_CE_ENABLE_NO_IQ[0, 20, 6]
IOB0:IFF_SRVAL[0, 22, 6]
IOB0:INV.IFF_CLK[0, 23, 6]
IOB0:INV.OFF_CLK[0, 24, 9]
IOB0:INV.OFF_D[0, 22, 7]
IOB0:INV.T[0, 25, 9]
IOB0:OFF_CE_ENABLE[0, 7, 9]
IOB0:OFF_SRVAL[0, 24, 7]
IOB0:READBACK_I1[0, 25, 8]
IOB0:READBACK_I2[0, 23, 8]
IOB0:READBACK_OFF[0, 22, 8]
IOB1:IFF_CE_ENABLE[0, 7, 7]
IOB1:IFF_CE_ENABLE_NO_IQ[0, 21, 4]
IOB1:IFF_SRVAL[0, 16, 3]
IOB1:INV.IFF_CLK[0, 23, 3]
IOB1:INV.OFF_CLK[0, 23, 0]
IOB1:INV.OFF_D[0, 24, 2]
IOB1:INV.T[0, 24, 0]
IOB1:OFF_CE_ENABLE[0, 7, 6]
IOB1:OFF_SRVAL[0, 24, 1]
IOB1:READBACK_I1[0, 21, 3]
IOB1:READBACK_I2[0, 22, 3]
IOB1:READBACK_OFF[0, 23, 2]
PULLUP.TBUF0:ENABLE[1, 0, 10]
PULLUP.TBUF1:ENABLE[0, 11, 7]
TBUF0:DRIVE1[0, 0, 3]
TBUF1:DRIVE1[0, 12, 3]
Inverted~[0]
INT:MUX.LONG.H4[0, 1, 6][0, 3, 7][0, 0, 6]
0.LONG.IO.V2000
0.OUT.LR.IOB0.I2011
NONE111
INT:MUX.LONG.IO.V0[0, 4, 5][0, 1, 5]
0.LONG.H000
0.SINGLE.H101
NONE11
INT:MUX.IMUX.TBUF0.I[0, 2, 1][0, 2, 0][0, 4, 0][0, 4, 1][0, 3, 0]
0.IO.DOUBLE.2.W.100011
0.OUT.LR.IOB0.I200101
0.LONG.IO.V200110
0.IO.DOUBLE.2.W.001111
0.IO.DOUBLE.3.W.110011
0.IO.DOUBLE.3.W.010101
0.OUT.LR.IOB1.I210110
GND11111
INT:MUX.IO.DBUF.V0[0, 1, 2][0, 3, 2][0, 4, 3][0, 3, 3]
0.IO.DOUBLE.1.W.00011
0.IO.DOUBLE.2.W.00101
0.IO.DOUBLE.3.W.00110
0.IO.DOUBLE.0.W.01111
INT:MUX.LONG.IO.V2[0, 5, 8][0, 2, 8][0, 4, 8][0, 3, 8]
0.LONG.H2.BUF0001
0.LONG.H40010
0.SINGLE.H50111
NONE1111
INT:MUX.LONG.H5[0, 10, 7][0, 6, 7][0, 4, 6]
0.LONG.IO.V3000
0.OUT.LR.IOB0.I2011
NONE111
INT:MUX.IMUX.TBUF0.TS[0, 5, 0][0, 5, 1][0, 8, 0][0, 6, 1][0, 6, 0]
0.IO.DOUBLE.1.W.000011
0.LONG.IO.V300101
VCC00110
0.IO.DOUBLE.0.W.001111
0.IO.DOUBLE.1.W.110011
0.LONG.IO.V210101
GND10110
0.IO.DOUBLE.0.W.111111
INT:MUX.IMUX.IOB1.TS[0, 2, 2][0, 8, 3][0, 9, 3][0, 0, 2][0, 11, 3][0, 9, 2][0, 10, 2][0, 7, 2]
0.LONG.IO.V000101011
0.IO.DOUBLE.0.W.000111111
0.IO.DOUBLE.1.W.001000111
0.LONG.IO.V201001011
0.IO.DOUBLE.1.W.101011111
GND01101110
0.LONG.IO.V111100111
0.LONG.IO.V311101011
0.GCLK011101101
0.IO.DOUBLE.0.W.111111111
INT:MUX.IMUX.IOB0.TS[0, 4, 2][0, 6, 2][0, 1, 3][0, 2, 3][0, 6, 3][0, 5, 2][0, 5, 3][0, 7, 4]
0.LONG.IO.V300001111
0.LONG.IO.V100011011
0.GCLK000011101
0.IO.DOUBLE.0.W.100111111
0.LONG.IO.V001000111
GND01011110
0.IO.DOUBLE.1.W.101110111
0.IO.DOUBLE.1.W.011001111
0.LONG.IO.V211011011
0.IO.DOUBLE.0.W.011111111
INT:MUX.IMUX.TBUF1.TS[0, 7, 1][0, 10, 0][0, 10, 1][0, 9, 0][0, 8, 1]
0.IO.DOUBLE.0.W.100011
0.IO.DOUBLE.0.W.000111
0.LONG.IO.V201001
VCC01010
0.LONG.IO.V301101
GND01110
0.IO.DOUBLE.1.W.111011
0.IO.DOUBLE.1.W.011111
INT:MUX.LONG.IO.V3[0, 6, 8][0, 9, 8]
0.LONG.H500
0.SINGLE.H601
NONE11
INT:MUX.IMUX.TBUF1.I[0, 13, 0][0, 11, 1][0, 13, 1][0, 11, 0][0, 12, 0][0, 12, 1]
0.IO.DOUBLE.2.W.0000111
0.OUT.LR.IOB0.I2001011
0.LONG.IO.V1001101
0.IO.DOUBLE.2.W.1011111
0.IO.DOUBLE.3.W.1100111
0.IO.DOUBLE.3.W.0101011
0.OUT.LR.IOB1.I2101110
GND111111
INT:MUX.LONG.H1[0, 15, 1][0, 15, 0][0, 14, 1]
0.LONG.IO.V1000
0.OUT.LR.IOB1.I2011
NONE111
INT:MUX.IMUX.IOB1.IK[0, 14, 3][0, 18, 1][0, 18, 3][0, 14, 2][0, 19, 1][0, 17, 1][0, 20, 1][0, 15, 2]
0.GCLK000111111
0.GCLK101011111
0.GCLK201101111
0.GCLK301110111
1.SINGLE.H201111011
1.SINGLE.H301111101
1.SINGLE.H401111110
1.SINGLE.H511111111
INT:MUX.IO.DBUF.V1[0, 14, 8][0, 17, 8][0, 18, 8][0, 15, 8]
0.IO.DOUBLE.0.W.20011
0.IO.DOUBLE.1.W.20101
0.IO.DOUBLE.3.W.20110
0.IO.DOUBLE.2.W.21111
INT:MUX.IMUX.IOB0.OK[0, 9, 6][0, 17, 5][0, 18, 6][0, 12, 6][0, 15, 6][0, 14, 6][0, 11, 6][0, 16, 6]
0.SINGLE.H300111111
0.SINGLE.H401011111
0.SINGLE.H501101111
0.GCLK001110111
0.GCLK101111011
0.GCLK201111101
0.GCLK301111110
0.SINGLE.H211111111
INT:MUX.LONG.IO.V1[0, 13, 8][0, 11, 8][0, 12, 8][0, 17, 9]
0.LONG.H10001
0.LONG.H3.BUF0010
0.SINGLE.H20111
NONE1111
INT:MUX.IMUX.IOB1.O1[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0]
0.LONG.H00001
0.LONG.H10010
1.DOUBLE.H1.00101
0.LONG.H2.BUF0110
1.DOUBLE.H0.11011
GND1111
IOB0:TMUX[0, 21, 5]
IOB1:TMUX[0, 19, 4]
TFF0
T1
IOB0:5V_TOLERANT_IO[0, 19, 5]
IOB0:OFF_USED[0, 21, 7]
IOB1:5V_TOLERANT_IO[0, 20, 4]
IOB1:OFF_USED[0, 22, 2]
Non-inverted[0]
IOB0:DRIVE[0, 19, 6]
IOB1:DRIVE[0, 20, 3]
240
121
INT:MUX.IMUX.IOB0.IK[0, 13, 7][0, 20, 7][0, 14, 7][0, 16, 7][0, 18, 7][0, 17, 7][0, 15, 7][0, 19, 7]
0.SINGLE.H200111111
0.SINGLE.H301011111
0.SINGLE.H501101111
0.GCLK001110111
0.GCLK101111011
0.GCLK201111101
0.GCLK301111110
0.SINGLE.H411111111
INT:MUX.IMUX.IOB1.OK[0, 11, 2][0, 18, 2][0, 17, 2][0, 13, 2][0, 19, 2][0, 12, 2][0, 16, 2][0, 20, 2]
0.GCLK000111111
0.GCLK101011111
0.GCLK201101111
0.GCLK301110111
1.SINGLE.H201111011
1.SINGLE.H401111101
1.SINGLE.H501111110
1.SINGLE.H311111111
INT:MUX.IMUX.IOB0.O1[0, 16, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
0.DOUBLE.H0.0001111
0.LONG.H3.BUF011011
0.LONG.H4011101
0.LONG.H5011110
0.DOUBLE.H1.1110111
GND111111
IOB0:OMUX[0, 24, 8][0, 21, 8][0, 22, 9][0, 21, 9]
IOB1:OMUX[0, 22, 1][0, 21, 1][0, 22, 0][0, 21, 0]
CE0000
CE.INV0001
OFF0010
O0111
MUX1011
O.INV1111
IOB0:SYNC_D[0, 21, 6]
IOB1:SYNC_D[0, 21, 2]
DELAY0
I1
IOB0:I1MUX[0, 23, 5][0, 22, 5]
IOB0:I2MUX[0, 25, 5][0, 24, 6]
IOB1:I1MUX[0, 25, 4][0, 22, 4]
IOB1:I2MUX[0, 24, 4][0, 24, 3]
I01
IQL10
IQ11
IOB0:PULL[0, 17, 6][0, 23, 7]
IOB1:PULL[0, 25, 1][0, 23, 1]
PULLUP01
PULLDOWN10
NONE11
IOB0:SLEW[0, 23, 9]
IOB1:SLEW[0, 25, 0]
FAST0
SLOW1
IOB0:MUX.OFF_D[0, 25, 7]
IOB1:MUX.OFF_D[0, 25, 2]
O0
CE1
IOB0:IFF_D[0, 24, 5][0, 25, 6]
IOB1:IFF_D[0, 23, 4][0, 25, 3]
DELAY00
MEDDELAY01
SYNC10
I11

IO.R

IO.R bittile 0
RowColumn
012345678910111213141516171819202122232425262728293031323334353637383940
0 IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[0]--INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF0.TS[4]-INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]--INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
1 IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.LONG.H1[2]-INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[4]-INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[1]-INT:MUX.IMUX.TBUF0.I[4]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]--INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.CLB.G1[0]----INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.F1[0]INT:MUX.IMUX.CLB.G3[8]INT:MUX.IMUX.CLB.G3[6]INT:MUX.IMUX.CLB.G3[3]INT:MUX.IMUX.CLB.C3[3]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.F3[2]
3 IOB1:I2MUX[0]IOB1:IFF_D[0]~IOB1:INV.IFF_CLK~IOB1:READBACK_I2~IOB1:READBACK_I1IOB1:DRIVE-INT:MUX.IMUX.IOB1.IK[5]-~IOB1:IFF_SRVAL-INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.CLB.G3[1]~TBUF1:DRIVE1INT:MUX.IMUX.IOB1.TS[4]~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IMUX.IOB1.TS[5]IOB1:TMUXINT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IO.DBUF.V0[3]INT:MUX.IO.DBUF.V0[0]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[0]~TBUF0:DRIVE1INT:MUX.IMUX.CLB.G1[6]~INT:PASS.SINGLE.H5.0.LONG.V4-~INT:BIPASS.SINGLE.H1.SINGLE.V1.S~INT:BIPASS.SINGLE.H0.SINGLE.V0.S~INT:BIPASS.SINGLE.V1.SINGLE.V1.SINT:MUX.IMUX.CLB.F1[3]~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2~INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2INT:MUX.IMUX.CLB.G3[2]~INT:BIPASS.SINGLE.H5.SINGLE.V5INT:MUX.IMUX.CLB.C3[1]~INT:PASS.SINGLE.V7.0.OUT.CLB.GYQ.E~INT:PASS.SINGLE.V4.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[0]
4 IOB1:I1MUX[0]IOB1:I2MUX[1]IOB1:I1MUX[1]IOB1:IFF_D[1]---------~INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.V1~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.1~INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.E.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.0INT:MUX.IMUX.IOB0.TS[7]~INT:PASS.SINGLE.H5.0.LONG.IO.V2~INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.H1.0.LONG.IO.V0~INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S~INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S~INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S~INT:PASS.DOUBLE.V0.0.0.OUT.CLB.GYQ.E~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V0.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.V1.0.OUT.LR.IOB1.I2~INT:PASS.SINGLE.V2.0.OUT.CLB.GY.E~INT:PASS.DOUBLE.V0.1.0.OUT.CLB.GY.E~INT:BUF.LONG.V0.0.SINGLE.H1.E~INT:PASS.SINGLE.H4.0.LONG.V3~INT:BUF.LONG.V3.0.SINGLE.H4~INT:PASS.SINGLE.V3.0.OUT.CLB.GYQ.E~INT:PASS.SINGLE.V5.0.OUT.LR.IOB1.I2~INT:PASS.DOUBLE.V1.0.0.OUT.LR.IOB1.I2~INT:BUF.LONG.H4.0.SINGLE.V5~INT:PASS.SINGLE.V6.0.OUT.CLB.GY.E~INT:PASS.DOUBLE.V1.1.0.OUT.LR.IOB0.I2
5 IOB0:I2MUX[1]IOB0:I1MUX[0]IOB0:I1MUX[1]IOB0:IFF_D[1]~IOB1:IFF_CE_ENABLE_NO_IQ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE-INT:MUX.IMUX.IOB0.OK[5]---~INT:BUF.LONG.H3.0.SINGLE.V4~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.2~INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.V1~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.2-~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1INT:MUX.LONG.IO.V0[1]~INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.E.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0INT:MUX.LONG.IO.V0[0]~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.0~INT:BIPASS.SINGLE.H0.E.SINGLE.V0~INT:BIPASS.SINGLE.H0.SINGLE.V0~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S~INT:BIPASS.SINGLE.H1.SINGLE.V1~INT:BIPASS.SINGLE.H1.SINGLE.H1.E~INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S~INT:PASS.SINGLE.H1.E.0.LONG.V0~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2~INT:BIPASS.SINGLE.H5.SINGLE.H5.E~INT:BIPASS.SINGLE.H5.E.SINGLE.V5~INT:BIPASS.SINGLE.H5.SINGLE.V5.S~INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S~INT:BIPASS.SINGLE.V5.SINGLE.V5.S~INT:PASS.SINGLE.V5.0.LONG.H4
6 IOB0:I2MUX[0]IOB0:IFF_D[0]~IOB0:INV.IFF_CLK~IOB0:IFF_SRVALIOB0:SYNC_DIOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOINT:MUX.IMUX.IOB0.OK[7]IOB0:PULL[1]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]-INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.V1INT:MUX.IMUX.IOB0.OK[6]~INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0~IOB1:OFF_CE_ENABLE~INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0-INT:MUX.LONG.H5[1]~INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.V1~INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB0.I2INT:MUX.LONG.H4[2]-~INT:PASS.SINGLE.V0.0.GND-~INT:BIPASS.SINGLE.H0.SINGLE.H0.E~INT:BIPASS.SINGLE.V0.SINGLE.V0.S~INT:BIPASS.SINGLE.H1.E.SINGLE.V1~INT:BUF.LONG.V4.0.SINGLE.H5~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0~INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2~INT:BUF.LONG.V2.0.SINGLE.H3.E~INT:BIPASS.SINGLE.H4.SINGLE.V4.S~INT:BIPASS.SINGLE.H4.SINGLE.H4.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S~INT:BIPASS.SINGLE.V4.SINGLE.V4.S~INT:BIPASS.SINGLE.H4.SINGLE.V4~INT:BUF.LONG.H5.0.SINGLE.V6
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[2]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5
8 ~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
9 ~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.LONG.IO.V1[2]-~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0-~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
IO.R bittile 1
RowColumn
012345678910111213141516171819202122232425262728293031323334
0 -----------------------------------
1 -----------------------------------
2 -----------------------------------
3 -----------------------------------
4 -----------------------------------
5 -----------------------------------
6 -----------------------------------
7 -------------------------~PULLUP.TBUF0:ENABLE---------
8 --------------------------~INT:BUF.LONG.H0.0.SINGLE.V1-~INT:PASS.SINGLE.V1.0.LONG.H0-~INT:BUF.LONG.H1.0.SINGLE.V2---~INT:PASS.SINGLE.V2.0.LONG.H1
9 ---------------------------------~INT:PASS.SINGLE.V3.0.LONG.H2.BUF-
IOB0:SLEW[0, 2, 9]
IOB1:SLEW[0, 0, 0]
FAST0
SLOW1
IOB0:MUX.OFF_D[0, 0, 7]
IOB1:MUX.OFF_D[0, 0, 2]
O0
CE1
IOB0:I1MUX[0, 2, 5][0, 1, 5]
IOB0:I2MUX[0, 0, 5][0, 0, 6]
IOB1:I1MUX[0, 2, 4][0, 0, 4]
IOB1:I2MUX[0, 1, 4][0, 0, 3]
I01
IQL10
IQ11
INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2[0, 29, 9]
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0[0, 27, 9]
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2[0, 28, 9]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0[0, 15, 9]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1[0, 13, 9]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2[0, 11, 9]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0[0, 23, 5]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1[0, 20, 5]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.2[0, 17, 5]
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0[0, 29, 7]
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2[0, 29, 8]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2[0, 33, 6]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0[0, 32, 6]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2[0, 33, 3]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0[0, 16, 4]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1[0, 15, 3]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.2[0, 14, 5]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0[0, 24, 9]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1[0, 22, 9]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2[0, 20, 9]
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0[0, 33, 5]
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2[0, 34, 5]
INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2[0, 27, 8]
INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2[0, 34, 3]
INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.E.2[0, 22, 5]
INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2[0, 14, 9]
INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.E.2[0, 15, 4]
INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2[0, 23, 9]
INT:BIPASS.SINGLE.H0.E.SINGLE.V0[0, 26, 5]
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S[0, 28, 5]
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.0[0, 25, 5]
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.2[0, 16, 5]
INT:BIPASS.SINGLE.H0.SINGLE.H0.E[0, 28, 6]
INT:BIPASS.SINGLE.H0.SINGLE.V0[0, 27, 5]
INT:BIPASS.SINGLE.H0.SINGLE.V0.S[0, 30, 3]
INT:BIPASS.SINGLE.H1.E.SINGLE.V1[0, 30, 6]
INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S[0, 31, 5]
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.1[0, 19, 5]
INT:BIPASS.SINGLE.H1.SINGLE.H1.E[0, 30, 5]
INT:BIPASS.SINGLE.H1.SINGLE.V1[0, 29, 5]
INT:BIPASS.SINGLE.H1.SINGLE.V1.S[0, 29, 3]
INT:BIPASS.SINGLE.H2.E.SINGLE.V2[0, 31, 9]
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S[0, 32, 9]
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0[0, 16, 9]
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2[0, 10, 9]
INT:BIPASS.SINGLE.H2.SINGLE.H2.E[0, 32, 8]
INT:BIPASS.SINGLE.H2.SINGLE.V2[0, 31, 8]
INT:BIPASS.SINGLE.H2.SINGLE.V2.S[0, 33, 8]
INT:BIPASS.SINGLE.H3.E.SINGLE.V3[0, 32, 7]
INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S[0, 33, 7]
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1[0, 12, 9]
INT:BIPASS.SINGLE.H3.SINGLE.H3.E[0, 31, 7]
INT:BIPASS.SINGLE.H3.SINGLE.V3[0, 28, 7]
INT:BIPASS.SINGLE.H3.SINGLE.V3.S[0, 30, 7]
INT:BIPASS.SINGLE.H4.E.SINGLE.V4[0, 39, 8]
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S[0, 37, 6]
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.0[0, 17, 4]
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.2[0, 13, 5]
INT:BIPASS.SINGLE.H4.SINGLE.H4.E[0, 36, 6]
INT:BIPASS.SINGLE.H4.SINGLE.V4[0, 39, 6]
INT:BIPASS.SINGLE.H4.SINGLE.V4.S[0, 35, 6]
INT:BIPASS.SINGLE.H5.E.SINGLE.V5[0, 36, 5]
INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S[0, 38, 5]
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.1[0, 14, 4]
INT:BIPASS.SINGLE.H5.SINGLE.H5.E[0, 35, 5]
INT:BIPASS.SINGLE.H5.SINGLE.V5[0, 36, 3]
INT:BIPASS.SINGLE.H5.SINGLE.V5.S[0, 37, 5]
INT:BIPASS.SINGLE.H6.E.SINGLE.V6[0, 34, 7]
INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S[0, 37, 7]
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0[0, 25, 9]
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2[0, 19, 9]
INT:BIPASS.SINGLE.H6.SINGLE.H6.E[0, 35, 7]
INT:BIPASS.SINGLE.H6.SINGLE.V6[0, 36, 8]
INT:BIPASS.SINGLE.H6.SINGLE.V6.S[0, 36, 7]
INT:BIPASS.SINGLE.H7.E.SINGLE.V7[0, 37, 9]
INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S[0, 39, 9]
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1[0, 21, 9]
INT:BIPASS.SINGLE.H7.SINGLE.H7.E[0, 38, 9]
INT:BIPASS.SINGLE.H7.SINGLE.V7[0, 35, 9]
INT:BIPASS.SINGLE.H7.SINGLE.V7.S[0, 37, 8]
INT:BIPASS.SINGLE.V0.SINGLE.V0.S[0, 29, 6]
INT:BIPASS.SINGLE.V1.SINGLE.V1.S[0, 31, 3]
INT:BIPASS.SINGLE.V2.SINGLE.V2.S[0, 30, 9]
INT:BIPASS.SINGLE.V3.SINGLE.V3.S[0, 27, 7]
INT:BIPASS.SINGLE.V4.SINGLE.V4.S[0, 38, 6]
INT:BIPASS.SINGLE.V5.SINGLE.V5.S[0, 39, 5]
INT:BIPASS.SINGLE.V6.SINGLE.V6.S[0, 38, 7]
INT:BIPASS.SINGLE.V7.SINGLE.V7.S[0, 36, 9]
INT:BUF.LONG.H0.0.SINGLE.V1[1, 26, 8]
INT:BUF.LONG.H1.0.SINGLE.V2[1, 30, 8]
INT:BUF.LONG.H2.0.SINGLE.V3[0, 27, 4]
INT:BUF.LONG.H3.0.SINGLE.V4[0, 12, 5]
INT:BUF.LONG.H4.0.SINGLE.V5[0, 38, 4]
INT:BUF.LONG.H5.0.SINGLE.V6[0, 40, 6]
INT:BUF.LONG.V0.0.SINGLE.H1.E[0, 32, 4]
INT:BUF.LONG.V1.0.SINGLE.H2.E[0, 38, 8]
INT:BUF.LONG.V2.0.SINGLE.H3.E[0, 34, 6]
INT:BUF.LONG.V3.0.SINGLE.H4[0, 34, 4]
INT:BUF.LONG.V4.0.SINGLE.H5[0, 31, 6]
INT:BUF.LONG.V5.0.SINGLE.H6[0, 35, 8]
INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1[0, 20, 7]
INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.S[0, 23, 7]
INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S[0, 23, 4]
INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB0.I2[0, 23, 6]
INT:PASS.DOUBLE.V0.0.0.OUT.CLB.GYQ.E[0, 26, 4]
INT:PASS.DOUBLE.V0.1.0.OUT.CLB.GY.E[0, 31, 4]
INT:PASS.DOUBLE.V1.0.0.OUT.LR.IOB1.I2[0, 37, 4]
INT:PASS.DOUBLE.V1.1.0.OUT.LR.IOB0.I2[0, 40, 4]
INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0[0, 19, 6]
INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.V1[0, 15, 5]
INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0[0, 16, 7]
INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.V1[0, 15, 6]
INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0[0, 17, 6]
INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.V1[0, 13, 4]
INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0[0, 17, 7]
INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.V1[0, 22, 6]
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S[0, 24, 4]
INT:PASS.SINGLE.H1.0.LONG.IO.V0[0, 22, 4]
INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2[0, 21, 4]
INT:PASS.SINGLE.H1.E.0.LONG.V0[0, 32, 5]
INT:PASS.SINGLE.H2.0.LONG.IO.V1[0, 13, 7]
INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1[0, 21, 7]
INT:PASS.SINGLE.H2.E.0.LONG.V1[0, 40, 9]
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S[0, 15, 8]
INT:PASS.SINGLE.H3.E.0.LONG.V2[0, 39, 7]
INT:PASS.SINGLE.H4.0.LONG.V3[0, 33, 4]
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S[0, 25, 4]
INT:PASS.SINGLE.H5.0.LONG.IO.V2[0, 19, 4]
INT:PASS.SINGLE.H5.0.LONG.V4[0, 27, 3]
INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2[0, 20, 4]
INT:PASS.SINGLE.H6.0.LONG.IO.V3[0, 17, 8]
INT:PASS.SINGLE.H6.0.LONG.V5[0, 34, 9]
INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1[0, 24, 8]
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S[0, 25, 8]
INT:PASS.SINGLE.V0.0.GND[0, 26, 6]
INT:PASS.SINGLE.V0.0.OUT.LR.IOB0.I2[0, 28, 4]
INT:PASS.SINGLE.V1.0.LONG.H0[1, 28, 8]
INT:PASS.SINGLE.V1.0.OUT.LR.IOB1.I2[0, 29, 4]
INT:PASS.SINGLE.V2.0.LONG.H1[1, 34, 8]
INT:PASS.SINGLE.V2.0.OUT.CLB.GY.E[0, 30, 4]
INT:PASS.SINGLE.V3.0.LONG.H2.BUF[1, 33, 9]
INT:PASS.SINGLE.V3.0.OUT.CLB.GYQ.E[0, 35, 4]
INT:PASS.SINGLE.V4.0.LONG.H3.BUF[0, 26, 7]
INT:PASS.SINGLE.V4.0.OUT.LR.IOB0.I2[0, 39, 3]
INT:PASS.SINGLE.V5.0.LONG.H4[0, 40, 5]
INT:PASS.SINGLE.V5.0.OUT.LR.IOB1.I2[0, 36, 4]
INT:PASS.SINGLE.V6.0.LONG.H5[0, 40, 7]
INT:PASS.SINGLE.V6.0.OUT.CLB.GY.E[0, 39, 4]
INT:PASS.SINGLE.V7.0.GND[0, 26, 9]
INT:PASS.SINGLE.V7.0.OUT.CLB.GYQ.E[0, 38, 3]
IOB0:IFF_CE_ENABLE[0, 18, 8]
IOB0:IFF_CE_ENABLE_NO_IQ[0, 5, 5]
IOB0:IFF_SRVAL[0, 3, 6]
IOB0:INV.IFF_CLK[0, 2, 6]
IOB0:INV.OFF_CLK[0, 1, 9]
IOB0:INV.OFF_D[0, 3, 7]
IOB0:INV.T[0, 0, 9]
IOB0:OFF_CE_ENABLE[0, 18, 9]
IOB0:OFF_SRVAL[0, 1, 7]
IOB0:READBACK_I1[0, 0, 8]
IOB0:READBACK_I2[0, 2, 8]
IOB0:READBACK_OFF[0, 3, 8]
IOB1:IFF_CE_ENABLE[0, 18, 7]
IOB1:IFF_CE_ENABLE_NO_IQ[0, 4, 5]
IOB1:IFF_SRVAL[0, 9, 3]
IOB1:INV.IFF_CLK[0, 2, 3]
IOB1:INV.OFF_CLK[0, 2, 0]
IOB1:INV.OFF_D[0, 1, 2]
IOB1:INV.T[0, 1, 0]
IOB1:OFF_CE_ENABLE[0, 18, 6]
IOB1:OFF_SRVAL[0, 1, 1]
IOB1:READBACK_I1[0, 4, 3]
IOB1:READBACK_I2[0, 3, 3]
IOB1:READBACK_OFF[0, 2, 2]
PULLUP.TBUF0:ENABLE[1, 25, 7]
PULLUP.TBUF1:ENABLE[0, 14, 7]
TBUF0:DRIVE1[0, 25, 3]
TBUF1:DRIVE1[0, 13, 3]
Inverted~[0]
IOB0:IFF_D[0, 3, 5][0, 1, 6]
IOB1:IFF_D[0, 3, 4][0, 1, 3]
DELAY00
MEDDELAY01
SYNC10
I11
IOB0:PULL[0, 8, 6][0, 2, 7]
IOB1:PULL[0, 0, 1][0, 2, 1]
PULLUP01
PULLDOWN10
NONE11
IOB0:5V_TOLERANT_IO[0, 6, 6]
IOB0:OFF_USED[0, 4, 7]
IOB1:5V_TOLERANT_IO[0, 5, 6]
IOB1:OFF_USED[0, 3, 2]
Non-inverted[0]
IOB0:OMUX[0, 4, 8][0, 1, 8][0, 3, 9][0, 4, 9]
IOB1:OMUX[0, 4, 1][0, 3, 1][0, 3, 0][0, 4, 0]
CE0000
CE.INV0001
OFF0010
O0111
MUX1011
O.INV1111
IOB0:SYNC_D[0, 4, 6]
IOB1:SYNC_D[0, 4, 2]
DELAY0
I1
IOB0:DRIVE[0, 6, 5]
IOB1:DRIVE[0, 5, 3]
240
121
INT:MUX.IMUX.IOB0.IK[0, 5, 7][0, 11, 7][0, 12, 7][0, 9, 7][0, 7, 7][0, 8, 7][0, 10, 7][0, 6, 7]
0.SINGLE.H300111111
0.SINGLE.H401011111
0.SINGLE.H501101111
0.GCLK001110111
0.GCLK101111011
0.GCLK201111101
0.GCLK301111110
0.SINGLE.H211111111
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
0.DOUBLE.H0.1001111
0.LONG.H3.BUF011011
0.LONG.H4011101
0.LONG.H5011110
0.DOUBLE.H1.0110111
GND111111
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0]
0.LONG.H00001
0.LONG.H10010
1.DOUBLE.H1.10101
0.LONG.H2.BUF0110
1.DOUBLE.H0.01011
GND1111
INT:MUX.IMUX.IOB1.OK[0, 5, 2][0, 7, 2][0, 8, 2][0, 12, 2][0, 6, 2][0, 13, 2][0, 14, 2][0, 9, 2]
0.GCLK000111111
0.GCLK101011111
0.GCLK201101111
0.GCLK301110111
1.SINGLE.H201111011
1.SINGLE.H301111101
1.SINGLE.H401111110
1.SINGLE.H511111111
INT:MUX.IMUX.IOB0.OK[0, 7, 6][0, 16, 6][0, 8, 5][0, 13, 6][0, 10, 6][0, 11, 6][0, 14, 6][0, 9, 6]
0.SINGLE.H200111111
0.SINGLE.H301011111
0.SINGLE.H501101111
0.GCLK001110111
0.GCLK101111011
0.GCLK201111101
0.GCLK301111110
0.SINGLE.H411111111
INT:MUX.LONG.H1[0, 10, 1][0, 11, 0][0, 10, 0]
0.LONG.IO.V1000
0.OUT.LR.IOB1.I2011
NONE111
INT:MUX.IO.DBUF.V1[0, 8, 8][0, 9, 8][0, 11, 8][0, 10, 8]
0.IO.DOUBLE.1.E.00011
0.IO.DOUBLE.2.E.00101
0.IO.DOUBLE.3.E.00110
0.IO.DOUBLE.0.E.01111
INT:MUX.IMUX.IOB1.IK[0, 5, 1][0, 7, 1][0, 7, 3][0, 11, 2][0, 6, 1][0, 8, 1][0, 10, 2][0, 11, 3]
0.GCLK000111111
0.GCLK101011111
0.GCLK201101111
0.GCLK301110111
1.SINGLE.H201111011
1.SINGLE.H401111101
1.SINGLE.H501111110
1.SINGLE.H311111111
INT:MUX.IMUX.TBUF1.I[0, 12, 0][0, 12, 1][0, 14, 1][0, 14, 0][0, 13, 0][0, 13, 1]
0.IO.DOUBLE.2.E.1000111
0.OUT.LR.IOB0.I2001011
0.LONG.IO.V1001101
0.IO.DOUBLE.2.E.2011111
0.IO.DOUBLE.3.E.1100111
0.IO.DOUBLE.3.E.2101011
0.OUT.LR.IOB1.I2101110
GND111111
INT:MUX.LONG.IO.V1[0, 12, 8][0, 8, 9][0, 13, 8][0, 14, 8]
0.LONG.H10001
0.LONG.H3.BUF0010
0.SINGLE.H20111
NONE1111
INT:MUX.LONG.IO.V3[0, 19, 8][0, 16, 8]
0.LONG.H500
0.SINGLE.H601
NONE11
INT:MUX.IMUX.TBUF1.TS[0, 15, 1][0, 15, 0][0, 18, 1][0, 16, 0][0, 17, 1]
0.IO.DOUBLE.1.E.100011
0.LONG.IO.V200101
VCC00110
0.IO.DOUBLE.0.E.101111
0.IO.DOUBLE.1.E.210011
0.LONG.IO.V310101
GND10110
0.IO.DOUBLE.0.E.211111
IOB0:TMUX[0, 17, 2]
IOB1:TMUX[0, 18, 3]
TFF0
T1
INT:MUX.IMUX.IOB1.TS[0, 16, 3][0, 23, 2][0, 17, 3][0, 14, 3][0, 25, 2][0, 16, 2][0, 15, 2][0, 18, 2]
0.LONG.IO.V100100111
0.LONG.IO.V300101011
0.GCLK000101101
0.IO.DOUBLE.0.E.100111111
0.LONG.IO.V001001011
0.IO.DOUBLE.0.E.201011111
GND01101110
0.IO.DOUBLE.1.E.211100111
0.LONG.IO.V211101011
0.IO.DOUBLE.1.E.111111111
INT:MUX.IMUX.TBUF0.TS[0, 17, 0][0, 20, 1][0, 20, 0][0, 19, 1][0, 19, 0]
0.IO.DOUBLE.0.E.200011
0.IO.DOUBLE.0.E.100111
0.LONG.IO.V301001
VCC01010
0.LONG.IO.V201101
GND01110
0.IO.DOUBLE.1.E.211011
0.IO.DOUBLE.1.E.111111
INT:MUX.LONG.H5[0, 15, 7][0, 21, 6][0, 19, 7]
0.LONG.IO.V3000
0.OUT.LR.IOB0.I2011
NONE111
INT:MUX.IMUX.TBUF0.I[0, 23, 1][0, 21, 0][0, 23, 0][0, 21, 1][0, 22, 0]
0.IO.DOUBLE.2.E.200011
0.OUT.LR.IOB0.I200101
0.LONG.IO.V200110
0.IO.DOUBLE.2.E.101111
0.IO.DOUBLE.3.E.110011
0.IO.DOUBLE.3.E.210101
0.OUT.LR.IOB1.I210110
GND11111
INT:MUX.IO.DBUF.V0[0, 21, 3][0, 24, 2][0, 22, 2][0, 22, 3]
0.IO.DOUBLE.0.E.20011
0.IO.DOUBLE.1.E.20101
0.IO.DOUBLE.3.E.20110
0.IO.DOUBLE.2.E.21111
INT:MUX.LONG.H4[0, 24, 6][0, 24, 7][0, 22, 7]
0.LONG.IO.V2000
0.OUT.LR.IOB0.I2011
NONE111
INT:MUX.LONG.IO.V2[0, 20, 8][0, 21, 8][0, 23, 8][0, 22, 8]
0.LONG.H2.BUF0001
0.LONG.H40010
0.SINGLE.H50111
NONE1111
INT:MUX.LONG.H0[0, 24, 1][0, 25, 1][0, 24, 0]
0.LONG.IO.V0000
0.OUT.LR.IOB1.I2011
NONE111
INT:MUX.IMUX.IOB0.TS[0, 18, 4][0, 19, 2][0, 19, 3][0, 21, 2][0, 20, 3][0, 23, 3][0, 20, 2][0, 24, 3]
0.LONG.IO.V300110011
0.LONG.IO.V100110101
0.GCLK000110110
0.IO.DOUBLE.0.E.100111111
0.IO.DOUBLE.1.E.201010011
0.LONG.IO.V201010101
0.IO.DOUBLE.0.E.201011111
0.LONG.IO.V001100011
0.IO.DOUBLE.1.E.101101111
GND11110111
INT:MUX.LONG.IO.V0[0, 21, 5][0, 24, 5]
0.LONG.H000
0.SINGLE.H101
NONE11
INT:MUX.IMUX.CLB.G1[0, 26, 0][0, 26, 3][0, 28, 0][0, 28, 1][0, 27, 1][0, 26, 1][0, 27, 0][0, 26, 2]
0.SINGLE.V000001111
0.SINGLE.V200010111
0.SINGLE.V400011101
0.LONG.V400101011
0.LONG.V300101110
0.SINGLE.V100110011
0.DOUBLE.V0.100110110
0.DOUBLE.V1.000111001
0.LONG.V000111100
0.SINGLE.V301101111
0.DOUBLE.V0.001110111
0.SINGLE.V701111101
0.DOUBLE.V1.110011111
0.LONG.V110111011
0.SINGLE.V510111110
0.SINGLE.V611111111
INT:MUX.IMUX.CLB.F1[0, 31, 2][0, 33, 0][0, 32, 1][0, 31, 0][0, 32, 3][0, 31, 1][0, 32, 0][0, 32, 2]
0.SINGLE.V300100111
0.LONG.V400101011
0.SINGLE.V700101110
0.SINGLE.V000111111
0.LONG.V301000111
0.DOUBLE.V1.001001011
0.LONG.V001001110
0.SINGLE.V101011111
0.SINGLE.V501100101
0.LONG.V101101001
0.SINGLE.V601101100
0.DOUBLE.V1.101111101
0.DOUBLE.V0.111100111
0.SINGLE.V411101011
0.DOUBLE.V0.011101110
0.SINGLE.V211111111
INT:MUX.IMUX.CLB.G3[0, 34, 0][0, 33, 2][0, 33, 1][0, 34, 2][0, 35, 0][0, 34, 1][0, 35, 2][0, 35, 3][0, 12, 3][0, 35, 1]
0.SINGLE.V00000111111
0.SINGLE.V20001011111
0.SINGLE.V40001110111
0.LONG.V40010101111
0.LONG.V20010111011
0.SINGLE.V10011001111
0.SINGLE.V60011011011
0.DOUBLE.V1.00011100111
0.LONG.V50011110011
0.GCLK00011111101
CIN0011111110
0.DOUBLE.V0.00110111111
0.SINGLE.V50111011111
0.DOUBLE.V0.10111110111
0.DOUBLE.V1.11001111111
0.LONG.V11011101111
0.SINGLE.V71011111011
0.SINGLE.V31111111111
INT:MUX.IMUX.CLB.C3[0, 36, 0][0, 36, 1][0, 37, 1][0, 37, 0][0, 36, 2][0, 37, 2][0, 37, 3][0, 38, 1]
0.SINGLE.V000001111
0.SINGLE.V200010111
0.GCLK200011110
0.SINGLE.V300101011
0.SINGLE.V700101101
0.DOUBLE.V0.000110011
0.DOUBLE.V0.100110101
0.LONG.V300111010
0.LONG.V200111100
0.DOUBLE.V1.101101111
0.SINGLE.V101110111
0.DOUBLE.V1.010011111
0.SINGLE.V510111011
0.SINGLE.V610111101
0.SINGLE.V411111111
INT:MUX.IMUX.CLB.F3[0, 38, 2][0, 40, 0][0, 39, 2][0, 40, 1][0, 38, 0][0, 39, 1][0, 40, 2][0, 39, 0][0, 40, 3]
0.SINGLE.V0000011111
0.DOUBLE.V0.0000111011
0.LONG.V2000111101
0.SINGLE.V3001111111
0.DOUBLE.V1.1010001111
0.LONG.V1010010111
0.DOUBLE.V1.0010101011
0.LONG.V5010101101
0.SINGLE.V4010110011
0.LONG.V4010110101
0.GCLK0010111110
0.SINGLE.V1011101111
0.SINGLE.V2011110111
0.SINGLE.V6110011111
0.DOUBLE.V0.1110111011
0.SINGLE.V5110111101
0.SINGLE.V7111111111

IO.R.T

IO.R.T bittile 0
RowColumn
012345678910111213141516171819202122232425262728293031323334353637383940
0 IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[0]--INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF0.TS[4]-INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]--INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
1 IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.LONG.H1[2]-INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[4]-INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[1]-INT:MUX.IMUX.TBUF0.I[4]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]--INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.CLB.G1[0]----INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.F1[0]INT:MUX.IMUX.CLB.G3[8]INT:MUX.IMUX.CLB.G3[6]INT:MUX.IMUX.CLB.G3[3]INT:MUX.IMUX.CLB.C3[3]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.F3[2]
3 IOB1:I2MUX[0]IOB1:IFF_D[0]~IOB1:INV.IFF_CLK~IOB1:READBACK_I2~IOB1:READBACK_I1IOB1:DRIVE-INT:MUX.IMUX.IOB1.IK[5]-~IOB1:IFF_SRVAL-INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.CLB.G3[1]~TBUF1:DRIVE1INT:MUX.IMUX.IOB1.TS[4]~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IMUX.IOB1.TS[5]IOB1:TMUXINT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IO.DBUF.V0[3]INT:MUX.IO.DBUF.V0[0]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[0]~TBUF0:DRIVE1INT:MUX.IMUX.CLB.G1[6]~INT:PASS.SINGLE.H5.0.LONG.V4-~INT:BIPASS.SINGLE.H1.SINGLE.V1.S~INT:BIPASS.SINGLE.H0.SINGLE.V0.S~INT:BIPASS.SINGLE.V1.SINGLE.V1.SINT:MUX.IMUX.CLB.F1[3]~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2~INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2INT:MUX.IMUX.CLB.G3[2]~INT:BIPASS.SINGLE.H5.SINGLE.V5INT:MUX.IMUX.CLB.C3[1]~INT:PASS.SINGLE.V7.0.OUT.CLB.GYQ.E~INT:PASS.SINGLE.V4.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[0]
4 IOB1:I1MUX[0]IOB1:I2MUX[1]IOB1:I1MUX[1]IOB1:IFF_D[1]---------~INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.V1~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.1~INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.E.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.0INT:MUX.IMUX.IOB0.TS[7]~INT:PASS.SINGLE.H5.0.LONG.IO.V2~INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.H1.0.LONG.IO.V0~INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S~INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S~INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S~INT:PASS.DOUBLE.V0.0.0.OUT.CLB.GYQ.E~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V0.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.V1.0.OUT.LR.IOB1.I2~INT:PASS.SINGLE.V2.0.OUT.CLB.GY.E~INT:PASS.DOUBLE.V0.1.0.OUT.CLB.GY.E~INT:BUF.LONG.V0.0.SINGLE.H1.E~INT:PASS.SINGLE.H4.0.LONG.V3~INT:BUF.LONG.V3.0.SINGLE.H4~INT:PASS.SINGLE.V3.0.OUT.CLB.GYQ.E~INT:PASS.SINGLE.V5.0.OUT.LR.IOB1.I2~INT:PASS.DOUBLE.V1.0.0.OUT.LR.IOB1.I2~INT:BUF.LONG.H4.0.SINGLE.V5~INT:PASS.SINGLE.V6.0.OUT.CLB.GY.E~INT:PASS.DOUBLE.V1.1.0.OUT.LR.IOB0.I2
5 IOB0:I2MUX[1]IOB0:I1MUX[0]IOB0:I1MUX[1]IOB0:IFF_D[1]~IOB1:IFF_CE_ENABLE_NO_IQ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE-INT:MUX.IMUX.IOB0.OK[5]---~INT:BUF.LONG.H3.0.SINGLE.V4~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.2~INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.V1~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.2-~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1INT:MUX.LONG.IO.V0[1]~INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.E.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0INT:MUX.LONG.IO.V0[0]~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.0~INT:BIPASS.SINGLE.H0.E.SINGLE.V0~INT:BIPASS.SINGLE.H0.SINGLE.V0~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S~INT:BIPASS.SINGLE.H1.SINGLE.V1~INT:BIPASS.SINGLE.H1.SINGLE.H1.E~INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S~INT:PASS.SINGLE.H1.E.0.LONG.V0~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2~INT:BIPASS.SINGLE.H5.SINGLE.H5.E~INT:BIPASS.SINGLE.H5.E.SINGLE.V5~INT:BIPASS.SINGLE.H5.SINGLE.V5.S~INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S~INT:BIPASS.SINGLE.V5.SINGLE.V5.S~INT:PASS.SINGLE.V5.0.LONG.H4
6 IOB0:I2MUX[0]IOB0:IFF_D[0]~IOB0:INV.IFF_CLK~IOB0:IFF_SRVALIOB0:SYNC_DIOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOINT:MUX.IMUX.IOB0.OK[7]IOB0:PULL[1]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]-INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.V1INT:MUX.IMUX.IOB0.OK[6]~INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0~IOB1:OFF_CE_ENABLE~INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0-INT:MUX.LONG.H5[1]~INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.V1~INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB0.I2INT:MUX.LONG.H4[2]-~INT:PASS.SINGLE.V0.0.GND-~INT:BIPASS.SINGLE.H0.SINGLE.H0.E~INT:BIPASS.SINGLE.V0.SINGLE.V0.S~INT:BIPASS.SINGLE.H1.E.SINGLE.V1~INT:BUF.LONG.V4.0.SINGLE.H5~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0~INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2~INT:BUF.LONG.V2.0.SINGLE.H3.E~INT:BIPASS.SINGLE.H4.SINGLE.V4.S~INT:BIPASS.SINGLE.H4.SINGLE.H4.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S~INT:BIPASS.SINGLE.V4.SINGLE.V4.S~INT:BIPASS.SINGLE.H4.SINGLE.V4~INT:BUF.LONG.H5.0.SINGLE.V6
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[2]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5
8 ~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
9 ~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.LONG.IO.V1[2]-~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0-~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
IO.R.T bittile 1
RowColumn
012345678910111213141516171819202122232425262728293031323334
0 -----------------------------------
1 -----------------------------------
2 -----------------------------------
3 -----------------------------------
4 -----------------------------------
5 -----------------------------------
6 -----------------------------------
7 -------------------------~PULLUP.TBUF0:ENABLE---------
8 --------------------------~INT:BUF.LONG.H0.0.SINGLE.V1-~INT:PASS.SINGLE.V1.0.LONG.H0-~INT:BUF.LONG.H1.0.SINGLE.V2---~INT:PASS.SINGLE.V2.0.LONG.H1
9 ---------------------------------~INT:PASS.SINGLE.V3.0.LONG.H2.BUF-
IOB0:SLEW[0, 2, 9]
IOB1:SLEW[0, 0, 0]
FAST0
SLOW1
IOB0:MUX.OFF_D[0, 0, 7]
IOB1:MUX.OFF_D[0, 0, 2]
O0
CE1
IOB0:I1MUX[0, 2, 5][0, 1, 5]
IOB0:I2MUX[0, 0, 5][0, 0, 6]
IOB1:I1MUX[0, 2, 4][0, 0, 4]
IOB1:I2MUX[0, 1, 4][0, 0, 3]
I01
IQL10
IQ11
INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2[0, 29, 9]
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0[0, 27, 9]
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2[0, 28, 9]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0[0, 15, 9]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1[0, 13, 9]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2[0, 11, 9]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0[0, 23, 5]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1[0, 20, 5]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.2[0, 17, 5]
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0[0, 29, 7]
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2[0, 29, 8]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2[0, 33, 6]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0[0, 32, 6]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2[0, 33, 3]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0[0, 16, 4]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1[0, 15, 3]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.2[0, 14, 5]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0[0, 24, 9]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1[0, 22, 9]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2[0, 20, 9]
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0[0, 33, 5]
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2[0, 34, 5]
INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2[0, 27, 8]
INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2[0, 34, 3]
INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.E.2[0, 22, 5]
INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2[0, 14, 9]
INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.E.2[0, 15, 4]
INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2[0, 23, 9]
INT:BIPASS.SINGLE.H0.E.SINGLE.V0[0, 26, 5]
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S[0, 28, 5]
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.0[0, 25, 5]
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.2[0, 16, 5]
INT:BIPASS.SINGLE.H0.SINGLE.H0.E[0, 28, 6]
INT:BIPASS.SINGLE.H0.SINGLE.V0[0, 27, 5]
INT:BIPASS.SINGLE.H0.SINGLE.V0.S[0, 30, 3]
INT:BIPASS.SINGLE.H1.E.SINGLE.V1[0, 30, 6]
INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S[0, 31, 5]
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.1[0, 19, 5]
INT:BIPASS.SINGLE.H1.SINGLE.H1.E[0, 30, 5]
INT:BIPASS.SINGLE.H1.SINGLE.V1[0, 29, 5]
INT:BIPASS.SINGLE.H1.SINGLE.V1.S[0, 29, 3]
INT:BIPASS.SINGLE.H2.E.SINGLE.V2[0, 31, 9]
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S[0, 32, 9]
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0[0, 16, 9]
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2[0, 10, 9]
INT:BIPASS.SINGLE.H2.SINGLE.H2.E[0, 32, 8]
INT:BIPASS.SINGLE.H2.SINGLE.V2[0, 31, 8]
INT:BIPASS.SINGLE.H2.SINGLE.V2.S[0, 33, 8]
INT:BIPASS.SINGLE.H3.E.SINGLE.V3[0, 32, 7]
INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S[0, 33, 7]
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1[0, 12, 9]
INT:BIPASS.SINGLE.H3.SINGLE.H3.E[0, 31, 7]
INT:BIPASS.SINGLE.H3.SINGLE.V3[0, 28, 7]
INT:BIPASS.SINGLE.H3.SINGLE.V3.S[0, 30, 7]
INT:BIPASS.SINGLE.H4.E.SINGLE.V4[0, 39, 8]
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S[0, 37, 6]
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.0[0, 17, 4]
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.2[0, 13, 5]
INT:BIPASS.SINGLE.H4.SINGLE.H4.E[0, 36, 6]
INT:BIPASS.SINGLE.H4.SINGLE.V4[0, 39, 6]
INT:BIPASS.SINGLE.H4.SINGLE.V4.S[0, 35, 6]
INT:BIPASS.SINGLE.H5.E.SINGLE.V5[0, 36, 5]
INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S[0, 38, 5]
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.1[0, 14, 4]
INT:BIPASS.SINGLE.H5.SINGLE.H5.E[0, 35, 5]
INT:BIPASS.SINGLE.H5.SINGLE.V5[0, 36, 3]
INT:BIPASS.SINGLE.H5.SINGLE.V5.S[0, 37, 5]
INT:BIPASS.SINGLE.H6.E.SINGLE.V6[0, 34, 7]
INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S[0, 37, 7]
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0[0, 25, 9]
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2[0, 19, 9]
INT:BIPASS.SINGLE.H6.SINGLE.H6.E[0, 35, 7]
INT:BIPASS.SINGLE.H6.SINGLE.V6[0, 36, 8]
INT:BIPASS.SINGLE.H6.SINGLE.V6.S[0, 36, 7]
INT:BIPASS.SINGLE.H7.E.SINGLE.V7[0, 37, 9]
INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S[0, 39, 9]
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1[0, 21, 9]
INT:BIPASS.SINGLE.H7.SINGLE.H7.E[0, 38, 9]
INT:BIPASS.SINGLE.H7.SINGLE.V7[0, 35, 9]
INT:BIPASS.SINGLE.H7.SINGLE.V7.S[0, 37, 8]
INT:BIPASS.SINGLE.V0.SINGLE.V0.S[0, 29, 6]
INT:BIPASS.SINGLE.V1.SINGLE.V1.S[0, 31, 3]
INT:BIPASS.SINGLE.V2.SINGLE.V2.S[0, 30, 9]
INT:BIPASS.SINGLE.V3.SINGLE.V3.S[0, 27, 7]
INT:BIPASS.SINGLE.V4.SINGLE.V4.S[0, 38, 6]
INT:BIPASS.SINGLE.V5.SINGLE.V5.S[0, 39, 5]
INT:BIPASS.SINGLE.V6.SINGLE.V6.S[0, 38, 7]
INT:BIPASS.SINGLE.V7.SINGLE.V7.S[0, 36, 9]
INT:BUF.LONG.H0.0.SINGLE.V1[1, 26, 8]
INT:BUF.LONG.H1.0.SINGLE.V2[1, 30, 8]
INT:BUF.LONG.H2.0.SINGLE.V3[0, 27, 4]
INT:BUF.LONG.H3.0.SINGLE.V4[0, 12, 5]
INT:BUF.LONG.H4.0.SINGLE.V5[0, 38, 4]
INT:BUF.LONG.H5.0.SINGLE.V6[0, 40, 6]
INT:BUF.LONG.V0.0.SINGLE.H1.E[0, 32, 4]
INT:BUF.LONG.V1.0.SINGLE.H2.E[0, 38, 8]
INT:BUF.LONG.V2.0.SINGLE.H3.E[0, 34, 6]
INT:BUF.LONG.V3.0.SINGLE.H4[0, 34, 4]
INT:BUF.LONG.V4.0.SINGLE.H5[0, 31, 6]
INT:BUF.LONG.V5.0.SINGLE.H6[0, 35, 8]
INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1[0, 20, 7]
INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.S[0, 23, 7]
INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S[0, 23, 4]
INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB0.I2[0, 23, 6]
INT:PASS.DOUBLE.V0.0.0.OUT.CLB.GYQ.E[0, 26, 4]
INT:PASS.DOUBLE.V0.1.0.OUT.CLB.GY.E[0, 31, 4]
INT:PASS.DOUBLE.V1.0.0.OUT.LR.IOB1.I2[0, 37, 4]
INT:PASS.DOUBLE.V1.1.0.OUT.LR.IOB0.I2[0, 40, 4]
INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0[0, 19, 6]
INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.V1[0, 15, 5]
INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0[0, 16, 7]
INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.V1[0, 15, 6]
INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0[0, 17, 6]
INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.V1[0, 13, 4]
INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0[0, 17, 7]
INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.V1[0, 22, 6]
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S[0, 24, 4]
INT:PASS.SINGLE.H1.0.LONG.IO.V0[0, 22, 4]
INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2[0, 21, 4]
INT:PASS.SINGLE.H1.E.0.LONG.V0[0, 32, 5]
INT:PASS.SINGLE.H2.0.LONG.IO.V1[0, 13, 7]
INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1[0, 21, 7]
INT:PASS.SINGLE.H2.E.0.LONG.V1[0, 40, 9]
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S[0, 15, 8]
INT:PASS.SINGLE.H3.E.0.LONG.V2[0, 39, 7]
INT:PASS.SINGLE.H4.0.LONG.V3[0, 33, 4]
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S[0, 25, 4]
INT:PASS.SINGLE.H5.0.LONG.IO.V2[0, 19, 4]
INT:PASS.SINGLE.H5.0.LONG.V4[0, 27, 3]
INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2[0, 20, 4]
INT:PASS.SINGLE.H6.0.LONG.IO.V3[0, 17, 8]
INT:PASS.SINGLE.H6.0.LONG.V5[0, 34, 9]
INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1[0, 24, 8]
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S[0, 25, 8]
INT:PASS.SINGLE.V0.0.GND[0, 26, 6]
INT:PASS.SINGLE.V0.0.OUT.LR.IOB0.I2[0, 28, 4]
INT:PASS.SINGLE.V1.0.LONG.H0[1, 28, 8]
INT:PASS.SINGLE.V1.0.OUT.LR.IOB1.I2[0, 29, 4]
INT:PASS.SINGLE.V2.0.LONG.H1[1, 34, 8]
INT:PASS.SINGLE.V2.0.OUT.CLB.GY.E[0, 30, 4]
INT:PASS.SINGLE.V3.0.LONG.H2.BUF[1, 33, 9]
INT:PASS.SINGLE.V3.0.OUT.CLB.GYQ.E[0, 35, 4]
INT:PASS.SINGLE.V4.0.LONG.H3.BUF[0, 26, 7]
INT:PASS.SINGLE.V4.0.OUT.LR.IOB0.I2[0, 39, 3]
INT:PASS.SINGLE.V5.0.LONG.H4[0, 40, 5]
INT:PASS.SINGLE.V5.0.OUT.LR.IOB1.I2[0, 36, 4]
INT:PASS.SINGLE.V6.0.LONG.H5[0, 40, 7]
INT:PASS.SINGLE.V6.0.OUT.CLB.GY.E[0, 39, 4]
INT:PASS.SINGLE.V7.0.GND[0, 26, 9]
INT:PASS.SINGLE.V7.0.OUT.CLB.GYQ.E[0, 38, 3]
IOB0:IFF_CE_ENABLE[0, 18, 8]
IOB0:IFF_CE_ENABLE_NO_IQ[0, 5, 5]
IOB0:IFF_SRVAL[0, 3, 6]
IOB0:INV.IFF_CLK[0, 2, 6]
IOB0:INV.OFF_CLK[0, 1, 9]
IOB0:INV.OFF_D[0, 3, 7]
IOB0:INV.T[0, 0, 9]
IOB0:OFF_CE_ENABLE[0, 18, 9]
IOB0:OFF_SRVAL[0, 1, 7]
IOB0:READBACK_I1[0, 0, 8]
IOB0:READBACK_I2[0, 2, 8]
IOB0:READBACK_OFF[0, 3, 8]
IOB1:IFF_CE_ENABLE[0, 18, 7]
IOB1:IFF_CE_ENABLE_NO_IQ[0, 4, 5]
IOB1:IFF_SRVAL[0, 9, 3]
IOB1:INV.IFF_CLK[0, 2, 3]
IOB1:INV.OFF_CLK[0, 2, 0]
IOB1:INV.OFF_D[0, 1, 2]
IOB1:INV.T[0, 1, 0]
IOB1:OFF_CE_ENABLE[0, 18, 6]
IOB1:OFF_SRVAL[0, 1, 1]
IOB1:READBACK_I1[0, 4, 3]
IOB1:READBACK_I2[0, 3, 3]
IOB1:READBACK_OFF[0, 2, 2]
PULLUP.TBUF0:ENABLE[1, 25, 7]
PULLUP.TBUF1:ENABLE[0, 14, 7]
TBUF0:DRIVE1[0, 25, 3]
TBUF1:DRIVE1[0, 13, 3]
Inverted~[0]
IOB0:IFF_D[0, 3, 5][0, 1, 6]
IOB1:IFF_D[0, 3, 4][0, 1, 3]
DELAY00
MEDDELAY01
SYNC10
I11
IOB0:PULL[0, 8, 6][0, 2, 7]
IOB1:PULL[0, 0, 1][0, 2, 1]
PULLUP01
PULLDOWN10
NONE11
IOB0:5V_TOLERANT_IO[0, 6, 6]
IOB0:OFF_USED[0, 4, 7]
IOB1:5V_TOLERANT_IO[0, 5, 6]
IOB1:OFF_USED[0, 3, 2]
Non-inverted[0]
IOB0:OMUX[0, 4, 8][0, 1, 8][0, 3, 9][0, 4, 9]
IOB1:OMUX[0, 4, 1][0, 3, 1][0, 3, 0][0, 4, 0]
CE0000
CE.INV0001
OFF0010
O0111
MUX1011
O.INV1111
IOB0:SYNC_D[0, 4, 6]
IOB1:SYNC_D[0, 4, 2]
DELAY0
I1
IOB0:DRIVE[0, 6, 5]
IOB1:DRIVE[0, 5, 3]
240
121
INT:MUX.IMUX.IOB0.IK[0, 5, 7][0, 11, 7][0, 12, 7][0, 9, 7][0, 7, 7][0, 8, 7][0, 10, 7][0, 6, 7]
0.SINGLE.H300111111
0.SINGLE.H401011111
0.SINGLE.H501101111
0.GCLK001110111
0.GCLK101111011
0.GCLK201111101
0.GCLK301111110
0.SINGLE.H211111111
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
0.DOUBLE.H0.1001111
0.LONG.H3.BUF011011
0.LONG.H4011101
0.LONG.H5011110
0.DOUBLE.H1.0110111
GND111111
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0]
0.LONG.H00001
0.LONG.H10010
1.DOUBLE.H1.10101
0.LONG.H2.BUF0110
1.DOUBLE.H0.01011
GND1111
INT:MUX.IMUX.IOB1.OK[0, 5, 2][0, 7, 2][0, 8, 2][0, 12, 2][0, 6, 2][0, 13, 2][0, 14, 2][0, 9, 2]
0.GCLK000111111
0.GCLK101011111
0.GCLK201101111
0.GCLK301110111
1.SINGLE.H201111011
1.SINGLE.H301111101
1.SINGLE.H401111110
1.SINGLE.H511111111
INT:MUX.IMUX.IOB0.OK[0, 7, 6][0, 16, 6][0, 8, 5][0, 13, 6][0, 10, 6][0, 11, 6][0, 14, 6][0, 9, 6]
0.SINGLE.H200111111
0.SINGLE.H301011111
0.SINGLE.H501101111
0.GCLK001110111
0.GCLK101111011
0.GCLK201111101
0.GCLK301111110
0.SINGLE.H411111111
INT:MUX.LONG.H1[0, 10, 1][0, 11, 0][0, 10, 0]
0.LONG.IO.V1000
0.OUT.LR.IOB1.I2011
NONE111
INT:MUX.IO.DBUF.V1[0, 8, 8][0, 9, 8][0, 11, 8][0, 10, 8]
0.IO.DOUBLE.1.E.00011
0.IO.DOUBLE.2.E.00101
0.IO.DOUBLE.3.E.00110
0.IO.DOUBLE.0.E.01111
INT:MUX.IMUX.IOB1.IK[0, 5, 1][0, 7, 1][0, 7, 3][0, 11, 2][0, 6, 1][0, 8, 1][0, 10, 2][0, 11, 3]
0.GCLK000111111
0.GCLK101011111
0.GCLK201101111
0.GCLK301110111
1.SINGLE.H201111011
1.SINGLE.H401111101
1.SINGLE.H501111110
1.SINGLE.H311111111
INT:MUX.IMUX.TBUF1.I[0, 12, 0][0, 12, 1][0, 14, 1][0, 14, 0][0, 13, 0][0, 13, 1]
0.IO.DOUBLE.2.E.1000111
0.OUT.LR.IOB0.I2001011
0.LONG.IO.V1001101
0.IO.DOUBLE.2.E.2011111
0.IO.DOUBLE.3.E.1100111
0.IO.DOUBLE.3.E.2101011
0.OUT.LR.IOB1.I2101110
GND111111
INT:MUX.LONG.IO.V1[0, 12, 8][0, 8, 9][0, 13, 8][0, 14, 8]
0.LONG.H10001
0.LONG.H3.BUF0010
0.SINGLE.H20111
NONE1111
INT:MUX.LONG.IO.V3[0, 19, 8][0, 16, 8]
0.LONG.H500
0.SINGLE.H601
NONE11
INT:MUX.IMUX.TBUF1.TS[0, 15, 1][0, 15, 0][0, 18, 1][0, 16, 0][0, 17, 1]
0.IO.DOUBLE.1.E.100011
0.LONG.IO.V200101
VCC00110
0.IO.DOUBLE.0.E.101111
0.IO.DOUBLE.1.E.210011
0.LONG.IO.V310101
GND10110
0.IO.DOUBLE.0.E.211111
IOB0:TMUX[0, 17, 2]
IOB1:TMUX[0, 18, 3]
TFF0
T1
INT:MUX.IMUX.IOB1.TS[0, 16, 3][0, 23, 2][0, 17, 3][0, 14, 3][0, 25, 2][0, 16, 2][0, 15, 2][0, 18, 2]
0.LONG.IO.V100100111
0.LONG.IO.V300101011
0.GCLK000101101
0.IO.DOUBLE.0.E.100111111
0.LONG.IO.V001001011
0.IO.DOUBLE.0.E.201011111
GND01101110
0.IO.DOUBLE.1.E.211100111
0.LONG.IO.V211101011
0.IO.DOUBLE.1.E.111111111
INT:MUX.IMUX.TBUF0.TS[0, 17, 0][0, 20, 1][0, 20, 0][0, 19, 1][0, 19, 0]
0.IO.DOUBLE.0.E.200011
0.IO.DOUBLE.0.E.100111
0.LONG.IO.V301001
VCC01010
0.LONG.IO.V201101
GND01110
0.IO.DOUBLE.1.E.211011
0.IO.DOUBLE.1.E.111111
INT:MUX.LONG.H5[0, 15, 7][0, 21, 6][0, 19, 7]
0.LONG.IO.V3000
0.OUT.LR.IOB0.I2011
NONE111
INT:MUX.IMUX.TBUF0.I[0, 23, 1][0, 21, 0][0, 23, 0][0, 21, 1][0, 22, 0]
0.IO.DOUBLE.2.E.200011
0.OUT.LR.IOB0.I200101
0.LONG.IO.V200110
0.IO.DOUBLE.2.E.101111
0.IO.DOUBLE.3.E.110011
0.IO.DOUBLE.3.E.210101
0.OUT.LR.IOB1.I210110
GND11111
INT:MUX.IO.DBUF.V0[0, 21, 3][0, 24, 2][0, 22, 2][0, 22, 3]
0.IO.DOUBLE.0.E.20011
0.IO.DOUBLE.1.E.20101
0.IO.DOUBLE.3.E.20110
0.IO.DOUBLE.2.E.21111
INT:MUX.LONG.H4[0, 24, 6][0, 24, 7][0, 22, 7]
0.LONG.IO.V2000
0.OUT.LR.IOB0.I2011
NONE111
INT:MUX.LONG.IO.V2[0, 20, 8][0, 21, 8][0, 23, 8][0, 22, 8]
0.LONG.H2.BUF0001
0.LONG.H40010
0.SINGLE.H50111
NONE1111
INT:MUX.LONG.H0[0, 24, 1][0, 25, 1][0, 24, 0]
0.LONG.IO.V0000
0.OUT.LR.IOB1.I2011
NONE111
INT:MUX.IMUX.IOB0.TS[0, 18, 4][0, 19, 2][0, 19, 3][0, 21, 2][0, 20, 3][0, 23, 3][0, 20, 2][0, 24, 3]
0.LONG.IO.V300110011
0.LONG.IO.V100110101
0.GCLK000110110
0.IO.DOUBLE.0.E.100111111
0.IO.DOUBLE.1.E.201010011
0.LONG.IO.V201010101
0.IO.DOUBLE.0.E.201011111
0.LONG.IO.V001100011
0.IO.DOUBLE.1.E.101101111
GND11110111
INT:MUX.LONG.IO.V0[0, 21, 5][0, 24, 5]
0.LONG.H000
0.SINGLE.H101
NONE11
INT:MUX.IMUX.CLB.G1[0, 26, 0][0, 26, 3][0, 28, 0][0, 28, 1][0, 27, 1][0, 26, 1][0, 27, 0][0, 26, 2]
0.SINGLE.V000001111
0.SINGLE.V200010111
0.SINGLE.V400011101
0.LONG.V400101011
0.LONG.V300101110
0.SINGLE.V100110011
0.DOUBLE.V0.100110110
0.DOUBLE.V1.000111001
0.LONG.V000111100
0.SINGLE.V301101111
0.DOUBLE.V0.001110111
0.SINGLE.V701111101
0.DOUBLE.V1.110011111
0.LONG.V110111011
0.SINGLE.V510111110
0.SINGLE.V611111111
INT:MUX.IMUX.CLB.F1[0, 31, 2][0, 33, 0][0, 32, 1][0, 31, 0][0, 32, 3][0, 31, 1][0, 32, 0][0, 32, 2]
0.SINGLE.V300100111
0.LONG.V400101011
0.SINGLE.V700101110
0.SINGLE.V000111111
0.LONG.V301000111
0.DOUBLE.V1.001001011
0.LONG.V001001110
0.SINGLE.V101011111
0.SINGLE.V501100101
0.LONG.V101101001
0.SINGLE.V601101100
0.DOUBLE.V1.101111101
0.DOUBLE.V0.111100111
0.SINGLE.V411101011
0.DOUBLE.V0.011101110
0.SINGLE.V211111111
INT:MUX.IMUX.CLB.G3[0, 34, 0][0, 33, 2][0, 33, 1][0, 34, 2][0, 35, 0][0, 34, 1][0, 35, 2][0, 35, 3][0, 12, 3][0, 35, 1]
0.SINGLE.V00000111111
0.SINGLE.V20001011111
0.SINGLE.V40001110111
0.LONG.V40010101111
0.LONG.V20010111011
0.SINGLE.V10011001111
0.SINGLE.V60011011011
0.DOUBLE.V1.00011100111
0.LONG.V50011110011
0.GCLK00011111101
CIN0011111110
0.DOUBLE.V0.00110111111
0.SINGLE.V50111011111
0.DOUBLE.V0.10111110111
0.DOUBLE.V1.11001111111
0.LONG.V11011101111
0.SINGLE.V71011111011
0.SINGLE.V31111111111
INT:MUX.IMUX.CLB.C3[0, 36, 0][0, 36, 1][0, 37, 1][0, 37, 0][0, 36, 2][0, 37, 2][0, 37, 3][0, 38, 1]
0.SINGLE.V000001111
0.SINGLE.V200010111
0.GCLK200011110
0.SINGLE.V300101011
0.SINGLE.V700101101
0.DOUBLE.V0.000110011
0.DOUBLE.V0.100110101
0.LONG.V300111010
0.LONG.V200111100
0.DOUBLE.V1.101101111
0.SINGLE.V101110111
0.DOUBLE.V1.010011111
0.SINGLE.V510111011
0.SINGLE.V610111101
0.SINGLE.V411111111
INT:MUX.IMUX.CLB.F3[0, 38, 2][0, 40, 0][0, 39, 2][0, 40, 1][0, 38, 0][0, 39, 1][0, 40, 2][0, 39, 0][0, 40, 3]
0.SINGLE.V0000011111
0.DOUBLE.V0.0000111011
0.LONG.V2000111101
0.SINGLE.V3001111111
0.DOUBLE.V1.1010001111
0.LONG.V1010010111
0.DOUBLE.V1.0010101011
0.LONG.V5010101101
0.SINGLE.V4010110011
0.LONG.V4010110101
0.GCLK0010111110
0.SINGLE.V1011101111
0.SINGLE.V2011110111
0.SINGLE.V6110011111
0.DOUBLE.V0.1110111011
0.SINGLE.V5110111101
0.SINGLE.V7111111111

IO.RS

IO.RS bittile 0
RowColumn
012345678910111213141516171819202122232425262728293031323334353637383940
0 IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[0]--INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF0.TS[4]-INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]--INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
1 IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.LONG.H1[2]-INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[4]-INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[1]-INT:MUX.IMUX.TBUF0.I[4]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]--INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.CLB.G1[0]----INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.F1[0]INT:MUX.IMUX.CLB.G3[8]INT:MUX.IMUX.CLB.G3[6]INT:MUX.IMUX.CLB.G3[3]INT:MUX.IMUX.CLB.C3[3]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.F3[2]
3 IOB1:I2MUX[0]IOB1:IFF_D[0]~IOB1:INV.IFF_CLK~IOB1:READBACK_I2~IOB1:READBACK_I1IOB1:DRIVE-INT:MUX.IMUX.IOB1.IK[5]-~IOB1:IFF_SRVAL-INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.CLB.G3[1]~TBUF1:DRIVE1INT:MUX.IMUX.IOB1.TS[4]~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IMUX.IOB1.TS[5]IOB1:TMUXINT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IO.DBUF.V0[3]INT:MUX.IO.DBUF.V0[0]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[0]~TBUF0:DRIVE1INT:MUX.IMUX.CLB.G1[6]~INT:PASS.SINGLE.H5.0.LONG.V4-~INT:BIPASS.SINGLE.H1.SINGLE.V1.S~INT:BIPASS.SINGLE.H0.SINGLE.V0.S~INT:BIPASS.SINGLE.V1.SINGLE.V1.SINT:MUX.IMUX.CLB.F1[3]~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2~INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2INT:MUX.IMUX.CLB.G3[2]~INT:BIPASS.SINGLE.H5.SINGLE.V5INT:MUX.IMUX.CLB.C3[1]~INT:PASS.SINGLE.V7.0.OUT.CLB.GYQ.E~INT:PASS.SINGLE.V4.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[0]
4 IOB1:I1MUX[0]IOB1:I2MUX[1]IOB1:I1MUX[1]IOB1:IFF_D[1]---------~INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.V1~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.1~INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.E.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.0INT:MUX.IMUX.IOB0.TS[7]~INT:PASS.SINGLE.H5.0.LONG.IO.V2~INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.H1.0.LONG.IO.V0~INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S~INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S~INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S~INT:PASS.DOUBLE.V0.0.0.OUT.CLB.GYQ.E~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V0.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.V1.0.OUT.LR.IOB1.I2~INT:PASS.SINGLE.V2.0.OUT.CLB.GY.E~INT:PASS.DOUBLE.V0.1.0.OUT.CLB.GY.E~INT:BUF.LONG.V0.0.SINGLE.H1.E~INT:PASS.SINGLE.H4.0.LONG.V3~INT:BUF.LONG.V3.0.SINGLE.H4~INT:PASS.SINGLE.V3.0.OUT.CLB.GYQ.E~INT:PASS.SINGLE.V5.0.OUT.LR.IOB1.I2~INT:PASS.DOUBLE.V1.0.0.OUT.LR.IOB1.I2~INT:BUF.LONG.H4.0.SINGLE.V5~INT:PASS.SINGLE.V6.0.OUT.CLB.GY.E~INT:PASS.DOUBLE.V1.1.0.OUT.LR.IOB0.I2
5 IOB0:I2MUX[1]IOB0:I1MUX[0]IOB0:I1MUX[1]IOB0:IFF_D[1]~IOB1:IFF_CE_ENABLE_NO_IQ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE-INT:MUX.IMUX.IOB0.OK[5]---~INT:BUF.LONG.H3.0.SINGLE.V4~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.2~INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.V1~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.2-~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1INT:MUX.LONG.IO.V0[1]~INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.E.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0INT:MUX.LONG.IO.V0[0]~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.0~INT:BIPASS.SINGLE.H0.E.SINGLE.V0~INT:BIPASS.SINGLE.H0.SINGLE.V0~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S~INT:BIPASS.SINGLE.H1.SINGLE.V1~INT:BIPASS.SINGLE.H1.SINGLE.H1.E~INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S~INT:PASS.SINGLE.H1.E.0.LONG.V0~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2~INT:BIPASS.SINGLE.H5.SINGLE.H5.E~INT:BIPASS.SINGLE.H5.E.SINGLE.V5~INT:BIPASS.SINGLE.H5.SINGLE.V5.S~INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S~INT:BIPASS.SINGLE.V5.SINGLE.V5.S~INT:PASS.SINGLE.V5.0.LONG.H4
6 IOB0:I2MUX[0]IOB0:IFF_D[0]~IOB0:INV.IFF_CLK~IOB0:IFF_SRVALIOB0:SYNC_DIOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOINT:MUX.IMUX.IOB0.OK[7]IOB0:PULL[1]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]-INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.V1INT:MUX.IMUX.IOB0.OK[6]~INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0~IOB1:OFF_CE_ENABLE~INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0-INT:MUX.LONG.H5[1]~INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.V1~INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB0.I2INT:MUX.LONG.H4[2]-~INT:PASS.SINGLE.V0.0.GND-~INT:BIPASS.SINGLE.H0.SINGLE.H0.E~INT:BIPASS.SINGLE.V0.SINGLE.V0.S~INT:BIPASS.SINGLE.H1.E.SINGLE.V1~INT:BUF.LONG.V4.0.SINGLE.H5~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0~INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2~INT:BUF.LONG.V2.0.SINGLE.H3.E~INT:BIPASS.SINGLE.H4.SINGLE.V4.S~INT:BIPASS.SINGLE.H4.SINGLE.H4.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S~INT:BIPASS.SINGLE.V4.SINGLE.V4.S~INT:BIPASS.SINGLE.H4.SINGLE.V4~INT:BUF.LONG.H5.0.SINGLE.V6
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[2]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5
8 ~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
9 ~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.LONG.IO.V1[2]-~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0-~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
IO.RS bittile 1
RowColumn
012345678910111213141516171819202122232425262728293031323334
0 -----------------------------------
1 -----------------------------------
2 -----------------------------------
3 -----------------------------------
4 -----------------------------------
5 -----------------------------------
6 -----------------------------------
7 -------------------------~PULLUP.TBUF0:ENABLE---------
8 --------------------------~INT:BUF.LONG.H0.0.SINGLE.V1-~INT:PASS.SINGLE.V1.0.LONG.H0-~INT:BUF.LONG.H1.0.SINGLE.V2---~INT:PASS.SINGLE.V2.0.LONG.H1
9 ---------------------------------~INT:PASS.SINGLE.V3.0.LONG.H2.BUF-
IOB0:SLEW[0, 2, 9]
IOB1:SLEW[0, 0, 0]
FAST0
SLOW1
IOB0:MUX.OFF_D[0, 0, 7]
IOB1:MUX.OFF_D[0, 0, 2]
O0
CE1
IOB0:I1MUX[0, 2, 5][0, 1, 5]
IOB0:I2MUX[0, 0, 5][0, 0, 6]
IOB1:I1MUX[0, 2, 4][0, 0, 4]
IOB1:I2MUX[0, 1, 4][0, 0, 3]
I01
IQL10
IQ11
INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2[0, 29, 9]
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0[0, 27, 9]
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2[0, 28, 9]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0[0, 15, 9]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1[0, 13, 9]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2[0, 11, 9]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0[0, 23, 5]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1[0, 20, 5]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.2[0, 17, 5]
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0[0, 29, 7]
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2[0, 29, 8]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2[0, 33, 6]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0[0, 32, 6]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2[0, 33, 3]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0[0, 16, 4]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1[0, 15, 3]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.2[0, 14, 5]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0[0, 24, 9]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1[0, 22, 9]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2[0, 20, 9]
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0[0, 33, 5]
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2[0, 34, 5]
INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2[0, 27, 8]
INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2[0, 34, 3]
INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.E.2[0, 22, 5]
INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2[0, 14, 9]
INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.E.2[0, 15, 4]
INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2[0, 23, 9]
INT:BIPASS.SINGLE.H0.E.SINGLE.V0[0, 26, 5]
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S[0, 28, 5]
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.1[0, 19, 5]
INT:BIPASS.SINGLE.H0.SINGLE.H0.E[0, 28, 6]
INT:BIPASS.SINGLE.H0.SINGLE.V0[0, 27, 5]
INT:BIPASS.SINGLE.H0.SINGLE.V0.S[0, 30, 3]
INT:BIPASS.SINGLE.H1.E.SINGLE.V1[0, 30, 6]
INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S[0, 31, 5]
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.0[0, 25, 5]
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.2[0, 16, 5]
INT:BIPASS.SINGLE.H1.SINGLE.H1.E[0, 30, 5]
INT:BIPASS.SINGLE.H1.SINGLE.V1[0, 29, 5]
INT:BIPASS.SINGLE.H1.SINGLE.V1.S[0, 29, 3]
INT:BIPASS.SINGLE.H2.E.SINGLE.V2[0, 31, 9]
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S[0, 32, 9]
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1[0, 12, 9]
INT:BIPASS.SINGLE.H2.SINGLE.H2.E[0, 32, 8]
INT:BIPASS.SINGLE.H2.SINGLE.V2[0, 31, 8]
INT:BIPASS.SINGLE.H2.SINGLE.V2.S[0, 33, 8]
INT:BIPASS.SINGLE.H3.E.SINGLE.V3[0, 32, 7]
INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S[0, 33, 7]
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0[0, 16, 9]
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2[0, 10, 9]
INT:BIPASS.SINGLE.H3.SINGLE.H3.E[0, 31, 7]
INT:BIPASS.SINGLE.H3.SINGLE.V3[0, 28, 7]
INT:BIPASS.SINGLE.H3.SINGLE.V3.S[0, 30, 7]
INT:BIPASS.SINGLE.H4.E.SINGLE.V4[0, 39, 8]
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S[0, 37, 6]
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.1[0, 14, 4]
INT:BIPASS.SINGLE.H4.SINGLE.H4.E[0, 36, 6]
INT:BIPASS.SINGLE.H4.SINGLE.V4[0, 39, 6]
INT:BIPASS.SINGLE.H4.SINGLE.V4.S[0, 35, 6]
INT:BIPASS.SINGLE.H5.E.SINGLE.V5[0, 36, 5]
INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S[0, 38, 5]
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.0[0, 17, 4]
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.2[0, 13, 5]
INT:BIPASS.SINGLE.H5.SINGLE.H5.E[0, 35, 5]
INT:BIPASS.SINGLE.H5.SINGLE.V5[0, 36, 3]
INT:BIPASS.SINGLE.H5.SINGLE.V5.S[0, 37, 5]
INT:BIPASS.SINGLE.H6.E.SINGLE.V6[0, 34, 7]
INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S[0, 37, 7]
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1[0, 21, 9]
INT:BIPASS.SINGLE.H6.SINGLE.H6.E[0, 35, 7]
INT:BIPASS.SINGLE.H6.SINGLE.V6[0, 36, 8]
INT:BIPASS.SINGLE.H6.SINGLE.V6.S[0, 36, 7]
INT:BIPASS.SINGLE.H7.E.SINGLE.V7[0, 37, 9]
INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S[0, 39, 9]
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0[0, 25, 9]
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2[0, 19, 9]
INT:BIPASS.SINGLE.H7.SINGLE.H7.E[0, 38, 9]
INT:BIPASS.SINGLE.H7.SINGLE.V7[0, 35, 9]
INT:BIPASS.SINGLE.H7.SINGLE.V7.S[0, 37, 8]
INT:BIPASS.SINGLE.V0.SINGLE.V0.S[0, 29, 6]
INT:BIPASS.SINGLE.V1.SINGLE.V1.S[0, 31, 3]
INT:BIPASS.SINGLE.V2.SINGLE.V2.S[0, 30, 9]
INT:BIPASS.SINGLE.V3.SINGLE.V3.S[0, 27, 7]
INT:BIPASS.SINGLE.V4.SINGLE.V4.S[0, 38, 6]
INT:BIPASS.SINGLE.V5.SINGLE.V5.S[0, 39, 5]
INT:BIPASS.SINGLE.V6.SINGLE.V6.S[0, 38, 7]
INT:BIPASS.SINGLE.V7.SINGLE.V7.S[0, 36, 9]
INT:BUF.LONG.H0.0.SINGLE.V1[1, 26, 8]
INT:BUF.LONG.H1.0.SINGLE.V2[1, 30, 8]
INT:BUF.LONG.H2.0.SINGLE.V3[0, 27, 4]
INT:BUF.LONG.H3.0.SINGLE.V4[0, 12, 5]
INT:BUF.LONG.H4.0.SINGLE.V5[0, 38, 4]
INT:BUF.LONG.H5.0.SINGLE.V6[0, 40, 6]
INT:BUF.LONG.V0.0.SINGLE.H1.E[0, 32, 4]
INT:BUF.LONG.V1.0.SINGLE.H2.E[0, 38, 8]
INT:BUF.LONG.V2.0.SINGLE.H3.E[0, 34, 6]
INT:BUF.LONG.V3.0.SINGLE.H4[0, 34, 4]
INT:BUF.LONG.V4.0.SINGLE.H5[0, 31, 6]
INT:BUF.LONG.V5.0.SINGLE.H6[0, 35, 8]
INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1[0, 20, 7]
INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.S[0, 23, 7]
INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S[0, 23, 4]
INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB0.I2[0, 23, 6]
INT:PASS.DOUBLE.V0.0.0.OUT.CLB.GYQ.E[0, 26, 4]
INT:PASS.DOUBLE.V0.1.0.OUT.CLB.GY.E[0, 31, 4]
INT:PASS.DOUBLE.V1.0.0.OUT.LR.IOB1.I2[0, 37, 4]
INT:PASS.DOUBLE.V1.1.0.OUT.LR.IOB0.I2[0, 40, 4]
INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0[0, 19, 6]
INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.V1[0, 15, 5]
INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0[0, 16, 7]
INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.V1[0, 15, 6]
INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0[0, 17, 6]
INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.V1[0, 13, 4]
INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0[0, 17, 7]
INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.V1[0, 22, 6]
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S[0, 24, 4]
INT:PASS.SINGLE.H1.0.LONG.IO.V0[0, 22, 4]
INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2[0, 21, 4]
INT:PASS.SINGLE.H1.E.0.LONG.V0[0, 32, 5]
INT:PASS.SINGLE.H2.0.LONG.IO.V1[0, 13, 7]
INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1[0, 21, 7]
INT:PASS.SINGLE.H2.E.0.LONG.V1[0, 40, 9]
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S[0, 15, 8]
INT:PASS.SINGLE.H3.E.0.LONG.V2[0, 39, 7]
INT:PASS.SINGLE.H4.0.LONG.V3[0, 33, 4]
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S[0, 25, 4]
INT:PASS.SINGLE.H5.0.LONG.IO.V2[0, 19, 4]
INT:PASS.SINGLE.H5.0.LONG.V4[0, 27, 3]
INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2[0, 20, 4]
INT:PASS.SINGLE.H6.0.LONG.IO.V3[0, 17, 8]
INT:PASS.SINGLE.H6.0.LONG.V5[0, 34, 9]
INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1[0, 24, 8]
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S[0, 25, 8]
INT:PASS.SINGLE.V0.0.GND[0, 26, 6]
INT:PASS.SINGLE.V0.0.OUT.LR.IOB0.I2[0, 28, 4]
INT:PASS.SINGLE.V1.0.LONG.H0[1, 28, 8]
INT:PASS.SINGLE.V1.0.OUT.LR.IOB1.I2[0, 29, 4]
INT:PASS.SINGLE.V2.0.LONG.H1[1, 34, 8]
INT:PASS.SINGLE.V2.0.OUT.CLB.GY.E[0, 30, 4]
INT:PASS.SINGLE.V3.0.LONG.H2.BUF[1, 33, 9]
INT:PASS.SINGLE.V3.0.OUT.CLB.GYQ.E[0, 35, 4]
INT:PASS.SINGLE.V4.0.LONG.H3.BUF[0, 26, 7]
INT:PASS.SINGLE.V4.0.OUT.LR.IOB0.I2[0, 39, 3]
INT:PASS.SINGLE.V5.0.LONG.H4[0, 40, 5]
INT:PASS.SINGLE.V5.0.OUT.LR.IOB1.I2[0, 36, 4]
INT:PASS.SINGLE.V6.0.LONG.H5[0, 40, 7]
INT:PASS.SINGLE.V6.0.OUT.CLB.GY.E[0, 39, 4]
INT:PASS.SINGLE.V7.0.GND[0, 26, 9]
INT:PASS.SINGLE.V7.0.OUT.CLB.GYQ.E[0, 38, 3]
IOB0:IFF_CE_ENABLE[0, 18, 8]
IOB0:IFF_CE_ENABLE_NO_IQ[0, 5, 5]
IOB0:IFF_SRVAL[0, 3, 6]
IOB0:INV.IFF_CLK[0, 2, 6]
IOB0:INV.OFF_CLK[0, 1, 9]
IOB0:INV.OFF_D[0, 3, 7]
IOB0:INV.T[0, 0, 9]
IOB0:OFF_CE_ENABLE[0, 18, 9]
IOB0:OFF_SRVAL[0, 1, 7]
IOB0:READBACK_I1[0, 0, 8]
IOB0:READBACK_I2[0, 2, 8]
IOB0:READBACK_OFF[0, 3, 8]
IOB1:IFF_CE_ENABLE[0, 18, 7]
IOB1:IFF_CE_ENABLE_NO_IQ[0, 4, 5]
IOB1:IFF_SRVAL[0, 9, 3]
IOB1:INV.IFF_CLK[0, 2, 3]
IOB1:INV.OFF_CLK[0, 2, 0]
IOB1:INV.OFF_D[0, 1, 2]
IOB1:INV.T[0, 1, 0]
IOB1:OFF_CE_ENABLE[0, 18, 6]
IOB1:OFF_SRVAL[0, 1, 1]
IOB1:READBACK_I1[0, 4, 3]
IOB1:READBACK_I2[0, 3, 3]
IOB1:READBACK_OFF[0, 2, 2]
PULLUP.TBUF0:ENABLE[1, 25, 7]
PULLUP.TBUF1:ENABLE[0, 14, 7]
TBUF0:DRIVE1[0, 25, 3]
TBUF1:DRIVE1[0, 13, 3]
Inverted~[0]
IOB0:IFF_D[0, 3, 5][0, 1, 6]
IOB1:IFF_D[0, 3, 4][0, 1, 3]
DELAY00
MEDDELAY01
SYNC10
I11
IOB0:PULL[0, 8, 6][0, 2, 7]
IOB1:PULL[0, 0, 1][0, 2, 1]
PULLUP01
PULLDOWN10
NONE11
IOB0:5V_TOLERANT_IO[0, 6, 6]
IOB0:OFF_USED[0, 4, 7]
IOB1:5V_TOLERANT_IO[0, 5, 6]
IOB1:OFF_USED[0, 3, 2]
Non-inverted[0]
IOB0:OMUX[0, 4, 8][0, 1, 8][0, 3, 9][0, 4, 9]
IOB1:OMUX[0, 4, 1][0, 3, 1][0, 3, 0][0, 4, 0]
CE0000
CE.INV0001
OFF0010
O0111
MUX1011
O.INV1111
IOB0:SYNC_D[0, 4, 6]
IOB1:SYNC_D[0, 4, 2]
DELAY0
I1
IOB0:DRIVE[0, 6, 5]
IOB1:DRIVE[0, 5, 3]
240
121
INT:MUX.IMUX.IOB0.IK[0, 5, 7][0, 11, 7][0, 12, 7][0, 9, 7][0, 7, 7][0, 8, 7][0, 10, 7][0, 6, 7]
0.SINGLE.H300111111
0.SINGLE.H401011111
0.SINGLE.H501101111
0.GCLK001110111
0.GCLK101111011
0.GCLK201111101
0.GCLK301111110
0.SINGLE.H211111111
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
0.DOUBLE.H0.1001111
0.LONG.H3.BUF011011
0.LONG.H4011101
0.LONG.H5011110
0.DOUBLE.H1.0110111
GND111111
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0]
0.LONG.H00001
0.LONG.H10010
1.DOUBLE.H1.10101
0.LONG.H2.BUF0110
1.DOUBLE.H0.01011
GND1111
INT:MUX.IMUX.IOB1.OK[0, 5, 2][0, 7, 2][0, 8, 2][0, 12, 2][0, 6, 2][0, 13, 2][0, 14, 2][0, 9, 2]
0.GCLK000111111
0.GCLK101011111
0.GCLK201101111
0.GCLK301110111
1.SINGLE.H201111011
1.SINGLE.H301111101
1.SINGLE.H401111110
1.SINGLE.H511111111
INT:MUX.IMUX.IOB0.OK[0, 7, 6][0, 16, 6][0, 8, 5][0, 13, 6][0, 10, 6][0, 11, 6][0, 14, 6][0, 9, 6]
0.SINGLE.H200111111
0.SINGLE.H301011111
0.SINGLE.H501101111
0.GCLK001110111
0.GCLK101111011
0.GCLK201111101
0.GCLK301111110
0.SINGLE.H411111111
INT:MUX.LONG.H1[0, 10, 1][0, 11, 0][0, 10, 0]
0.LONG.IO.V1000
0.OUT.LR.IOB1.I2011
NONE111
INT:MUX.IO.DBUF.V1[0, 8, 8][0, 9, 8][0, 11, 8][0, 10, 8]
0.IO.DOUBLE.1.E.00011
0.IO.DOUBLE.2.E.00101
0.IO.DOUBLE.3.E.00110
0.IO.DOUBLE.0.E.01111
INT:MUX.IMUX.IOB1.IK[0, 5, 1][0, 7, 1][0, 7, 3][0, 11, 2][0, 6, 1][0, 8, 1][0, 10, 2][0, 11, 3]
0.GCLK000111111
0.GCLK101011111
0.GCLK201101111
0.GCLK301110111
1.SINGLE.H201111011
1.SINGLE.H401111101
1.SINGLE.H501111110
1.SINGLE.H311111111
INT:MUX.IMUX.TBUF1.I[0, 12, 0][0, 12, 1][0, 14, 1][0, 14, 0][0, 13, 0][0, 13, 1]
0.IO.DOUBLE.2.E.1000111
0.OUT.LR.IOB0.I2001011
0.LONG.IO.V1001101
0.IO.DOUBLE.2.E.2011111
0.IO.DOUBLE.3.E.1100111
0.IO.DOUBLE.3.E.2101011
0.OUT.LR.IOB1.I2101110
GND111111
INT:MUX.LONG.IO.V1[0, 12, 8][0, 8, 9][0, 13, 8][0, 14, 8]
0.LONG.H10001
0.LONG.H3.BUF0010
0.SINGLE.H20111
NONE1111
INT:MUX.LONG.IO.V3[0, 19, 8][0, 16, 8]
0.LONG.H500
0.SINGLE.H601
NONE11
INT:MUX.IMUX.TBUF1.TS[0, 15, 1][0, 15, 0][0, 18, 1][0, 16, 0][0, 17, 1]
0.IO.DOUBLE.1.E.100011
0.LONG.IO.V200101
VCC00110
0.IO.DOUBLE.0.E.101111
0.IO.DOUBLE.1.E.210011
0.LONG.IO.V310101
GND10110
0.IO.DOUBLE.0.E.211111
IOB0:TMUX[0, 17, 2]
IOB1:TMUX[0, 18, 3]
TFF0
T1
INT:MUX.IMUX.IOB1.TS[0, 16, 3][0, 23, 2][0, 17, 3][0, 14, 3][0, 25, 2][0, 16, 2][0, 15, 2][0, 18, 2]
0.LONG.IO.V100100111
0.LONG.IO.V300101011
0.GCLK000101101
0.IO.DOUBLE.0.E.100111111
0.LONG.IO.V001001011
0.IO.DOUBLE.0.E.201011111
GND01101110
0.IO.DOUBLE.1.E.211100111
0.LONG.IO.V211101011
0.IO.DOUBLE.1.E.111111111
INT:MUX.IMUX.TBUF0.TS[0, 17, 0][0, 20, 1][0, 20, 0][0, 19, 1][0, 19, 0]
0.IO.DOUBLE.0.E.200011
0.IO.DOUBLE.0.E.100111
0.LONG.IO.V301001
VCC01010
0.LONG.IO.V201101
GND01110
0.IO.DOUBLE.1.E.211011
0.IO.DOUBLE.1.E.111111
INT:MUX.LONG.H5[0, 15, 7][0, 21, 6][0, 19, 7]
0.LONG.IO.V3000
0.OUT.LR.IOB0.I2011
NONE111
INT:MUX.IMUX.TBUF0.I[0, 23, 1][0, 21, 0][0, 23, 0][0, 21, 1][0, 22, 0]
0.IO.DOUBLE.2.E.200011
0.OUT.LR.IOB0.I200101
0.LONG.IO.V200110
0.IO.DOUBLE.2.E.101111
0.IO.DOUBLE.3.E.110011
0.IO.DOUBLE.3.E.210101
0.OUT.LR.IOB1.I210110
GND11111
INT:MUX.IO.DBUF.V0[0, 21, 3][0, 24, 2][0, 22, 2][0, 22, 3]
0.IO.DOUBLE.0.E.20011
0.IO.DOUBLE.1.E.20101
0.IO.DOUBLE.3.E.20110
0.IO.DOUBLE.2.E.21111
INT:MUX.LONG.H4[0, 24, 6][0, 24, 7][0, 22, 7]
0.LONG.IO.V2000
0.OUT.LR.IOB0.I2011
NONE111
INT:MUX.LONG.IO.V2[0, 20, 8][0, 21, 8][0, 23, 8][0, 22, 8]
0.LONG.H2.BUF0001
0.LONG.H40010
0.SINGLE.H50111
NONE1111
INT:MUX.LONG.H0[0, 24, 1][0, 25, 1][0, 24, 0]
0.LONG.IO.V0000
0.OUT.LR.IOB1.I2011
NONE111
INT:MUX.IMUX.IOB0.TS[0, 18, 4][0, 19, 2][0, 19, 3][0, 21, 2][0, 20, 3][0, 23, 3][0, 20, 2][0, 24, 3]
0.LONG.IO.V300110011
0.LONG.IO.V100110101
0.GCLK000110110
0.IO.DOUBLE.0.E.100111111
0.IO.DOUBLE.1.E.201010011
0.LONG.IO.V201010101
0.IO.DOUBLE.0.E.201011111
0.LONG.IO.V001100011
0.IO.DOUBLE.1.E.101101111
GND11110111
INT:MUX.LONG.IO.V0[0, 21, 5][0, 24, 5]
0.LONG.H000
0.SINGLE.H101
NONE11
INT:MUX.IMUX.CLB.G1[0, 26, 0][0, 26, 3][0, 28, 0][0, 28, 1][0, 27, 1][0, 26, 1][0, 27, 0][0, 26, 2]
0.SINGLE.V000001111
0.SINGLE.V200010111
0.SINGLE.V400011101
0.LONG.V400101011
0.LONG.V300101110
0.SINGLE.V100110011
0.DOUBLE.V0.100110110
0.DOUBLE.V1.000111001
0.LONG.V000111100
0.SINGLE.V301101111
0.DOUBLE.V0.001110111
0.SINGLE.V701111101
0.DOUBLE.V1.110011111
0.LONG.V110111011
0.SINGLE.V510111110
0.SINGLE.V611111111
INT:MUX.IMUX.CLB.F1[0, 31, 2][0, 33, 0][0, 32, 1][0, 31, 0][0, 32, 3][0, 31, 1][0, 32, 0][0, 32, 2]
0.SINGLE.V300100111
0.LONG.V400101011
0.SINGLE.V700101110
0.SINGLE.V000111111
0.LONG.V301000111
0.DOUBLE.V1.001001011
0.LONG.V001001110
0.SINGLE.V101011111
0.SINGLE.V501100101
0.LONG.V101101001
0.SINGLE.V601101100
0.DOUBLE.V1.101111101
0.DOUBLE.V0.111100111
0.SINGLE.V411101011
0.DOUBLE.V0.011101110
0.SINGLE.V211111111
INT:MUX.IMUX.CLB.G3[0, 34, 0][0, 33, 2][0, 33, 1][0, 34, 2][0, 35, 0][0, 34, 1][0, 35, 2][0, 35, 3][0, 12, 3][0, 35, 1]
0.SINGLE.V00000111111
0.SINGLE.V20001011111
0.SINGLE.V40001110111
0.LONG.V40010101111
0.LONG.V20010111011
0.SINGLE.V10011001111
0.SINGLE.V60011011011
0.DOUBLE.V1.00011100111
0.LONG.V50011110011
0.GCLK00011111101
CIN0011111110
0.DOUBLE.V0.00110111111
0.SINGLE.V50111011111
0.DOUBLE.V0.10111110111
0.DOUBLE.V1.11001111111
0.LONG.V11011101111
0.SINGLE.V71011111011
0.SINGLE.V31111111111
INT:MUX.IMUX.CLB.C3[0, 36, 0][0, 36, 1][0, 37, 1][0, 37, 0][0, 36, 2][0, 37, 2][0, 37, 3][0, 38, 1]
0.SINGLE.V000001111
0.SINGLE.V200010111
0.GCLK200011110
0.SINGLE.V300101011
0.SINGLE.V700101101
0.DOUBLE.V0.000110011
0.DOUBLE.V0.100110101
0.LONG.V300111010
0.LONG.V200111100
0.DOUBLE.V1.101101111
0.SINGLE.V101110111
0.DOUBLE.V1.010011111
0.SINGLE.V510111011
0.SINGLE.V610111101
0.SINGLE.V411111111
INT:MUX.IMUX.CLB.F3[0, 38, 2][0, 40, 0][0, 39, 2][0, 40, 1][0, 38, 0][0, 39, 1][0, 40, 2][0, 39, 0][0, 40, 3]
0.SINGLE.V0000011111
0.DOUBLE.V0.0000111011
0.LONG.V2000111101
0.SINGLE.V3001111111
0.DOUBLE.V1.1010001111
0.LONG.V1010010111
0.DOUBLE.V1.0010101011
0.LONG.V5010101101
0.SINGLE.V4010110011
0.LONG.V4010110101
0.GCLK0010111110
0.SINGLE.V1011101111
0.SINGLE.V2011110111
0.SINGLE.V6110011111
0.DOUBLE.V0.1110111011
0.SINGLE.V5110111101
0.SINGLE.V7111111111

IO.RS.B

IO.RS.B bittile 0
RowColumn
012345678910111213141516171819202122232425262728293031323334353637383940
0 IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[0]--INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF0.TS[4]-INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]--INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
1 IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.LONG.H1[2]-INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[4]-INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[1]-INT:MUX.IMUX.TBUF0.I[4]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]--INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.CLB.G1[0]----INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.F1[0]INT:MUX.IMUX.CLB.G3[8]INT:MUX.IMUX.CLB.G3[6]INT:MUX.IMUX.CLB.G3[3]INT:MUX.IMUX.CLB.C3[3]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.F3[2]
3 IOB1:I2MUX[0]IOB1:IFF_D[0]~IOB1:INV.IFF_CLK~IOB1:READBACK_I2~IOB1:READBACK_I1IOB1:DRIVE-INT:MUX.IMUX.IOB1.IK[5]-~IOB1:IFF_SRVAL-INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.CLB.G3[1]~TBUF1:DRIVE1INT:MUX.IMUX.IOB1.TS[4]~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IMUX.IOB1.TS[5]IOB1:TMUXINT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IO.DBUF.V0[3]INT:MUX.IO.DBUF.V0[0]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[0]~TBUF0:DRIVE1INT:MUX.IMUX.CLB.G1[6]~INT:PASS.SINGLE.H5.0.LONG.V4-~INT:BIPASS.SINGLE.H1.SINGLE.V1.S~INT:BIPASS.SINGLE.H0.SINGLE.V0.S~INT:BIPASS.SINGLE.V1.SINGLE.V1.SINT:MUX.IMUX.CLB.F1[3]~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2~INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2INT:MUX.IMUX.CLB.G3[2]~INT:BIPASS.SINGLE.H5.SINGLE.V5INT:MUX.IMUX.CLB.C3[1]~INT:PASS.SINGLE.V7.0.OUT.CLB.GYQ.E~INT:PASS.SINGLE.V4.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[0]
4 IOB1:I1MUX[0]IOB1:I2MUX[1]IOB1:I1MUX[1]IOB1:IFF_D[1]---------~INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.V1~INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.1~INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.E.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.0INT:MUX.IMUX.IOB0.TS[7]~INT:PASS.SINGLE.H5.0.LONG.IO.V2~INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.H1.0.LONG.IO.V0~INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S~INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S~INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S~INT:PASS.DOUBLE.V0.0.0.OUT.CLB.GYQ.E~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V0.0.OUT.LR.IOB0.I2~INT:PASS.SINGLE.V1.0.OUT.LR.IOB1.I2~INT:PASS.SINGLE.V2.0.OUT.CLB.GY.E~INT:PASS.DOUBLE.V0.1.0.OUT.CLB.GY.E~INT:BUF.LONG.V0.0.SINGLE.H1.E~INT:PASS.SINGLE.H4.0.LONG.V3~INT:BUF.LONG.V3.0.SINGLE.H4~INT:PASS.SINGLE.V3.0.OUT.CLB.GYQ.E~INT:PASS.SINGLE.V5.0.OUT.LR.IOB1.I2~INT:PASS.DOUBLE.V1.0.0.OUT.LR.IOB1.I2~INT:BUF.LONG.H4.0.SINGLE.V5~INT:PASS.SINGLE.V6.0.OUT.CLB.GY.E~INT:PASS.DOUBLE.V1.1.0.OUT.LR.IOB0.I2
5 IOB0:I2MUX[1]IOB0:I1MUX[0]IOB0:I1MUX[1]IOB0:IFF_D[1]~IOB1:IFF_CE_ENABLE_NO_IQ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE-INT:MUX.IMUX.IOB0.OK[5]---~INT:BUF.LONG.H3.0.SINGLE.V4~INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.2~INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.V1~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.2-~INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1INT:MUX.LONG.IO.V0[1]~INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.E.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0INT:MUX.LONG.IO.V0[0]~INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.0~INT:BIPASS.SINGLE.H0.E.SINGLE.V0~INT:BIPASS.SINGLE.H0.SINGLE.V0~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S~INT:BIPASS.SINGLE.H1.SINGLE.V1~INT:BIPASS.SINGLE.H1.SINGLE.H1.E~INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S~INT:PASS.SINGLE.H1.E.0.LONG.V0~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2~INT:BIPASS.SINGLE.H5.SINGLE.H5.E~INT:BIPASS.SINGLE.H5.E.SINGLE.V5~INT:BIPASS.SINGLE.H5.SINGLE.V5.S~INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S~INT:BIPASS.SINGLE.V5.SINGLE.V5.S~INT:PASS.SINGLE.V5.0.LONG.H4
6 IOB0:I2MUX[0]IOB0:IFF_D[0]~IOB0:INV.IFF_CLK~IOB0:IFF_SRVALIOB0:SYNC_DIOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOINT:MUX.IMUX.IOB0.OK[7]IOB0:PULL[1]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]-INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.V1INT:MUX.IMUX.IOB0.OK[6]~INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0~IOB1:OFF_CE_ENABLE~INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0-INT:MUX.LONG.H5[1]~INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.V1~INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB0.I2INT:MUX.LONG.H4[2]-~INT:PASS.SINGLE.V0.0.GND-~INT:BIPASS.SINGLE.H0.SINGLE.H0.E~INT:BIPASS.SINGLE.V0.SINGLE.V0.S~INT:BIPASS.SINGLE.H1.E.SINGLE.V1~INT:BUF.LONG.V4.0.SINGLE.H5~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0~INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2~INT:BUF.LONG.V2.0.SINGLE.H3.E~INT:BIPASS.SINGLE.H4.SINGLE.V4.S~INT:BIPASS.SINGLE.H4.SINGLE.H4.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S~INT:BIPASS.SINGLE.V4.SINGLE.V4.S~INT:BIPASS.SINGLE.H4.SINGLE.V4~INT:BUF.LONG.H5.0.SINGLE.V6
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[2]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5
8 ~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
9 ~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.LONG.IO.V1[2]-~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0-~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
IO.RS.B bittile 1
RowColumn
012345678910111213141516171819202122232425262728293031323334
0 -----------------------------------
1 -----------------------------------
2 -----------------------------------
3 -----------------------------------
4 -----------------------------------
5 -----------------------------------
6 -----------------------------------
7 -----------------------------------
8 -----------------------------------
9 -----------------------------------
10 -----------------------------------
11 --------------------------~INT:BUF.LONG.H0.0.SINGLE.V1-~INT:PASS.SINGLE.V1.0.LONG.H0-~INT:BUF.LONG.H1.0.SINGLE.V2---~INT:PASS.SINGLE.V2.0.LONG.H1
12 -------------------------~PULLUP.TBUF0:ENABLE-------~INT:PASS.SINGLE.V3.0.LONG.H2.BUF-
IOB0:SLEW[0, 2, 9]
IOB1:SLEW[0, 0, 0]
FAST0
SLOW1
IOB0:MUX.OFF_D[0, 0, 7]
IOB1:MUX.OFF_D[0, 0, 2]
O0
CE1
IOB0:I1MUX[0, 2, 5][0, 1, 5]
IOB0:I2MUX[0, 0, 5][0, 0, 6]
IOB1:I1MUX[0, 2, 4][0, 0, 4]
IOB1:I2MUX[0, 1, 4][0, 0, 3]
I01
IQL10
IQ11
INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2[0, 29, 9]
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0[0, 27, 9]
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2[0, 28, 9]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0[0, 15, 9]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1[0, 13, 9]
INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2[0, 11, 9]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.0[0, 23, 5]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.1[0, 20, 5]
INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.0.E.2[0, 17, 5]
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0[0, 29, 7]
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2[0, 29, 8]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2[0, 33, 6]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0[0, 32, 6]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2[0, 33, 3]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.0[0, 16, 4]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.1[0, 15, 3]
INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.2.E.2[0, 14, 5]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0[0, 24, 9]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1[0, 22, 9]
INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2[0, 20, 9]
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0[0, 33, 5]
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2[0, 34, 5]
INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2[0, 27, 8]
INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2[0, 34, 3]
INT:BIPASS.IO.DOUBLE.0.E.0.IO.DOUBLE.0.E.2[0, 22, 5]
INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2[0, 14, 9]
INT:BIPASS.IO.DOUBLE.2.E.0.IO.DOUBLE.2.E.2[0, 15, 4]
INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2[0, 23, 9]
INT:BIPASS.SINGLE.H0.E.SINGLE.V0[0, 26, 5]
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S[0, 28, 5]
INT:BIPASS.SINGLE.H0.IO.DOUBLE.0.E.1[0, 19, 5]
INT:BIPASS.SINGLE.H0.SINGLE.H0.E[0, 28, 6]
INT:BIPASS.SINGLE.H0.SINGLE.V0[0, 27, 5]
INT:BIPASS.SINGLE.H0.SINGLE.V0.S[0, 30, 3]
INT:BIPASS.SINGLE.H1.E.SINGLE.V1[0, 30, 6]
INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S[0, 31, 5]
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.0[0, 25, 5]
INT:BIPASS.SINGLE.H1.IO.DOUBLE.0.E.2[0, 16, 5]
INT:BIPASS.SINGLE.H1.SINGLE.H1.E[0, 30, 5]
INT:BIPASS.SINGLE.H1.SINGLE.V1[0, 29, 5]
INT:BIPASS.SINGLE.H1.SINGLE.V1.S[0, 29, 3]
INT:BIPASS.SINGLE.H2.E.SINGLE.V2[0, 31, 9]
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S[0, 32, 9]
INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1[0, 12, 9]
INT:BIPASS.SINGLE.H2.SINGLE.H2.E[0, 32, 8]
INT:BIPASS.SINGLE.H2.SINGLE.V2[0, 31, 8]
INT:BIPASS.SINGLE.H2.SINGLE.V2.S[0, 33, 8]
INT:BIPASS.SINGLE.H3.E.SINGLE.V3[0, 32, 7]
INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S[0, 33, 7]
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0[0, 16, 9]
INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2[0, 10, 9]
INT:BIPASS.SINGLE.H3.SINGLE.H3.E[0, 31, 7]
INT:BIPASS.SINGLE.H3.SINGLE.V3[0, 28, 7]
INT:BIPASS.SINGLE.H3.SINGLE.V3.S[0, 30, 7]
INT:BIPASS.SINGLE.H4.E.SINGLE.V4[0, 39, 8]
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S[0, 37, 6]
INT:BIPASS.SINGLE.H4.IO.DOUBLE.2.E.1[0, 14, 4]
INT:BIPASS.SINGLE.H4.SINGLE.H4.E[0, 36, 6]
INT:BIPASS.SINGLE.H4.SINGLE.V4[0, 39, 6]
INT:BIPASS.SINGLE.H4.SINGLE.V4.S[0, 35, 6]
INT:BIPASS.SINGLE.H5.E.SINGLE.V5[0, 36, 5]
INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S[0, 38, 5]
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.0[0, 17, 4]
INT:BIPASS.SINGLE.H5.IO.DOUBLE.2.E.2[0, 13, 5]
INT:BIPASS.SINGLE.H5.SINGLE.H5.E[0, 35, 5]
INT:BIPASS.SINGLE.H5.SINGLE.V5[0, 36, 3]
INT:BIPASS.SINGLE.H5.SINGLE.V5.S[0, 37, 5]
INT:BIPASS.SINGLE.H6.E.SINGLE.V6[0, 34, 7]
INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S[0, 37, 7]
INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1[0, 21, 9]
INT:BIPASS.SINGLE.H6.SINGLE.H6.E[0, 35, 7]
INT:BIPASS.SINGLE.H6.SINGLE.V6[0, 36, 8]
INT:BIPASS.SINGLE.H6.SINGLE.V6.S[0, 36, 7]
INT:BIPASS.SINGLE.H7.E.SINGLE.V7[0, 37, 9]
INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S[0, 39, 9]
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0[0, 25, 9]
INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2[0, 19, 9]
INT:BIPASS.SINGLE.H7.SINGLE.H7.E[0, 38, 9]
INT:BIPASS.SINGLE.H7.SINGLE.V7[0, 35, 9]
INT:BIPASS.SINGLE.H7.SINGLE.V7.S[0, 37, 8]
INT:BIPASS.SINGLE.V0.SINGLE.V0.S[0, 29, 6]
INT:BIPASS.SINGLE.V1.SINGLE.V1.S[0, 31, 3]
INT:BIPASS.SINGLE.V2.SINGLE.V2.S[0, 30, 9]
INT:BIPASS.SINGLE.V3.SINGLE.V3.S[0, 27, 7]
INT:BIPASS.SINGLE.V4.SINGLE.V4.S[0, 38, 6]
INT:BIPASS.SINGLE.V5.SINGLE.V5.S[0, 39, 5]
INT:BIPASS.SINGLE.V6.SINGLE.V6.S[0, 38, 7]
INT:BIPASS.SINGLE.V7.SINGLE.V7.S[0, 36, 9]
INT:BUF.LONG.H0.0.SINGLE.V1[1, 26, 11]
INT:BUF.LONG.H1.0.SINGLE.V2[1, 30, 11]
INT:BUF.LONG.H2.0.SINGLE.V3[0, 27, 4]
INT:BUF.LONG.H3.0.SINGLE.V4[0, 12, 5]
INT:BUF.LONG.H4.0.SINGLE.V5[0, 38, 4]
INT:BUF.LONG.H5.0.SINGLE.V6[0, 40, 6]
INT:BUF.LONG.V0.0.SINGLE.H1.E[0, 32, 4]
INT:BUF.LONG.V1.0.SINGLE.H2.E[0, 38, 8]
INT:BUF.LONG.V2.0.SINGLE.H3.E[0, 34, 6]
INT:BUF.LONG.V3.0.SINGLE.H4[0, 34, 4]
INT:BUF.LONG.V4.0.SINGLE.H5[0, 31, 6]
INT:BUF.LONG.V5.0.SINGLE.H6[0, 35, 8]
INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1[0, 20, 7]
INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.S[0, 23, 7]
INT:PASS.DOUBLE.H1.0.0.OUT.LR.IOB1.I2.S[0, 23, 4]
INT:PASS.DOUBLE.H1.1.0.OUT.LR.IOB0.I2[0, 23, 6]
INT:PASS.DOUBLE.V0.0.0.OUT.CLB.GYQ.E[0, 26, 4]
INT:PASS.DOUBLE.V0.1.0.OUT.CLB.GY.E[0, 31, 4]
INT:PASS.DOUBLE.V1.0.0.OUT.LR.IOB1.I2[0, 37, 4]
INT:PASS.DOUBLE.V1.1.0.OUT.LR.IOB0.I2[0, 40, 4]
INT:PASS.IO.DOUBLE.0.E.0.0.IO.DBUF.V0[0, 19, 6]
INT:PASS.IO.DOUBLE.0.E.2.0.IO.DBUF.V1[0, 15, 5]
INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0[0, 16, 7]
INT:PASS.IO.DOUBLE.1.E.2.0.IO.DBUF.V1[0, 15, 6]
INT:PASS.IO.DOUBLE.2.E.0.0.IO.DBUF.V0[0, 17, 6]
INT:PASS.IO.DOUBLE.2.E.2.0.IO.DBUF.V1[0, 13, 4]
INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0[0, 17, 7]
INT:PASS.IO.DOUBLE.3.E.2.0.IO.DBUF.V1[0, 22, 6]
INT:PASS.SINGLE.H0.0.OUT.LR.IOB1.I2.S[0, 24, 4]
INT:PASS.SINGLE.H1.0.LONG.IO.V0[0, 22, 4]
INT:PASS.SINGLE.H1.0.OUT.LR.IOB0.I2[0, 21, 4]
INT:PASS.SINGLE.H1.E.0.LONG.V0[0, 32, 5]
INT:PASS.SINGLE.H2.0.LONG.IO.V1[0, 13, 7]
INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1[0, 21, 7]
INT:PASS.SINGLE.H2.E.0.LONG.V1[0, 40, 9]
INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.S[0, 15, 8]
INT:PASS.SINGLE.H3.E.0.LONG.V2[0, 39, 7]
INT:PASS.SINGLE.H4.0.LONG.V3[0, 33, 4]
INT:PASS.SINGLE.H4.0.OUT.LR.IOB1.I2.S[0, 25, 4]
INT:PASS.SINGLE.H5.0.LONG.IO.V2[0, 19, 4]
INT:PASS.SINGLE.H5.0.LONG.V4[0, 27, 3]
INT:PASS.SINGLE.H5.0.OUT.LR.IOB0.I2[0, 20, 4]
INT:PASS.SINGLE.H6.0.LONG.IO.V3[0, 17, 8]
INT:PASS.SINGLE.H6.0.LONG.V5[0, 34, 9]
INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1[0, 24, 8]
INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S[0, 25, 8]
INT:PASS.SINGLE.V0.0.GND[0, 26, 6]
INT:PASS.SINGLE.V0.0.OUT.LR.IOB0.I2[0, 28, 4]
INT:PASS.SINGLE.V1.0.LONG.H0[1, 28, 11]
INT:PASS.SINGLE.V1.0.OUT.LR.IOB1.I2[0, 29, 4]
INT:PASS.SINGLE.V2.0.LONG.H1[1, 34, 11]
INT:PASS.SINGLE.V2.0.OUT.CLB.GY.E[0, 30, 4]
INT:PASS.SINGLE.V3.0.LONG.H2.BUF[1, 33, 12]
INT:PASS.SINGLE.V3.0.OUT.CLB.GYQ.E[0, 35, 4]
INT:PASS.SINGLE.V4.0.LONG.H3.BUF[0, 26, 7]
INT:PASS.SINGLE.V4.0.OUT.LR.IOB0.I2[0, 39, 3]
INT:PASS.SINGLE.V5.0.LONG.H4[0, 40, 5]
INT:PASS.SINGLE.V5.0.OUT.LR.IOB1.I2[0, 36, 4]
INT:PASS.SINGLE.V6.0.LONG.H5[0, 40, 7]
INT:PASS.SINGLE.V6.0.OUT.CLB.GY.E[0, 39, 4]
INT:PASS.SINGLE.V7.0.GND[0, 26, 9]
INT:PASS.SINGLE.V7.0.OUT.CLB.GYQ.E[0, 38, 3]
IOB0:IFF_CE_ENABLE[0, 18, 8]
IOB0:IFF_CE_ENABLE_NO_IQ[0, 5, 5]
IOB0:IFF_SRVAL[0, 3, 6]
IOB0:INV.IFF_CLK[0, 2, 6]
IOB0:INV.OFF_CLK[0, 1, 9]
IOB0:INV.OFF_D[0, 3, 7]
IOB0:INV.T[0, 0, 9]
IOB0:OFF_CE_ENABLE[0, 18, 9]
IOB0:OFF_SRVAL[0, 1, 7]
IOB0:READBACK_I1[0, 0, 8]
IOB0:READBACK_I2[0, 2, 8]
IOB0:READBACK_OFF[0, 3, 8]
IOB1:IFF_CE_ENABLE[0, 18, 7]
IOB1:IFF_CE_ENABLE_NO_IQ[0, 4, 5]
IOB1:IFF_SRVAL[0, 9, 3]
IOB1:INV.IFF_CLK[0, 2, 3]
IOB1:INV.OFF_CLK[0, 2, 0]
IOB1:INV.OFF_D[0, 1, 2]
IOB1:INV.T[0, 1, 0]
IOB1:OFF_CE_ENABLE[0, 18, 6]
IOB1:OFF_SRVAL[0, 1, 1]
IOB1:READBACK_I1[0, 4, 3]
IOB1:READBACK_I2[0, 3, 3]
IOB1:READBACK_OFF[0, 2, 2]
PULLUP.TBUF0:ENABLE[1, 25, 12]
PULLUP.TBUF1:ENABLE[0, 14, 7]
TBUF0:DRIVE1[0, 25, 3]
TBUF1:DRIVE1[0, 13, 3]
Inverted~[0]
IOB0:IFF_D[0, 3, 5][0, 1, 6]
IOB1:IFF_D[0, 3, 4][0, 1, 3]
DELAY00
MEDDELAY01
SYNC10
I11
IOB0:PULL[0, 8, 6][0, 2, 7]
IOB1:PULL[0, 0, 1][0, 2, 1]
PULLUP01
PULLDOWN10
NONE11
IOB0:5V_TOLERANT_IO[0, 6, 6]
IOB0:OFF_USED[0, 4, 7]
IOB1:5V_TOLERANT_IO[0, 5, 6]
IOB1:OFF_USED[0, 3, 2]
Non-inverted[0]
IOB0:OMUX[0, 4, 8][0, 1, 8][0, 3, 9][0, 4, 9]
IOB1:OMUX[0, 4, 1][0, 3, 1][0, 3, 0][0, 4, 0]
CE0000
CE.INV0001
OFF0010
O0111
MUX1011
O.INV1111
IOB0:SYNC_D[0, 4, 6]
IOB1:SYNC_D[0, 4, 2]
DELAY0
I1
IOB0:DRIVE[0, 6, 5]
IOB1:DRIVE[0, 5, 3]
240
121
INT:MUX.IMUX.IOB0.IK[0, 5, 7][0, 11, 7][0, 12, 7][0, 9, 7][0, 7, 7][0, 8, 7][0, 10, 7][0, 6, 7]
0.SINGLE.H300111111
0.SINGLE.H401011111
0.SINGLE.H501101111
0.GCLK001110111
0.GCLK101111011
0.GCLK201111101
0.GCLK301111110
0.SINGLE.H211111111
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
0.DOUBLE.H0.1001111
0.LONG.H3.BUF011011
0.LONG.H4011101
0.LONG.H5011110
0.DOUBLE.H1.0110111
GND111111
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0]
0.LONG.H00001
0.LONG.H10010
1.DOUBLE.H1.10101
0.LONG.H2.BUF0110
1.DOUBLE.H0.01011
GND1111
INT:MUX.IMUX.IOB1.OK[0, 5, 2][0, 7, 2][0, 8, 2][0, 12, 2][0, 6, 2][0, 13, 2][0, 14, 2][0, 9, 2]
0.GCLK000111111
0.GCLK101011111
0.GCLK201101111
0.GCLK301110111
1.SINGLE.H201111011
1.SINGLE.H301111101
1.SINGLE.H401111110
1.SINGLE.H511111111
INT:MUX.IMUX.IOB0.OK[0, 7, 6][0, 16, 6][0, 8, 5][0, 13, 6][0, 10, 6][0, 11, 6][0, 14, 6][0, 9, 6]
0.SINGLE.H200111111
0.SINGLE.H301011111
0.SINGLE.H501101111
0.GCLK001110111
0.GCLK101111011
0.GCLK201111101
0.GCLK301111110
0.SINGLE.H411111111
INT:MUX.LONG.H1[0, 10, 1][0, 11, 0][0, 10, 0]
0.LONG.IO.V1000
0.OUT.LR.IOB1.I2011
NONE111
INT:MUX.IO.DBUF.V1[0, 8, 8][0, 9, 8][0, 11, 8][0, 10, 8]
0.IO.DOUBLE.1.E.00011
0.IO.DOUBLE.2.E.00101
0.IO.DOUBLE.3.E.00110
0.IO.DOUBLE.0.E.01111
INT:MUX.IMUX.IOB1.IK[0, 5, 1][0, 7, 1][0, 7, 3][0, 11, 2][0, 6, 1][0, 8, 1][0, 10, 2][0, 11, 3]
0.GCLK000111111
0.GCLK101011111
0.GCLK201101111
0.GCLK301110111
1.SINGLE.H201111011
1.SINGLE.H401111101
1.SINGLE.H501111110
1.SINGLE.H311111111
INT:MUX.IMUX.TBUF1.I[0, 12, 0][0, 12, 1][0, 14, 1][0, 14, 0][0, 13, 0][0, 13, 1]
0.IO.DOUBLE.2.E.1000111
0.OUT.LR.IOB0.I2001011
0.LONG.IO.V1001101
0.IO.DOUBLE.2.E.2011111
0.IO.DOUBLE.3.E.1100111
0.IO.DOUBLE.3.E.2101011
0.OUT.LR.IOB1.I2101110
GND111111
INT:MUX.LONG.IO.V1[0, 12, 8][0, 8, 9][0, 13, 8][0, 14, 8]
0.LONG.H10001
0.LONG.H3.BUF0010
0.SINGLE.H20111
NONE1111
INT:MUX.LONG.IO.V3[0, 19, 8][0, 16, 8]
0.LONG.H500
0.SINGLE.H601
NONE11
INT:MUX.IMUX.TBUF1.TS[0, 15, 1][0, 15, 0][0, 18, 1][0, 16, 0][0, 17, 1]
0.IO.DOUBLE.1.E.100011
0.LONG.IO.V200101
VCC00110
0.IO.DOUBLE.0.E.101111
0.IO.DOUBLE.1.E.210011
0.LONG.IO.V310101
GND10110
0.IO.DOUBLE.0.E.211111
IOB0:TMUX[0, 17, 2]
IOB1:TMUX[0, 18, 3]
TFF0
T1
INT:MUX.IMUX.IOB1.TS[0, 16, 3][0, 23, 2][0, 17, 3][0, 14, 3][0, 25, 2][0, 16, 2][0, 15, 2][0, 18, 2]
0.LONG.IO.V100100111
0.LONG.IO.V300101011
0.GCLK000101101
0.IO.DOUBLE.0.E.100111111
0.LONG.IO.V001001011
0.IO.DOUBLE.0.E.201011111
GND01101110
0.IO.DOUBLE.1.E.211100111
0.LONG.IO.V211101011
0.IO.DOUBLE.1.E.111111111
INT:MUX.IMUX.TBUF0.TS[0, 17, 0][0, 20, 1][0, 20, 0][0, 19, 1][0, 19, 0]
0.IO.DOUBLE.0.E.200011
0.IO.DOUBLE.0.E.100111
0.LONG.IO.V301001
VCC01010
0.LONG.IO.V201101
GND01110
0.IO.DOUBLE.1.E.211011
0.IO.DOUBLE.1.E.111111
INT:MUX.LONG.H5[0, 15, 7][0, 21, 6][0, 19, 7]
0.LONG.IO.V3000
0.OUT.LR.IOB0.I2011
NONE111
INT:MUX.IMUX.TBUF0.I[0, 23, 1][0, 21, 0][0, 23, 0][0, 21, 1][0, 22, 0]
0.IO.DOUBLE.2.E.200011
0.OUT.LR.IOB0.I200101
0.LONG.IO.V200110
0.IO.DOUBLE.2.E.101111
0.IO.DOUBLE.3.E.110011
0.IO.DOUBLE.3.E.210101
0.OUT.LR.IOB1.I210110
GND11111
INT:MUX.IO.DBUF.V0[0, 21, 3][0, 24, 2][0, 22, 2][0, 22, 3]
0.IO.DOUBLE.0.E.20011
0.IO.DOUBLE.1.E.20101
0.IO.DOUBLE.3.E.20110
0.IO.DOUBLE.2.E.21111
INT:MUX.LONG.H4[0, 24, 6][0, 24, 7][0, 22, 7]
0.LONG.IO.V2000
0.OUT.LR.IOB0.I2011
NONE111
INT:MUX.LONG.IO.V2[0, 20, 8][0, 21, 8][0, 23, 8][0, 22, 8]
0.LONG.H2.BUF0001
0.LONG.H40010
0.SINGLE.H50111
NONE1111
INT:MUX.LONG.H0[0, 24, 1][0, 25, 1][0, 24, 0]
0.LONG.IO.V0000
0.OUT.LR.IOB1.I2011
NONE111
INT:MUX.IMUX.IOB0.TS[0, 18, 4][0, 19, 2][0, 19, 3][0, 21, 2][0, 20, 3][0, 23, 3][0, 20, 2][0, 24, 3]
0.LONG.IO.V300110011
0.LONG.IO.V100110101
0.GCLK000110110
0.IO.DOUBLE.0.E.100111111
0.IO.DOUBLE.1.E.201010011
0.LONG.IO.V201010101
0.IO.DOUBLE.0.E.201011111
0.LONG.IO.V001100011
0.IO.DOUBLE.1.E.101101111
GND11110111
INT:MUX.LONG.IO.V0[0, 21, 5][0, 24, 5]
0.LONG.H000
0.SINGLE.H101
NONE11
INT:MUX.IMUX.CLB.G1[0, 26, 0][0, 26, 3][0, 28, 0][0, 28, 1][0, 27, 1][0, 26, 1][0, 27, 0][0, 26, 2]
0.SINGLE.V000001111
0.SINGLE.V200010111
0.SINGLE.V400011101
0.LONG.V400101011
0.LONG.V300101110
0.SINGLE.V100110011
0.DOUBLE.V0.100110110
0.DOUBLE.V1.000111001
0.LONG.V000111100
0.SINGLE.V301101111
0.DOUBLE.V0.001110111
0.SINGLE.V701111101
0.DOUBLE.V1.110011111
0.LONG.V110111011
0.SINGLE.V510111110
0.SINGLE.V611111111
INT:MUX.IMUX.CLB.F1[0, 31, 2][0, 33, 0][0, 32, 1][0, 31, 0][0, 32, 3][0, 31, 1][0, 32, 0][0, 32, 2]
0.SINGLE.V300100111
0.LONG.V400101011
0.SINGLE.V700101110
0.SINGLE.V000111111
0.LONG.V301000111
0.DOUBLE.V1.001001011
0.LONG.V001001110
0.SINGLE.V101011111
0.SINGLE.V501100101
0.LONG.V101101001
0.SINGLE.V601101100
0.DOUBLE.V1.101111101
0.DOUBLE.V0.111100111
0.SINGLE.V411101011
0.DOUBLE.V0.011101110
0.SINGLE.V211111111
INT:MUX.IMUX.CLB.G3[0, 34, 0][0, 33, 2][0, 33, 1][0, 34, 2][0, 35, 0][0, 34, 1][0, 35, 2][0, 35, 3][0, 12, 3][0, 35, 1]
0.SINGLE.V00000111111
0.SINGLE.V20001011111
0.SINGLE.V40001110111
0.LONG.V40010101111
0.LONG.V20010111011
0.SINGLE.V10011001111
0.SINGLE.V60011011011
0.DOUBLE.V1.00011100111
0.LONG.V50011110011
0.GCLK00011111101
CIN0011111110
0.DOUBLE.V0.00110111111
0.SINGLE.V50111011111
0.DOUBLE.V0.10111110111
0.DOUBLE.V1.11001111111
0.LONG.V11011101111
0.SINGLE.V71011111011
0.SINGLE.V31111111111
INT:MUX.IMUX.CLB.C3[0, 36, 0][0, 36, 1][0, 37, 1][0, 37, 0][0, 36, 2][0, 37, 2][0, 37, 3][0, 38, 1]
0.SINGLE.V000001111
0.SINGLE.V200010111
0.GCLK200011110
0.SINGLE.V300101011
0.SINGLE.V700101101
0.DOUBLE.V0.000110011
0.DOUBLE.V0.100110101
0.LONG.V300111010
0.LONG.V200111100
0.DOUBLE.V1.101101111
0.SINGLE.V101110111
0.DOUBLE.V1.010011111
0.SINGLE.V510111011
0.SINGLE.V610111101
0.SINGLE.V411111111
INT:MUX.IMUX.CLB.F3[0, 38, 2][0, 40, 0][0, 39, 2][0, 40, 1][0, 38, 0][0, 39, 1][0, 40, 2][0, 39, 0][0, 40, 3]
0.SINGLE.V0000011111
0.DOUBLE.V0.0000111011
0.LONG.V2000111101
0.SINGLE.V3001111111
0.DOUBLE.V1.1010001111
0.LONG.V1010010111
0.DOUBLE.V1.0010101011
0.LONG.V5010101101
0.SINGLE.V4010110011
0.LONG.V4010110101
0.GCLK0010111110
0.SINGLE.V1011101111
0.SINGLE.V2011110111
0.SINGLE.V6110011111
0.DOUBLE.V0.1110111011
0.SINGLE.V5110111101
0.SINGLE.V7111111111

IO.B

IO.B bittile 0
RowColumn
01234567891011121314151617181920212223242526272829303132333435
0 ~IOB1:INV.TIOB1:SLEW~IOB1:INV.OFF_CLKIOB1:OMUX[2]IOB1:OMUX[3]IOB1:OMUX[0]INT:MUX.IMUX.IOB0.TS[0]IOB1:OMUX[1]IOB1:MUX.OFF_D~IOB1:INV.OFF_DIOB1:OFF_USEDIOB1:SYNC_D~IOB1:IFF_SRVAL~IOB1:INV.IFF_CLKIOB1:I2MUX[0]IOB1:I2MUX[1]IOB1:I1MUX[1]IOB0:I1MUX[0]IOB0:IFF_D[1]IOB0:I1MUX[1]IOB0:I2MUX[0]IOB0:I2MUX[1]~IOB0:INV.IFF_CLK~IOB0:IFF_SRVALIOB0:OFF_USED~IOB0:INV.OFF_DIOB0:MUX.OFF_DIOB0:OMUX[2]IOB0:OMUX[3]IOB0:OMUX[1]~IOB0:OFF_CE_ENABLEIOB0:OMUX[0]~IOB0:INV.OFF_CLKIOB0:SLEW~IOB0:INV.T-
1 INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IO.DBUF.H0[1]INT:MUX.IO.DBUF.H0[0]~INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.H1~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:PULL[1]IOB1:IFF_D[0]IOB1:I1MUX[0]IOB1:IFF_D[1]INT:MUX.LONG.IO.H1[0]~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.1~IOB0:IFF_CE_ENABLEIOB0:IFF_D[0]IOB0:SYNC_DIOB0:PULL[1]IOB0:PULL[0]~IOB0:OFF_SRVAL~INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.S.2~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.0~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.2~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.0INT:MUX.IO.DBUF.H1[0]~INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0
2 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[2]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0
3 INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[4]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4 INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
5 ---INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
6 -INT:MUX.LONG.V4[0]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[1]-INT:MUX.LONG.V3[0]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[0]-INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[5]--INT:MUX.IMUX.IOB1.IK[4]-INT:MUX.IMUX.IOB1.IK[5]-INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]--~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[0]-INT:MUX.IMUX.IOB0.OK[1]-~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2-INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E
7 ------------------------------------
8 ------------~INT:PASS.SINGLE.H0.0.GND~INT:PASS.DOUBLE.H1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.H0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.H4.0.OUT.BT.IOB0.I2~INT:BIPASS.SINGLE.V0.SINGLE.V0.S~INT:BIPASS.SINGLE.H0.SINGLE.V0.S~INT:BIPASS.SINGLE.H0.SINGLE.H0.E~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S~INT:BIPASS.SINGLE.H0.E.SINGLE.V0~INT:BIPASS.SINGLE.H0.SINGLE.V0~INT:PASS.SINGLE.V0.0.GND~INT:BIPASS.SINGLE.H1.SINGLE.V1.S~INT:BIPASS.SINGLE.H1.SINGLE.V1~INT:BIPASS.SINGLE.H1.SINGLE.H1.E~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2~INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2~INT:BIPASS.SINGLE.H5.SINGLE.V5~INT:BIPASS.SINGLE.H5.SINGLE.H5.E~INT:BIPASS.SINGLE.H5.E.SINGLE.V5~INT:BIPASS.SINGLE.H5.SINGLE.V5.S~INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S~INT:BIPASS.SINGLE.V5.SINGLE.V5.S
9 INT:MUX.IMUX.CLB.C2[6]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.CLB.G2[7]INT:MUX.IMUX.CLB.G2[2]INT:MUX.IMUX.CLB.G4[4]INT:MUX.IMUX.CLB.G4[0]--INT:MUX.IMUX.CLB.F4[5]-INT:MUX.IMUX.CLB.F4[3]INT:MUX.IMUX.CLB.F2[5]INT:MUX.IMUX.CLB.F2[0]~INT:PASS.SINGLE.H6.0.GND-~INT:PASS.SINGLE.H1.0.OUT.BT.IOB1.I2~INT:PASS.DOUBLE.H1.1.0.OUT.BT.IOB1.I2~INT:PASS.SINGLE.H5.0.OUT.BT.IOB1.I2~INT:PASS.SINGLE.H1.E.0.LONG.V0~INT:BUF.LONG.V0.0.SINGLE.H1.E~INT:BUF.LONG.H4.0.SINGLE.V5~INT:PASS.SINGLE.V5.0.LONG.H4~INT:PASS.SINGLE.H5.0.LONG.V4~INT:BIPASS.SINGLE.V1.SINGLE.V1.S~INT:BIPASS.SINGLE.H1.E.SINGLE.V1~INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S~INT:BUF.LONG.V4.0.SINGLE.H5~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0~INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2~INT:BUF.LONG.V2.0.SINGLE.H3.E~INT:BIPASS.SINGLE.H4.SINGLE.V4.S~INT:BIPASS.SINGLE.H4.SINGLE.H4.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S~INT:BIPASS.SINGLE.V4.SINGLE.V4.S~INT:BIPASS.SINGLE.H4.SINGLE.V4~INT:BUF.LONG.H5.0.SINGLE.V6
10 INT:MUX.IMUX.CLB.C2[7]INT:MUX.IMUX.CLB.C2[5]INT:MUX.IMUX.CLB.G2[8]INT:MUX.IMUX.CLB.G2[6]INT:MUX.IMUX.CLB.G4[3]INT:MUX.IMUX.CLB.G4[2]--INT:MUX.IMUX.CLB.F4[4]INT:MUX.IMUX.CLB.F4[7]INT:MUX.IMUX.CLB.F2[6]~INT:PASS.SINGLE.H3.0.GNDINT:MUX.IMUX.CLB.F2[1]~INT:PASS.DOUBLE.H0.0.0.OUT.CLB.FXQ.S~INT:PASS.SINGLE.H2.0.OUT.CLB.FXQ.S~INT:PASS.SINGLE.H6.0.OUT.CLB.FXQ.S-----~INT:PASS.SINGLE.V4.0.LONG.H3~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5
11 INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.G2[4]INT:MUX.IMUX.CLB.G2[5]INT:MUX.IMUX.CLB.G2[1]INT:MUX.IMUX.CLB.G4[1]INT:MUX.IMUX.CLB.G4[5]--INT:MUX.IMUX.CLB.F4[6]INT:MUX.IMUX.CLB.F4[0]INT:MUX.IMUX.CLB.F2[4]INT:MUX.IMUX.CLB.F2[2]---------~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
12 INT:MUX.IMUX.CLB.C2[2]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.G2[3]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.CLB.G4[6]INT:MUX.IMUX.CLB.G4[7]--INT:MUX.IMUX.CLB.F4[2]INT:MUX.IMUX.CLB.F4[1]INT:MUX.IMUX.CLB.F2[7]INT:MUX.IMUX.CLB.F2[3]~INT:PASS.SINGLE.H7.0.GND~INT:PASS.SINGLE.H3.0.OUT.CLB.FX.S~INT:PASS.SINGLE.H7.0.OUT.CLB.FX.S~INT:PASS.DOUBLE.H0.1.0.OUT.CLB.FX.S---~INT:BUF.LONG.V3.0.SINGLE.H4~INT:PASS.SINGLE.H4.0.LONG.V3~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2[0, 24, 12]
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0[0, 22, 12]
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2[0, 23, 12]
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0[0, 24, 10]
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2[0, 24, 11]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2[0, 28, 9]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0[0, 27, 9]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2[0, 26, 8]
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0[0, 28, 8]
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2[0, 29, 8]
INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2[0, 22, 11]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0[0, 26, 2]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1[0, 24, 3]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2[0, 27, 1]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0[0, 21, 2]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1[0, 20, 2]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2[0, 25, 2]
INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2[0, 27, 8]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.0[0, 28, 1]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1[0, 29, 2]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2[0, 30, 1]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0[0, 31, 2]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1[0, 31, 1]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2[0, 33, 2]
INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2[0, 23, 2]
INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.S.2[0, 25, 1]
INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2[0, 30, 3]
INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2[0, 32, 3]
INT:BIPASS.SINGLE.H0.E.SINGLE.V0[0, 20, 8]
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S[0, 19, 8]
INT:BIPASS.SINGLE.H0.SINGLE.H0.E[0, 18, 8]
INT:BIPASS.SINGLE.H0.SINGLE.V0[0, 21, 8]
INT:BIPASS.SINGLE.H0.SINGLE.V0.S[0, 17, 8]
INT:BIPASS.SINGLE.H1.E.SINGLE.V1[0, 24, 9]
INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S[0, 25, 9]
INT:BIPASS.SINGLE.H1.SINGLE.H1.E[0, 25, 8]
INT:BIPASS.SINGLE.H1.SINGLE.V1[0, 24, 8]
INT:BIPASS.SINGLE.H1.SINGLE.V1.S[0, 23, 8]
INT:BIPASS.SINGLE.H2.E.SINGLE.V2[0, 26, 12]
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S[0, 27, 12]
INT:BIPASS.SINGLE.H2.SINGLE.H2.E[0, 27, 11]
INT:BIPASS.SINGLE.H2.SINGLE.V2[0, 26, 11]
INT:BIPASS.SINGLE.H2.SINGLE.V2.S[0, 28, 11]
INT:BIPASS.SINGLE.H3.E.SINGLE.V3[0, 27, 10]
INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S[0, 28, 10]
INT:BIPASS.SINGLE.H3.SINGLE.H3.E[0, 26, 10]
INT:BIPASS.SINGLE.H3.SINGLE.V3[0, 23, 10]
INT:BIPASS.SINGLE.H3.SINGLE.V3.S[0, 25, 10]
INT:BIPASS.SINGLE.H4.E.SINGLE.V4[0, 34, 11]
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S[0, 32, 9]
INT:BIPASS.SINGLE.H4.SINGLE.H4.E[0, 31, 9]
INT:BIPASS.SINGLE.H4.SINGLE.V4[0, 34, 9]
INT:BIPASS.SINGLE.H4.SINGLE.V4.S[0, 30, 9]
INT:BIPASS.SINGLE.H5.E.SINGLE.V5[0, 32, 8]
INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S[0, 34, 8]
INT:BIPASS.SINGLE.H5.SINGLE.H5.E[0, 31, 8]
INT:BIPASS.SINGLE.H5.SINGLE.V5[0, 30, 8]
INT:BIPASS.SINGLE.H5.SINGLE.V5.S[0, 33, 8]
INT:BIPASS.SINGLE.H6.E.SINGLE.V6[0, 29, 10]
INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S[0, 32, 10]
INT:BIPASS.SINGLE.H6.SINGLE.H6.E[0, 30, 10]
INT:BIPASS.SINGLE.H6.SINGLE.V6[0, 31, 11]
INT:BIPASS.SINGLE.H6.SINGLE.V6.S[0, 31, 10]
INT:BIPASS.SINGLE.H7.E.SINGLE.V7[0, 32, 12]
INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S[0, 34, 12]
INT:BIPASS.SINGLE.H7.SINGLE.H7.E[0, 33, 12]
INT:BIPASS.SINGLE.H7.SINGLE.V7[0, 30, 12]
INT:BIPASS.SINGLE.H7.SINGLE.V7.S[0, 32, 11]
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.0[0, 22, 2]
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.2[0, 24, 2]
INT:BIPASS.SINGLE.V0.SINGLE.V0.S[0, 16, 8]
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.1[0, 18, 1]
INT:BIPASS.SINGLE.V1.SINGLE.V1.S[0, 23, 9]
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.0[0, 27, 2]
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.2[0, 26, 1]
INT:BIPASS.SINGLE.V2.SINGLE.V2.S[0, 25, 12]
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1[0, 25, 3]
INT:BIPASS.SINGLE.V3.SINGLE.V3.S[0, 22, 10]
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.0[0, 30, 2]
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.2[0, 29, 1]
INT:BIPASS.SINGLE.V4.SINGLE.V4.S[0, 33, 9]
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.1[0, 28, 2]
INT:BIPASS.SINGLE.V5.SINGLE.V5.S[0, 35, 8]
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.0[0, 32, 1]
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.2[0, 32, 2]
INT:BIPASS.SINGLE.V6.SINGLE.V6.S[0, 33, 10]
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1[0, 31, 3]
INT:BIPASS.SINGLE.V7.SINGLE.V7.S[0, 31, 12]
INT:BUF.LONG.H3.0.SINGLE.V4[0, 24, 5]
INT:BUF.LONG.H4.0.SINGLE.V5[0, 20, 9]
INT:BUF.LONG.H5.0.SINGLE.V6[0, 35, 9]
INT:BUF.LONG.V0.0.SINGLE.H1.E[0, 19, 9]
INT:BUF.LONG.V1.0.SINGLE.H2.E[0, 33, 11]
INT:BUF.LONG.V2.0.SINGLE.H3.E[0, 29, 9]
INT:BUF.LONG.V3.0.SINGLE.H4[0, 19, 12]
INT:BUF.LONG.V4.0.SINGLE.H5[0, 26, 9]
INT:BUF.LONG.V5.0.SINGLE.H6[0, 30, 11]
INT:PASS.DOUBLE.H0.0.0.OUT.CLB.FXQ.S[0, 13, 10]
INT:PASS.DOUBLE.H0.1.0.OUT.CLB.FX.S[0, 15, 12]
INT:PASS.DOUBLE.H1.0.0.OUT.BT.IOB0.I2[0, 13, 8]
INT:PASS.DOUBLE.H1.1.0.OUT.BT.IOB1.I2[0, 16, 9]
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E[0, 21, 3]
INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1[0, 20, 3]
INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2[0, 31, 6]
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E[0, 30, 6]
INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1[0, 10, 2]
INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0[0, 35, 2]
INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1[0, 9, 2]
INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0[0, 34, 2]
INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.H1[0, 9, 1]
INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0[0, 34, 1]
INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.H1[0, 10, 1]
INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0[0, 35, 1]
INT:PASS.SINGLE.H0.0.GND[0, 12, 8]
INT:PASS.SINGLE.H0.0.OUT.BT.IOB0.I2[0, 14, 8]
INT:PASS.SINGLE.H1.0.OUT.BT.IOB1.I2[0, 15, 9]
INT:PASS.SINGLE.H1.E.0.LONG.V0[0, 18, 9]
INT:PASS.SINGLE.H2.0.OUT.CLB.FXQ.S[0, 14, 10]
INT:PASS.SINGLE.H2.E.0.LONG.V1[0, 35, 12]
INT:PASS.SINGLE.H3.0.GND[0, 11, 10]
INT:PASS.SINGLE.H3.0.OUT.CLB.FX.S[0, 13, 12]
INT:PASS.SINGLE.H3.E.0.LONG.V2[0, 34, 10]
INT:PASS.SINGLE.H4.0.LONG.V3[0, 20, 12]
INT:PASS.SINGLE.H4.0.OUT.BT.IOB0.I2[0, 15, 8]
INT:PASS.SINGLE.H5.0.LONG.V4[0, 22, 9]
INT:PASS.SINGLE.H5.0.OUT.BT.IOB1.I2[0, 17, 9]
INT:PASS.SINGLE.H6.0.GND[0, 13, 9]
INT:PASS.SINGLE.H6.0.LONG.V5[0, 29, 12]
INT:PASS.SINGLE.H6.0.OUT.CLB.FXQ.S[0, 15, 10]
INT:PASS.SINGLE.H7.0.GND[0, 12, 12]
INT:PASS.SINGLE.H7.0.OUT.CLB.FX.S[0, 14, 12]
INT:PASS.SINGLE.V0.0.GND[0, 22, 8]
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E[0, 22, 5]
INT:PASS.SINGLE.V1.0.LONG.IO.H0[0, 15, 4]
INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2[0, 22, 6]
INT:PASS.SINGLE.V2.0.LONG.IO.H1[0, 17, 4]
INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1[0, 25, 4]
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E[0, 29, 4]
INT:PASS.SINGLE.V4.0.LONG.H3[0, 21, 10]
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E[0, 35, 6]
INT:PASS.SINGLE.V5.0.LONG.H4[0, 21, 9]
INT:PASS.SINGLE.V5.0.LONG.IO.H2[0, 33, 4]
INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2[0, 32, 6]
INT:PASS.SINGLE.V6.0.LONG.H5[0, 35, 10]
INT:PASS.SINGLE.V6.0.LONG.IO.H3[0, 34, 4]
INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1[0, 25, 5]
INT:PASS.SINGLE.V7.0.GND[0, 21, 12]
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E[0, 32, 4]
IOB0:IFF_CE_ENABLE[0, 19, 1]
IOB0:IFF_CE_ENABLE_NO_IQ[0, 8, 4]
IOB0:IFF_SRVAL[0, 23, 0]
IOB0:INV.IFF_CLK[0, 22, 0]
IOB0:INV.OFF_CLK[0, 32, 0]
IOB0:INV.OFF_D[0, 25, 0]
IOB0:INV.T[0, 34, 0]
IOB0:OFF_CE_ENABLE[0, 30, 0]
IOB0:OFF_SRVAL[0, 24, 1]
IOB0:READBACK_I1[0, 18, 3]
IOB0:READBACK_I2[0, 18, 2]
IOB0:READBACK_OFF[0, 16, 3]
IOB1:IFF_CE_ENABLE[0, 13, 2]
IOB1:IFF_CE_ENABLE_NO_IQ[0, 8, 3]
IOB1:IFF_SRVAL[0, 12, 0]
IOB1:INV.IFF_CLK[0, 13, 0]
IOB1:INV.OFF_CLK[0, 2, 0]
IOB1:INV.OFF_D[0, 9, 0]
IOB1:INV.T[0, 0, 0]
IOB1:OFF_CE_ENABLE[0, 12, 2]
IOB1:OFF_SRVAL[0, 11, 1]
IOB1:READBACK_I1[0, 17, 2]
IOB1:READBACK_I2[0, 17, 3]
IOB1:READBACK_OFF[0, 16, 2]
Inverted~[0]
IOB0:SLEW[0, 33, 0]
IOB1:SLEW[0, 1, 0]
FAST0
SLOW1
INT:MUX.LONG.V4[0, 5, 5][0, 2, 6][0, 1, 6]
0.LONG.IO.H2000
0.OUT.BT.IOB0.I2011
NONE111
INT:MUX.IMUX.CLB.C2[0, 0, 10][0, 0, 9][0, 1, 10][0, 1, 12][0, 0, 11][0, 0, 12][0, 1, 9][0, 1, 11]
0.LONG.H400001111
0.SINGLE.H500011101
0.LONG.H300011110
0.SINGLE.H000111111
0.SINGLE.H201000111
0.SINGLE.H301001011
0.SINGLE.H701010101
0.DOUBLE.H0.001010110
1.LONG.H101011001
0.SINGLE.H601011010
0.DOUBLE.H0.101110111
1.LONG.H2.BUF01111011
0.DOUBLE.H1.111001111
0.SINGLE.H411011101
0.DOUBLE.H1.011011110
0.SINGLE.H111111111
INT:MUX.IMUX.IOB1.O1[0, 0, 4][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 4][0, 2, 4][0, 3, 5]
0.LONG.IO.H20111101
2.DOUBLE.V1.00111110
2.DOUBLE.V0.11011101
2.LONG.V21011110
2.LONG.V01101101
2.LONG.V11110101
GND1111001
INT:MUX.IMUX.CLB.G2[0, 2, 10][0, 2, 9][0, 3, 10][0, 3, 11][0, 2, 11][0, 2, 12][0, 3, 9][0, 4, 11][0, 3, 12]
0.LONG.H4000011111
0.SINGLE.H4000111011
0.LONG.H5000111101
0.SINGLE.H1001111111
0.SINGLE.H2010001111
0.SINGLE.H3010010111
0.SINGLE.H7010101011
0.DOUBLE.H0.0010101101
1.LONG.H2.BUF010110011
0.SINGLE.H6010110101
COUT0010111110
1.LONG.H0011101111
0.DOUBLE.H0.1011110111
0.DOUBLE.H1.1110011111
0.SINGLE.H5110111011
0.DOUBLE.H1.0110111101
0.SINGLE.H0111111111
IOB0:OMUX[0, 28, 0][0, 27, 0][0, 29, 0][0, 31, 0]
IOB1:OMUX[0, 4, 0][0, 3, 0][0, 7, 0][0, 5, 0]
CE0000
CE.INV0001
OFF0010
O0111
MUX1011
O.INV1111
INT:MUX.IMUX.CLB.G4[0, 5, 12][0, 4, 12][0, 6, 11][0, 4, 9][0, 4, 10][0, 5, 10][0, 5, 11][0, 5, 9]
0.SINGLE.H000001111
0.SINGLE.H100010111
1.LONG.H000011101
0.DOUBLE.H1.100101011
0.LONG.H300101110
0.LONG.H500110011
0.DOUBLE.H1.000110110
0.SINGLE.H300111001
0.SINGLE.H600111100
0.DOUBLE.H0.101011111
0.SINGLE.H201111011
0.DOUBLE.H0.001111110
0.SINGLE.H510101111
0.SINGLE.H410110111
1.LONG.H110111101
0.SINGLE.H711111111
INT:MUX.IMUX.IOB0.TS[0, 5, 2][0, 6, 2][0, 6, 1][0, 3, 2][0, 4, 2][0, 5, 1][0, 4, 1][0, 6, 0]
0.LONG.IO.H300100111
0.LONG.IO.H000101011
0.LONG.IO.H200101101
0.IO.DOUBLE.0.S.100111111
0.GCLK001001101
0.IO.DOUBLE.1.S.001011111
GND01101110
0.IO.DOUBLE.1.S.111100111
0.LONG.IO.H111101011
0.IO.DOUBLE.0.S.011111111
INT:MUX.LONG.V3[0, 6, 5][0, 7, 6][0, 6, 6]
0.LONG.IO.H1000
0.OUT.BT.IOB0.I2011
NONE111
IOB0:MUX.OFF_D[0, 26, 0]
IOB1:MUX.OFF_D[0, 8, 0]
O0
CE1
INT:MUX.IO.DBUF.H0[0, 7, 2][0, 8, 2][0, 7, 1][0, 8, 1]
0.IO.DOUBLE.0.S.00011
0.IO.DOUBLE.2.S.00101
0.IO.DOUBLE.3.S.00110
0.IO.DOUBLE.1.S.01111
INT:MUX.LONG.V5[0, 8, 5][0, 9, 5][0, 8, 6]
0.LONG.IO.H3000
0.OUT.BT.IOB0.I2011
NONE111
IOB0:5V_TOLERANT_IO[0, 13, 4]
IOB0:OFF_USED[0, 24, 0]
IOB1:5V_TOLERANT_IO[0, 12, 4]
IOB1:OFF_USED[0, 10, 0]
Non-inverted[0]
IOB0:TMUX[0, 13, 3]
IOB1:TMUX[0, 10, 3]
TFF0
T1
INT:MUX.IMUX.CLB.F4[0, 9, 10][0, 9, 11][0, 8, 9][0, 8, 10][0, 10, 9][0, 8, 12][0, 9, 12][0, 10, 11]
0.SINGLE.H000001111
0.DOUBLE.H0.100011011
1.LONG.H000011101
0.SINGLE.H100111111
0.LONG.H501000111
0.LONG.H301001110
0.SINGLE.H201010011
0.SINGLE.H301010101
0.SINGLE.H701011010
1.LONG.H101011100
0.DOUBLE.H1.101110111
0.DOUBLE.H1.001111110
0.SINGLE.H511001111
0.DOUBLE.H0.011011011
0.SINGLE.H611011101
0.SINGLE.H411111111
IOB0:SYNC_D[0, 21, 1]
IOB1:SYNC_D[0, 11, 0]
DELAY0
I1
INT:MUX.IMUX.IOB1.TS[0, 0, 1][0, 2, 1][0, 1, 2][0, 2, 2][0, 3, 1][0, 1, 1][0, 0, 2][0, 11, 2]
0.LONG.IO.H000001111
0.GCLK000010111
0.IO.DOUBLE.0.S.000111111
0.LONG.IO.H301001011
0.LONG.IO.H201001101
GND01011110
0.LONG.IO.H101111011
0.IO.DOUBLE.1.S.011001111
0.IO.DOUBLE.1.S.111010111
0.IO.DOUBLE.0.S.111111111
IOB0:PULL[0, 22, 1][0, 23, 1]
IOB1:PULL[0, 13, 1][0, 12, 1]
PULLUP01
PULLDOWN10
NONE11
IOB0:DRIVE[0, 14, 4]
IOB1:DRIVE[0, 12, 3]
240
121
INT:MUX.IMUX.CLB.F2[0, 10, 12][0, 10, 10][0, 11, 9][0, 11, 11][0, 11, 12][0, 12, 11][0, 12, 10][0, 12, 9]
0.SINGLE.H500110011
0.LONG.H500110101
0.DOUBLE.H1.100110110
0.SINGLE.H000111111
0.SINGLE.H401010011
0.DOUBLE.H1.001010101
0.LONG.H401010110
0.SINGLE.H101011111
0.SINGLE.H601100011
1.LONG.H2.BUF01100101
1.LONG.H001100110
0.SINGLE.H301101111
0.DOUBLE.H0.011110011
0.SINGLE.H711110101
0.DOUBLE.H0.111110110
0.SINGLE.H211111111
INT:MUX.IMUX.IOB1.OK[0, 11, 6][0, 10, 6][0, 10, 5][0, 12, 5][0, 11, 5][0, 13, 5]
0.GCLK1000011
0.GCLK2000101
0.GCLK3000110
0.GCLK0001111
2.SINGLE.V2110011
2.SINGLE.V3110101
2.SINGLE.V5110110
2.SINGLE.V4111111
IOB0:I1MUX[0, 19, 0][0, 17, 0]
IOB0:I2MUX[0, 21, 0][0, 20, 0]
IOB1:I1MUX[0, 16, 0][0, 15, 1]
IOB1:I2MUX[0, 15, 0][0, 14, 0]
I01
IQL10
IQ11
IOB0:IFF_D[0, 18, 0][0, 20, 1]
IOB1:IFF_D[0, 16, 1][0, 14, 1]
DELAY00
MEDDELAY01
SYNC10
I11
INT:MUX.LONG.IO.H0[0, 4, 6][0, 16, 4]
0.LONG.V000
0.SINGLE.V101
NONE11
INT:MUX.LONG.IO.H1[0, 23, 3][0, 14, 2][0, 18, 4][0, 17, 1]
0.LONG.V10001
0.LONG.V30010
0.SINGLE.V20111
NONE1111
INT:MUX.IMUX.IOB1.IK[0, 16, 6][0, 14, 6][0, 14, 5][0, 15, 5][0, 16, 5][0, 17, 5]
0.GCLK1000011
0.GCLK2000101
0.GCLK3000110
0.GCLK0001111
2.SINGLE.V2110011
2.SINGLE.V3110101
2.SINGLE.V4110110
2.SINGLE.V5111111
INT:MUX.IMUX.IOB0.IK[0, 18, 5][0, 19, 5][0, 20, 5][0, 21, 5][0, 19, 6][0, 18, 6]
0.GCLK1001100
0.SINGLE.V2001111
0.GCLK2010100
0.SINGLE.V4010111
0.GCLK3011000
0.SINGLE.V5011011
0.GCLK0111100
0.SINGLE.V3111111
INT:MUX.LONG.IO.H2[0, 22, 3][0, 20, 4][0, 21, 4][0, 22, 4]
0.LONG.V20001
0.LONG.V40010
0.SINGLE.V50111
NONE1111
INT:MUX.LONG.IO.H3[0, 4, 5][0, 23, 4]
0.LONG.V500
0.SINGLE.V601
NONE11
INT:MUX.IMUX.IOB0.OK[0, 23, 5][0, 23, 6][0, 24, 6][0, 25, 6][0, 28, 6][0, 26, 6]
0.GCLK1001100
0.SINGLE.V3001111
0.GCLK2010100
0.SINGLE.V4010111
0.GCLK3011000
0.SINGLE.V5011011
0.GCLK0111100
0.SINGLE.V2111111
INT:MUX.IMUX.IOB0.O1[0, 26, 4][0, 26, 3][0, 29, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
0.DOUBLE.V0.00011111
0.LONG.V50100110
0.LONG.V30111011
0.LONG.V40111101
0.DOUBLE.V1.11100111
GND1111111
INT:MUX.LONG.V0[0, 26, 5][0, 29, 5][0, 27, 5]
0.LONG.IO.H0000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.LONG.V2[0, 31, 5][0, 32, 5][0, 30, 5]
0.LONG.IO.H2000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.IO.DBUF.H1[0, 33, 3][0, 34, 3][0, 35, 3][0, 33, 1]
0.IO.DOUBLE.1.S.20011
0.IO.DOUBLE.2.S.20101
0.IO.DOUBLE.3.S.20110
0.IO.DOUBLE.0.S.21111
INT:MUX.LONG.V1[0, 35, 5][0, 34, 6][0, 33, 5]
0.LONG.IO.H1000
0.OUT.BT.IOB1.I2.E011
NONE111

IO.B.R

IO.B.R bittile 0
RowColumn
01234567891011121314151617181920212223242526272829303132333435
0 ~IOB1:INV.TIOB1:SLEW~IOB1:INV.OFF_CLKIOB1:OMUX[2]IOB1:OMUX[3]IOB1:OMUX[0]INT:MUX.IMUX.IOB0.TS[0]IOB1:OMUX[1]IOB1:MUX.OFF_D~IOB1:INV.OFF_DIOB1:OFF_USEDIOB1:SYNC_D~IOB1:IFF_SRVAL~IOB1:INV.IFF_CLKIOB1:I2MUX[0]IOB1:I2MUX[1]IOB1:I1MUX[1]IOB0:I1MUX[0]IOB0:IFF_D[1]IOB0:I1MUX[1]IOB0:I2MUX[0]IOB0:I2MUX[1]~IOB0:INV.IFF_CLK~IOB0:IFF_SRVALIOB0:OFF_USED~IOB0:INV.OFF_DIOB0:MUX.OFF_DIOB0:OMUX[2]IOB0:OMUX[3]IOB0:OMUX[1]~IOB0:OFF_CE_ENABLEIOB0:OMUX[0]~IOB0:INV.OFF_CLKIOB0:SLEW~IOB0:INV.T-
1 INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IO.DBUF.H0[1]INT:MUX.IO.DBUF.H0[0]~INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.H1~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:PULL[1]IOB1:IFF_D[0]IOB1:I1MUX[0]IOB1:IFF_D[1]INT:MUX.LONG.IO.H1[0]~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.1~IOB0:IFF_CE_ENABLEIOB0:IFF_D[0]IOB0:SYNC_DIOB0:PULL[1]IOB0:PULL[0]~IOB0:OFF_SRVAL~INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.S.2~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.0~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.2~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.0INT:MUX.IO.DBUF.H1[0]~INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0
2 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[2]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0
3 INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[4]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4 INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
5 ---INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
6 -INT:MUX.LONG.V4[0]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[1]-INT:MUX.LONG.V3[0]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[0]-INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[5]--INT:MUX.IMUX.IOB1.IK[4]-INT:MUX.IMUX.IOB1.IK[5]-INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]--~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[0]-INT:MUX.IMUX.IOB0.OK[1]-~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2-INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E
7 ------------------------------------
8 ------------~INT:PASS.SINGLE.H0.0.GND~INT:PASS.DOUBLE.H1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.H0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.H4.0.OUT.BT.IOB0.I2~INT:BIPASS.SINGLE.V0.SINGLE.V0.S~INT:BIPASS.SINGLE.H0.SINGLE.V0.S~INT:BIPASS.SINGLE.H0.SINGLE.H0.E~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S~INT:BIPASS.SINGLE.H0.E.SINGLE.V0~INT:BIPASS.SINGLE.H0.SINGLE.V0~INT:PASS.SINGLE.V0.0.GND~INT:BIPASS.SINGLE.H1.SINGLE.V1.S~INT:BIPASS.SINGLE.H1.SINGLE.V1~INT:BIPASS.SINGLE.H1.SINGLE.H1.E~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2~INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2~INT:BIPASS.SINGLE.H5.SINGLE.V5~INT:BIPASS.SINGLE.H5.SINGLE.H5.E~INT:BIPASS.SINGLE.H5.E.SINGLE.V5~INT:BIPASS.SINGLE.H5.SINGLE.V5.S~INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S~INT:BIPASS.SINGLE.V5.SINGLE.V5.S
9 INT:MUX.IMUX.CLB.C2[6]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.CLB.G2[7]INT:MUX.IMUX.CLB.G2[2]INT:MUX.IMUX.CLB.G4[4]INT:MUX.IMUX.CLB.G4[0]--INT:MUX.IMUX.CLB.F4[5]-INT:MUX.IMUX.CLB.F4[3]INT:MUX.IMUX.CLB.F2[5]INT:MUX.IMUX.CLB.F2[0]~INT:PASS.SINGLE.H6.0.GND-~INT:PASS.SINGLE.H1.0.OUT.BT.IOB1.I2~INT:PASS.DOUBLE.H1.1.0.OUT.BT.IOB1.I2~INT:PASS.SINGLE.H5.0.OUT.BT.IOB1.I2~INT:PASS.SINGLE.H1.E.0.LONG.V0~INT:BUF.LONG.V0.0.SINGLE.H1.E~INT:BUF.LONG.H4.0.SINGLE.V5~INT:PASS.SINGLE.V5.0.LONG.H4~INT:PASS.SINGLE.H5.0.LONG.V4~INT:BIPASS.SINGLE.V1.SINGLE.V1.S~INT:BIPASS.SINGLE.H1.E.SINGLE.V1~INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S~INT:BUF.LONG.V4.0.SINGLE.H5~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0~INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2~INT:BUF.LONG.V2.0.SINGLE.H3.E~INT:BIPASS.SINGLE.H4.SINGLE.V4.S~INT:BIPASS.SINGLE.H4.SINGLE.H4.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S~INT:BIPASS.SINGLE.V4.SINGLE.V4.S~INT:BIPASS.SINGLE.H4.SINGLE.V4~INT:BUF.LONG.H5.0.SINGLE.V6
10 INT:MUX.IMUX.CLB.C2[7]INT:MUX.IMUX.CLB.C2[5]INT:MUX.IMUX.CLB.G2[8]INT:MUX.IMUX.CLB.G2[6]INT:MUX.IMUX.CLB.G4[3]INT:MUX.IMUX.CLB.G4[2]--INT:MUX.IMUX.CLB.F4[4]INT:MUX.IMUX.CLB.F4[7]INT:MUX.IMUX.CLB.F2[6]~INT:PASS.SINGLE.H3.0.GNDINT:MUX.IMUX.CLB.F2[1]~INT:PASS.DOUBLE.H0.0.0.OUT.CLB.FXQ.S~INT:PASS.SINGLE.H2.0.OUT.CLB.FXQ.S~INT:PASS.SINGLE.H6.0.OUT.CLB.FXQ.S-----~INT:PASS.SINGLE.V4.0.LONG.H3~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5
11 INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.G2[4]INT:MUX.IMUX.CLB.G2[5]INT:MUX.IMUX.CLB.G2[1]INT:MUX.IMUX.CLB.G4[1]INT:MUX.IMUX.CLB.G4[5]--INT:MUX.IMUX.CLB.F4[6]INT:MUX.IMUX.CLB.F4[0]INT:MUX.IMUX.CLB.F2[4]INT:MUX.IMUX.CLB.F2[2]---------~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
12 INT:MUX.IMUX.CLB.C2[2]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.G2[3]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.CLB.G4[6]INT:MUX.IMUX.CLB.G4[7]--INT:MUX.IMUX.CLB.F4[2]INT:MUX.IMUX.CLB.F4[1]INT:MUX.IMUX.CLB.F2[7]INT:MUX.IMUX.CLB.F2[3]~INT:PASS.SINGLE.H7.0.GND~INT:PASS.SINGLE.H3.0.OUT.CLB.FX.S~INT:PASS.SINGLE.H7.0.OUT.CLB.FX.S~INT:PASS.DOUBLE.H0.1.0.OUT.CLB.FX.S---~INT:BUF.LONG.V3.0.SINGLE.H4~INT:PASS.SINGLE.H4.0.LONG.V3~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2[0, 24, 12]
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0[0, 22, 12]
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2[0, 23, 12]
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0[0, 24, 10]
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2[0, 24, 11]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2[0, 28, 9]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0[0, 27, 9]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2[0, 26, 8]
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0[0, 28, 8]
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2[0, 29, 8]
INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2[0, 22, 11]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0[0, 26, 2]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1[0, 24, 3]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2[0, 27, 1]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0[0, 21, 2]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1[0, 20, 2]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2[0, 25, 2]
INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2[0, 27, 8]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.0[0, 28, 1]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1[0, 29, 2]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2[0, 30, 1]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0[0, 31, 2]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1[0, 31, 1]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2[0, 33, 2]
INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2[0, 23, 2]
INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.S.2[0, 25, 1]
INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2[0, 30, 3]
INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2[0, 32, 3]
INT:BIPASS.SINGLE.H0.E.SINGLE.V0[0, 20, 8]
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S[0, 19, 8]
INT:BIPASS.SINGLE.H0.SINGLE.H0.E[0, 18, 8]
INT:BIPASS.SINGLE.H0.SINGLE.V0[0, 21, 8]
INT:BIPASS.SINGLE.H0.SINGLE.V0.S[0, 17, 8]
INT:BIPASS.SINGLE.H1.E.SINGLE.V1[0, 24, 9]
INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S[0, 25, 9]
INT:BIPASS.SINGLE.H1.SINGLE.H1.E[0, 25, 8]
INT:BIPASS.SINGLE.H1.SINGLE.V1[0, 24, 8]
INT:BIPASS.SINGLE.H1.SINGLE.V1.S[0, 23, 8]
INT:BIPASS.SINGLE.H2.E.SINGLE.V2[0, 26, 12]
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S[0, 27, 12]
INT:BIPASS.SINGLE.H2.SINGLE.H2.E[0, 27, 11]
INT:BIPASS.SINGLE.H2.SINGLE.V2[0, 26, 11]
INT:BIPASS.SINGLE.H2.SINGLE.V2.S[0, 28, 11]
INT:BIPASS.SINGLE.H3.E.SINGLE.V3[0, 27, 10]
INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S[0, 28, 10]
INT:BIPASS.SINGLE.H3.SINGLE.H3.E[0, 26, 10]
INT:BIPASS.SINGLE.H3.SINGLE.V3[0, 23, 10]
INT:BIPASS.SINGLE.H3.SINGLE.V3.S[0, 25, 10]
INT:BIPASS.SINGLE.H4.E.SINGLE.V4[0, 34, 11]
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S[0, 32, 9]
INT:BIPASS.SINGLE.H4.SINGLE.H4.E[0, 31, 9]
INT:BIPASS.SINGLE.H4.SINGLE.V4[0, 34, 9]
INT:BIPASS.SINGLE.H4.SINGLE.V4.S[0, 30, 9]
INT:BIPASS.SINGLE.H5.E.SINGLE.V5[0, 32, 8]
INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S[0, 34, 8]
INT:BIPASS.SINGLE.H5.SINGLE.H5.E[0, 31, 8]
INT:BIPASS.SINGLE.H5.SINGLE.V5[0, 30, 8]
INT:BIPASS.SINGLE.H5.SINGLE.V5.S[0, 33, 8]
INT:BIPASS.SINGLE.H6.E.SINGLE.V6[0, 29, 10]
INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S[0, 32, 10]
INT:BIPASS.SINGLE.H6.SINGLE.H6.E[0, 30, 10]
INT:BIPASS.SINGLE.H6.SINGLE.V6[0, 31, 11]
INT:BIPASS.SINGLE.H6.SINGLE.V6.S[0, 31, 10]
INT:BIPASS.SINGLE.H7.E.SINGLE.V7[0, 32, 12]
INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S[0, 34, 12]
INT:BIPASS.SINGLE.H7.SINGLE.H7.E[0, 33, 12]
INT:BIPASS.SINGLE.H7.SINGLE.V7[0, 30, 12]
INT:BIPASS.SINGLE.H7.SINGLE.V7.S[0, 32, 11]
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.0[0, 22, 2]
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.2[0, 24, 2]
INT:BIPASS.SINGLE.V0.SINGLE.V0.S[0, 16, 8]
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.1[0, 18, 1]
INT:BIPASS.SINGLE.V1.SINGLE.V1.S[0, 23, 9]
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.0[0, 27, 2]
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.2[0, 26, 1]
INT:BIPASS.SINGLE.V2.SINGLE.V2.S[0, 25, 12]
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1[0, 25, 3]
INT:BIPASS.SINGLE.V3.SINGLE.V3.S[0, 22, 10]
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.0[0, 30, 2]
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.2[0, 29, 1]
INT:BIPASS.SINGLE.V4.SINGLE.V4.S[0, 33, 9]
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.1[0, 28, 2]
INT:BIPASS.SINGLE.V5.SINGLE.V5.S[0, 35, 8]
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.0[0, 32, 1]
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.2[0, 32, 2]
INT:BIPASS.SINGLE.V6.SINGLE.V6.S[0, 33, 10]
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1[0, 31, 3]
INT:BIPASS.SINGLE.V7.SINGLE.V7.S[0, 31, 12]
INT:BUF.LONG.H3.0.SINGLE.V4[0, 24, 5]
INT:BUF.LONG.H4.0.SINGLE.V5[0, 20, 9]
INT:BUF.LONG.H5.0.SINGLE.V6[0, 35, 9]
INT:BUF.LONG.V0.0.SINGLE.H1.E[0, 19, 9]
INT:BUF.LONG.V1.0.SINGLE.H2.E[0, 33, 11]
INT:BUF.LONG.V2.0.SINGLE.H3.E[0, 29, 9]
INT:BUF.LONG.V3.0.SINGLE.H4[0, 19, 12]
INT:BUF.LONG.V4.0.SINGLE.H5[0, 26, 9]
INT:BUF.LONG.V5.0.SINGLE.H6[0, 30, 11]
INT:PASS.DOUBLE.H0.0.0.OUT.CLB.FXQ.S[0, 13, 10]
INT:PASS.DOUBLE.H0.1.0.OUT.CLB.FX.S[0, 15, 12]
INT:PASS.DOUBLE.H1.0.0.OUT.BT.IOB0.I2[0, 13, 8]
INT:PASS.DOUBLE.H1.1.0.OUT.BT.IOB1.I2[0, 16, 9]
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E[0, 21, 3]
INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1[0, 20, 3]
INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2[0, 31, 6]
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E[0, 30, 6]
INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1[0, 10, 2]
INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0[0, 35, 2]
INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1[0, 9, 2]
INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0[0, 34, 2]
INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.H1[0, 9, 1]
INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0[0, 34, 1]
INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.H1[0, 10, 1]
INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0[0, 35, 1]
INT:PASS.SINGLE.H0.0.GND[0, 12, 8]
INT:PASS.SINGLE.H0.0.OUT.BT.IOB0.I2[0, 14, 8]
INT:PASS.SINGLE.H1.0.OUT.BT.IOB1.I2[0, 15, 9]
INT:PASS.SINGLE.H1.E.0.LONG.V0[0, 18, 9]
INT:PASS.SINGLE.H2.0.OUT.CLB.FXQ.S[0, 14, 10]
INT:PASS.SINGLE.H2.E.0.LONG.V1[0, 35, 12]
INT:PASS.SINGLE.H3.0.GND[0, 11, 10]
INT:PASS.SINGLE.H3.0.OUT.CLB.FX.S[0, 13, 12]
INT:PASS.SINGLE.H3.E.0.LONG.V2[0, 34, 10]
INT:PASS.SINGLE.H4.0.LONG.V3[0, 20, 12]
INT:PASS.SINGLE.H4.0.OUT.BT.IOB0.I2[0, 15, 8]
INT:PASS.SINGLE.H5.0.LONG.V4[0, 22, 9]
INT:PASS.SINGLE.H5.0.OUT.BT.IOB1.I2[0, 17, 9]
INT:PASS.SINGLE.H6.0.GND[0, 13, 9]
INT:PASS.SINGLE.H6.0.LONG.V5[0, 29, 12]
INT:PASS.SINGLE.H6.0.OUT.CLB.FXQ.S[0, 15, 10]
INT:PASS.SINGLE.H7.0.GND[0, 12, 12]
INT:PASS.SINGLE.H7.0.OUT.CLB.FX.S[0, 14, 12]
INT:PASS.SINGLE.V0.0.GND[0, 22, 8]
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E[0, 22, 5]
INT:PASS.SINGLE.V1.0.LONG.IO.H0[0, 15, 4]
INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2[0, 22, 6]
INT:PASS.SINGLE.V2.0.LONG.IO.H1[0, 17, 4]
INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1[0, 25, 4]
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E[0, 29, 4]
INT:PASS.SINGLE.V4.0.LONG.H3[0, 21, 10]
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E[0, 35, 6]
INT:PASS.SINGLE.V5.0.LONG.H4[0, 21, 9]
INT:PASS.SINGLE.V5.0.LONG.IO.H2[0, 33, 4]
INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2[0, 32, 6]
INT:PASS.SINGLE.V6.0.LONG.H5[0, 35, 10]
INT:PASS.SINGLE.V6.0.LONG.IO.H3[0, 34, 4]
INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1[0, 25, 5]
INT:PASS.SINGLE.V7.0.GND[0, 21, 12]
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E[0, 32, 4]
IOB0:IFF_CE_ENABLE[0, 19, 1]
IOB0:IFF_CE_ENABLE_NO_IQ[0, 8, 4]
IOB0:IFF_SRVAL[0, 23, 0]
IOB0:INV.IFF_CLK[0, 22, 0]
IOB0:INV.OFF_CLK[0, 32, 0]
IOB0:INV.OFF_D[0, 25, 0]
IOB0:INV.T[0, 34, 0]
IOB0:OFF_CE_ENABLE[0, 30, 0]
IOB0:OFF_SRVAL[0, 24, 1]
IOB0:READBACK_I1[0, 18, 3]
IOB0:READBACK_I2[0, 18, 2]
IOB0:READBACK_OFF[0, 16, 3]
IOB1:IFF_CE_ENABLE[0, 13, 2]
IOB1:IFF_CE_ENABLE_NO_IQ[0, 8, 3]
IOB1:IFF_SRVAL[0, 12, 0]
IOB1:INV.IFF_CLK[0, 13, 0]
IOB1:INV.OFF_CLK[0, 2, 0]
IOB1:INV.OFF_D[0, 9, 0]
IOB1:INV.T[0, 0, 0]
IOB1:OFF_CE_ENABLE[0, 12, 2]
IOB1:OFF_SRVAL[0, 11, 1]
IOB1:READBACK_I1[0, 17, 2]
IOB1:READBACK_I2[0, 17, 3]
IOB1:READBACK_OFF[0, 16, 2]
Inverted~[0]
IOB0:SLEW[0, 33, 0]
IOB1:SLEW[0, 1, 0]
FAST0
SLOW1
INT:MUX.LONG.V4[0, 5, 5][0, 2, 6][0, 1, 6]
0.LONG.IO.H2000
0.OUT.BT.IOB0.I2011
NONE111
INT:MUX.IMUX.CLB.C2[0, 0, 10][0, 0, 9][0, 1, 10][0, 1, 12][0, 0, 11][0, 0, 12][0, 1, 9][0, 1, 11]
0.LONG.H400001111
0.SINGLE.H500011101
0.LONG.H300011110
0.SINGLE.H000111111
0.SINGLE.H201000111
0.SINGLE.H301001011
0.SINGLE.H701010101
0.DOUBLE.H0.001010110
1.LONG.H101011001
0.SINGLE.H601011010
0.DOUBLE.H0.101110111
1.LONG.H2.BUF01111011
0.DOUBLE.H1.111001111
0.SINGLE.H411011101
0.DOUBLE.H1.011011110
0.SINGLE.H111111111
INT:MUX.IMUX.IOB1.O1[0, 0, 4][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 4][0, 2, 4][0, 3, 5]
0.LONG.IO.H20111101
2.DOUBLE.V1.00111110
2.DOUBLE.V0.11011101
2.LONG.V21011110
2.LONG.V01101101
2.LONG.V11110101
GND1111001
INT:MUX.IMUX.CLB.G2[0, 2, 10][0, 2, 9][0, 3, 10][0, 3, 11][0, 2, 11][0, 2, 12][0, 3, 9][0, 4, 11][0, 3, 12]
0.LONG.H4000011111
0.SINGLE.H4000111011
0.LONG.H5000111101
0.SINGLE.H1001111111
0.SINGLE.H2010001111
0.SINGLE.H3010010111
0.SINGLE.H7010101011
0.DOUBLE.H0.0010101101
1.LONG.H2.BUF010110011
0.SINGLE.H6010110101
COUT0010111110
1.LONG.H0011101111
0.DOUBLE.H0.1011110111
0.DOUBLE.H1.1110011111
0.SINGLE.H5110111011
0.DOUBLE.H1.0110111101
0.SINGLE.H0111111111
IOB0:OMUX[0, 28, 0][0, 27, 0][0, 29, 0][0, 31, 0]
IOB1:OMUX[0, 4, 0][0, 3, 0][0, 7, 0][0, 5, 0]
CE0000
CE.INV0001
OFF0010
O0111
MUX1011
O.INV1111
INT:MUX.IMUX.CLB.G4[0, 5, 12][0, 4, 12][0, 6, 11][0, 4, 9][0, 4, 10][0, 5, 10][0, 5, 11][0, 5, 9]
0.SINGLE.H000001111
0.SINGLE.H100010111
1.LONG.H000011101
0.DOUBLE.H1.100101011
0.LONG.H300101110
0.LONG.H500110011
0.DOUBLE.H1.000110110
0.SINGLE.H300111001
0.SINGLE.H600111100
0.DOUBLE.H0.101011111
0.SINGLE.H201111011
0.DOUBLE.H0.001111110
0.SINGLE.H510101111
0.SINGLE.H410110111
1.LONG.H110111101
0.SINGLE.H711111111
INT:MUX.IMUX.IOB0.TS[0, 5, 2][0, 6, 2][0, 6, 1][0, 3, 2][0, 4, 2][0, 5, 1][0, 4, 1][0, 6, 0]
0.LONG.IO.H300100111
0.LONG.IO.H000101011
0.LONG.IO.H200101101
0.IO.DOUBLE.0.S.100111111
0.GCLK001001101
0.IO.DOUBLE.1.S.001011111
GND01101110
0.IO.DOUBLE.1.S.111100111
0.LONG.IO.H111101011
0.IO.DOUBLE.0.S.011111111
INT:MUX.LONG.V3[0, 6, 5][0, 7, 6][0, 6, 6]
0.LONG.IO.H1000
0.OUT.BT.IOB0.I2011
NONE111
IOB0:MUX.OFF_D[0, 26, 0]
IOB1:MUX.OFF_D[0, 8, 0]
O0
CE1
INT:MUX.IO.DBUF.H0[0, 7, 2][0, 8, 2][0, 7, 1][0, 8, 1]
0.IO.DOUBLE.0.S.00011
0.IO.DOUBLE.2.S.00101
0.IO.DOUBLE.3.S.00110
0.IO.DOUBLE.1.S.01111
INT:MUX.LONG.V5[0, 8, 5][0, 9, 5][0, 8, 6]
0.LONG.IO.H3000
0.OUT.BT.IOB0.I2011
NONE111
IOB0:5V_TOLERANT_IO[0, 13, 4]
IOB0:OFF_USED[0, 24, 0]
IOB1:5V_TOLERANT_IO[0, 12, 4]
IOB1:OFF_USED[0, 10, 0]
Non-inverted[0]
IOB0:TMUX[0, 13, 3]
IOB1:TMUX[0, 10, 3]
TFF0
T1
INT:MUX.IMUX.CLB.F4[0, 9, 10][0, 9, 11][0, 8, 9][0, 8, 10][0, 10, 9][0, 8, 12][0, 9, 12][0, 10, 11]
0.SINGLE.H000001111
0.DOUBLE.H0.100011011
1.LONG.H000011101
0.SINGLE.H100111111
0.LONG.H501000111
0.LONG.H301001110
0.SINGLE.H201010011
0.SINGLE.H301010101
0.SINGLE.H701011010
1.LONG.H101011100
0.DOUBLE.H1.101110111
0.DOUBLE.H1.001111110
0.SINGLE.H511001111
0.DOUBLE.H0.011011011
0.SINGLE.H611011101
0.SINGLE.H411111111
IOB0:SYNC_D[0, 21, 1]
IOB1:SYNC_D[0, 11, 0]
DELAY0
I1
INT:MUX.IMUX.IOB1.TS[0, 0, 1][0, 2, 1][0, 1, 2][0, 2, 2][0, 3, 1][0, 1, 1][0, 0, 2][0, 11, 2]
0.LONG.IO.H000001111
0.GCLK000010111
0.IO.DOUBLE.0.S.000111111
0.LONG.IO.H301001011
0.LONG.IO.H201001101
GND01011110
0.LONG.IO.H101111011
0.IO.DOUBLE.1.S.011001111
0.IO.DOUBLE.1.S.111010111
0.IO.DOUBLE.0.S.111111111
IOB0:PULL[0, 22, 1][0, 23, 1]
IOB1:PULL[0, 13, 1][0, 12, 1]
PULLUP01
PULLDOWN10
NONE11
IOB0:DRIVE[0, 14, 4]
IOB1:DRIVE[0, 12, 3]
240
121
INT:MUX.IMUX.CLB.F2[0, 10, 12][0, 10, 10][0, 11, 9][0, 11, 11][0, 11, 12][0, 12, 11][0, 12, 10][0, 12, 9]
0.SINGLE.H500110011
0.LONG.H500110101
0.DOUBLE.H1.100110110
0.SINGLE.H000111111
0.SINGLE.H401010011
0.DOUBLE.H1.001010101
0.LONG.H401010110
0.SINGLE.H101011111
0.SINGLE.H601100011
1.LONG.H2.BUF01100101
1.LONG.H001100110
0.SINGLE.H301101111
0.DOUBLE.H0.011110011
0.SINGLE.H711110101
0.DOUBLE.H0.111110110
0.SINGLE.H211111111
INT:MUX.IMUX.IOB1.OK[0, 11, 6][0, 10, 6][0, 10, 5][0, 12, 5][0, 11, 5][0, 13, 5]
0.GCLK1000011
0.GCLK2000101
0.GCLK3000110
0.GCLK0001111
2.SINGLE.V2110011
2.SINGLE.V3110101
2.SINGLE.V5110110
2.SINGLE.V4111111
IOB0:I1MUX[0, 19, 0][0, 17, 0]
IOB0:I2MUX[0, 21, 0][0, 20, 0]
IOB1:I1MUX[0, 16, 0][0, 15, 1]
IOB1:I2MUX[0, 15, 0][0, 14, 0]
I01
IQL10
IQ11
IOB0:IFF_D[0, 18, 0][0, 20, 1]
IOB1:IFF_D[0, 16, 1][0, 14, 1]
DELAY00
MEDDELAY01
SYNC10
I11
INT:MUX.LONG.IO.H0[0, 4, 6][0, 16, 4]
0.LONG.V000
0.SINGLE.V101
NONE11
INT:MUX.LONG.IO.H1[0, 23, 3][0, 14, 2][0, 18, 4][0, 17, 1]
0.LONG.V10001
0.LONG.V30010
0.SINGLE.V20111
NONE1111
INT:MUX.IMUX.IOB1.IK[0, 16, 6][0, 14, 6][0, 14, 5][0, 15, 5][0, 16, 5][0, 17, 5]
0.GCLK1000011
0.GCLK2000101
0.GCLK3000110
0.GCLK0001111
2.SINGLE.V2110011
2.SINGLE.V3110101
2.SINGLE.V4110110
2.SINGLE.V5111111
INT:MUX.IMUX.IOB0.IK[0, 18, 5][0, 19, 5][0, 20, 5][0, 21, 5][0, 19, 6][0, 18, 6]
0.GCLK1001100
0.SINGLE.V2001111
0.GCLK2010100
0.SINGLE.V4010111
0.GCLK3011000
0.SINGLE.V5011011
0.GCLK0111100
0.SINGLE.V3111111
INT:MUX.LONG.IO.H2[0, 22, 3][0, 20, 4][0, 21, 4][0, 22, 4]
0.LONG.V20001
0.LONG.V40010
0.SINGLE.V50111
NONE1111
INT:MUX.LONG.IO.H3[0, 4, 5][0, 23, 4]
0.LONG.V500
0.SINGLE.V601
NONE11
INT:MUX.IMUX.IOB0.OK[0, 23, 5][0, 23, 6][0, 24, 6][0, 25, 6][0, 28, 6][0, 26, 6]
0.GCLK1001100
0.SINGLE.V3001111
0.GCLK2010100
0.SINGLE.V4010111
0.GCLK3011000
0.SINGLE.V5011011
0.GCLK0111100
0.SINGLE.V2111111
INT:MUX.IMUX.IOB0.O1[0, 26, 4][0, 26, 3][0, 29, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
0.DOUBLE.V0.00011111
0.LONG.V50100110
0.LONG.V30111011
0.LONG.V40111101
0.DOUBLE.V1.11100111
GND1111111
INT:MUX.LONG.V0[0, 26, 5][0, 29, 5][0, 27, 5]
0.LONG.IO.H0000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.LONG.V2[0, 31, 5][0, 32, 5][0, 30, 5]
0.LONG.IO.H2000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.IO.DBUF.H1[0, 33, 3][0, 34, 3][0, 35, 3][0, 33, 1]
0.IO.DOUBLE.1.S.20011
0.IO.DOUBLE.2.S.20101
0.IO.DOUBLE.3.S.20110
0.IO.DOUBLE.0.S.21111
INT:MUX.LONG.V1[0, 35, 5][0, 34, 6][0, 33, 5]
0.LONG.IO.H1000
0.OUT.BT.IOB1.I2.E011
NONE111

IO.BS

IO.BS bittile 0
RowColumn
01234567891011121314151617181920212223242526272829303132333435
0 ~IOB1:INV.TIOB1:SLEW~IOB1:INV.OFF_CLKIOB1:OMUX[2]IOB1:OMUX[3]IOB1:OMUX[0]INT:MUX.IMUX.IOB0.TS[0]IOB1:OMUX[1]IOB1:MUX.OFF_D~IOB1:INV.OFF_DIOB1:OFF_USEDIOB1:SYNC_D~IOB1:IFF_SRVAL~IOB1:INV.IFF_CLKIOB1:I2MUX[0]IOB1:I2MUX[1]IOB1:I1MUX[1]IOB0:I1MUX[0]IOB0:IFF_D[1]IOB0:I1MUX[1]IOB0:I2MUX[0]IOB0:I2MUX[1]~IOB0:INV.IFF_CLK~IOB0:IFF_SRVALIOB0:OFF_USED~IOB0:INV.OFF_DIOB0:MUX.OFF_DIOB0:OMUX[2]IOB0:OMUX[3]IOB0:OMUX[1]~IOB0:OFF_CE_ENABLEIOB0:OMUX[0]~IOB0:INV.OFF_CLKIOB0:SLEW~IOB0:INV.T-
1 INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IO.DBUF.H0[1]INT:MUX.IO.DBUF.H0[0]~INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.H1~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:PULL[1]IOB1:IFF_D[0]IOB1:I1MUX[0]IOB1:IFF_D[1]INT:MUX.LONG.IO.H1[0]~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.1~IOB0:IFF_CE_ENABLEIOB0:IFF_D[0]IOB0:SYNC_DIOB0:PULL[1]IOB0:PULL[0]~IOB0:OFF_SRVAL~INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.S.2~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.0~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.2~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.0INT:MUX.IO.DBUF.H1[0]~INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0
2 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[2]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0
3 INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[4]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4 INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
5 ---INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
6 -INT:MUX.LONG.V4[0]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[1]-INT:MUX.LONG.V3[0]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[0]-INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[5]--INT:MUX.IMUX.IOB1.IK[4]-INT:MUX.IMUX.IOB1.IK[5]-INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]--~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[0]-INT:MUX.IMUX.IOB0.OK[1]-~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2-INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E
7 ------------------------------------
8 ------------~INT:PASS.SINGLE.H0.0.GND~INT:PASS.DOUBLE.H1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.H0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.H4.0.OUT.BT.IOB0.I2~INT:BIPASS.SINGLE.V0.SINGLE.V0.S~INT:BIPASS.SINGLE.H0.SINGLE.V0.S~INT:BIPASS.SINGLE.H0.SINGLE.H0.E~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S~INT:BIPASS.SINGLE.H0.E.SINGLE.V0~INT:BIPASS.SINGLE.H0.SINGLE.V0~INT:PASS.SINGLE.V0.0.GND~INT:BIPASS.SINGLE.H1.SINGLE.V1.S~INT:BIPASS.SINGLE.H1.SINGLE.V1~INT:BIPASS.SINGLE.H1.SINGLE.H1.E~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2~INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2~INT:BIPASS.SINGLE.H5.SINGLE.V5~INT:BIPASS.SINGLE.H5.SINGLE.H5.E~INT:BIPASS.SINGLE.H5.E.SINGLE.V5~INT:BIPASS.SINGLE.H5.SINGLE.V5.S~INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S~INT:BIPASS.SINGLE.V5.SINGLE.V5.S
9 INT:MUX.IMUX.CLB.C2[6]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.CLB.G2[7]INT:MUX.IMUX.CLB.G2[2]INT:MUX.IMUX.CLB.G4[4]INT:MUX.IMUX.CLB.G4[0]--INT:MUX.IMUX.CLB.F4[5]-INT:MUX.IMUX.CLB.F4[3]INT:MUX.IMUX.CLB.F2[5]INT:MUX.IMUX.CLB.F2[0]~INT:PASS.SINGLE.H6.0.GND-~INT:PASS.SINGLE.H1.0.OUT.BT.IOB1.I2~INT:PASS.DOUBLE.H1.1.0.OUT.BT.IOB1.I2~INT:PASS.SINGLE.H5.0.OUT.BT.IOB1.I2~INT:PASS.SINGLE.H1.E.0.LONG.V0~INT:BUF.LONG.V0.0.SINGLE.H1.E~INT:BUF.LONG.H4.0.SINGLE.V5~INT:PASS.SINGLE.V5.0.LONG.H4~INT:PASS.SINGLE.H5.0.LONG.V4~INT:BIPASS.SINGLE.V1.SINGLE.V1.S~INT:BIPASS.SINGLE.H1.E.SINGLE.V1~INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S~INT:BUF.LONG.V4.0.SINGLE.H5~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0~INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2~INT:BUF.LONG.V2.0.SINGLE.H3.E~INT:BIPASS.SINGLE.H4.SINGLE.V4.S~INT:BIPASS.SINGLE.H4.SINGLE.H4.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S~INT:BIPASS.SINGLE.V4.SINGLE.V4.S~INT:BIPASS.SINGLE.H4.SINGLE.V4~INT:BUF.LONG.H5.0.SINGLE.V6
10 INT:MUX.IMUX.CLB.C2[7]INT:MUX.IMUX.CLB.C2[5]INT:MUX.IMUX.CLB.G2[8]INT:MUX.IMUX.CLB.G2[6]INT:MUX.IMUX.CLB.G4[3]INT:MUX.IMUX.CLB.G4[2]--INT:MUX.IMUX.CLB.F4[4]INT:MUX.IMUX.CLB.F4[7]INT:MUX.IMUX.CLB.F2[6]~INT:PASS.SINGLE.H3.0.GNDINT:MUX.IMUX.CLB.F2[1]~INT:PASS.DOUBLE.H0.0.0.OUT.CLB.FXQ.S~INT:PASS.SINGLE.H2.0.OUT.CLB.FXQ.S~INT:PASS.SINGLE.H6.0.OUT.CLB.FXQ.S-----~INT:PASS.SINGLE.V4.0.LONG.H3~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5
11 INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.G2[4]INT:MUX.IMUX.CLB.G2[5]INT:MUX.IMUX.CLB.G2[1]INT:MUX.IMUX.CLB.G4[1]INT:MUX.IMUX.CLB.G4[5]--INT:MUX.IMUX.CLB.F4[6]INT:MUX.IMUX.CLB.F4[0]INT:MUX.IMUX.CLB.F2[4]INT:MUX.IMUX.CLB.F2[2]---------~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
12 INT:MUX.IMUX.CLB.C2[2]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.G2[3]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.CLB.G4[6]INT:MUX.IMUX.CLB.G4[7]--INT:MUX.IMUX.CLB.F4[2]INT:MUX.IMUX.CLB.F4[1]INT:MUX.IMUX.CLB.F2[7]INT:MUX.IMUX.CLB.F2[3]~INT:PASS.SINGLE.H7.0.GND~INT:PASS.SINGLE.H3.0.OUT.CLB.FX.S~INT:PASS.SINGLE.H7.0.OUT.CLB.FX.S~INT:PASS.DOUBLE.H0.1.0.OUT.CLB.FX.S---~INT:BUF.LONG.V3.0.SINGLE.H4~INT:PASS.SINGLE.H4.0.LONG.V3~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2[0, 24, 12]
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0[0, 22, 12]
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2[0, 23, 12]
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0[0, 24, 10]
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2[0, 24, 11]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2[0, 28, 9]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0[0, 27, 9]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2[0, 26, 8]
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0[0, 28, 8]
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2[0, 29, 8]
INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2[0, 22, 11]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0[0, 26, 2]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1[0, 24, 3]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2[0, 27, 1]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0[0, 21, 2]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1[0, 20, 2]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2[0, 25, 2]
INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2[0, 27, 8]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.0[0, 28, 1]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1[0, 29, 2]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2[0, 30, 1]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0[0, 31, 2]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1[0, 31, 1]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2[0, 33, 2]
INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2[0, 23, 2]
INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.S.2[0, 25, 1]
INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2[0, 30, 3]
INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2[0, 32, 3]
INT:BIPASS.SINGLE.H0.E.SINGLE.V0[0, 20, 8]
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S[0, 19, 8]
INT:BIPASS.SINGLE.H0.SINGLE.H0.E[0, 18, 8]
INT:BIPASS.SINGLE.H0.SINGLE.V0[0, 21, 8]
INT:BIPASS.SINGLE.H0.SINGLE.V0.S[0, 17, 8]
INT:BIPASS.SINGLE.H1.E.SINGLE.V1[0, 24, 9]
INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S[0, 25, 9]
INT:BIPASS.SINGLE.H1.SINGLE.H1.E[0, 25, 8]
INT:BIPASS.SINGLE.H1.SINGLE.V1[0, 24, 8]
INT:BIPASS.SINGLE.H1.SINGLE.V1.S[0, 23, 8]
INT:BIPASS.SINGLE.H2.E.SINGLE.V2[0, 26, 12]
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S[0, 27, 12]
INT:BIPASS.SINGLE.H2.SINGLE.H2.E[0, 27, 11]
INT:BIPASS.SINGLE.H2.SINGLE.V2[0, 26, 11]
INT:BIPASS.SINGLE.H2.SINGLE.V2.S[0, 28, 11]
INT:BIPASS.SINGLE.H3.E.SINGLE.V3[0, 27, 10]
INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S[0, 28, 10]
INT:BIPASS.SINGLE.H3.SINGLE.H3.E[0, 26, 10]
INT:BIPASS.SINGLE.H3.SINGLE.V3[0, 23, 10]
INT:BIPASS.SINGLE.H3.SINGLE.V3.S[0, 25, 10]
INT:BIPASS.SINGLE.H4.E.SINGLE.V4[0, 34, 11]
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S[0, 32, 9]
INT:BIPASS.SINGLE.H4.SINGLE.H4.E[0, 31, 9]
INT:BIPASS.SINGLE.H4.SINGLE.V4[0, 34, 9]
INT:BIPASS.SINGLE.H4.SINGLE.V4.S[0, 30, 9]
INT:BIPASS.SINGLE.H5.E.SINGLE.V5[0, 32, 8]
INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S[0, 34, 8]
INT:BIPASS.SINGLE.H5.SINGLE.H5.E[0, 31, 8]
INT:BIPASS.SINGLE.H5.SINGLE.V5[0, 30, 8]
INT:BIPASS.SINGLE.H5.SINGLE.V5.S[0, 33, 8]
INT:BIPASS.SINGLE.H6.E.SINGLE.V6[0, 29, 10]
INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S[0, 32, 10]
INT:BIPASS.SINGLE.H6.SINGLE.H6.E[0, 30, 10]
INT:BIPASS.SINGLE.H6.SINGLE.V6[0, 31, 11]
INT:BIPASS.SINGLE.H6.SINGLE.V6.S[0, 31, 10]
INT:BIPASS.SINGLE.H7.E.SINGLE.V7[0, 32, 12]
INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S[0, 34, 12]
INT:BIPASS.SINGLE.H7.SINGLE.H7.E[0, 33, 12]
INT:BIPASS.SINGLE.H7.SINGLE.V7[0, 30, 12]
INT:BIPASS.SINGLE.H7.SINGLE.V7.S[0, 32, 11]
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.1[0, 18, 1]
INT:BIPASS.SINGLE.V0.SINGLE.V0.S[0, 16, 8]
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.0[0, 22, 2]
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2[0, 24, 2]
INT:BIPASS.SINGLE.V1.SINGLE.V1.S[0, 23, 9]
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1[0, 25, 3]
INT:BIPASS.SINGLE.V2.SINGLE.V2.S[0, 25, 12]
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.0[0, 27, 2]
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.2[0, 26, 1]
INT:BIPASS.SINGLE.V3.SINGLE.V3.S[0, 22, 10]
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1[0, 28, 2]
INT:BIPASS.SINGLE.V4.SINGLE.V4.S[0, 33, 9]
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.0[0, 30, 2]
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.2[0, 29, 1]
INT:BIPASS.SINGLE.V5.SINGLE.V5.S[0, 35, 8]
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1[0, 31, 3]
INT:BIPASS.SINGLE.V6.SINGLE.V6.S[0, 33, 10]
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.0[0, 32, 1]
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2[0, 32, 2]
INT:BIPASS.SINGLE.V7.SINGLE.V7.S[0, 31, 12]
INT:BUF.LONG.H3.0.SINGLE.V4[0, 24, 5]
INT:BUF.LONG.H4.0.SINGLE.V5[0, 20, 9]
INT:BUF.LONG.H5.0.SINGLE.V6[0, 35, 9]
INT:BUF.LONG.V0.0.SINGLE.H1.E[0, 19, 9]
INT:BUF.LONG.V1.0.SINGLE.H2.E[0, 33, 11]
INT:BUF.LONG.V2.0.SINGLE.H3.E[0, 29, 9]
INT:BUF.LONG.V3.0.SINGLE.H4[0, 19, 12]
INT:BUF.LONG.V4.0.SINGLE.H5[0, 26, 9]
INT:BUF.LONG.V5.0.SINGLE.H6[0, 30, 11]
INT:PASS.DOUBLE.H0.0.0.OUT.CLB.FXQ.S[0, 13, 10]
INT:PASS.DOUBLE.H0.1.0.OUT.CLB.FX.S[0, 15, 12]
INT:PASS.DOUBLE.H1.0.0.OUT.BT.IOB0.I2[0, 13, 8]
INT:PASS.DOUBLE.H1.1.0.OUT.BT.IOB1.I2[0, 16, 9]
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E[0, 21, 3]
INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1[0, 20, 3]
INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2[0, 31, 6]
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E[0, 30, 6]
INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1[0, 10, 2]
INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0[0, 35, 2]
INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1[0, 9, 2]
INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0[0, 34, 2]
INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.H1[0, 9, 1]
INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0[0, 34, 1]
INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.H1[0, 10, 1]
INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0[0, 35, 1]
INT:PASS.SINGLE.H0.0.GND[0, 12, 8]
INT:PASS.SINGLE.H0.0.OUT.BT.IOB0.I2[0, 14, 8]
INT:PASS.SINGLE.H1.0.OUT.BT.IOB1.I2[0, 15, 9]
INT:PASS.SINGLE.H1.E.0.LONG.V0[0, 18, 9]
INT:PASS.SINGLE.H2.0.OUT.CLB.FXQ.S[0, 14, 10]
INT:PASS.SINGLE.H2.E.0.LONG.V1[0, 35, 12]
INT:PASS.SINGLE.H3.0.GND[0, 11, 10]
INT:PASS.SINGLE.H3.0.OUT.CLB.FX.S[0, 13, 12]
INT:PASS.SINGLE.H3.E.0.LONG.V2[0, 34, 10]
INT:PASS.SINGLE.H4.0.LONG.V3[0, 20, 12]
INT:PASS.SINGLE.H4.0.OUT.BT.IOB0.I2[0, 15, 8]
INT:PASS.SINGLE.H5.0.LONG.V4[0, 22, 9]
INT:PASS.SINGLE.H5.0.OUT.BT.IOB1.I2[0, 17, 9]
INT:PASS.SINGLE.H6.0.GND[0, 13, 9]
INT:PASS.SINGLE.H6.0.LONG.V5[0, 29, 12]
INT:PASS.SINGLE.H6.0.OUT.CLB.FXQ.S[0, 15, 10]
INT:PASS.SINGLE.H7.0.GND[0, 12, 12]
INT:PASS.SINGLE.H7.0.OUT.CLB.FX.S[0, 14, 12]
INT:PASS.SINGLE.V0.0.GND[0, 22, 8]
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E[0, 22, 5]
INT:PASS.SINGLE.V1.0.LONG.IO.H0[0, 15, 4]
INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2[0, 22, 6]
INT:PASS.SINGLE.V2.0.LONG.IO.H1[0, 17, 4]
INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1[0, 25, 4]
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E[0, 29, 4]
INT:PASS.SINGLE.V4.0.LONG.H3[0, 21, 10]
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E[0, 35, 6]
INT:PASS.SINGLE.V5.0.LONG.H4[0, 21, 9]
INT:PASS.SINGLE.V5.0.LONG.IO.H2[0, 33, 4]
INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2[0, 32, 6]
INT:PASS.SINGLE.V6.0.LONG.H5[0, 35, 10]
INT:PASS.SINGLE.V6.0.LONG.IO.H3[0, 34, 4]
INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1[0, 25, 5]
INT:PASS.SINGLE.V7.0.GND[0, 21, 12]
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E[0, 32, 4]
IOB0:IFF_CE_ENABLE[0, 19, 1]
IOB0:IFF_CE_ENABLE_NO_IQ[0, 8, 4]
IOB0:IFF_SRVAL[0, 23, 0]
IOB0:INV.IFF_CLK[0, 22, 0]
IOB0:INV.OFF_CLK[0, 32, 0]
IOB0:INV.OFF_D[0, 25, 0]
IOB0:INV.T[0, 34, 0]
IOB0:OFF_CE_ENABLE[0, 30, 0]
IOB0:OFF_SRVAL[0, 24, 1]
IOB0:READBACK_I1[0, 18, 3]
IOB0:READBACK_I2[0, 18, 2]
IOB0:READBACK_OFF[0, 16, 3]
IOB1:IFF_CE_ENABLE[0, 13, 2]
IOB1:IFF_CE_ENABLE_NO_IQ[0, 8, 3]
IOB1:IFF_SRVAL[0, 12, 0]
IOB1:INV.IFF_CLK[0, 13, 0]
IOB1:INV.OFF_CLK[0, 2, 0]
IOB1:INV.OFF_D[0, 9, 0]
IOB1:INV.T[0, 0, 0]
IOB1:OFF_CE_ENABLE[0, 12, 2]
IOB1:OFF_SRVAL[0, 11, 1]
IOB1:READBACK_I1[0, 17, 2]
IOB1:READBACK_I2[0, 17, 3]
IOB1:READBACK_OFF[0, 16, 2]
Inverted~[0]
IOB0:SLEW[0, 33, 0]
IOB1:SLEW[0, 1, 0]
FAST0
SLOW1
INT:MUX.LONG.V4[0, 5, 5][0, 2, 6][0, 1, 6]
0.LONG.IO.H2000
0.OUT.BT.IOB0.I2011
NONE111
INT:MUX.IMUX.CLB.C2[0, 0, 10][0, 0, 9][0, 1, 10][0, 1, 12][0, 0, 11][0, 0, 12][0, 1, 9][0, 1, 11]
0.LONG.H400001111
0.SINGLE.H500011101
0.LONG.H300011110
0.SINGLE.H000111111
0.SINGLE.H201000111
0.SINGLE.H301001011
0.SINGLE.H701010101
0.DOUBLE.H0.001010110
1.LONG.H101011001
0.SINGLE.H601011010
0.DOUBLE.H0.101110111
1.LONG.H2.BUF01111011
0.DOUBLE.H1.111001111
0.SINGLE.H411011101
0.DOUBLE.H1.011011110
0.SINGLE.H111111111
INT:MUX.IMUX.IOB1.O1[0, 0, 4][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 4][0, 2, 4][0, 3, 5]
0.LONG.IO.H20111101
2.DOUBLE.V1.00111110
2.DOUBLE.V0.11011101
2.LONG.V21011110
2.LONG.V01101101
2.LONG.V11110101
GND1111001
INT:MUX.IMUX.CLB.G2[0, 2, 10][0, 2, 9][0, 3, 10][0, 3, 11][0, 2, 11][0, 2, 12][0, 3, 9][0, 4, 11][0, 3, 12]
0.LONG.H4000011111
0.SINGLE.H4000111011
0.LONG.H5000111101
0.SINGLE.H1001111111
0.SINGLE.H2010001111
0.SINGLE.H3010010111
0.SINGLE.H7010101011
0.DOUBLE.H0.0010101101
1.LONG.H2.BUF010110011
0.SINGLE.H6010110101
COUT0010111110
1.LONG.H0011101111
0.DOUBLE.H0.1011110111
0.DOUBLE.H1.1110011111
0.SINGLE.H5110111011
0.DOUBLE.H1.0110111101
0.SINGLE.H0111111111
IOB0:OMUX[0, 28, 0][0, 27, 0][0, 29, 0][0, 31, 0]
IOB1:OMUX[0, 4, 0][0, 3, 0][0, 7, 0][0, 5, 0]
CE0000
CE.INV0001
OFF0010
O0111
MUX1011
O.INV1111
INT:MUX.IMUX.CLB.G4[0, 5, 12][0, 4, 12][0, 6, 11][0, 4, 9][0, 4, 10][0, 5, 10][0, 5, 11][0, 5, 9]
0.SINGLE.H000001111
0.SINGLE.H100010111
1.LONG.H000011101
0.DOUBLE.H1.100101011
0.LONG.H300101110
0.LONG.H500110011
0.DOUBLE.H1.000110110
0.SINGLE.H300111001
0.SINGLE.H600111100
0.DOUBLE.H0.101011111
0.SINGLE.H201111011
0.DOUBLE.H0.001111110
0.SINGLE.H510101111
0.SINGLE.H410110111
1.LONG.H110111101
0.SINGLE.H711111111
INT:MUX.IMUX.IOB0.TS[0, 5, 2][0, 6, 2][0, 6, 1][0, 3, 2][0, 4, 2][0, 5, 1][0, 4, 1][0, 6, 0]
0.LONG.IO.H300100111
0.LONG.IO.H000101011
0.LONG.IO.H200101101
0.IO.DOUBLE.0.S.100111111
0.GCLK001001101
0.IO.DOUBLE.1.S.001011111
GND01101110
0.IO.DOUBLE.1.S.111100111
0.LONG.IO.H111101011
0.IO.DOUBLE.0.S.011111111
INT:MUX.LONG.V3[0, 6, 5][0, 7, 6][0, 6, 6]
0.LONG.IO.H1000
0.OUT.BT.IOB0.I2011
NONE111
IOB0:MUX.OFF_D[0, 26, 0]
IOB1:MUX.OFF_D[0, 8, 0]
O0
CE1
INT:MUX.IO.DBUF.H0[0, 7, 2][0, 8, 2][0, 7, 1][0, 8, 1]
0.IO.DOUBLE.0.S.00011
0.IO.DOUBLE.2.S.00101
0.IO.DOUBLE.3.S.00110
0.IO.DOUBLE.1.S.01111
INT:MUX.LONG.V5[0, 8, 5][0, 9, 5][0, 8, 6]
0.LONG.IO.H3000
0.OUT.BT.IOB0.I2011
NONE111
IOB0:5V_TOLERANT_IO[0, 13, 4]
IOB0:OFF_USED[0, 24, 0]
IOB1:5V_TOLERANT_IO[0, 12, 4]
IOB1:OFF_USED[0, 10, 0]
Non-inverted[0]
IOB0:TMUX[0, 13, 3]
IOB1:TMUX[0, 10, 3]
TFF0
T1
INT:MUX.IMUX.CLB.F4[0, 9, 10][0, 9, 11][0, 8, 9][0, 8, 10][0, 10, 9][0, 8, 12][0, 9, 12][0, 10, 11]
0.SINGLE.H000001111
0.DOUBLE.H0.100011011
1.LONG.H000011101
0.SINGLE.H100111111
0.LONG.H501000111
0.LONG.H301001110
0.SINGLE.H201010011
0.SINGLE.H301010101
0.SINGLE.H701011010
1.LONG.H101011100
0.DOUBLE.H1.101110111
0.DOUBLE.H1.001111110
0.SINGLE.H511001111
0.DOUBLE.H0.011011011
0.SINGLE.H611011101
0.SINGLE.H411111111
IOB0:SYNC_D[0, 21, 1]
IOB1:SYNC_D[0, 11, 0]
DELAY0
I1
INT:MUX.IMUX.IOB1.TS[0, 0, 1][0, 2, 1][0, 1, 2][0, 2, 2][0, 3, 1][0, 1, 1][0, 0, 2][0, 11, 2]
0.LONG.IO.H000001111
0.GCLK000010111
0.IO.DOUBLE.0.S.000111111
0.LONG.IO.H301001011
0.LONG.IO.H201001101
GND01011110
0.LONG.IO.H101111011
0.IO.DOUBLE.1.S.011001111
0.IO.DOUBLE.1.S.111010111
0.IO.DOUBLE.0.S.111111111
IOB0:PULL[0, 22, 1][0, 23, 1]
IOB1:PULL[0, 13, 1][0, 12, 1]
PULLUP01
PULLDOWN10
NONE11
IOB0:DRIVE[0, 14, 4]
IOB1:DRIVE[0, 12, 3]
240
121
INT:MUX.IMUX.CLB.F2[0, 10, 12][0, 10, 10][0, 11, 9][0, 11, 11][0, 11, 12][0, 12, 11][0, 12, 10][0, 12, 9]
0.SINGLE.H500110011
0.LONG.H500110101
0.DOUBLE.H1.100110110
0.SINGLE.H000111111
0.SINGLE.H401010011
0.DOUBLE.H1.001010101
0.LONG.H401010110
0.SINGLE.H101011111
0.SINGLE.H601100011
1.LONG.H2.BUF01100101
1.LONG.H001100110
0.SINGLE.H301101111
0.DOUBLE.H0.011110011
0.SINGLE.H711110101
0.DOUBLE.H0.111110110
0.SINGLE.H211111111
INT:MUX.IMUX.IOB1.OK[0, 11, 6][0, 10, 6][0, 10, 5][0, 12, 5][0, 11, 5][0, 13, 5]
0.GCLK1000011
0.GCLK2000101
0.GCLK3000110
0.GCLK0001111
2.SINGLE.V2110011
2.SINGLE.V3110101
2.SINGLE.V5110110
2.SINGLE.V4111111
IOB0:I1MUX[0, 19, 0][0, 17, 0]
IOB0:I2MUX[0, 21, 0][0, 20, 0]
IOB1:I1MUX[0, 16, 0][0, 15, 1]
IOB1:I2MUX[0, 15, 0][0, 14, 0]
I01
IQL10
IQ11
IOB0:IFF_D[0, 18, 0][0, 20, 1]
IOB1:IFF_D[0, 16, 1][0, 14, 1]
DELAY00
MEDDELAY01
SYNC10
I11
INT:MUX.LONG.IO.H0[0, 4, 6][0, 16, 4]
0.LONG.V000
0.SINGLE.V101
NONE11
INT:MUX.LONG.IO.H1[0, 23, 3][0, 14, 2][0, 18, 4][0, 17, 1]
0.LONG.V10001
0.LONG.V30010
0.SINGLE.V20111
NONE1111
INT:MUX.IMUX.IOB1.IK[0, 16, 6][0, 14, 6][0, 14, 5][0, 15, 5][0, 16, 5][0, 17, 5]
0.GCLK1000011
0.GCLK2000101
0.GCLK3000110
0.GCLK0001111
2.SINGLE.V2110011
2.SINGLE.V3110101
2.SINGLE.V4110110
2.SINGLE.V5111111
INT:MUX.IMUX.IOB0.IK[0, 18, 5][0, 19, 5][0, 20, 5][0, 21, 5][0, 19, 6][0, 18, 6]
0.GCLK1001100
0.SINGLE.V2001111
0.GCLK2010100
0.SINGLE.V4010111
0.GCLK3011000
0.SINGLE.V5011011
0.GCLK0111100
0.SINGLE.V3111111
INT:MUX.LONG.IO.H2[0, 22, 3][0, 20, 4][0, 21, 4][0, 22, 4]
0.LONG.V20001
0.LONG.V40010
0.SINGLE.V50111
NONE1111
INT:MUX.LONG.IO.H3[0, 4, 5][0, 23, 4]
0.LONG.V500
0.SINGLE.V601
NONE11
INT:MUX.IMUX.IOB0.OK[0, 23, 5][0, 23, 6][0, 24, 6][0, 25, 6][0, 28, 6][0, 26, 6]
0.GCLK1001100
0.SINGLE.V3001111
0.GCLK2010100
0.SINGLE.V4010111
0.GCLK3011000
0.SINGLE.V5011011
0.GCLK0111100
0.SINGLE.V2111111
INT:MUX.IMUX.IOB0.O1[0, 26, 4][0, 26, 3][0, 29, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
0.DOUBLE.V0.00011111
0.LONG.V50100110
0.LONG.V30111011
0.LONG.V40111101
0.DOUBLE.V1.11100111
GND1111111
INT:MUX.LONG.V0[0, 26, 5][0, 29, 5][0, 27, 5]
0.LONG.IO.H0000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.LONG.V2[0, 31, 5][0, 32, 5][0, 30, 5]
0.LONG.IO.H2000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.IO.DBUF.H1[0, 33, 3][0, 34, 3][0, 35, 3][0, 33, 1]
0.IO.DOUBLE.1.S.20011
0.IO.DOUBLE.2.S.20101
0.IO.DOUBLE.3.S.20110
0.IO.DOUBLE.0.S.21111
INT:MUX.LONG.V1[0, 35, 5][0, 34, 6][0, 33, 5]
0.LONG.IO.H1000
0.OUT.BT.IOB1.I2.E011
NONE111

IO.BS.L

IO.BS.L bittile 0
RowColumn
01234567891011121314151617181920212223242526272829303132333435
0 ~IOB1:INV.TIOB1:SLEW~IOB1:INV.OFF_CLKIOB1:OMUX[2]IOB1:OMUX[3]IOB1:OMUX[0]INT:MUX.IMUX.IOB0.TS[0]IOB1:OMUX[1]IOB1:MUX.OFF_D~IOB1:INV.OFF_DIOB1:OFF_USEDIOB1:SYNC_D~IOB1:IFF_SRVAL~IOB1:INV.IFF_CLKIOB1:I2MUX[0]IOB1:I2MUX[1]IOB1:I1MUX[1]IOB0:I1MUX[0]IOB0:IFF_D[1]IOB0:I1MUX[1]IOB0:I2MUX[0]IOB0:I2MUX[1]~IOB0:INV.IFF_CLK~IOB0:IFF_SRVALIOB0:OFF_USED~IOB0:INV.OFF_DIOB0:MUX.OFF_DIOB0:OMUX[2]IOB0:OMUX[3]IOB0:OMUX[1]~IOB0:OFF_CE_ENABLEIOB0:OMUX[0]~IOB0:INV.OFF_CLKIOB0:SLEW~IOB0:INV.T-
1 INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IO.DBUF.H0[1]INT:MUX.IO.DBUF.H0[0]~INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.H1~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:PULL[1]IOB1:IFF_D[0]IOB1:I1MUX[0]IOB1:IFF_D[1]INT:MUX.LONG.IO.H1[0]~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.1~IOB0:IFF_CE_ENABLEIOB0:IFF_D[0]IOB0:SYNC_DIOB0:PULL[1]IOB0:PULL[0]~IOB0:OFF_SRVAL~INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.S.2~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.0~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.2~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.0INT:MUX.IO.DBUF.H1[0]~INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0
2 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[2]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0
3 INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1-INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[4]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4 INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]----~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
5 ---INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
6 -INT:MUX.LONG.V4[0]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[1]-INT:MUX.LONG.V3[0]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[0]-INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[5]--INT:MUX.IMUX.IOB1.IK[4]-INT:MUX.IMUX.IOB1.IK[5]-INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]--~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[0]-INT:MUX.IMUX.IOB0.OK[1]-~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2-INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E
7 ------------------------------------
8 ------------~INT:PASS.SINGLE.H0.0.GND~INT:PASS.DOUBLE.H1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.H0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.H4.0.OUT.BT.IOB0.I2~INT:BIPASS.SINGLE.V0.SINGLE.V0.S~INT:BIPASS.SINGLE.H0.SINGLE.V0.S~INT:BIPASS.SINGLE.H0.SINGLE.H0.E~INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S~INT:BIPASS.SINGLE.H0.E.SINGLE.V0~INT:BIPASS.SINGLE.H0.SINGLE.V0~INT:PASS.SINGLE.V0.0.GND~INT:BIPASS.SINGLE.H1.SINGLE.V1.S~INT:BIPASS.SINGLE.H1.SINGLE.V1~INT:BIPASS.SINGLE.H1.SINGLE.H1.E~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2~INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0~INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2~INT:BIPASS.SINGLE.H5.SINGLE.V5~INT:BIPASS.SINGLE.H5.SINGLE.H5.E~INT:BIPASS.SINGLE.H5.E.SINGLE.V5~INT:BIPASS.SINGLE.H5.SINGLE.V5.S~INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S~INT:BIPASS.SINGLE.V5.SINGLE.V5.S
9 INT:MUX.IMUX.CLB.C2[6]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.CLB.G2[7]INT:MUX.IMUX.CLB.G2[2]INT:MUX.IMUX.CLB.G4[4]INT:MUX.IMUX.CLB.G4[0]--INT:MUX.IMUX.CLB.F4[5]-INT:MUX.IMUX.CLB.F4[3]INT:MUX.IMUX.CLB.F2[5]INT:MUX.IMUX.CLB.F2[0]~INT:PASS.SINGLE.H6.0.GND-~INT:PASS.SINGLE.H1.0.OUT.BT.IOB1.I2~INT:PASS.DOUBLE.H1.1.0.OUT.BT.IOB1.I2~INT:PASS.SINGLE.H5.0.OUT.BT.IOB1.I2~INT:PASS.SINGLE.H1.E.0.LONG.V0~INT:BUF.LONG.V0.0.SINGLE.H1.E~INT:BUF.LONG.H4.0.SINGLE.V5~INT:PASS.SINGLE.V5.0.LONG.H4~INT:PASS.SINGLE.H5.0.LONG.V4~INT:BIPASS.SINGLE.V1.SINGLE.V1.S~INT:BIPASS.SINGLE.H1.E.SINGLE.V1~INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S~INT:BUF.LONG.V4.0.SINGLE.H5~INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0~INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2~INT:BUF.LONG.V2.0.SINGLE.H3.E~INT:BIPASS.SINGLE.H4.SINGLE.V4.S~INT:BIPASS.SINGLE.H4.SINGLE.H4.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S~INT:BIPASS.SINGLE.V4.SINGLE.V4.S~INT:BIPASS.SINGLE.H4.SINGLE.V4~INT:BUF.LONG.H5.0.SINGLE.V6
10 INT:MUX.IMUX.CLB.C2[7]INT:MUX.IMUX.CLB.C2[5]INT:MUX.IMUX.CLB.G2[8]INT:MUX.IMUX.CLB.G2[6]INT:MUX.IMUX.CLB.G4[3]INT:MUX.IMUX.CLB.G4[2]--INT:MUX.IMUX.CLB.F4[4]INT:MUX.IMUX.CLB.F4[7]INT:MUX.IMUX.CLB.F2[6]~INT:PASS.SINGLE.H3.0.GNDINT:MUX.IMUX.CLB.F2[1]~INT:PASS.DOUBLE.H0.0.0.OUT.CLB.FXQ.S~INT:PASS.SINGLE.H2.0.OUT.CLB.FXQ.S~INT:PASS.SINGLE.H6.0.OUT.CLB.FXQ.S-----~INT:PASS.SINGLE.V4.0.LONG.H3~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5
11 INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.G2[4]INT:MUX.IMUX.CLB.G2[5]INT:MUX.IMUX.CLB.G2[1]INT:MUX.IMUX.CLB.G4[1]INT:MUX.IMUX.CLB.G4[5]--INT:MUX.IMUX.CLB.F4[6]INT:MUX.IMUX.CLB.F4[0]INT:MUX.IMUX.CLB.F2[4]INT:MUX.IMUX.CLB.F2[2]---------~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
12 INT:MUX.IMUX.CLB.C2[2]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.G2[3]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.CLB.G4[6]INT:MUX.IMUX.CLB.G4[7]--INT:MUX.IMUX.CLB.F4[2]INT:MUX.IMUX.CLB.F4[1]INT:MUX.IMUX.CLB.F2[7]INT:MUX.IMUX.CLB.F2[3]~INT:PASS.SINGLE.H7.0.GND~INT:PASS.SINGLE.H3.0.OUT.CLB.FX.S~INT:PASS.SINGLE.H7.0.OUT.CLB.FX.S~INT:PASS.DOUBLE.H0.1.0.OUT.CLB.FX.S---~INT:BUF.LONG.V3.0.SINGLE.H4~INT:PASS.SINGLE.H4.0.LONG.V3~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2[0, 24, 12]
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0[0, 22, 12]
INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2[0, 23, 12]
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0[0, 24, 10]
INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2[0, 24, 11]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.H1.2[0, 28, 9]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.0[0, 27, 9]
INT:BIPASS.DOUBLE.H1.0.DOUBLE.V1.2[0, 26, 8]
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.0[0, 28, 8]
INT:BIPASS.DOUBLE.H1.2.DOUBLE.V1.2[0, 29, 8]
INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2[0, 22, 11]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0[0, 26, 2]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1[0, 24, 3]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.2[0, 27, 1]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0[0, 21, 2]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1[0, 20, 2]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2[0, 25, 2]
INT:BIPASS.DOUBLE.V1.0.DOUBLE.V1.2[0, 27, 8]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.0[0, 28, 1]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1[0, 29, 2]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.2[0, 30, 1]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0[0, 31, 2]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.1[0, 31, 1]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2[0, 33, 2]
INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2[0, 23, 2]
INT:BIPASS.IO.DOUBLE.1.S.0.IO.DOUBLE.1.S.2[0, 25, 1]
INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2[0, 30, 3]
INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2[0, 32, 3]
INT:BIPASS.SINGLE.H0.E.SINGLE.V0[0, 20, 8]
INT:BIPASS.SINGLE.H0.E.SINGLE.V0.S[0, 19, 8]
INT:BIPASS.SINGLE.H0.SINGLE.H0.E[0, 18, 8]
INT:BIPASS.SINGLE.H0.SINGLE.V0[0, 21, 8]
INT:BIPASS.SINGLE.H0.SINGLE.V0.S[0, 17, 8]
INT:BIPASS.SINGLE.H1.E.SINGLE.V1[0, 24, 9]
INT:BIPASS.SINGLE.H1.E.SINGLE.V1.S[0, 25, 9]
INT:BIPASS.SINGLE.H1.SINGLE.H1.E[0, 25, 8]
INT:BIPASS.SINGLE.H1.SINGLE.V1[0, 24, 8]
INT:BIPASS.SINGLE.H1.SINGLE.V1.S[0, 23, 8]
INT:BIPASS.SINGLE.H2.E.SINGLE.V2[0, 26, 12]
INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S[0, 27, 12]
INT:BIPASS.SINGLE.H2.SINGLE.H2.E[0, 27, 11]
INT:BIPASS.SINGLE.H2.SINGLE.V2[0, 26, 11]
INT:BIPASS.SINGLE.H2.SINGLE.V2.S[0, 28, 11]
INT:BIPASS.SINGLE.H3.E.SINGLE.V3[0, 27, 10]
INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S[0, 28, 10]
INT:BIPASS.SINGLE.H3.SINGLE.H3.E[0, 26, 10]
INT:BIPASS.SINGLE.H3.SINGLE.V3[0, 23, 10]
INT:BIPASS.SINGLE.H3.SINGLE.V3.S[0, 25, 10]
INT:BIPASS.SINGLE.H4.E.SINGLE.V4[0, 34, 11]
INT:BIPASS.SINGLE.H4.E.SINGLE.V4.S[0, 32, 9]
INT:BIPASS.SINGLE.H4.SINGLE.H4.E[0, 31, 9]
INT:BIPASS.SINGLE.H4.SINGLE.V4[0, 34, 9]
INT:BIPASS.SINGLE.H4.SINGLE.V4.S[0, 30, 9]
INT:BIPASS.SINGLE.H5.E.SINGLE.V5[0, 32, 8]
INT:BIPASS.SINGLE.H5.E.SINGLE.V5.S[0, 34, 8]
INT:BIPASS.SINGLE.H5.SINGLE.H5.E[0, 31, 8]
INT:BIPASS.SINGLE.H5.SINGLE.V5[0, 30, 8]
INT:BIPASS.SINGLE.H5.SINGLE.V5.S[0, 33, 8]
INT:BIPASS.SINGLE.H6.E.SINGLE.V6[0, 29, 10]
INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S[0, 32, 10]
INT:BIPASS.SINGLE.H6.SINGLE.H6.E[0, 30, 10]
INT:BIPASS.SINGLE.H6.SINGLE.V6[0, 31, 11]
INT:BIPASS.SINGLE.H6.SINGLE.V6.S[0, 31, 10]
INT:BIPASS.SINGLE.H7.E.SINGLE.V7[0, 32, 12]
INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S[0, 34, 12]
INT:BIPASS.SINGLE.H7.SINGLE.H7.E[0, 33, 12]
INT:BIPASS.SINGLE.H7.SINGLE.V7[0, 30, 12]
INT:BIPASS.SINGLE.H7.SINGLE.V7.S[0, 32, 11]
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.1[0, 18, 1]
INT:BIPASS.SINGLE.V0.SINGLE.V0.S[0, 16, 8]
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.0[0, 22, 2]
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2[0, 24, 2]
INT:BIPASS.SINGLE.V1.SINGLE.V1.S[0, 23, 9]
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1[0, 25, 3]
INT:BIPASS.SINGLE.V2.SINGLE.V2.S[0, 25, 12]
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.0[0, 27, 2]
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.2[0, 26, 1]
INT:BIPASS.SINGLE.V3.SINGLE.V3.S[0, 22, 10]
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1[0, 28, 2]
INT:BIPASS.SINGLE.V4.SINGLE.V4.S[0, 33, 9]
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.0[0, 30, 2]
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.2[0, 29, 1]
INT:BIPASS.SINGLE.V5.SINGLE.V5.S[0, 35, 8]
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1[0, 31, 3]
INT:BIPASS.SINGLE.V6.SINGLE.V6.S[0, 33, 10]
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.0[0, 32, 1]
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2[0, 32, 2]
INT:BIPASS.SINGLE.V7.SINGLE.V7.S[0, 31, 12]
INT:BUF.LONG.H3.0.SINGLE.V4[0, 24, 5]
INT:BUF.LONG.H4.0.SINGLE.V5[0, 20, 9]
INT:BUF.LONG.H5.0.SINGLE.V6[0, 35, 9]
INT:BUF.LONG.V0.0.SINGLE.H1.E[0, 19, 9]
INT:BUF.LONG.V1.0.SINGLE.H2.E[0, 33, 11]
INT:BUF.LONG.V2.0.SINGLE.H3.E[0, 29, 9]
INT:BUF.LONG.V3.0.SINGLE.H4[0, 19, 12]
INT:BUF.LONG.V4.0.SINGLE.H5[0, 26, 9]
INT:BUF.LONG.V5.0.SINGLE.H6[0, 30, 11]
INT:PASS.DOUBLE.H0.0.0.OUT.CLB.FXQ.S[0, 13, 10]
INT:PASS.DOUBLE.H0.1.0.OUT.CLB.FX.S[0, 15, 12]
INT:PASS.DOUBLE.H1.0.0.OUT.BT.IOB0.I2[0, 13, 8]
INT:PASS.DOUBLE.H1.1.0.OUT.BT.IOB1.I2[0, 16, 9]
INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1[0, 20, 3]
INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2[0, 31, 6]
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E[0, 30, 6]
INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1[0, 10, 2]
INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0[0, 35, 2]
INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1[0, 9, 2]
INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0[0, 34, 2]
INT:PASS.IO.DOUBLE.2.S.0.0.IO.DBUF.H1[0, 9, 1]
INT:PASS.IO.DOUBLE.2.S.2.0.IO.DBUF.H0[0, 34, 1]
INT:PASS.IO.DOUBLE.3.S.0.0.IO.DBUF.H1[0, 10, 1]
INT:PASS.IO.DOUBLE.3.S.2.0.IO.DBUF.H0[0, 35, 1]
INT:PASS.SINGLE.H0.0.GND[0, 12, 8]
INT:PASS.SINGLE.H0.0.OUT.BT.IOB0.I2[0, 14, 8]
INT:PASS.SINGLE.H1.0.OUT.BT.IOB1.I2[0, 15, 9]
INT:PASS.SINGLE.H1.E.0.LONG.V0[0, 18, 9]
INT:PASS.SINGLE.H2.0.OUT.CLB.FXQ.S[0, 14, 10]
INT:PASS.SINGLE.H2.E.0.LONG.V1[0, 35, 12]
INT:PASS.SINGLE.H3.0.GND[0, 11, 10]
INT:PASS.SINGLE.H3.0.OUT.CLB.FX.S[0, 13, 12]
INT:PASS.SINGLE.H3.E.0.LONG.V2[0, 34, 10]
INT:PASS.SINGLE.H4.0.LONG.V3[0, 20, 12]
INT:PASS.SINGLE.H4.0.OUT.BT.IOB0.I2[0, 15, 8]
INT:PASS.SINGLE.H5.0.LONG.V4[0, 22, 9]
INT:PASS.SINGLE.H5.0.OUT.BT.IOB1.I2[0, 17, 9]
INT:PASS.SINGLE.H6.0.GND[0, 13, 9]
INT:PASS.SINGLE.H6.0.LONG.V5[0, 29, 12]
INT:PASS.SINGLE.H6.0.OUT.CLB.FXQ.S[0, 15, 10]
INT:PASS.SINGLE.H7.0.GND[0, 12, 12]
INT:PASS.SINGLE.H7.0.OUT.CLB.FX.S[0, 14, 12]
INT:PASS.SINGLE.V0.0.GND[0, 22, 8]
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E[0, 22, 5]
INT:PASS.SINGLE.V1.0.LONG.IO.H0[0, 15, 4]
INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2[0, 22, 6]
INT:PASS.SINGLE.V2.0.LONG.IO.H1[0, 17, 4]
INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1[0, 25, 4]
INT:PASS.SINGLE.V4.0.LONG.H3[0, 21, 10]
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E[0, 35, 6]
INT:PASS.SINGLE.V5.0.LONG.H4[0, 21, 9]
INT:PASS.SINGLE.V5.0.LONG.IO.H2[0, 33, 4]
INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2[0, 32, 6]
INT:PASS.SINGLE.V6.0.LONG.H5[0, 35, 10]
INT:PASS.SINGLE.V6.0.LONG.IO.H3[0, 34, 4]
INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1[0, 25, 5]
INT:PASS.SINGLE.V7.0.GND[0, 21, 12]
IOB0:IFF_CE_ENABLE[0, 19, 1]
IOB0:IFF_CE_ENABLE_NO_IQ[0, 8, 4]
IOB0:IFF_SRVAL[0, 23, 0]
IOB0:INV.IFF_CLK[0, 22, 0]
IOB0:INV.OFF_CLK[0, 32, 0]
IOB0:INV.OFF_D[0, 25, 0]
IOB0:INV.T[0, 34, 0]
IOB0:OFF_CE_ENABLE[0, 30, 0]
IOB0:OFF_SRVAL[0, 24, 1]
IOB0:READBACK_I1[0, 18, 3]
IOB0:READBACK_I2[0, 18, 2]
IOB0:READBACK_OFF[0, 16, 3]
IOB1:IFF_CE_ENABLE[0, 13, 2]
IOB1:IFF_CE_ENABLE_NO_IQ[0, 8, 3]
IOB1:IFF_SRVAL[0, 12, 0]
IOB1:INV.IFF_CLK[0, 13, 0]
IOB1:INV.OFF_CLK[0, 2, 0]
IOB1:INV.OFF_D[0, 9, 0]
IOB1:INV.T[0, 0, 0]
IOB1:OFF_CE_ENABLE[0, 12, 2]
IOB1:OFF_SRVAL[0, 11, 1]
IOB1:READBACK_I1[0, 17, 2]
IOB1:READBACK_I2[0, 17, 3]
IOB1:READBACK_OFF[0, 16, 2]
Inverted~[0]
IOB0:SLEW[0, 33, 0]
IOB1:SLEW[0, 1, 0]
FAST0
SLOW1
INT:MUX.LONG.V4[0, 5, 5][0, 2, 6][0, 1, 6]
0.LONG.IO.H2000
0.OUT.BT.IOB0.I2011
NONE111
INT:MUX.IMUX.CLB.C2[0, 0, 10][0, 0, 9][0, 1, 10][0, 1, 12][0, 0, 11][0, 0, 12][0, 1, 9][0, 1, 11]
0.LONG.H400001111
0.SINGLE.H500011101
0.LONG.H300011110
0.SINGLE.H000111111
0.SINGLE.H201000111
0.SINGLE.H301001011
0.SINGLE.H701010101
0.DOUBLE.H0.001010110
1.LONG.H101011001
0.SINGLE.H601011010
0.DOUBLE.H0.101110111
1.LONG.H2.BUF01111011
0.DOUBLE.H1.111001111
0.SINGLE.H411011101
0.DOUBLE.H1.011011110
0.SINGLE.H111111111
INT:MUX.IMUX.IOB1.O1[0, 0, 4][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 4][0, 2, 4][0, 3, 5]
0.LONG.IO.H20111101
2.DOUBLE.V1.00111110
2.DOUBLE.V0.11011101
2.LONG.V21011110
2.LONG.V01101101
2.LONG.V11110101
GND1111001
INT:MUX.IMUX.CLB.G2[0, 2, 10][0, 2, 9][0, 3, 10][0, 3, 11][0, 2, 11][0, 2, 12][0, 3, 9][0, 4, 11][0, 3, 12]
0.LONG.H4000011111
0.SINGLE.H4000111011
0.LONG.H5000111101
0.SINGLE.H1001111111
0.SINGLE.H2010001111
0.SINGLE.H3010010111
0.SINGLE.H7010101011
0.DOUBLE.H0.0010101101
1.LONG.H2.BUF010110011
0.SINGLE.H6010110101
COUT0010111110
1.LONG.H0011101111
0.DOUBLE.H0.1011110111
0.DOUBLE.H1.1110011111
0.SINGLE.H5110111011
0.DOUBLE.H1.0110111101
0.SINGLE.H0111111111
IOB0:OMUX[0, 28, 0][0, 27, 0][0, 29, 0][0, 31, 0]
IOB1:OMUX[0, 4, 0][0, 3, 0][0, 7, 0][0, 5, 0]
CE0000
CE.INV0001
OFF0010
O0111
MUX1011
O.INV1111
INT:MUX.IMUX.CLB.G4[0, 5, 12][0, 4, 12][0, 6, 11][0, 4, 9][0, 4, 10][0, 5, 10][0, 5, 11][0, 5, 9]
0.SINGLE.H000001111
0.SINGLE.H100010111
1.LONG.H000011101
0.DOUBLE.H1.100101011
0.LONG.H300101110
0.LONG.H500110011
0.DOUBLE.H1.000110110
0.SINGLE.H300111001
0.SINGLE.H600111100
0.DOUBLE.H0.101011111
0.SINGLE.H201111011
0.DOUBLE.H0.001111110
0.SINGLE.H510101111
0.SINGLE.H410110111
1.LONG.H110111101
0.SINGLE.H711111111
INT:MUX.IMUX.IOB0.TS[0, 5, 2][0, 6, 2][0, 6, 1][0, 3, 2][0, 4, 2][0, 5, 1][0, 4, 1][0, 6, 0]
0.LONG.IO.H300100111
0.LONG.IO.H000101011
0.LONG.IO.H200101101
0.IO.DOUBLE.0.S.100111111
0.GCLK001001101
0.IO.DOUBLE.1.S.001011111
GND01101110
0.IO.DOUBLE.1.S.111100111
0.LONG.IO.H111101011
0.IO.DOUBLE.0.S.011111111
INT:MUX.LONG.V3[0, 6, 5][0, 7, 6][0, 6, 6]
0.LONG.IO.H1000
0.OUT.BT.IOB0.I2011
NONE111
IOB0:MUX.OFF_D[0, 26, 0]
IOB1:MUX.OFF_D[0, 8, 0]
O0
CE1
INT:MUX.IO.DBUF.H0[0, 7, 2][0, 8, 2][0, 7, 1][0, 8, 1]
0.IO.DOUBLE.0.S.00011
0.IO.DOUBLE.2.S.00101
0.IO.DOUBLE.3.S.00110
0.IO.DOUBLE.1.S.01111
INT:MUX.LONG.V5[0, 8, 5][0, 9, 5][0, 8, 6]
0.LONG.IO.H3000
0.OUT.BT.IOB0.I2011
NONE111
IOB0:5V_TOLERANT_IO[0, 13, 4]
IOB0:OFF_USED[0, 24, 0]
IOB1:5V_TOLERANT_IO[0, 12, 4]
IOB1:OFF_USED[0, 10, 0]
Non-inverted[0]
IOB0:TMUX[0, 13, 3]
IOB1:TMUX[0, 10, 3]
TFF0
T1
INT:MUX.IMUX.CLB.F4[0, 9, 10][0, 9, 11][0, 8, 9][0, 8, 10][0, 10, 9][0, 8, 12][0, 9, 12][0, 10, 11]
0.SINGLE.H000001111
0.DOUBLE.H0.100011011
1.LONG.H000011101
0.SINGLE.H100111111
0.LONG.H501000111
0.LONG.H301001110
0.SINGLE.H201010011
0.SINGLE.H301010101
0.SINGLE.H701011010
1.LONG.H101011100
0.DOUBLE.H1.101110111
0.DOUBLE.H1.001111110
0.SINGLE.H511001111
0.DOUBLE.H0.011011011
0.SINGLE.H611011101
0.SINGLE.H411111111
IOB0:SYNC_D[0, 21, 1]
IOB1:SYNC_D[0, 11, 0]
DELAY0
I1
INT:MUX.IMUX.IOB1.TS[0, 0, 1][0, 2, 1][0, 1, 2][0, 2, 2][0, 3, 1][0, 1, 1][0, 0, 2][0, 11, 2]
0.LONG.IO.H000001111
0.GCLK000010111
0.IO.DOUBLE.0.S.000111111
0.LONG.IO.H301001011
0.LONG.IO.H201001101
GND01011110
0.LONG.IO.H101111011
0.IO.DOUBLE.1.S.011001111
0.IO.DOUBLE.1.S.111010111
0.IO.DOUBLE.0.S.111111111
IOB0:PULL[0, 22, 1][0, 23, 1]
IOB1:PULL[0, 13, 1][0, 12, 1]
PULLUP01
PULLDOWN10
NONE11
IOB0:DRIVE[0, 14, 4]
IOB1:DRIVE[0, 12, 3]
240
121
INT:MUX.IMUX.CLB.F2[0, 10, 12][0, 10, 10][0, 11, 9][0, 11, 11][0, 11, 12][0, 12, 11][0, 12, 10][0, 12, 9]
0.SINGLE.H500110011
0.LONG.H500110101
0.DOUBLE.H1.100110110
0.SINGLE.H000111111
0.SINGLE.H401010011
0.DOUBLE.H1.001010101
0.LONG.H401010110
0.SINGLE.H101011111
0.SINGLE.H601100011
1.LONG.H2.BUF01100101
1.LONG.H001100110
0.SINGLE.H301101111
0.DOUBLE.H0.011110011
0.SINGLE.H711110101
0.DOUBLE.H0.111110110
0.SINGLE.H211111111
INT:MUX.IMUX.IOB1.OK[0, 11, 6][0, 10, 6][0, 10, 5][0, 12, 5][0, 11, 5][0, 13, 5]
0.GCLK1000011
0.GCLK2000101
0.GCLK3000110
0.GCLK0001111
2.SINGLE.V2110011
2.SINGLE.V3110101
2.SINGLE.V5110110
2.SINGLE.V4111111
IOB0:I1MUX[0, 19, 0][0, 17, 0]
IOB0:I2MUX[0, 21, 0][0, 20, 0]
IOB1:I1MUX[0, 16, 0][0, 15, 1]
IOB1:I2MUX[0, 15, 0][0, 14, 0]
I01
IQL10
IQ11
IOB0:IFF_D[0, 18, 0][0, 20, 1]
IOB1:IFF_D[0, 16, 1][0, 14, 1]
DELAY00
MEDDELAY01
SYNC10
I11
INT:MUX.LONG.IO.H0[0, 4, 6][0, 16, 4]
0.LONG.V000
0.SINGLE.V101
NONE11
INT:MUX.LONG.IO.H1[0, 23, 3][0, 14, 2][0, 18, 4][0, 17, 1]
0.LONG.V10001
0.LONG.V30010
0.SINGLE.V20111
NONE1111
INT:MUX.IMUX.IOB1.IK[0, 16, 6][0, 14, 6][0, 14, 5][0, 15, 5][0, 16, 5][0, 17, 5]
0.GCLK1000011
0.GCLK2000101
0.GCLK3000110
0.GCLK0001111
2.SINGLE.V2110011
2.SINGLE.V3110101
2.SINGLE.V4110110
2.SINGLE.V5111111
INT:MUX.IMUX.IOB0.IK[0, 18, 5][0, 19, 5][0, 20, 5][0, 21, 5][0, 19, 6][0, 18, 6]
0.GCLK1001100
0.SINGLE.V2001111
0.GCLK2010100
0.SINGLE.V4010111
0.GCLK3011000
0.SINGLE.V5011011
0.GCLK0111100
0.SINGLE.V3111111
INT:MUX.LONG.IO.H2[0, 22, 3][0, 20, 4][0, 21, 4][0, 22, 4]
0.LONG.V20001
0.LONG.V40010
0.SINGLE.V50111
NONE1111
INT:MUX.LONG.IO.H3[0, 4, 5][0, 23, 4]
0.LONG.V500
0.SINGLE.V601
NONE11
INT:MUX.IMUX.IOB0.OK[0, 23, 5][0, 23, 6][0, 24, 6][0, 25, 6][0, 28, 6][0, 26, 6]
0.GCLK1001100
0.SINGLE.V3001111
0.GCLK2010100
0.SINGLE.V4010111
0.GCLK3011000
0.SINGLE.V5011011
0.GCLK0111100
0.SINGLE.V2111111
INT:MUX.IMUX.IOB0.O1[0, 26, 4][0, 26, 3][0, 29, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
0.DOUBLE.V0.00011111
0.LONG.V50100110
0.LONG.V30111011
0.LONG.V40111101
0.DOUBLE.V1.11100111
GND1111111
INT:MUX.LONG.V0[0, 26, 5][0, 29, 5][0, 27, 5]
0.LONG.IO.H0000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.LONG.V2[0, 31, 5][0, 32, 5][0, 30, 5]
0.LONG.IO.H2000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.IO.DBUF.H1[0, 33, 3][0, 34, 3][0, 35, 3][0, 33, 1]
0.IO.DOUBLE.1.S.20011
0.IO.DOUBLE.2.S.20101
0.IO.DOUBLE.3.S.20110
0.IO.DOUBLE.0.S.21111
INT:MUX.LONG.V1[0, 35, 5][0, 34, 6][0, 33, 5]
0.LONG.IO.H1000
0.OUT.BT.IOB1.I2.E011
NONE111

IO.T

IO.T bittile 0
RowColumn
01234567891011121314151617181920212223242526272829303132333435
0 -INT:MUX.LONG.V4[0]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[1]-INT:MUX.LONG.V3[0]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[0]-INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[5]--INT:MUX.IMUX.IOB1.IK[4]-INT:MUX.IMUX.IOB1.IK[5]-INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]--~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[0]-INT:MUX.IMUX.IOB0.OK[1]-~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2-INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E
1 ---INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
2 INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
3 INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[4]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[2]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0
5 INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IO.DBUF.H0[1]INT:MUX.IO.DBUF.H0[0]~INT:PASS.IO.DOUBLE.2.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.3.N.2.0.IO.DBUF.H1~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:PULL[1]IOB1:IFF_D[0]IOB1:I1MUX[0]IOB1:IFF_D[1]INT:MUX.LONG.IO.H1[0]~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.1~IOB0:IFF_CE_ENABLEIOB0:IFF_D[0]IOB0:SYNC_DIOB0:PULL[1]IOB0:PULL[0]~IOB0:OFF_SRVAL~INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.0~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.1~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[0]~INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0
6 ~IOB1:INV.TIOB1:SLEW~IOB1:INV.OFF_CLKIOB1:OMUX[2]IOB1:OMUX[3]IOB1:OMUX[0]INT:MUX.IMUX.IOB0.TS[0]IOB1:OMUX[1]IOB1:MUX.OFF_D~IOB1:INV.OFF_DIOB1:OFF_USEDIOB1:SYNC_D~IOB1:IFF_SRVAL~IOB1:INV.IFF_CLKIOB1:I2MUX[0]IOB1:I2MUX[1]IOB1:I1MUX[1]IOB0:I1MUX[0]IOB0:IFF_D[1]IOB0:I1MUX[1]IOB0:I2MUX[0]IOB0:I2MUX[1]~IOB0:INV.IFF_CLK~IOB0:IFF_SRVALIOB0:OFF_USED~IOB0:INV.OFF_DIOB0:MUX.OFF_DIOB0:OMUX[2]IOB0:OMUX[3]IOB0:OMUX[1]~IOB0:OFF_CE_ENABLEIOB0:OMUX[0]~IOB0:INV.OFF_CLKIOB0:SLEW~IOB0:INV.T-
IO.T bittile 1
RowColumn
01234567891011121314151617181920212223242526272829
0 ------------------------------
1 ------------------------------
2 ------------------------------
3 ------------------------------
4 ------------------------------
5 ------------------------------
6 ------------------------------
7 ------------------------------
8 ---------------------~INT:BUF.LONG.H0.0.SINGLE.V1-~INT:PASS.SINGLE.V1.0.LONG.H0-~INT:BUF.LONG.H1.0.SINGLE.V2---~INT:PASS.SINGLE.V2.0.LONG.H1
9 ----------------------------~INT:PASS.SINGLE.V3.0.LONG.H2-
IO.T bittile 2
RowColumn
IO.T bittile 3
RowColumn
012345
0 -----~INT:BUF.LONG.V0.0.OUT.TOP.COUT.E
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0[0, 27, 5]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1[0, 24, 3]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2[0, 26, 4]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0[0, 25, 4]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1[0, 20, 4]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2[0, 21, 4]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0[0, 30, 5]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1[0, 29, 4]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.2[0, 28, 5]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0[0, 33, 4]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.1[0, 31, 5]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2[0, 31, 4]
INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2[0, 23, 4]
INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.N.2[0, 25, 5]
INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2[0, 30, 3]
INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2[0, 32, 3]
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.0[0, 24, 4]
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.2[0, 22, 4]
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.1[0, 18, 5]
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.0[0, 26, 5]
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.2[0, 27, 4]
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1[0, 25, 3]
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.0[0, 29, 5]
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.2[0, 30, 4]
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.1[0, 28, 4]
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.0[0, 32, 4]
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.2[0, 32, 5]
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1[0, 31, 3]
INT:BUF.LONG.H0.0.SINGLE.V1[1, 21, 8]
INT:BUF.LONG.H1.0.SINGLE.V2[1, 25, 8]
INT:BUF.LONG.H2.0.SINGLE.V3[0, 24, 1]
INT:BUF.LONG.V0.0.OUT.TOP.COUT.E[3, 5, 0]
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E[0, 21, 3]
INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1[0, 20, 3]
INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2[0, 31, 0]
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E[0, 30, 0]
INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0[0, 35, 4]
INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1[0, 10, 4]
INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0[0, 34, 4]
INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1[0, 9, 4]
INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0[0, 34, 5]
INT:PASS.IO.DOUBLE.2.N.2.0.IO.DBUF.H1[0, 9, 5]
INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0[0, 35, 5]
INT:PASS.IO.DOUBLE.3.N.2.0.IO.DBUF.H1[0, 10, 5]
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E[0, 22, 1]
INT:PASS.SINGLE.V1.0.LONG.H0[1, 23, 8]
INT:PASS.SINGLE.V1.0.LONG.IO.H0[0, 15, 2]
INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2[0, 22, 0]
INT:PASS.SINGLE.V2.0.LONG.H1[1, 29, 8]
INT:PASS.SINGLE.V2.0.LONG.IO.H1[0, 17, 2]
INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1[0, 25, 2]
INT:PASS.SINGLE.V3.0.LONG.H2[1, 28, 9]
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E[0, 29, 2]
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E[0, 35, 0]
INT:PASS.SINGLE.V5.0.LONG.IO.H2[0, 33, 2]
INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2[0, 32, 0]
INT:PASS.SINGLE.V6.0.LONG.IO.H3[0, 34, 2]
INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1[0, 25, 1]
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E[0, 32, 2]
IOB0:IFF_CE_ENABLE[0, 19, 5]
IOB0:IFF_CE_ENABLE_NO_IQ[0, 8, 2]
IOB0:IFF_SRVAL[0, 23, 6]
IOB0:INV.IFF_CLK[0, 22, 6]
IOB0:INV.OFF_CLK[0, 32, 6]
IOB0:INV.OFF_D[0, 25, 6]
IOB0:INV.T[0, 34, 6]
IOB0:OFF_CE_ENABLE[0, 30, 6]
IOB0:OFF_SRVAL[0, 24, 5]
IOB0:READBACK_I1[0, 18, 3]
IOB0:READBACK_I2[0, 18, 4]
IOB0:READBACK_OFF[0, 16, 3]
IOB1:IFF_CE_ENABLE[0, 13, 4]
IOB1:IFF_CE_ENABLE_NO_IQ[0, 8, 3]
IOB1:IFF_SRVAL[0, 12, 6]
IOB1:INV.IFF_CLK[0, 13, 6]
IOB1:INV.OFF_CLK[0, 2, 6]
IOB1:INV.OFF_D[0, 9, 6]
IOB1:INV.T[0, 0, 6]
IOB1:OFF_CE_ENABLE[0, 12, 4]
IOB1:OFF_SRVAL[0, 11, 5]
IOB1:READBACK_I1[0, 17, 4]
IOB1:READBACK_I2[0, 17, 3]
IOB1:READBACK_OFF[0, 16, 4]
Inverted~[0]
INT:MUX.LONG.V4[0, 5, 1][0, 2, 0][0, 1, 0]
0.LONG.IO.H2000
0.OUT.BT.IOB0.I2011
NONE111
IOB0:SLEW[0, 33, 6]
IOB1:SLEW[0, 1, 6]
FAST0
SLOW1
INT:MUX.IMUX.IOB1.O1[0, 0, 2][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 2][0, 2, 2][0, 3, 1]
0.LONG.IO.H20111101
1.DOUBLE.V1.00111110
1.DOUBLE.V0.11011101
1.LONG.V21011110
1.LONG.V01101101
1.LONG.V11110101
GND1111001
IOB0:OMUX[0, 28, 6][0, 27, 6][0, 29, 6][0, 31, 6]
IOB1:OMUX[0, 4, 6][0, 3, 6][0, 7, 6][0, 5, 6]
CE0000
CE.INV0001
OFF0010
O0111
MUX1011
O.INV1111
INT:MUX.LONG.V3[0, 6, 1][0, 7, 0][0, 6, 0]
0.LONG.IO.H1000
0.OUT.BT.IOB0.I2011
NONE111
INT:MUX.IMUX.IOB0.TS[0, 5, 4][0, 6, 4][0, 3, 4][0, 4, 4][0, 6, 5][0, 5, 5][0, 4, 5][0, 6, 6]
0.LONG.IO.H300001111
0.LONG.IO.H000011011
0.LONG.IO.H200011101
0.IO.DOUBLE.0.N.100111111
0.GCLK001010101
GND01011110
0.IO.DOUBLE.1.N.201110111
0.IO.DOUBLE.1.N.111001111
0.LONG.IO.H111011011
0.IO.DOUBLE.0.N.211111111
INT:MUX.LONG.V5[0, 8, 1][0, 9, 1][0, 8, 0]
0.LONG.IO.H3000
0.OUT.BT.IOB0.I2011
NONE111
INT:MUX.IO.DBUF.H0[0, 7, 4][0, 8, 4][0, 7, 5][0, 8, 5]
0.IO.DOUBLE.0.N.20011
0.IO.DOUBLE.2.N.20101
0.IO.DOUBLE.3.N.20110
0.IO.DOUBLE.1.N.21111
IOB0:MUX.OFF_D[0, 26, 6]
IOB1:MUX.OFF_D[0, 8, 6]
O0
CE1
IOB0:TMUX[0, 13, 3]
IOB1:TMUX[0, 10, 3]
TFF0
T1
IOB0:5V_TOLERANT_IO[0, 13, 2]
IOB0:OFF_USED[0, 24, 6]
IOB1:5V_TOLERANT_IO[0, 12, 2]
IOB1:OFF_USED[0, 10, 6]
Non-inverted[0]
INT:MUX.IMUX.IOB1.TS[0, 0, 5][0, 2, 5][0, 1, 4][0, 3, 5][0, 2, 4][0, 1, 5][0, 0, 4][0, 11, 4]
0.GCLK000001111
0.LONG.IO.H000010111
0.IO.DOUBLE.0.N.200111111
0.LONG.IO.H301010011
0.LONG.IO.H201010101
GND01011110
0.LONG.IO.H101111011
0.IO.DOUBLE.1.N.111001111
0.IO.DOUBLE.1.N.211010111
0.IO.DOUBLE.0.N.111111111
IOB0:SYNC_D[0, 21, 5]
IOB1:SYNC_D[0, 11, 6]
DELAY0
I1
IOB0:DRIVE[0, 14, 2]
IOB1:DRIVE[0, 12, 3]
240
121
IOB0:PULL[0, 22, 5][0, 23, 5]
IOB1:PULL[0, 13, 5][0, 12, 5]
PULLUP01
PULLDOWN10
NONE11
INT:MUX.IMUX.IOB1.OK[0, 11, 0][0, 10, 0][0, 10, 1][0, 12, 1][0, 11, 1][0, 13, 1]
0.GCLK1000011
0.GCLK2000101
0.GCLK3000110
0.GCLK0001111
1.SINGLE.V2110011
1.SINGLE.V3110101
1.SINGLE.V5110110
1.SINGLE.V4111111
IOB0:IFF_D[0, 18, 6][0, 20, 5]
IOB1:IFF_D[0, 16, 5][0, 14, 5]
DELAY00
MEDDELAY01
SYNC10
I11
IOB0:I1MUX[0, 19, 6][0, 17, 6]
IOB0:I2MUX[0, 21, 6][0, 20, 6]
IOB1:I1MUX[0, 16, 6][0, 15, 5]
IOB1:I2MUX[0, 15, 6][0, 14, 6]
I01
IQL10
IQ11
INT:MUX.LONG.IO.H0[0, 4, 0][0, 16, 2]
0.LONG.V000
0.SINGLE.V101
NONE11
INT:MUX.IMUX.IOB1.IK[0, 16, 0][0, 14, 0][0, 14, 1][0, 15, 1][0, 16, 1][0, 17, 1]
0.GCLK1000011
0.GCLK2000101
0.GCLK3000110
0.GCLK0001111
1.SINGLE.V2110011
1.SINGLE.V3110101
1.SINGLE.V4110110
1.SINGLE.V5111111
INT:MUX.LONG.IO.H1[0, 23, 3][0, 14, 4][0, 18, 2][0, 17, 5]
0.LONG.V10001
0.LONG.V30010
0.SINGLE.V20111
NONE1111
INT:MUX.IMUX.IOB0.IK[0, 18, 1][0, 19, 1][0, 20, 1][0, 21, 1][0, 19, 0][0, 18, 0]
0.GCLK1001100
0.SINGLE.V2001111
0.GCLK2010100
0.SINGLE.V4010111
0.GCLK3011000
0.SINGLE.V5011011
0.GCLK0111100
0.SINGLE.V3111111
INT:MUX.LONG.IO.H2[0, 22, 3][0, 20, 2][0, 21, 2][0, 22, 2]
0.LONG.V20001
0.LONG.V40010
0.SINGLE.V50111
NONE1111
INT:MUX.LONG.IO.H3[0, 4, 1][0, 23, 2]
0.LONG.V500
0.SINGLE.V601
NONE11
INT:MUX.IMUX.IOB0.OK[0, 23, 1][0, 23, 0][0, 24, 0][0, 25, 0][0, 28, 0][0, 26, 0]
0.GCLK1001100
0.SINGLE.V3001111
0.GCLK2010100
0.SINGLE.V4010111
0.GCLK3011000
0.SINGLE.V5011011
0.GCLK0111100
0.SINGLE.V2111111
INT:MUX.LONG.V0[0, 26, 1][0, 29, 1][0, 27, 1]
0.LONG.IO.H0000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.IMUX.IOB0.O1[0, 26, 2][0, 26, 3][0, 29, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
0.DOUBLE.V0.00011111
0.LONG.V50100110
0.LONG.V30111011
0.LONG.V40111101
0.DOUBLE.V1.11100111
GND1111111
INT:MUX.LONG.V2[0, 31, 1][0, 32, 1][0, 30, 1]
0.LONG.IO.H2000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.LONG.V1[0, 35, 1][0, 34, 0][0, 33, 1]
0.LONG.IO.H1000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.IO.DBUF.H1[0, 33, 3][0, 34, 3][0, 35, 3][0, 33, 5]
0.IO.DOUBLE.1.N.00011
0.IO.DOUBLE.2.N.00101
0.IO.DOUBLE.3.N.00110
0.IO.DOUBLE.0.N.01111

IO.T.R

IO.T.R bittile 0
RowColumn
01234567891011121314151617181920212223242526272829303132333435
0 -INT:MUX.LONG.V4[0]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[1]-INT:MUX.LONG.V3[0]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[0]-INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[5]--INT:MUX.IMUX.IOB1.IK[4]-INT:MUX.IMUX.IOB1.IK[5]-INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]--~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[0]-INT:MUX.IMUX.IOB0.OK[1]-~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2-INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E
1 ---INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
2 INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
3 INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[4]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[2]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0
5 INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IO.DBUF.H0[1]INT:MUX.IO.DBUF.H0[0]~INT:PASS.IO.DOUBLE.2.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.3.N.2.0.IO.DBUF.H1~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:PULL[1]IOB1:IFF_D[0]IOB1:I1MUX[0]IOB1:IFF_D[1]INT:MUX.LONG.IO.H1[0]~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.1~IOB0:IFF_CE_ENABLEIOB0:IFF_D[0]IOB0:SYNC_DIOB0:PULL[1]IOB0:PULL[0]~IOB0:OFF_SRVAL~INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.0~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.1~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[0]~INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0
6 ~IOB1:INV.TIOB1:SLEW~IOB1:INV.OFF_CLKIOB1:OMUX[2]IOB1:OMUX[3]IOB1:OMUX[0]INT:MUX.IMUX.IOB0.TS[0]IOB1:OMUX[1]IOB1:MUX.OFF_D~IOB1:INV.OFF_DIOB1:OFF_USEDIOB1:SYNC_D~IOB1:IFF_SRVAL~IOB1:INV.IFF_CLKIOB1:I2MUX[0]IOB1:I2MUX[1]IOB1:I1MUX[1]IOB0:I1MUX[0]IOB0:IFF_D[1]IOB0:I1MUX[1]IOB0:I2MUX[0]IOB0:I2MUX[1]~IOB0:INV.IFF_CLK~IOB0:IFF_SRVALIOB0:OFF_USED~IOB0:INV.OFF_DIOB0:MUX.OFF_DIOB0:OMUX[2]IOB0:OMUX[3]IOB0:OMUX[1]~IOB0:OFF_CE_ENABLEIOB0:OMUX[0]~IOB0:INV.OFF_CLKIOB0:SLEW~IOB0:INV.T-
IO.T.R bittile 1
RowColumn
01234567891011121314151617181920212223242526272829
0 ------------------------------
1 ------------------------------
2 ------------------------------
3 ------------------------------
4 ------------------------------
5 ------------------------------
6 ------------------------------
7 ------------------------------
8 ---------------------~INT:BUF.LONG.H0.0.SINGLE.V1-~INT:PASS.SINGLE.V1.0.LONG.H0-~INT:BUF.LONG.H1.0.SINGLE.V2---~INT:PASS.SINGLE.V2.0.LONG.H1
9 ----------------------------~INT:PASS.SINGLE.V3.0.LONG.H2-
IO.T.R bittile 2
RowColumn
IO.T.R bittile 3
RowColumn
012345
0 -----~INT:BUF.LONG.V0.0.OUT.TOP.COUT.E
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0[0, 27, 5]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1[0, 24, 3]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2[0, 26, 4]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0[0, 25, 4]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1[0, 20, 4]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2[0, 21, 4]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0[0, 30, 5]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1[0, 29, 4]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.2[0, 28, 5]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0[0, 33, 4]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.1[0, 31, 5]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2[0, 31, 4]
INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2[0, 23, 4]
INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.N.2[0, 25, 5]
INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2[0, 30, 3]
INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2[0, 32, 3]
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.0[0, 24, 4]
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.2[0, 22, 4]
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.1[0, 18, 5]
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.0[0, 26, 5]
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.2[0, 27, 4]
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1[0, 25, 3]
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.0[0, 29, 5]
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.2[0, 30, 4]
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.1[0, 28, 4]
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.0[0, 32, 4]
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.2[0, 32, 5]
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1[0, 31, 3]
INT:BUF.LONG.H0.0.SINGLE.V1[1, 21, 8]
INT:BUF.LONG.H1.0.SINGLE.V2[1, 25, 8]
INT:BUF.LONG.H2.0.SINGLE.V3[0, 24, 1]
INT:BUF.LONG.V0.0.OUT.TOP.COUT.E[3, 5, 0]
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E[0, 21, 3]
INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1[0, 20, 3]
INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2[0, 31, 0]
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E[0, 30, 0]
INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0[0, 35, 4]
INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1[0, 10, 4]
INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0[0, 34, 4]
INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1[0, 9, 4]
INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0[0, 34, 5]
INT:PASS.IO.DOUBLE.2.N.2.0.IO.DBUF.H1[0, 9, 5]
INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0[0, 35, 5]
INT:PASS.IO.DOUBLE.3.N.2.0.IO.DBUF.H1[0, 10, 5]
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E[0, 22, 1]
INT:PASS.SINGLE.V1.0.LONG.H0[1, 23, 8]
INT:PASS.SINGLE.V1.0.LONG.IO.H0[0, 15, 2]
INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2[0, 22, 0]
INT:PASS.SINGLE.V2.0.LONG.H1[1, 29, 8]
INT:PASS.SINGLE.V2.0.LONG.IO.H1[0, 17, 2]
INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1[0, 25, 2]
INT:PASS.SINGLE.V3.0.LONG.H2[1, 28, 9]
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E[0, 29, 2]
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E[0, 35, 0]
INT:PASS.SINGLE.V5.0.LONG.IO.H2[0, 33, 2]
INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2[0, 32, 0]
INT:PASS.SINGLE.V6.0.LONG.IO.H3[0, 34, 2]
INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1[0, 25, 1]
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E[0, 32, 2]
IOB0:IFF_CE_ENABLE[0, 19, 5]
IOB0:IFF_CE_ENABLE_NO_IQ[0, 8, 2]
IOB0:IFF_SRVAL[0, 23, 6]
IOB0:INV.IFF_CLK[0, 22, 6]
IOB0:INV.OFF_CLK[0, 32, 6]
IOB0:INV.OFF_D[0, 25, 6]
IOB0:INV.T[0, 34, 6]
IOB0:OFF_CE_ENABLE[0, 30, 6]
IOB0:OFF_SRVAL[0, 24, 5]
IOB0:READBACK_I1[0, 18, 3]
IOB0:READBACK_I2[0, 18, 4]
IOB0:READBACK_OFF[0, 16, 3]
IOB1:IFF_CE_ENABLE[0, 13, 4]
IOB1:IFF_CE_ENABLE_NO_IQ[0, 8, 3]
IOB1:IFF_SRVAL[0, 12, 6]
IOB1:INV.IFF_CLK[0, 13, 6]
IOB1:INV.OFF_CLK[0, 2, 6]
IOB1:INV.OFF_D[0, 9, 6]
IOB1:INV.T[0, 0, 6]
IOB1:OFF_CE_ENABLE[0, 12, 4]
IOB1:OFF_SRVAL[0, 11, 5]
IOB1:READBACK_I1[0, 17, 4]
IOB1:READBACK_I2[0, 17, 3]
IOB1:READBACK_OFF[0, 16, 4]
Inverted~[0]
INT:MUX.LONG.V4[0, 5, 1][0, 2, 0][0, 1, 0]
0.LONG.IO.H2000
0.OUT.BT.IOB0.I2011
NONE111
IOB0:SLEW[0, 33, 6]
IOB1:SLEW[0, 1, 6]
FAST0
SLOW1
INT:MUX.IMUX.IOB1.O1[0, 0, 2][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 2][0, 2, 2][0, 3, 1]
0.LONG.IO.H20111101
1.DOUBLE.V1.00111110
1.DOUBLE.V0.11011101
1.LONG.V21011110
1.LONG.V01101101
1.LONG.V11110101
GND1111001
IOB0:OMUX[0, 28, 6][0, 27, 6][0, 29, 6][0, 31, 6]
IOB1:OMUX[0, 4, 6][0, 3, 6][0, 7, 6][0, 5, 6]
CE0000
CE.INV0001
OFF0010
O0111
MUX1011
O.INV1111
INT:MUX.LONG.V3[0, 6, 1][0, 7, 0][0, 6, 0]
0.LONG.IO.H1000
0.OUT.BT.IOB0.I2011
NONE111
INT:MUX.IMUX.IOB0.TS[0, 5, 4][0, 6, 4][0, 3, 4][0, 4, 4][0, 6, 5][0, 5, 5][0, 4, 5][0, 6, 6]
0.LONG.IO.H300001111
0.LONG.IO.H000011011
0.LONG.IO.H200011101
0.IO.DOUBLE.0.N.100111111
0.GCLK001010101
GND01011110
0.IO.DOUBLE.1.N.201110111
0.IO.DOUBLE.1.N.111001111
0.LONG.IO.H111011011
0.IO.DOUBLE.0.N.211111111
INT:MUX.LONG.V5[0, 8, 1][0, 9, 1][0, 8, 0]
0.LONG.IO.H3000
0.OUT.BT.IOB0.I2011
NONE111
INT:MUX.IO.DBUF.H0[0, 7, 4][0, 8, 4][0, 7, 5][0, 8, 5]
0.IO.DOUBLE.0.N.20011
0.IO.DOUBLE.2.N.20101
0.IO.DOUBLE.3.N.20110
0.IO.DOUBLE.1.N.21111
IOB0:MUX.OFF_D[0, 26, 6]
IOB1:MUX.OFF_D[0, 8, 6]
O0
CE1
IOB0:TMUX[0, 13, 3]
IOB1:TMUX[0, 10, 3]
TFF0
T1
IOB0:5V_TOLERANT_IO[0, 13, 2]
IOB0:OFF_USED[0, 24, 6]
IOB1:5V_TOLERANT_IO[0, 12, 2]
IOB1:OFF_USED[0, 10, 6]
Non-inverted[0]
INT:MUX.IMUX.IOB1.TS[0, 0, 5][0, 2, 5][0, 1, 4][0, 3, 5][0, 2, 4][0, 1, 5][0, 0, 4][0, 11, 4]
0.GCLK000001111
0.LONG.IO.H000010111
0.IO.DOUBLE.0.N.200111111
0.LONG.IO.H301010011
0.LONG.IO.H201010101
GND01011110
0.LONG.IO.H101111011
0.IO.DOUBLE.1.N.111001111
0.IO.DOUBLE.1.N.211010111
0.IO.DOUBLE.0.N.111111111
IOB0:SYNC_D[0, 21, 5]
IOB1:SYNC_D[0, 11, 6]
DELAY0
I1
IOB0:DRIVE[0, 14, 2]
IOB1:DRIVE[0, 12, 3]
240
121
IOB0:PULL[0, 22, 5][0, 23, 5]
IOB1:PULL[0, 13, 5][0, 12, 5]
PULLUP01
PULLDOWN10
NONE11
INT:MUX.IMUX.IOB1.OK[0, 11, 0][0, 10, 0][0, 10, 1][0, 12, 1][0, 11, 1][0, 13, 1]
0.GCLK1000011
0.GCLK2000101
0.GCLK3000110
0.GCLK0001111
1.SINGLE.V2110011
1.SINGLE.V3110101
1.SINGLE.V5110110
1.SINGLE.V4111111
IOB0:IFF_D[0, 18, 6][0, 20, 5]
IOB1:IFF_D[0, 16, 5][0, 14, 5]
DELAY00
MEDDELAY01
SYNC10
I11
IOB0:I1MUX[0, 19, 6][0, 17, 6]
IOB0:I2MUX[0, 21, 6][0, 20, 6]
IOB1:I1MUX[0, 16, 6][0, 15, 5]
IOB1:I2MUX[0, 15, 6][0, 14, 6]
I01
IQL10
IQ11
INT:MUX.LONG.IO.H0[0, 4, 0][0, 16, 2]
0.LONG.V000
0.SINGLE.V101
NONE11
INT:MUX.IMUX.IOB1.IK[0, 16, 0][0, 14, 0][0, 14, 1][0, 15, 1][0, 16, 1][0, 17, 1]
0.GCLK1000011
0.GCLK2000101
0.GCLK3000110
0.GCLK0001111
1.SINGLE.V2110011
1.SINGLE.V3110101
1.SINGLE.V4110110
1.SINGLE.V5111111
INT:MUX.LONG.IO.H1[0, 23, 3][0, 14, 4][0, 18, 2][0, 17, 5]
0.LONG.V10001
0.LONG.V30010
0.SINGLE.V20111
NONE1111
INT:MUX.IMUX.IOB0.IK[0, 18, 1][0, 19, 1][0, 20, 1][0, 21, 1][0, 19, 0][0, 18, 0]
0.GCLK1001100
0.SINGLE.V2001111
0.GCLK2010100
0.SINGLE.V4010111
0.GCLK3011000
0.SINGLE.V5011011
0.GCLK0111100
0.SINGLE.V3111111
INT:MUX.LONG.IO.H2[0, 22, 3][0, 20, 2][0, 21, 2][0, 22, 2]
0.LONG.V20001
0.LONG.V40010
0.SINGLE.V50111
NONE1111
INT:MUX.LONG.IO.H3[0, 4, 1][0, 23, 2]
0.LONG.V500
0.SINGLE.V601
NONE11
INT:MUX.IMUX.IOB0.OK[0, 23, 1][0, 23, 0][0, 24, 0][0, 25, 0][0, 28, 0][0, 26, 0]
0.GCLK1001100
0.SINGLE.V3001111
0.GCLK2010100
0.SINGLE.V4010111
0.GCLK3011000
0.SINGLE.V5011011
0.GCLK0111100
0.SINGLE.V2111111
INT:MUX.LONG.V0[0, 26, 1][0, 29, 1][0, 27, 1]
0.LONG.IO.H0000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.IMUX.IOB0.O1[0, 26, 2][0, 26, 3][0, 29, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
0.DOUBLE.V0.00011111
0.LONG.V50100110
0.LONG.V30111011
0.LONG.V40111101
0.DOUBLE.V1.11100111
GND1111111
INT:MUX.LONG.V2[0, 31, 1][0, 32, 1][0, 30, 1]
0.LONG.IO.H2000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.LONG.V1[0, 35, 1][0, 34, 0][0, 33, 1]
0.LONG.IO.H1000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.IO.DBUF.H1[0, 33, 3][0, 34, 3][0, 35, 3][0, 33, 5]
0.IO.DOUBLE.1.N.00011
0.IO.DOUBLE.2.N.00101
0.IO.DOUBLE.3.N.00110
0.IO.DOUBLE.0.N.01111

IO.TS

IO.TS bittile 0
RowColumn
01234567891011121314151617181920212223242526272829303132333435
0 -INT:MUX.LONG.V4[0]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[1]-INT:MUX.LONG.V3[0]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[0]-INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[5]--INT:MUX.IMUX.IOB1.IK[4]-INT:MUX.IMUX.IOB1.IK[5]-INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]--~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[0]-INT:MUX.IMUX.IOB0.OK[1]-~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2-INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E
1 ---INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
2 INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
3 INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[4]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[2]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0
5 INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IO.DBUF.H0[1]INT:MUX.IO.DBUF.H0[0]~INT:PASS.IO.DOUBLE.2.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.3.N.2.0.IO.DBUF.H1~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:PULL[1]IOB1:IFF_D[0]IOB1:I1MUX[0]IOB1:IFF_D[1]INT:MUX.LONG.IO.H1[0]~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.1~IOB0:IFF_CE_ENABLEIOB0:IFF_D[0]IOB0:SYNC_DIOB0:PULL[1]IOB0:PULL[0]~IOB0:OFF_SRVAL~INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.0~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.1~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[0]~INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0
6 ~IOB1:INV.TIOB1:SLEW~IOB1:INV.OFF_CLKIOB1:OMUX[2]IOB1:OMUX[3]IOB1:OMUX[0]INT:MUX.IMUX.IOB0.TS[0]IOB1:OMUX[1]IOB1:MUX.OFF_D~IOB1:INV.OFF_DIOB1:OFF_USEDIOB1:SYNC_D~IOB1:IFF_SRVAL~IOB1:INV.IFF_CLKIOB1:I2MUX[0]IOB1:I2MUX[1]IOB1:I1MUX[1]IOB0:I1MUX[0]IOB0:IFF_D[1]IOB0:I1MUX[1]IOB0:I2MUX[0]IOB0:I2MUX[1]~IOB0:INV.IFF_CLK~IOB0:IFF_SRVALIOB0:OFF_USED~IOB0:INV.OFF_DIOB0:MUX.OFF_DIOB0:OMUX[2]IOB0:OMUX[3]IOB0:OMUX[1]~IOB0:OFF_CE_ENABLEIOB0:OMUX[0]~IOB0:INV.OFF_CLKIOB0:SLEW~IOB0:INV.T-
IO.TS bittile 1
RowColumn
01234567891011121314151617181920212223242526272829
0 ------------------------------
1 ------------------------------
2 ------------------------------
3 ------------------------------
4 ------------------------------
5 ------------------------------
6 ------------------------------
7 ------------------------------
8 ---------------------~INT:BUF.LONG.H0.0.SINGLE.V1-~INT:PASS.SINGLE.V1.0.LONG.H0-~INT:BUF.LONG.H1.0.SINGLE.V2---~INT:PASS.SINGLE.V2.0.LONG.H1
9 ----------------------------~INT:PASS.SINGLE.V3.0.LONG.H2-
IO.TS bittile 2
RowColumn
IO.TS bittile 3
RowColumn
012345
0 -----~INT:BUF.LONG.V0.0.OUT.TOP.COUT.E
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0[0, 27, 5]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1[0, 24, 3]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2[0, 26, 4]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0[0, 25, 4]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1[0, 20, 4]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2[0, 21, 4]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0[0, 30, 5]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1[0, 29, 4]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.2[0, 28, 5]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0[0, 33, 4]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.1[0, 31, 5]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2[0, 31, 4]
INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2[0, 23, 4]
INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.N.2[0, 25, 5]
INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2[0, 30, 3]
INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2[0, 32, 3]
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.1[0, 18, 5]
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0[0, 24, 4]
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.2[0, 22, 4]
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1[0, 25, 3]
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.0[0, 26, 5]
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.2[0, 27, 4]
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.1[0, 28, 4]
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.0[0, 29, 5]
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.2[0, 30, 4]
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1[0, 31, 3]
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0[0, 32, 4]
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.2[0, 32, 5]
INT:BUF.LONG.H0.0.SINGLE.V1[1, 21, 8]
INT:BUF.LONG.H1.0.SINGLE.V2[1, 25, 8]
INT:BUF.LONG.H2.0.SINGLE.V3[0, 24, 1]
INT:BUF.LONG.V0.0.OUT.TOP.COUT.E[3, 5, 0]
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E[0, 21, 3]
INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1[0, 20, 3]
INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2[0, 31, 0]
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E[0, 30, 0]
INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0[0, 35, 4]
INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1[0, 10, 4]
INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0[0, 34, 4]
INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1[0, 9, 4]
INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0[0, 34, 5]
INT:PASS.IO.DOUBLE.2.N.2.0.IO.DBUF.H1[0, 9, 5]
INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0[0, 35, 5]
INT:PASS.IO.DOUBLE.3.N.2.0.IO.DBUF.H1[0, 10, 5]
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E[0, 22, 1]
INT:PASS.SINGLE.V1.0.LONG.H0[1, 23, 8]
INT:PASS.SINGLE.V1.0.LONG.IO.H0[0, 15, 2]
INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2[0, 22, 0]
INT:PASS.SINGLE.V2.0.LONG.H1[1, 29, 8]
INT:PASS.SINGLE.V2.0.LONG.IO.H1[0, 17, 2]
INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1[0, 25, 2]
INT:PASS.SINGLE.V3.0.LONG.H2[1, 28, 9]
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E[0, 29, 2]
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E[0, 35, 0]
INT:PASS.SINGLE.V5.0.LONG.IO.H2[0, 33, 2]
INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2[0, 32, 0]
INT:PASS.SINGLE.V6.0.LONG.IO.H3[0, 34, 2]
INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1[0, 25, 1]
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E[0, 32, 2]
IOB0:IFF_CE_ENABLE[0, 19, 5]
IOB0:IFF_CE_ENABLE_NO_IQ[0, 8, 2]
IOB0:IFF_SRVAL[0, 23, 6]
IOB0:INV.IFF_CLK[0, 22, 6]
IOB0:INV.OFF_CLK[0, 32, 6]
IOB0:INV.OFF_D[0, 25, 6]
IOB0:INV.T[0, 34, 6]
IOB0:OFF_CE_ENABLE[0, 30, 6]
IOB0:OFF_SRVAL[0, 24, 5]
IOB0:READBACK_I1[0, 18, 3]
IOB0:READBACK_I2[0, 18, 4]
IOB0:READBACK_OFF[0, 16, 3]
IOB1:IFF_CE_ENABLE[0, 13, 4]
IOB1:IFF_CE_ENABLE_NO_IQ[0, 8, 3]
IOB1:IFF_SRVAL[0, 12, 6]
IOB1:INV.IFF_CLK[0, 13, 6]
IOB1:INV.OFF_CLK[0, 2, 6]
IOB1:INV.OFF_D[0, 9, 6]
IOB1:INV.T[0, 0, 6]
IOB1:OFF_CE_ENABLE[0, 12, 4]
IOB1:OFF_SRVAL[0, 11, 5]
IOB1:READBACK_I1[0, 17, 4]
IOB1:READBACK_I2[0, 17, 3]
IOB1:READBACK_OFF[0, 16, 4]
Inverted~[0]
INT:MUX.LONG.V4[0, 5, 1][0, 2, 0][0, 1, 0]
0.LONG.IO.H2000
0.OUT.BT.IOB0.I2011
NONE111
IOB0:SLEW[0, 33, 6]
IOB1:SLEW[0, 1, 6]
FAST0
SLOW1
INT:MUX.IMUX.IOB1.O1[0, 0, 2][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 2][0, 2, 2][0, 3, 1]
0.LONG.IO.H20111101
1.DOUBLE.V1.00111110
1.DOUBLE.V0.11011101
1.LONG.V21011110
1.LONG.V01101101
1.LONG.V11110101
GND1111001
IOB0:OMUX[0, 28, 6][0, 27, 6][0, 29, 6][0, 31, 6]
IOB1:OMUX[0, 4, 6][0, 3, 6][0, 7, 6][0, 5, 6]
CE0000
CE.INV0001
OFF0010
O0111
MUX1011
O.INV1111
INT:MUX.LONG.V3[0, 6, 1][0, 7, 0][0, 6, 0]
0.LONG.IO.H1000
0.OUT.BT.IOB0.I2011
NONE111
INT:MUX.IMUX.IOB0.TS[0, 5, 4][0, 6, 4][0, 3, 4][0, 4, 4][0, 6, 5][0, 5, 5][0, 4, 5][0, 6, 6]
0.LONG.IO.H300001111
0.LONG.IO.H000011011
0.LONG.IO.H200011101
0.IO.DOUBLE.0.N.100111111
0.GCLK001010101
GND01011110
0.IO.DOUBLE.1.N.201110111
0.IO.DOUBLE.1.N.111001111
0.LONG.IO.H111011011
0.IO.DOUBLE.0.N.211111111
INT:MUX.LONG.V5[0, 8, 1][0, 9, 1][0, 8, 0]
0.LONG.IO.H3000
0.OUT.BT.IOB0.I2011
NONE111
INT:MUX.IO.DBUF.H0[0, 7, 4][0, 8, 4][0, 7, 5][0, 8, 5]
0.IO.DOUBLE.0.N.20011
0.IO.DOUBLE.2.N.20101
0.IO.DOUBLE.3.N.20110
0.IO.DOUBLE.1.N.21111
IOB0:MUX.OFF_D[0, 26, 6]
IOB1:MUX.OFF_D[0, 8, 6]
O0
CE1
IOB0:TMUX[0, 13, 3]
IOB1:TMUX[0, 10, 3]
TFF0
T1
IOB0:5V_TOLERANT_IO[0, 13, 2]
IOB0:OFF_USED[0, 24, 6]
IOB1:5V_TOLERANT_IO[0, 12, 2]
IOB1:OFF_USED[0, 10, 6]
Non-inverted[0]
INT:MUX.IMUX.IOB1.TS[0, 0, 5][0, 2, 5][0, 1, 4][0, 3, 5][0, 2, 4][0, 1, 5][0, 0, 4][0, 11, 4]
0.GCLK000001111
0.LONG.IO.H000010111
0.IO.DOUBLE.0.N.200111111
0.LONG.IO.H301010011
0.LONG.IO.H201010101
GND01011110
0.LONG.IO.H101111011
0.IO.DOUBLE.1.N.111001111
0.IO.DOUBLE.1.N.211010111
0.IO.DOUBLE.0.N.111111111
IOB0:SYNC_D[0, 21, 5]
IOB1:SYNC_D[0, 11, 6]
DELAY0
I1
IOB0:DRIVE[0, 14, 2]
IOB1:DRIVE[0, 12, 3]
240
121
IOB0:PULL[0, 22, 5][0, 23, 5]
IOB1:PULL[0, 13, 5][0, 12, 5]
PULLUP01
PULLDOWN10
NONE11
INT:MUX.IMUX.IOB1.OK[0, 11, 0][0, 10, 0][0, 10, 1][0, 12, 1][0, 11, 1][0, 13, 1]
0.GCLK1000011
0.GCLK2000101
0.GCLK3000110
0.GCLK0001111
1.SINGLE.V2110011
1.SINGLE.V3110101
1.SINGLE.V5110110
1.SINGLE.V4111111
IOB0:IFF_D[0, 18, 6][0, 20, 5]
IOB1:IFF_D[0, 16, 5][0, 14, 5]
DELAY00
MEDDELAY01
SYNC10
I11
IOB0:I1MUX[0, 19, 6][0, 17, 6]
IOB0:I2MUX[0, 21, 6][0, 20, 6]
IOB1:I1MUX[0, 16, 6][0, 15, 5]
IOB1:I2MUX[0, 15, 6][0, 14, 6]
I01
IQL10
IQ11
INT:MUX.LONG.IO.H0[0, 4, 0][0, 16, 2]
0.LONG.V000
0.SINGLE.V101
NONE11
INT:MUX.IMUX.IOB1.IK[0, 16, 0][0, 14, 0][0, 14, 1][0, 15, 1][0, 16, 1][0, 17, 1]
0.GCLK1000011
0.GCLK2000101
0.GCLK3000110
0.GCLK0001111
1.SINGLE.V2110011
1.SINGLE.V3110101
1.SINGLE.V4110110
1.SINGLE.V5111111
INT:MUX.LONG.IO.H1[0, 23, 3][0, 14, 4][0, 18, 2][0, 17, 5]
0.LONG.V10001
0.LONG.V30010
0.SINGLE.V20111
NONE1111
INT:MUX.IMUX.IOB0.IK[0, 18, 1][0, 19, 1][0, 20, 1][0, 21, 1][0, 19, 0][0, 18, 0]
0.GCLK1001100
0.SINGLE.V2001111
0.GCLK2010100
0.SINGLE.V4010111
0.GCLK3011000
0.SINGLE.V5011011
0.GCLK0111100
0.SINGLE.V3111111
INT:MUX.LONG.IO.H2[0, 22, 3][0, 20, 2][0, 21, 2][0, 22, 2]
0.LONG.V20001
0.LONG.V40010
0.SINGLE.V50111
NONE1111
INT:MUX.LONG.IO.H3[0, 4, 1][0, 23, 2]
0.LONG.V500
0.SINGLE.V601
NONE11
INT:MUX.IMUX.IOB0.OK[0, 23, 1][0, 23, 0][0, 24, 0][0, 25, 0][0, 28, 0][0, 26, 0]
0.GCLK1001100
0.SINGLE.V3001111
0.GCLK2010100
0.SINGLE.V4010111
0.GCLK3011000
0.SINGLE.V5011011
0.GCLK0111100
0.SINGLE.V2111111
INT:MUX.LONG.V0[0, 26, 1][0, 29, 1][0, 27, 1]
0.LONG.IO.H0000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.IMUX.IOB0.O1[0, 26, 2][0, 26, 3][0, 29, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
0.DOUBLE.V0.00011111
0.LONG.V50100110
0.LONG.V30111011
0.LONG.V40111101
0.DOUBLE.V1.11100111
GND1111111
INT:MUX.LONG.V2[0, 31, 1][0, 32, 1][0, 30, 1]
0.LONG.IO.H2000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.LONG.V1[0, 35, 1][0, 34, 0][0, 33, 1]
0.LONG.IO.H1000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.IO.DBUF.H1[0, 33, 3][0, 34, 3][0, 35, 3][0, 33, 5]
0.IO.DOUBLE.1.N.00011
0.IO.DOUBLE.2.N.00101
0.IO.DOUBLE.3.N.00110
0.IO.DOUBLE.0.N.01111

IO.TS.L

IO.TS.L bittile 0
RowColumn
01234567891011121314151617181920212223242526272829303132333435
0 -INT:MUX.LONG.V4[0]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[1]-INT:MUX.LONG.V3[0]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[0]-INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[5]--INT:MUX.IMUX.IOB1.IK[4]-INT:MUX.IMUX.IOB1.IK[5]-INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]--~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[0]-INT:MUX.IMUX.IOB0.OK[1]-~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2-INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E
1 ---INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
2 INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
3 INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[4]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[2]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0
5 INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IO.DBUF.H0[1]INT:MUX.IO.DBUF.H0[0]~INT:PASS.IO.DOUBLE.2.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.3.N.2.0.IO.DBUF.H1~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:PULL[1]IOB1:IFF_D[0]IOB1:I1MUX[0]IOB1:IFF_D[1]INT:MUX.LONG.IO.H1[0]~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.1~IOB0:IFF_CE_ENABLEIOB0:IFF_D[0]IOB0:SYNC_DIOB0:PULL[1]IOB0:PULL[0]~IOB0:OFF_SRVAL~INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.0~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.1~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[0]~INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0
6 ~IOB1:INV.TIOB1:SLEW~IOB1:INV.OFF_CLKIOB1:OMUX[2]IOB1:OMUX[3]IOB1:OMUX[0]INT:MUX.IMUX.IOB0.TS[0]IOB1:OMUX[1]IOB1:MUX.OFF_D~IOB1:INV.OFF_DIOB1:OFF_USEDIOB1:SYNC_D~IOB1:IFF_SRVAL~IOB1:INV.IFF_CLKIOB1:I2MUX[0]IOB1:I2MUX[1]IOB1:I1MUX[1]IOB0:I1MUX[0]IOB0:IFF_D[1]IOB0:I1MUX[1]IOB0:I2MUX[0]IOB0:I2MUX[1]~IOB0:INV.IFF_CLK~IOB0:IFF_SRVALIOB0:OFF_USED~IOB0:INV.OFF_DIOB0:MUX.OFF_DIOB0:OMUX[2]IOB0:OMUX[3]IOB0:OMUX[1]~IOB0:OFF_CE_ENABLEIOB0:OMUX[0]~IOB0:INV.OFF_CLKIOB0:SLEW~IOB0:INV.T-
IO.TS.L bittile 1
RowColumn
01234567891011121314151617181920212223242526272829
0 ------------------------------
1 ------------------------------
2 ------------------------------
3 ------------------------------
4 ------------------------------
5 ------------------------------
6 ------------------------------
7 ------------------------------
8 ---------------------~INT:BUF.LONG.H0.0.SINGLE.V1-~INT:PASS.SINGLE.V1.0.LONG.H0-~INT:BUF.LONG.H1.0.SINGLE.V2---~INT:PASS.SINGLE.V2.0.LONG.H1
9 ----------------------------~INT:PASS.SINGLE.V3.0.LONG.H2-
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.0[0, 27, 5]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1[0, 24, 3]
INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2[0, 26, 4]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0[0, 25, 4]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1[0, 20, 4]
INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2[0, 21, 4]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.0[0, 30, 5]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1[0, 29, 4]
INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.2[0, 28, 5]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0[0, 33, 4]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.1[0, 31, 5]
INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2[0, 31, 4]
INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2[0, 23, 4]
INT:BIPASS.IO.DOUBLE.1.N.0.IO.DOUBLE.1.N.2[0, 25, 5]
INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2[0, 30, 3]
INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2[0, 32, 3]
INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.1[0, 18, 5]
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0[0, 24, 4]
INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.2[0, 22, 4]
INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1[0, 25, 3]
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.0[0, 26, 5]
INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.2[0, 27, 4]
INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.1[0, 28, 4]
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.0[0, 29, 5]
INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.2[0, 30, 4]
INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1[0, 31, 3]
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0[0, 32, 4]
INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.2[0, 32, 5]
INT:BUF.LONG.H0.0.SINGLE.V1[1, 21, 8]
INT:BUF.LONG.H1.0.SINGLE.V2[1, 25, 8]
INT:BUF.LONG.H2.0.SINGLE.V3[0, 24, 1]
INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.E[0, 21, 3]
INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1[0, 20, 3]
INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2[0, 31, 0]
INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E[0, 30, 0]
INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0[0, 35, 4]
INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1[0, 10, 4]
INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0[0, 34, 4]
INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1[0, 9, 4]
INT:PASS.IO.DOUBLE.2.N.0.0.IO.DBUF.H0[0, 34, 5]
INT:PASS.IO.DOUBLE.2.N.2.0.IO.DBUF.H1[0, 9, 5]
INT:PASS.IO.DOUBLE.3.N.0.0.IO.DBUF.H0[0, 35, 5]
INT:PASS.IO.DOUBLE.3.N.2.0.IO.DBUF.H1[0, 10, 5]
INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.E[0, 22, 1]
INT:PASS.SINGLE.V1.0.LONG.H0[1, 23, 8]
INT:PASS.SINGLE.V1.0.LONG.IO.H0[0, 15, 2]
INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2[0, 22, 0]
INT:PASS.SINGLE.V2.0.LONG.H1[1, 29, 8]
INT:PASS.SINGLE.V2.0.LONG.IO.H1[0, 17, 2]
INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1[0, 25, 2]
INT:PASS.SINGLE.V3.0.LONG.H2[1, 28, 9]
INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E[0, 29, 2]
INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E[0, 35, 0]
INT:PASS.SINGLE.V5.0.LONG.IO.H2[0, 33, 2]
INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2[0, 32, 0]
INT:PASS.SINGLE.V6.0.LONG.IO.H3[0, 34, 2]
INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1[0, 25, 1]
INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E[0, 32, 2]
IOB0:IFF_CE_ENABLE[0, 19, 5]
IOB0:IFF_CE_ENABLE_NO_IQ[0, 8, 2]
IOB0:IFF_SRVAL[0, 23, 6]
IOB0:INV.IFF_CLK[0, 22, 6]
IOB0:INV.OFF_CLK[0, 32, 6]
IOB0:INV.OFF_D[0, 25, 6]
IOB0:INV.T[0, 34, 6]
IOB0:OFF_CE_ENABLE[0, 30, 6]
IOB0:OFF_SRVAL[0, 24, 5]
IOB0:READBACK_I1[0, 18, 3]
IOB0:READBACK_I2[0, 18, 4]
IOB0:READBACK_OFF[0, 16, 3]
IOB1:IFF_CE_ENABLE[0, 13, 4]
IOB1:IFF_CE_ENABLE_NO_IQ[0, 8, 3]
IOB1:IFF_SRVAL[0, 12, 6]
IOB1:INV.IFF_CLK[0, 13, 6]
IOB1:INV.OFF_CLK[0, 2, 6]
IOB1:INV.OFF_D[0, 9, 6]
IOB1:INV.T[0, 0, 6]
IOB1:OFF_CE_ENABLE[0, 12, 4]
IOB1:OFF_SRVAL[0, 11, 5]
IOB1:READBACK_I1[0, 17, 4]
IOB1:READBACK_I2[0, 17, 3]
IOB1:READBACK_OFF[0, 16, 4]
Inverted~[0]
INT:MUX.LONG.V4[0, 5, 1][0, 2, 0][0, 1, 0]
0.LONG.IO.H2000
0.OUT.BT.IOB0.I2011
NONE111
IOB0:SLEW[0, 33, 6]
IOB1:SLEW[0, 1, 6]
FAST0
SLOW1
INT:MUX.IMUX.IOB1.O1[0, 0, 2][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 2][0, 2, 2][0, 3, 1]
0.LONG.IO.H20111101
1.DOUBLE.V1.00111110
1.DOUBLE.V0.11011101
1.LONG.V21011110
1.LONG.V01101101
1.LONG.V11110101
GND1111001
IOB0:OMUX[0, 28, 6][0, 27, 6][0, 29, 6][0, 31, 6]
IOB1:OMUX[0, 4, 6][0, 3, 6][0, 7, 6][0, 5, 6]
CE0000
CE.INV0001
OFF0010
O0111
MUX1011
O.INV1111
INT:MUX.LONG.V3[0, 6, 1][0, 7, 0][0, 6, 0]
0.LONG.IO.H1000
0.OUT.BT.IOB0.I2011
NONE111
INT:MUX.IMUX.IOB0.TS[0, 5, 4][0, 6, 4][0, 3, 4][0, 4, 4][0, 6, 5][0, 5, 5][0, 4, 5][0, 6, 6]
0.LONG.IO.H300001111
0.LONG.IO.H000011011
0.LONG.IO.H200011101
0.IO.DOUBLE.0.N.100111111
0.GCLK001010101
GND01011110
0.IO.DOUBLE.1.N.201110111
0.IO.DOUBLE.1.N.111001111
0.LONG.IO.H111011011
0.IO.DOUBLE.0.N.211111111
INT:MUX.LONG.V5[0, 8, 1][0, 9, 1][0, 8, 0]
0.LONG.IO.H3000
0.OUT.BT.IOB0.I2011
NONE111
INT:MUX.IO.DBUF.H0[0, 7, 4][0, 8, 4][0, 7, 5][0, 8, 5]
0.IO.DOUBLE.0.N.20011
0.IO.DOUBLE.2.N.20101
0.IO.DOUBLE.3.N.20110
0.IO.DOUBLE.1.N.21111
IOB0:MUX.OFF_D[0, 26, 6]
IOB1:MUX.OFF_D[0, 8, 6]
O0
CE1
IOB0:TMUX[0, 13, 3]
IOB1:TMUX[0, 10, 3]
TFF0
T1
IOB0:5V_TOLERANT_IO[0, 13, 2]
IOB0:OFF_USED[0, 24, 6]
IOB1:5V_TOLERANT_IO[0, 12, 2]
IOB1:OFF_USED[0, 10, 6]
Non-inverted[0]
INT:MUX.IMUX.IOB1.TS[0, 0, 5][0, 2, 5][0, 1, 4][0, 3, 5][0, 2, 4][0, 1, 5][0, 0, 4][0, 11, 4]
0.GCLK000001111
0.LONG.IO.H000010111
0.IO.DOUBLE.0.N.200111111
0.LONG.IO.H301010011
0.LONG.IO.H201010101
GND01011110
0.LONG.IO.H101111011
0.IO.DOUBLE.1.N.111001111
0.IO.DOUBLE.1.N.211010111
0.IO.DOUBLE.0.N.111111111
IOB0:SYNC_D[0, 21, 5]
IOB1:SYNC_D[0, 11, 6]
DELAY0
I1
IOB0:DRIVE[0, 14, 2]
IOB1:DRIVE[0, 12, 3]
240
121
IOB0:PULL[0, 22, 5][0, 23, 5]
IOB1:PULL[0, 13, 5][0, 12, 5]
PULLUP01
PULLDOWN10
NONE11
INT:MUX.IMUX.IOB1.OK[0, 11, 0][0, 10, 0][0, 10, 1][0, 12, 1][0, 11, 1][0, 13, 1]
0.GCLK1000011
0.GCLK2000101
0.GCLK3000110
0.GCLK0001111
1.SINGLE.V2110011
1.SINGLE.V3110101
1.SINGLE.V5110110
1.SINGLE.V4111111
IOB0:IFF_D[0, 18, 6][0, 20, 5]
IOB1:IFF_D[0, 16, 5][0, 14, 5]
DELAY00
MEDDELAY01
SYNC10
I11
IOB0:I1MUX[0, 19, 6][0, 17, 6]
IOB0:I2MUX[0, 21, 6][0, 20, 6]
IOB1:I1MUX[0, 16, 6][0, 15, 5]
IOB1:I2MUX[0, 15, 6][0, 14, 6]
I01
IQL10
IQ11
INT:MUX.LONG.IO.H0[0, 4, 0][0, 16, 2]
0.LONG.V000
0.SINGLE.V101
NONE11
INT:MUX.IMUX.IOB1.IK[0, 16, 0][0, 14, 0][0, 14, 1][0, 15, 1][0, 16, 1][0, 17, 1]
0.GCLK1000011
0.GCLK2000101
0.GCLK3000110
0.GCLK0001111
1.SINGLE.V2110011
1.SINGLE.V3110101
1.SINGLE.V4110110
1.SINGLE.V5111111
INT:MUX.LONG.IO.H1[0, 23, 3][0, 14, 4][0, 18, 2][0, 17, 5]
0.LONG.V10001
0.LONG.V30010
0.SINGLE.V20111
NONE1111
INT:MUX.IMUX.IOB0.IK[0, 18, 1][0, 19, 1][0, 20, 1][0, 21, 1][0, 19, 0][0, 18, 0]
0.GCLK1001100
0.SINGLE.V2001111
0.GCLK2010100
0.SINGLE.V4010111
0.GCLK3011000
0.SINGLE.V5011011
0.GCLK0111100
0.SINGLE.V3111111
INT:MUX.LONG.IO.H2[0, 22, 3][0, 20, 2][0, 21, 2][0, 22, 2]
0.LONG.V20001
0.LONG.V40010
0.SINGLE.V50111
NONE1111
INT:MUX.LONG.IO.H3[0, 4, 1][0, 23, 2]
0.LONG.V500
0.SINGLE.V601
NONE11
INT:MUX.IMUX.IOB0.OK[0, 23, 1][0, 23, 0][0, 24, 0][0, 25, 0][0, 28, 0][0, 26, 0]
0.GCLK1001100
0.SINGLE.V3001111
0.GCLK2010100
0.SINGLE.V4010111
0.GCLK3011000
0.SINGLE.V5011011
0.GCLK0111100
0.SINGLE.V2111111
INT:MUX.LONG.V0[0, 26, 1][0, 29, 1][0, 27, 1]
0.LONG.IO.H0000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.IMUX.IOB0.O1[0, 26, 2][0, 26, 3][0, 29, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
0.DOUBLE.V0.00011111
0.LONG.V50100110
0.LONG.V30111011
0.LONG.V40111101
0.DOUBLE.V1.11100111
GND1111111
INT:MUX.LONG.V2[0, 31, 1][0, 32, 1][0, 30, 1]
0.LONG.IO.H2000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.LONG.V1[0, 35, 1][0, 34, 0][0, 33, 1]
0.LONG.IO.H1000
0.OUT.BT.IOB1.I2.E011
NONE111
INT:MUX.IO.DBUF.H1[0, 33, 3][0, 34, 3][0, 35, 3][0, 33, 5]
0.IO.DOUBLE.1.N.00011
0.IO.DOUBLE.2.N.00101
0.IO.DOUBLE.3.N.00110
0.IO.DOUBLE.0.N.01111