DSP

Bitstream

DSP bittile 0
RowColumn
0123456789101112131415161718192021222324252627
0 ---------------------------DSP0:SCAN_IN_SETVAL_P
1 --------------------------DSP0:ROUNDING_LSB_MASKDSP0:SCAN_IN_SET_P
2 --------------------------DSP0:MASK[0]DSP0:PATTERN[0]
3 --------------------------DSP0:PATTERN[1]DSP0:MASK[1]
4 ----------------------------
5 --------------------------DSP0:PATTERN[2]-
6 --------------------------DSP0:MASK[2]DSP0:MREG
7 --------------------------DSP0:TEST_SETVAL_MDSP0:TEST_SET_M
8 --------------------------DSP0:SCAN_IN_SETVAL_MDSP0:MASK[3]
9 ---------------------------DSP0:PATTERN[3]
10 ---------------------------DSP0:SCAN_IN_SET_M
11 --------------------------DSP0:MASK[4]DSP0:PATTERN[4]
12 --------------------------~DSP0:INV.CARRYINDSP0:CARRYINREG
13 ---------------------------DSP0:MASK[5]
14 ---------------------------DSP0:PATTERN[5]
15 --------------------------DSP0:MULTCARRYINREG-
16 ----------------------------
17 ----------------------------
18 --------------------------DSP0:PATTERN[6]DSP0:MASK[6]
19 ----------------------------
20 --------------------------DSP0:MASK[7]DSP0:PATTERN[7]
21 ----------------------------
22 ----------------------------
23 ---------------------------DSP0:PATTERN[8]
24 ---------------------------DSP0:MASK[8]
25 --------------------------DSP0:MASK[9]-
26 --------------------------DSP0:PATTERN[9]DSP0:PATTERN[10]
27 ---------------------------DSP0:MASK[10]
28 ----------------------------
29 --------------------------DSP0:PATTERN[11]DSP0:MASK[11]
30 --------------------------~DSP0:INV.OPMODE4-
31 --------------------------~DSP0:INV.OPMODE5~DSP0:INV.OPMODE6
32 --------------------------DSP0:CARRYINSELREG-
33 ----------------------------
34 ----------------------------
35 ----------------------------
36 ----------------------------
37 ----------------------------
38 ----------------------------
39 ---------------------------DSP0:USE_SIMD[1]
40 ----------------------------
41 --------------------------DSP0:MASK[12]DSP0:PATTERN[12]
42 ----------------------------
43 --------------------------DSP0:PATTERN[13]DSP0:MASK[13]
44 ----------------------------
45 --------------------------DSP0:MASK[14]DSP0:PATTERN[14]
46 ----------------------------
47 ----------------------------
48 --------------------------DSP0:MASK[15]-
49 --------------------------DSP0:PATTERN[15]-
50 ----------------------------
51 --------------------------DSP0:MASK[16]DSP0:PATTERN[16]
52 ----------------------------
53 ---------------------------DSP0:MASK[17]
54 --------------------------DSP0:PATTERN[17]-
55 ---------------------------DSP0:AREG_ACASCREG[2]
56 --------------------------DSP0:AREG_ACASCREG[1]DSP0:AREG_ACASCREG[0]
57 --------------------------DSP0:PATTERN[18]DSP0:BREG_BCASCREG[0]
58 --------------------------DSP0:MASK[18]-
59 ----------------------------
60 --------------------------DSP0:MASK[19]DSP0:PATTERN[19]
61 --------------------------DSP0:MASK[20]DSP0:PATTERN[20]
62 --------------------------DSP0:USE_MULT[1]DSP0:B_INPUT
63 ---------------------------DSP0:MASK[21]
DSP bittile 1
RowColumn
0123456789101112131415161718192021222324252627
0 ---------------------------DSP0:PATTERN[21]
1 --------------------------DSP0:BREG_BCASCREG[2]DSP0:PATTERN[22]
2 --------------------------DSP0:MASK[22]DSP0:A_INPUT
3 --------------------------DSP0:MASK[23]DSP0:BREG_BCASCREG[1]
4 ----------------------------
5 --------------------------DSP0:PATTERN[23]-
6 --------------------------DSP0:PREG-
7 ----------------------------
8 ----------------------------
9 ----------------------------
10 ----------------------------
11 ----------------------------
12 ----------------------------
13 ---------------------------DSP0:USE_SIMD[0]
14 ---------------------------DSP0:CLOCK_INVERT_P
15 --------------------------DSP0:CLOCK_INVERT_M-
16 --------------------------DSP0:AUTORESET_PATTERN_DETECTDSP0:AUTORESET_OVER_UNDER_FLOW
17 --------------------------DSP0:TEST_SET_PDSP0:TEST_SETVAL_P
18 --------------------------DSP0:AUTORESET_PATTERN_DETECT_OPTINV-
19 ----------------------------
20 --------------------------~DSP0:INV.CLK-
21 ----------------------------
22 --------------------------DSP0:USE_MULT[0]DSP0:USE_PATTERN_DETECT
23 ----------------------------
24 ---------------------------DSP0:PATTERN[24]
25 --------------------------DSP0:MASK[24]-
26 ---------------------------DSP0:MASK[25]
27 ---------------------------DSP0:PATTERN[25]
28 ----------------------------
29 --------------------------DSP0:PATTERN[26]-
30 --------------------------DSP0:MASK[26]-
31 ----------------------------
32 --------------------------DSP0:MASK[27]DSP0:PATTERN[27]
33 ----------------------------
34 ---------------------------DSP0:PATTERN[28]
35 --------------------------DSP0:MASK[28]-
36 --------------------------DSP0:MASK[29]DSP0:PATTERN[29]
37 ----------------------------
38 ----------------------------
39 ----------------------------
40 ----------------------------
41 ----------------------------
42 --------------------------DSP0:PATTERN[30]DSP0:MASK[30]
43 ----------------------------
44 ----------------------------
45 --------------------------DSP0:PATTERN[31]DSP0:MASK[31]
46 ---------------------------DSP0:PATTERN[32]
47 ---------------------------DSP0:MASK[32]
48 ----------------------------
49 --------------------------DSP0:MASK[33]-
50 ---------------------------DSP0:PATTERN[33]
51 --------------------------DSP0:PATTERN[34]-
52 --------------------------DSP0:MASK[34]DSP0:MASK[35]
53 ---------------------------DSP0:PATTERN[35]
54 ----------------------------
55 ----------------------------
56 --------------------------DSP0:USE_SIMD[2]-
57 ----------------------------
58 --------------------------~DSP0:INV.OPMODE2-
59 ----------------------------
60 --------------------------~DSP0:INV.OPMODE3~DSP0:INV.OPMODE0
61 ---------------------------~DSP0:INV.OPMODE1
62 --------------------------DSP0:OPMODEREGDSP0:LFSR_EN_SETVAL
63 ---------------------------DSP0:LFSR_EN_SET
DSP bittile 2
RowColumn
0123456789101112131415161718192021222324252627
0 ---------------------------DSP0:PATTERN[36]
1 --------------------------~DSP0:INV.ALUMODE3DSP0:MASK[36]
2 --------------------------DSP0:CREGDSP0:MASK[37]
3 --------------------------DSP0:MASK[38]DSP0:PATTERN[37]
4 ----------------------------
5 --------------------------DSP0:PATTERN[38]-
6 --------------------------DSP0:MASK[39]DSP0:PATTERN[39]
7 --------------------------~DSP0:INV.ALUMODE2~DSP0:INV.ALUMODE1
8 --------------------------DSP0:ALUMODEREG-
9 ---------------------------DSP0:PATTERN[40]
10 ---------------------------DSP0:MASK[40]
11 --------------------------DSP0:PATTERN[41]DSP0:MASK[41]
12 ----------------------------
13 ----------------------------
14 ----------------------------
15 ----------------------------
16 --------------------------DSP0:PATTERN[42]DSP0:MASK[42]
17 --------------------------DSP0:MASK[43]-
18 --------------------------DSP0:PATTERN[43]-
19 ----------------------------
20 ---------------------------DSP0:PATTERN[44]
21 ---------------------------DSP0:MASK[44]
22 ---------------------------DSP0:MASK[45]
23 ---------------------------DSP0:PATTERN[45]
24 ----------------------------
25 --------------------------DSP0:PATTERN[46]-
26 --------------------------DSP0:MASK[46]-
27 --------------------------DSP0:PATTERN[47]DSP0:MASK[47]
28 ----------------------------
29 --------------------------~DSP0:INV.ALUMODE0DSP0:SEL_ROUNDING_MASK[0]
30 --------------------------DSP0:SEL_MASK-
31 --------------------------DSP0:SEL_PATTERNDSP0:SEL_ROUNDING_MASK[1]
32 --------------------------DSP1:SCAN_IN_SETVAL_PDSP1:MREG
33 --------------------------DSP1:ROUNDING_LSB_MASKDSP1:SCAN_IN_SET_P
34 --------------------------DSP1:PATTERN[0]DSP1:MASK[0]
35 --------------------------DSP1:MASK[1]-
36 --------------------------DSP1:PATTERN[1]DSP1:TEST_SET_M
37 --------------------------DSP1:PATTERN[2]DSP1:TEST_SETVAL_M
38 --------------------------DSP1:MASK[2]-
39 ---------------------------DSP1:SCAN_IN_SET_M
40 ---------------------------DSP1:SCAN_IN_SETVAL_M
41 --------------------------DSP1:PATTERN[3]DSP1:MASK[3]
42 --------------------------~DSP1:INV.CARRYINDSP1:CARRYINREG
43 --------------------------DSP1:MASK[4]DSP1:PATTERN[4]
44 ----------------------------
45 --------------------------DSP1:MASK[5]DSP1:MULTCARRYINREG
46 --------------------------DSP1:PATTERN[5]-
47 ----------------------------
48 ----------------------------
49 ----------------------------
50 ---------------------------DSP1:PATTERN[6]
51 ---------------------------DSP1:MASK[6]
52 ---------------------------DSP1:MASK[7]
53 ---------------------------DSP1:PATTERN[7]
54 ----------------------------
55 ---------------------------DSP1:PATTERN[8]
56 --------------------------DSP1:MASK[8]DSP1:MASK[9]
57 --------------------------DSP1:PATTERN[10]DSP1:PATTERN[9]
58 --------------------------DSP1:MASK[10]-
59 ----------------------------
60 ----------------------------
61 --------------------------DSP1:PATTERN[11]DSP1:MASK[11]
62 ---------------------------~DSP1:INV.OPMODE4
63 ---------------------------~DSP1:INV.OPMODE5
DSP bittile 3
RowColumn
0123456789101112131415161718192021222324252627
0 ---------------------------~DSP1:INV.OPMODE6
1 ---------------------------DSP1:CARRYINSELREG
2 ----------------------------
3 ----------------------------
4 ----------------------------
5 ----------------------------
6 ---------------------------DSP1:USE_SIMD[1]
7 --------------------------DSP1:AREG_ACASCREG[1]-
8 ---------------------------DSP1:PATTERN[12]
9 ---------------------------DSP1:MASK[12]
10 ----------------------------
11 --------------------------DSP1:MASK[13]-
12 --------------------------DSP1:PATTERN[13]DSP1:AREG_ACASCREG[2]
13 ---------------------------DSP1:PATTERN[14]
14 ---------------------------DSP1:MASK[14]
15 --------------------------DSP1:AREG_ACASCREG[0]-
16 --------------------------DSP1:BREG_BCASCREG[0]DSP1:USE_MULT[1]
17 --------------------------DSP1:PATTERN[15]DSP1:MASK[15]
18 --------------------------DSP1:B_INPUTDSP1:PATTERN[16]
19 ----------------------------
20 --------------------------DSP1:MASK[16]-
21 --------------------------DSP1:MASK[17]-
22 --------------------------DSP1:PATTERN[17]DSP1:USE_MULT[0]
23 ---------------------------DSP1:USE_PATTERN_DETECT
24 ---------------------------DSP1:PATTERN[18]
25 --------------------------DSP1:MASK[18]-
26 --------------------------DSP1:MASK[19]DSP1:PATTERN[19]
27 ----------------------------
28 --------------------------DSP1:PATTERN[20]-
29 ---------------------------DSP1:MASK[20]
30 ----------------------------
31 --------------------------DSP1:MASK[21]-
32 --------------------------DSP1:PATTERN[21]-
33 --------------------------DSP1:PATTERN[22]-
34 --------------------------DSP1:MASK[22]DSP1:BREG_BCASCREG[2]
35 --------------------------DSP1:A_INPUT-
36 --------------------------DSP1:BREG_BCASCREG[1]DSP1:MASK[23]
37 ---------------------------DSP1:PATTERN[23]
38 --------------------------DSP1:PREG-
39 ----------------------------
40 ----------------------------
41 ----------------------------
42 ----------------------------
43 ----------------------------
44 ----------------------------
45 --------------------------DSP1:CLOCK_INVERT_PDSP1:USE_SIMD[0]
46 --------------------------DSP1:CLOCK_INVERT_M-
47 --------------------------DSP1:TEST_SETVAL_PDSP1:AUTORESET_PATTERN_DETECT
48 --------------------------DSP1:AUTORESET_OVER_UNDER_FLOW-
49 --------------------------DSP1:TEST_SET_P-
50 ---------------------------DSP1:AUTORESET_PATTERN_DETECT_OPTINV
51 ----------------------------
52 --------------------------~DSP1:INV.CLK-
53 ----------------------------
54 ----------------------------
55 ----------------------------
56 ---------------------------DSP1:PATTERN[24]
57 ---------------------------DSP1:MASK[24]
58 --------------------------DSP1:MASK[25]-
59 ----------------------------
60 --------------------------DSP1:PATTERN[25]-
61 --------------------------DSP1:PATTERN[26]-
62 --------------------------DSP1:MASK[26]-
DSP bittile 4
RowColumn
0123456789101112131415161718192021222324252627
0 ---------------------------DSP1:MASK[27]
1 ---------------------------DSP1:PATTERN[27]
2 ---------------------------DSP1:PATTERN[28]
3 --------------------------DSP1:MASK[29]DSP1:MASK[28]
4 ----------------------------
5 --------------------------DSP1:PATTERN[29]-
6 ----------------------------
7 ----------------------------
8 ----------------------------
9 ---------------------------DSP1:PATTERN[30]
10 ---------------------------DSP1:MASK[30]
11 ----------------------------
12 ---------------------------DSP1:MASK[31]
13 ---------------------------DSP1:PATTERN[31]
14 ---------------------------DSP1:PATTERN[32]
15 --------------------------DSP1:MASK[32]-
16 ----------------------------
17 --------------------------DSP1:MASK[33]-
18 --------------------------DSP1:PATTERN[33]DSP1:PATTERN[34]
19 ----------------------------
20 --------------------------DSP1:MASK[34]DSP1:MASK[35]
21 --------------------------DSP1:PATTERN[35]-
22 ----------------------------
23 ---------------------------DSP1:USE_SIMD[2]
24 ----------------------------
25 ----------------------------
26 ----------------------------
27 ----------------------------
28 ----------------------------
29 ----------------------------
30 ----------------------------
31 ----------------------------
32 ---------------------------DSP1:PATTERN[36]
33 ---------------------------DSP1:MASK[36]
34 --------------------------~DSP1:INV.OPMODE2DSP1:MASK[37]
35 --------------------------DSP1:PATTERN[37]-
36 --------------------------~DSP1:INV.OPMODE3DSP1:PATTERN[38]
37 --------------------------DSP1:MASK[39]DSP1:MASK[38]
38 --------------------------DSP1:PATTERN[39]-
39 ---------------------------~DSP1:INV.OPMODE1
40 ---------------------------~DSP1:INV.OPMODE0
41 --------------------------DSP1:PATTERN[40]DSP1:OPMODEREG
42 --------------------------DSP1:MASK[40]-
43 --------------------------DSP1:PATTERN[41]DSP1:MASK[41]
44 ----------------------------
45 ----------------------------
46 --------------------------DSP1:CREG~DSP1:INV.ALUMODE3
47 --------------------------DSP1:PATTERN[42]~DSP1:INV.ALUMODE2
48 --------------------------DSP1:MASK[42]-
49 --------------------------DSP1:MASK[43]-
50 ---------------------------DSP1:PATTERN[43]
51 --------------------------DSP1:ALUMODEREG~DSP1:INV.ALUMODE1
52 --------------------------~DSP1:INV.ALUMODE0DSP1:PATTERN[44]
53 ---------------------------DSP1:MASK[44]
54 --------------------------DSP1:MASK[45]-
55 ---------------------------DSP1:PATTERN[45]
56 --------------------------DSP1:LFSR_EN_SETVALDSP1:LFSR_EN_SET
57 --------------------------DSP1:MASK[46]DSP1:PATTERN[46]
58 --------------------------DSP1:MASK[47]-
59 ----------------------------
60 --------------------------DSP1:PATTERN[47]-
61 --------------------------DSP1:SEL_ROUNDING_MASK[0]DSP1:SEL_PATTERN
62 --------------------------DSP1:SEL_MASKDSP1:SEL_ROUNDING_MASK[1]
DSP0:AUTORESET_OVER_UNDER_FLOW[1, 27, 16]
DSP0:AUTORESET_PATTERN_DETECT[1, 26, 16]
DSP0:LFSR_EN_SETVAL[1, 27, 62]
DSP0:ROUNDING_LSB_MASK[0, 26, 1]
DSP0:SCAN_IN_SETVAL_M[0, 26, 8]
DSP0:SCAN_IN_SETVAL_P[0, 27, 0]
DSP0:TEST_SETVAL_M[0, 26, 7]
DSP0:TEST_SETVAL_P[1, 27, 17]
DSP1:AUTORESET_OVER_UNDER_FLOW[3, 26, 48]
DSP1:AUTORESET_PATTERN_DETECT[3, 27, 47]
DSP1:LFSR_EN_SETVAL[4, 26, 56]
DSP1:ROUNDING_LSB_MASK[2, 26, 33]
DSP1:SCAN_IN_SETVAL_M[2, 27, 40]
DSP1:SCAN_IN_SETVAL_P[2, 26, 32]
DSP1:TEST_SETVAL_M[2, 27, 37]
DSP1:TEST_SETVAL_P[3, 26, 47]
Non-inverted[0]
DSP0:MASK[2, 27, 27][2, 26, 26][2, 27, 22][2, 27, 21][2, 26, 17][2, 27, 16][2, 27, 11][2, 27, 10][2, 26, 6][2, 26, 3][2, 27, 2][2, 27, 1][1, 27, 52][1, 26, 52][1, 26, 49][1, 27, 47][1, 27, 45][1, 27, 42][1, 26, 36][1, 26, 35][1, 26, 32][1, 26, 30][1, 27, 26][1, 26, 25][1, 26, 3][1, 26, 2][0, 27, 63][0, 26, 61][0, 26, 60][0, 26, 58][0, 27, 53][0, 26, 51][0, 26, 48][0, 26, 45][0, 27, 43][0, 26, 41][0, 27, 29][0, 27, 27][0, 26, 25][0, 27, 24][0, 26, 20][0, 27, 18][0, 27, 13][0, 26, 11][0, 27, 8][0, 26, 6][0, 27, 3][0, 26, 2]
DSP0:PATTERN[2, 26, 27][2, 26, 25][2, 27, 23][2, 27, 20][2, 26, 18][2, 26, 16][2, 26, 11][2, 27, 9][2, 27, 6][2, 26, 5][2, 27, 3][2, 27, 0][1, 27, 53][1, 26, 51][1, 27, 50][1, 27, 46][1, 26, 45][1, 26, 42][1, 27, 36][1, 27, 34][1, 27, 32][1, 26, 29][1, 27, 27][1, 27, 24][1, 26, 5][1, 27, 1][1, 27, 0][0, 27, 61][0, 27, 60][0, 26, 57][0, 26, 54][0, 27, 51][0, 26, 49][0, 27, 45][0, 26, 43][0, 27, 41][0, 26, 29][0, 27, 26][0, 26, 26][0, 27, 23][0, 27, 20][0, 26, 18][0, 27, 14][0, 27, 11][0, 27, 9][0, 26, 5][0, 26, 3][0, 27, 2]
DSP1:MASK[4, 26, 58][4, 26, 57][4, 26, 54][4, 27, 53][4, 26, 49][4, 26, 48][4, 27, 43][4, 26, 42][4, 26, 37][4, 27, 37][4, 27, 34][4, 27, 33][4, 27, 20][4, 26, 20][4, 26, 17][4, 26, 15][4, 27, 12][4, 27, 10][4, 26, 3][4, 27, 3][4, 27, 0][3, 26, 62][3, 26, 58][3, 27, 57][3, 27, 36][3, 26, 34][3, 26, 31][3, 27, 29][3, 26, 26][3, 26, 25][3, 26, 21][3, 26, 20][3, 27, 17][3, 27, 14][3, 26, 11][3, 27, 9][2, 27, 61][2, 26, 58][2, 27, 56][2, 26, 56][2, 27, 52][2, 27, 51][2, 26, 45][2, 26, 43][2, 27, 41][2, 26, 38][2, 26, 35][2, 27, 34]
DSP1:PATTERN[4, 26, 60][4, 27, 57][4, 27, 55][4, 27, 52][4, 27, 50][4, 26, 47][4, 26, 43][4, 26, 41][4, 26, 38][4, 27, 36][4, 26, 35][4, 27, 32][4, 26, 21][4, 27, 18][4, 26, 18][4, 27, 14][4, 27, 13][4, 27, 9][4, 26, 5][4, 27, 2][4, 27, 1][3, 26, 61][3, 26, 60][3, 27, 56][3, 27, 37][3, 26, 33][3, 26, 32][3, 26, 28][3, 27, 26][3, 27, 24][3, 26, 22][3, 27, 18][3, 26, 17][3, 27, 13][3, 26, 12][3, 27, 8][2, 26, 61][2, 26, 57][2, 27, 57][2, 27, 55][2, 27, 53][2, 27, 50][2, 26, 46][2, 27, 43][2, 26, 41][2, 26, 37][2, 26, 36][2, 26, 34]
Non-inverted[47][46][45][44][43][42][41][40][39][38][37][36][35][34][33][32][31][30][29][28][27][26][25][24][23][22][21][20][19][18][17][16][15][14][13][12][11][10][9][8][7][6][5][4][3][2][1][0]
DSP0:INV.ALUMODE0[2, 26, 29]
DSP0:INV.ALUMODE1[2, 27, 7]
DSP0:INV.ALUMODE2[2, 26, 7]
DSP0:INV.ALUMODE3[2, 26, 1]
DSP0:INV.CARRYIN[0, 26, 12]
DSP0:INV.CLK[1, 26, 20]
DSP0:INV.OPMODE0[1, 27, 60]
DSP0:INV.OPMODE1[1, 27, 61]
DSP0:INV.OPMODE2[1, 26, 58]
DSP0:INV.OPMODE3[1, 26, 60]
DSP0:INV.OPMODE4[0, 26, 30]
DSP0:INV.OPMODE5[0, 26, 31]
DSP0:INV.OPMODE6[0, 27, 31]
DSP1:INV.ALUMODE0[4, 26, 52]
DSP1:INV.ALUMODE1[4, 27, 51]
DSP1:INV.ALUMODE2[4, 27, 47]
DSP1:INV.ALUMODE3[4, 27, 46]
DSP1:INV.CARRYIN[2, 26, 42]
DSP1:INV.CLK[3, 26, 52]
DSP1:INV.OPMODE0[4, 27, 40]
DSP1:INV.OPMODE1[4, 27, 39]
DSP1:INV.OPMODE2[4, 26, 34]
DSP1:INV.OPMODE3[4, 26, 36]
DSP1:INV.OPMODE4[2, 27, 62]
DSP1:INV.OPMODE5[2, 27, 63]
DSP1:INV.OPMODE6[3, 27, 0]
Inverted~[0]
DSP0:ALUMODEREG[2, 26, 8]
DSP0:CARRYINREG[0, 27, 12]
DSP0:CARRYINSELREG[0, 26, 32]
DSP0:CREG[2, 26, 2]
DSP0:MREG[0, 27, 6]
DSP0:MULTCARRYINREG[0, 26, 15]
DSP0:OPMODEREG[1, 26, 62]
DSP0:PREG[1, 26, 6]
DSP1:ALUMODEREG[4, 26, 51]
DSP1:CARRYINREG[2, 27, 42]
DSP1:CARRYINSELREG[3, 27, 1]
DSP1:CREG[4, 26, 46]
DSP1:MREG[2, 27, 32]
DSP1:MULTCARRYINREG[2, 27, 45]
DSP1:OPMODEREG[4, 27, 41]
DSP1:PREG[3, 26, 38]
10
01
DSP0:LFSR_EN_SET[1, 27, 63]
DSP0:SCAN_IN_SET_M[0, 27, 10]
DSP0:SCAN_IN_SET_P[0, 27, 1]
DSP0:TEST_SET_M[0, 27, 7]
DSP0:TEST_SET_P[1, 26, 17]
DSP1:LFSR_EN_SET[4, 27, 56]
DSP1:SCAN_IN_SET_M[2, 27, 39]
DSP1:SCAN_IN_SET_P[2, 27, 33]
DSP1:TEST_SET_M[2, 27, 36]
DSP1:TEST_SET_P[3, 26, 49]
SET0
DONT_SET1
DSP0:AREG_ACASCREG[0, 27, 55][0, 26, 56][0, 27, 56]
DSP0:BREG_BCASCREG[1, 26, 1][1, 27, 3][0, 27, 57]
DSP1:AREG_ACASCREG[3, 27, 12][3, 26, 7][3, 26, 15]
DSP1:BREG_BCASCREG[3, 27, 34][3, 26, 36][3, 26, 16]
1_1001
0_0011
2_1100
2_2101
DSP0:A_INPUT[1, 27, 2]
DSP0:B_INPUT[0, 27, 62]
DSP1:A_INPUT[3, 26, 35]
DSP1:B_INPUT[3, 26, 18]
DIRECT0
CASCADE1
DSP0:CLOCK_INVERT_M[1, 26, 15]
DSP0:CLOCK_INVERT_P[1, 27, 14]
DSP1:CLOCK_INVERT_M[3, 26, 46]
DSP1:CLOCK_INVERT_P[3, 26, 45]
SAME_EDGE0
OPPOSITE_EDGE1
DSP0:AUTORESET_PATTERN_DETECT_OPTINV[1, 26, 18]
DSP1:AUTORESET_PATTERN_DETECT_OPTINV[3, 27, 50]
MATCH0
NOT_MATCH1
DSP0:USE_MULT[0, 26, 62][1, 26, 22]
DSP1:USE_MULT[3, 27, 16][3, 27, 22]
MULT00
MULT_S01
NONE11
DSP0:USE_SIMD[1, 26, 56][0, 27, 39][1, 27, 13]
DSP1:USE_SIMD[4, 27, 23][3, 27, 6][3, 27, 45]
ONE48000
TWO24001
FOUR12111
DSP0:USE_PATTERN_DETECT[1, 27, 22]
DSP1:USE_PATTERN_DETECT[3, 27, 23]
NO_PATDET0
PATDET1
DSP0:SEL_MASK[2, 26, 30]
DSP1:SEL_MASK[4, 26, 62]
MASK0
C1
DSP0:SEL_PATTERN[2, 26, 31]
DSP1:SEL_PATTERN[4, 27, 61]
PATTERN0
C1
DSP0:SEL_ROUNDING_MASK[2, 27, 31][2, 27, 29]
DSP1:SEL_ROUNDING_MASK[4, 27, 62][4, 26, 61]
SEL_MASK00
MODE101
MODE211