GTP transceivers

Todo

document

Bitstream

GTP bittile 0
RowColumn
GTP bittile 1
RowColumn
GTP bittile 2
RowColumn
01234567891011121314151617181920212223242526272829
0 ------------------------------
1 ------------------------------
2 ------------------------------
3 ------------------------------
4 ------------------------------
5 ------------------------------
6 ------------------------------
7 ------------------------------
8 ------------------------------
9 ------------------------------
10 ------------------------------
11 ------------------------------
12 ------------------------------
13 ------------------------------
14 ------------------------------
15 ------------------------------
16 ------------------------------
17 ------------------------------
18 ------------------------------
19 ------------------------------
20 ------------------------------
21 ------------------------------
22 -----------------------------CRC32_0:ENABLE64
23 ------------------------------
24 ----------------------------CRC32_0:CRC_INIT[31]-
25 ------------------------------
26 ----------------------------CRC32_0:CRC_INIT[30]-
27 ------------------------------
28 ----------------------------CRC32_0:CRC_INIT[29]-
29 ------------------------------
30 ----------------------------CRC32_0:CRC_INIT[28]-
31 ------------------------------
32 ----------------------------CRC32_0:CRC_INIT[27]-
33 ------------------------------
34 ------------------------------
35 ----------------------------CRC32_0:CRC_INIT[26]-
36 ----------------------------CRC32_0:CRC_INIT[25]-
37 ------------------------------
38 ------------------------------
39 ----------------------------CRC32_0:CRC_INIT[24]-
40 ------------------------------
41 ----------------------------CRC32_0:CRC_INIT[23]-
42 ------------------------------
43 ----------------------------CRC32_0:CRC_INIT[22]-
44 ------------------------------
45 ----------------------------CRC32_0:CRC_INIT[21]-
46 ------------------------------
47 ----------------------------CRC32_0:CRC_INIT[20]-
48 ------------------------------
49 ----------------------------CRC32_0:CRC_INIT[19]-
50 ------------------------------
51 ----------------------------CRC32_0:CRC_INIT[18]-
52 ------------------------------
53 ----------------------------CRC32_0:CRC_INIT[17]-
54 ------------------------------
55 ----------------------------CRC32_0:CRC_INIT[16]-
56 ------------------------------
57 -----------------------------CRC32_0:CRC_INIT[15]
58 ------------------------------
59 -----------------------------CRC32_0:CRC_INIT[14]
60 ------------------------------
61 -----------------------------CRC32_0:CRC_INIT[13]
62 ------------------------------
63 -----------------------------CRC32_0:CRC_INIT[12]
GTP bittile 3
RowColumn
01234567891011121314151617181920212223242526272829
0 ------------------------------
1 -----------------------------CRC32_0:CRC_INIT[11]
2 ------------------------------
3 -----------------------------CRC32_0:CRC_INIT[10]
4 ------------------------------
5 -----------------------------CRC32_0:CRC_INIT[9]
6 ------------------------------
7 ------------------------------
8 -----------------------------CRC32_0:CRC_INIT[8]
9 ------------------------------
10 -----------------------------CRC32_0:CRC_INIT[7]
11 ------------------------------
12 -----------------------------CRC32_0:CRC_INIT[6]
13 ------------------------------
14 -----------------------------CRC32_0:CRC_INIT[5]
15 ------------------------------
16 -----------------------------CRC32_0:CRC_INIT[4]
17 ------------------------------
18 -----------------------------CRC32_0:CRC_INIT[3]
19 ------------------------------
20 -----------------------------CRC32_0:CRC_INIT[2]
21 ------------------------------
22 -----------------------------CRC32_0:CRC_INIT[1]
23 ------------------------------
24 -----------------------------CRC32_0:CRC_INIT[0]
GTP bittile 4
RowColumn
GTP bittile 5
RowColumn
012345678910111213141516171819202122232425262728293031
0 ------------------------------GTP_DUAL:DRP00[1]GTP_DUAL:DRP00[0]
1 ------------------------------GTP_DUAL:DRP00[2]GTP_DUAL:DRP00[3]
2 ------------------------------GTP_DUAL:DRP00[5]GTP_DUAL:DRP00[4]
3 ------------------------------GTP_DUAL:DRP00[6]GTP_DUAL:DRP00[7]
4 ------------------------------GTP_DUAL:DRP00[9]GTP_DUAL:DRP00[8]
5 ------------------------------GTP_DUAL:DRP00[10]GTP_DUAL:DRP00[11]
6 ------------------------------GTP_DUAL:DRP00[13]GTP_DUAL:DRP00[12]
7 ------------------------------GTP_DUAL:DRP00[14]GTP_DUAL:DRP00[15]
8 ------------------------------GTP_DUAL:DRP01[1]GTP_DUAL:DRP01[0]
9 ------------------------------GTP_DUAL:DRP01[2]GTP_DUAL:DRP01[3]
10 ------------------------------GTP_DUAL:DRP01[5]GTP_DUAL:DRP01[4]
11 ------------------------------GTP_DUAL:DRP01[6]GTP_DUAL:DRP01[7]
12 ------------------------------GTP_DUAL:DRP01[9]GTP_DUAL:DRP01[8]
13 ------------------------------GTP_DUAL:DRP01[10]GTP_DUAL:DRP01[11]
14 ------------------------------GTP_DUAL:DRP01[13]GTP_DUAL:DRP01[12]
15 ------------------------------GTP_DUAL:DRP01[14]GTP_DUAL:DRP01[15]
16 ------------------------------GTP_DUAL:DRP02[1]GTP_DUAL:DRP02[0]
17 ------------------------------GTP_DUAL:DRP02[2]GTP_DUAL:DRP02[3]
18 ------------------------------GTP_DUAL:DRP02[5]GTP_DUAL:DRP02[4]
19 ------------------------------GTP_DUAL:DRP02[6]GTP_DUAL:DRP02[7]
20 ------------------------------GTP_DUAL:DRP02[9]GTP_DUAL:DRP02[8]
21 ------------------------------GTP_DUAL:DRP02[10]GTP_DUAL:DRP02[11]
22 ------------------------------GTP_DUAL:DRP02[13]GTP_DUAL:DRP02[12]
23 ------------------------------GTP_DUAL:DRP02[14]GTP_DUAL:DRP02[15]
24 ------------------------------GTP_DUAL:DRP03[1]GTP_DUAL:DRP03[0]
25 ------------------------------GTP_DUAL:DRP03[2]GTP_DUAL:DRP03[3]
26 ------------------------------GTP_DUAL:DRP03[5]GTP_DUAL:DRP03[4]
27 ------------------------------GTP_DUAL:DRP03[6]GTP_DUAL:DRP03[7]
28 ------------------------------GTP_DUAL:DRP03[9]GTP_DUAL:DRP03[8]
29 ------------------------------GTP_DUAL:DRP03[10]GTP_DUAL:DRP03[11]
30 ------------------------------GTP_DUAL:DRP03[13]GTP_DUAL:DRP03[12]
31 ------------------------------GTP_DUAL:DRP03[14]GTP_DUAL:DRP03[15]
32 ------------------------------GTP_DUAL:DRP04[1]GTP_DUAL:DRP04[0]
33 ------------------------------GTP_DUAL:DRP04[2]GTP_DUAL:CLKINDC_B
GTP_DUAL:DRP04[3]
34 ------------------------------GTP_DUAL:DRP04[5]
GTP_DUAL:MUX.CLKIN[1]
GTP_DUAL:DRP04[4]
GTP_DUAL:MUX.CLKIN[2]
35 ------------------------------GTP_DUAL:DRP04[6]
GTP_DUAL:MUX.CLKIN[0]
GTP_DUAL:DRP04[7]
GTP_DUAL:MUX.CLKOUT_SOUTH
36 ------------------------------GTP_DUAL:DRP04[9]
GTP_DUAL:PLL_DIVSEL_REF[1]
GTP_DUAL:DRP04[8]
GTP_DUAL:MUX.CLKOUT_NORTH
37 ------------------------------GTP_DUAL:DRP04[10]
GTP_DUAL:PLL_DIVSEL_REF[2]
GTP_DUAL:DRP04[11]
GTP_DUAL:PLL_DIVSEL_REF[3]
38 ------------------------------GTP_DUAL:DRP04[13]
GTP_DUAL:PLL_DIVSEL_REF[0]
GTP_DUAL:DRP04[12]
GTP_DUAL:PLL_DIVSEL_REF[4]
39 ------------------------------GTP_DUAL:DRP04[14]GTP_DUAL:DRP04[15]
GTP_DUAL:PLLLKDET_CFG[2]
40 ------------------------------GTP_DUAL:DRP05[1]
GTP_DUAL:PLLLKDET_CFG[0]
GTP_DUAL:DRP05[0]
GTP_DUAL:PLLLKDET_CFG[1]
41 ------------------------------GTP_DUAL:DRP05[2]
GTP_DUAL:TX_DIFF_BOOST_1
GTP_DUAL:DRP05[3]
GTP_DUAL:PLL_TXDIVSEL_OUT_1[1]
42 ------------------------------GTP_DUAL:DRP05[5]
GTP_DUAL:SYS_CLK_EN
GTP_DUAL:DRP05[4]
GTP_DUAL:PLL_TXDIVSEL_OUT_1[0]
43 ------------------------------GTP_DUAL:DRP05[6]GTP_DUAL:DRP05[7]
44 ------------------------------GTP_DUAL:DRP05[9]
GTP_DUAL:PMA_COM_CFG[26]
GTP_DUAL:DRP05[8]
GTP_DUAL:PMA_COM_CFG[21]
45 ------------------------------GTP_DUAL:DRP05[10]
GTP_DUAL:PMA_COM_CFG[25]
GTP_DUAL:DRP05[11]
GTP_DUAL:PMA_COM_CFG[24]
46 ------------------------------GTP_DUAL:DRP05[13]
GTP_DUAL:PMA_COM_CFG[22]
GTP_DUAL:DRP05[12]
GTP_DUAL:PMA_COM_CFG[23]
47 ------------------------------GTP_DUAL:DRP05[14]
GTP_DUAL:RCV_TERM_VTTRX_1
GTP_DUAL:DRP05[15]
GTP_DUAL:RCV_TERM_GND_1
48 ------------------------------GTP_DUAL:AC_CAP_DIS_1
GTP_DUAL:DRP06[1]
GTP_DUAL:DRP06[0]
GTP_DUAL:RCV_TERM_MID_1
49 ------------------------------GTP_DUAL:DRP06[2]
GTP_DUAL:PMA_RX_CFG_1[12]
GTP_DUAL:DRP06[3]
GTP_DUAL:PMA_RX_CFG_1[24]
50 ------------------------------GTP_DUAL:DRP06[5]
GTP_DUAL:PMA_RX_CFG_1[0]
GTP_DUAL:DRP06[4]
GTP_DUAL:PMA_RX_CFG_1[1]
51 ------------------------------GTP_DUAL:DRP06[6]
GTP_DUAL:PMA_RX_CFG_0[11]
GTP_DUAL:DRP06[7]
GTP_DUAL:PMA_RX_CFG_1[22]
52 ------------------------------GTP_DUAL:DRP06[9]
GTP_DUAL:PMA_RX_CFG_1[20]
GTP_DUAL:DRP06[8]
GTP_DUAL:PMA_RX_CFG_1[21]
53 ------------------------------GTP_DUAL:DRP06[10]
GTP_DUAL:PMA_RX_CFG_1[19]
GTP_DUAL:DRP06[11]
GTP_DUAL:PMA_RX_CFG_1[18]
54 ------------------------------GTP_DUAL:DRP06[13]
GTP_DUAL:PMA_RX_CFG_1[16]
GTP_DUAL:DRP06[12]
GTP_DUAL:PMA_RX_CFG_1[17]
55 ------------------------------GTP_DUAL:DRP06[14]
GTP_DUAL:PMA_RX_CFG_1[15]
GTP_DUAL:DRP06[15]
GTP_DUAL:PMA_RX_CFG_1[14]
56 ------------------------------GTP_DUAL:DRP07[1]
GTP_DUAL:RX_CDR_FORCE_ROTATE_1
GTP_DUAL:DRP07[0]
GTP_DUAL:PMA_RX_CFG_0[13]
57 ------------------------------GTP_DUAL:DRP07[2]
GTP_DUAL:PMA_RX_CFG_1[5]
GTP_DUAL:DRP07[3]
GTP_DUAL:PMA_RX_CFG_1[4]
58 ------------------------------GTP_DUAL:DRP07[5]
GTP_DUAL:PMA_RX_CFG_1[2]
GTP_DUAL:DRP07[4]
GTP_DUAL:PMA_RX_CFG_1[3]
59 ------------------------------GTP_DUAL:DRP07[6]
GTP_DUAL:PMA_RX_CFG_1[23]
GTP_DUAL:DRP07[7]
GTP_DUAL:PMA_RX_CFG_1[10]
60 ------------------------------GTP_DUAL:DRP07[9]
GTP_DUAL:PMA_RX_CFG_1[8]
GTP_DUAL:DRP07[8]
GTP_DUAL:PMA_RX_CFG_1[9]
61 ------------------------------GTP_DUAL:DRP07[10]
GTP_DUAL:PMA_RX_CFG_1[7]
GTP_DUAL:DRP07[11]
GTP_DUAL:PMA_RX_CFG_1[6]
62 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_4_1[1]
GTP_DUAL:DRP07[13]
GTP_DUAL:CHAN_BOND_SEQ_2_4_1[0]
GTP_DUAL:DRP07[12]
63 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_4_1[2]
GTP_DUAL:DRP07[14]
GTP_DUAL:CHAN_BOND_SEQ_2_4_1[3]
GTP_DUAL:DRP07[15]
GTP bittile 6
RowColumn
012345678910111213141516171819202122232425262728293031
0 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_4_1[5]
GTP_DUAL:DRP08[1]
GTP_DUAL:CHAN_BOND_SEQ_2_4_1[4]
GTP_DUAL:DRP08[0]
1 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_4_1[6]
GTP_DUAL:DRP08[2]
GTP_DUAL:CHAN_BOND_SEQ_2_4_1[7]
GTP_DUAL:DRP08[3]
2 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_4_1[9]
GTP_DUAL:DRP08[5]
GTP_DUAL:CHAN_BOND_SEQ_2_4_1[8]
GTP_DUAL:DRP08[4]
3 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_3_1[0]
GTP_DUAL:DRP08[6]
GTP_DUAL:CHAN_BOND_SEQ_2_3_1[1]
GTP_DUAL:DRP08[7]
4 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_3_1[3]
GTP_DUAL:DRP08[9]
GTP_DUAL:CHAN_BOND_SEQ_2_3_1[2]
GTP_DUAL:DRP08[8]
5 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_3_1[4]
GTP_DUAL:DRP08[10]
GTP_DUAL:CHAN_BOND_SEQ_2_3_1[5]
GTP_DUAL:DRP08[11]
6 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_3_1[7]
GTP_DUAL:DRP08[13]
GTP_DUAL:CHAN_BOND_SEQ_2_3_1[6]
GTP_DUAL:DRP08[12]
7 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_3_1[8]
GTP_DUAL:DRP08[14]
GTP_DUAL:DRP08[15]
8 ------------------------------GTP_DUAL:DRP09[1]
GTP_DUAL:PCOMMA_10B_VALUE_1[9]
GTP_DUAL:DRP09[0]
GTP_DUAL:PCI_EXPRESS_MODE_1
9 ------------------------------GTP_DUAL:DRP09[2]
GTP_DUAL:PCOMMA_10B_VALUE_1[8]
GTP_DUAL:DRP09[3]
GTP_DUAL:PCOMMA_10B_VALUE_1[7]
10 ------------------------------GTP_DUAL:DRP09[5]
GTP_DUAL:PCOMMA_10B_VALUE_1[5]
GTP_DUAL:DRP09[4]
GTP_DUAL:PCOMMA_10B_VALUE_1[6]
11 ------------------------------GTP_DUAL:DRP09[6]
GTP_DUAL:PCOMMA_10B_VALUE_1[4]
GTP_DUAL:DRP09[7]
GTP_DUAL:PCOMMA_10B_VALUE_1[3]
12 ------------------------------GTP_DUAL:DRP09[9]
GTP_DUAL:PCOMMA_10B_VALUE_1[1]
GTP_DUAL:DRP09[8]
GTP_DUAL:PCOMMA_10B_VALUE_1[2]
13 ------------------------------GTP_DUAL:DRP09[10]
GTP_DUAL:PCOMMA_10B_VALUE_1[0]
GTP_DUAL:DRP09[11]
GTP_DUAL:PCOMMA_DETECT_1
14 ------------------------------GTP_DUAL:DRP09[13]GTP_DUAL:DRP09[12]
15 ------------------------------GTP_DUAL:DRP09[14]
GTP_DUAL:PLL_SATA_1
GTP_DUAL:DRP09[15]
GTP_DUAL:PLL_RXDIVSEL_OUT_1[1]
16 ------------------------------GTP_DUAL:DRP0A[1]
GTP_DUAL:PMA_CDR_SCAN_1[26]
GTP_DUAL:DRP0A[0]
GTP_DUAL:PLL_RXDIVSEL_OUT_1[0]
17 ------------------------------GTP_DUAL:DRP0A[2]
GTP_DUAL:PMA_CDR_SCAN_1[25]
GTP_DUAL:DRP0A[3]
GTP_DUAL:PMA_CDR_SCAN_1[24]
18 ------------------------------GTP_DUAL:DRP0A[5]
GTP_DUAL:PMA_CDR_SCAN_1[22]
GTP_DUAL:DRP0A[4]
GTP_DUAL:PMA_CDR_SCAN_1[23]
19 ------------------------------GTP_DUAL:DRP0A[6]
GTP_DUAL:PMA_CDR_SCAN_1[21]
GTP_DUAL:DRP0A[7]
GTP_DUAL:PMA_CDR_SCAN_1[20]
20 ------------------------------GTP_DUAL:DRP0A[9]
GTP_DUAL:PMA_CDR_SCAN_1[18]
GTP_DUAL:DRP0A[8]
GTP_DUAL:PMA_CDR_SCAN_1[19]
21 ------------------------------GTP_DUAL:DRP0A[10]
GTP_DUAL:PMA_CDR_SCAN_1[17]
GTP_DUAL:DRP0A[11]
GTP_DUAL:PMA_CDR_SCAN_1[16]
22 ------------------------------GTP_DUAL:DRP0A[13]
GTP_DUAL:PMA_CDR_SCAN_1[14]
GTP_DUAL:DRP0A[12]
GTP_DUAL:PMA_CDR_SCAN_1[15]
23 ------------------------------GTP_DUAL:DRP0A[14]
GTP_DUAL:PMA_CDR_SCAN_1[13]
GTP_DUAL:DRP0A[15]
GTP_DUAL:PMA_CDR_SCAN_1[12]
24 ------------------------------GTP_DUAL:DRP0B[1]
GTP_DUAL:PMA_CDR_SCAN_1[10]
GTP_DUAL:DRP0B[0]
GTP_DUAL:PMA_CDR_SCAN_1[11]
25 ------------------------------GTP_DUAL:DRP0B[2]
GTP_DUAL:PMA_CDR_SCAN_1[9]
GTP_DUAL:DRP0B[3]
GTP_DUAL:PMA_CDR_SCAN_1[8]
26 ------------------------------GTP_DUAL:DRP0B[5]
GTP_DUAL:PMA_CDR_SCAN_1[6]
GTP_DUAL:DRP0B[4]
GTP_DUAL:PMA_CDR_SCAN_1[7]
27 ------------------------------GTP_DUAL:DRP0B[6]
GTP_DUAL:PMA_CDR_SCAN_1[5]
GTP_DUAL:DRP0B[7]
GTP_DUAL:PMA_CDR_SCAN_1[4]
28 ------------------------------GTP_DUAL:DRP0B[9]
GTP_DUAL:PMA_CDR_SCAN_1[2]
GTP_DUAL:DRP0B[8]
GTP_DUAL:PMA_CDR_SCAN_1[3]
29 ------------------------------GTP_DUAL:DRP0B[10]
GTP_DUAL:PMA_CDR_SCAN_1[1]
GTP_DUAL:DRP0B[11]
GTP_DUAL:PMA_CDR_SCAN_1[0]
30 ------------------------------GTP_DUAL:DRP0B[13]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[30]
GTP_DUAL:DRP0B[12]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[31]
31 ------------------------------GTP_DUAL:DRP0B[14]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[29]
GTP_DUAL:DRP0B[15]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[28]
32 ------------------------------GTP_DUAL:DRP0C[1]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[26]
GTP_DUAL:DRP0C[0]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[27]
33 ------------------------------GTP_DUAL:DRP0C[2]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[25]
GTP_DUAL:DRP0C[3]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[24]
34 ------------------------------GTP_DUAL:DRP0C[5]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[22]
GTP_DUAL:DRP0C[4]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[23]
35 ------------------------------GTP_DUAL:DRP0C[6]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[21]
GTP_DUAL:DRP0C[7]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[20]
36 ------------------------------GTP_DUAL:DRP0C[9]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[18]
GTP_DUAL:DRP0C[8]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[19]
37 ------------------------------GTP_DUAL:DRP0C[10]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[17]
GTP_DUAL:DRP0C[11]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[16]
38 ------------------------------GTP_DUAL:DRP0C[13]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[14]
GTP_DUAL:DRP0C[12]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[15]
39 ------------------------------GTP_DUAL:DRP0C[14]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[13]
GTP_DUAL:DRP0C[15]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[12]
40 ------------------------------GTP_DUAL:DRP0D[1]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[10]
GTP_DUAL:DRP0D[0]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[11]
41 ------------------------------GTP_DUAL:DRP0D[2]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[9]
GTP_DUAL:DRP0D[3]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[8]
42 ------------------------------GTP_DUAL:DRP0D[5]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[6]
GTP_DUAL:DRP0D[4]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[7]
43 ------------------------------GTP_DUAL:DRP0D[6]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[5]
GTP_DUAL:DRP0D[7]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[4]
44 ------------------------------GTP_DUAL:DRP0D[9]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[2]
GTP_DUAL:DRP0D[8]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[3]
45 ------------------------------GTP_DUAL:DRP0D[10]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[1]
GTP_DUAL:DRP0D[11]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[0]
46 ------------------------------GTP_DUAL:DRP0D[13]
GTP_DUAL:RX_DECODE_SEQ_MATCH_1
GTP_DUAL:DRP0D[12]
GTP_DUAL:RX_BUFFER_USE_1
47 ------------------------------GTP_DUAL:DRP0D[14]
GTP_DUAL:RX_LOS_INVALID_INCR_1[2]
GTP_DUAL:DRP0D[15]
GTP_DUAL:RX_LOS_INVALID_INCR_1[1]
48 ------------------------------GTP_DUAL:DRP0E[1]
GTP_DUAL:RX_LOSS_OF_SYNC_FSM_1
GTP_DUAL:DRP0E[0]
GTP_DUAL:RX_LOS_INVALID_INCR_1[0]
49 ------------------------------GTP_DUAL:DRP0E[2]
GTP_DUAL:RX_LOS_THRESHOLD_1[2]
GTP_DUAL:DRP0E[3]
GTP_DUAL:RX_LOS_THRESHOLD_1[1]
50 ------------------------------GTP_DUAL:DRP0E[5]
GTP_DUAL:RX_SLIDE_MODE_1
GTP_DUAL:DRP0E[4]
GTP_DUAL:RX_LOS_THRESHOLD_1[0]
51 ------------------------------GTP_DUAL:DRP0E[6]
GTP_DUAL:RX_STATUS_FMT_1
GTP_DUAL:DRP0E[7]
GTP_DUAL:RX_XCLK_SEL_1
52 ------------------------------GTP_DUAL:DRP0E[9]
GTP_DUAL:SATA_BURST_VAL_1[1]
GTP_DUAL:DRP0E[8]
GTP_DUAL:SATA_BURST_VAL_1[2]
53 ------------------------------GTP_DUAL:DRP0E[10]
GTP_DUAL:SATA_BURST_VAL_1[0]
GTP_DUAL:DRP0E[11]
GTP_DUAL:SATA_IDLE_VAL_1[2]
54 ------------------------------GTP_DUAL:DRP0E[13]
GTP_DUAL:SATA_IDLE_VAL_1[0]
GTP_DUAL:DRP0E[12]
GTP_DUAL:SATA_IDLE_VAL_1[1]
55 ------------------------------GTP_DUAL:DRP0E[14]
GTP_DUAL:SATA_MAX_BURST_1[5]
GTP_DUAL:DRP0E[15]
GTP_DUAL:SATA_MAX_BURST_1[4]
56 ------------------------------GTP_DUAL:DRP0F[1]
GTP_DUAL:SATA_MAX_BURST_1[2]
GTP_DUAL:DRP0F[0]
GTP_DUAL:SATA_MAX_BURST_1[3]
57 ------------------------------GTP_DUAL:DRP0F[2]
GTP_DUAL:SATA_MAX_BURST_1[1]
GTP_DUAL:DRP0F[3]
GTP_DUAL:SATA_MAX_BURST_1[0]
58 ------------------------------GTP_DUAL:DRP0F[5]
GTP_DUAL:SATA_MAX_INIT_1[4]
GTP_DUAL:DRP0F[4]
GTP_DUAL:SATA_MAX_INIT_1[5]
59 ------------------------------GTP_DUAL:DRP0F[6]
GTP_DUAL:SATA_MAX_INIT_1[3]
GTP_DUAL:DRP0F[7]
GTP_DUAL:SATA_MAX_INIT_1[2]
60 ------------------------------GTP_DUAL:DRP0F[9]
GTP_DUAL:SATA_MAX_INIT_1[0]
GTP_DUAL:DRP0F[8]
GTP_DUAL:SATA_MAX_INIT_1[1]
61 ------------------------------GTP_DUAL:DRP0F[10]
GTP_DUAL:SATA_MAX_WAKE_1[5]
GTP_DUAL:DRP0F[11]
GTP_DUAL:SATA_MAX_WAKE_1[4]
62 ------------------------------GTP_DUAL:DRP0F[13]
GTP_DUAL:SATA_MAX_WAKE_1[2]
GTP_DUAL:DRP0F[12]
GTP_DUAL:SATA_MAX_WAKE_1[3]
63 ------------------------------GTP_DUAL:DRP0F[14]
GTP_DUAL:SATA_MAX_WAKE_1[1]
GTP_DUAL:DRP0F[15]
GTP_DUAL:SATA_MAX_WAKE_1[0]
GTP bittile 7
RowColumn
012345678910111213141516171819202122232425262728293031
0 ------------------------------GTP_DUAL:DRP10[1]
GTP_DUAL:SATA_MIN_BURST_1[4]
GTP_DUAL:DRP10[0]
GTP_DUAL:SATA_MIN_BURST_1[5]
1 ------------------------------GTP_DUAL:DRP10[2]
GTP_DUAL:SATA_MIN_BURST_1[3]
GTP_DUAL:DRP10[3]
GTP_DUAL:SATA_MIN_BURST_1[2]
2 ------------------------------GTP_DUAL:DRP10[5]
GTP_DUAL:SATA_MIN_BURST_1[0]
GTP_DUAL:DRP10[4]
GTP_DUAL:SATA_MIN_BURST_1[1]
3 ------------------------------GTP_DUAL:DRP10[6]
GTP_DUAL:SATA_MIN_INIT_1[5]
GTP_DUAL:DRP10[7]
GTP_DUAL:SATA_MIN_INIT_1[4]
4 ------------------------------GTP_DUAL:DRP10[9]
GTP_DUAL:SATA_MIN_INIT_1[2]
GTP_DUAL:DRP10[8]
GTP_DUAL:SATA_MIN_INIT_1[3]
5 ------------------------------GTP_DUAL:DRP10[10]
GTP_DUAL:SATA_MIN_INIT_1[1]
GTP_DUAL:DRP10[11]
GTP_DUAL:SATA_MIN_INIT_1[0]
6 ------------------------------GTP_DUAL:DRP10[13]
GTP_DUAL:SATA_MIN_WAKE_1[4]
GTP_DUAL:DRP10[12]
GTP_DUAL:SATA_MIN_WAKE_1[5]
7 ------------------------------GTP_DUAL:DRP10[14]
GTP_DUAL:SATA_MIN_WAKE_1[3]
GTP_DUAL:DRP10[15]
GTP_DUAL:SATA_MIN_WAKE_1[2]
8 ------------------------------GTP_DUAL:DRP11[1]
GTP_DUAL:SATA_MIN_WAKE_1[0]
GTP_DUAL:DRP11[0]
GTP_DUAL:SATA_MIN_WAKE_1[1]
9 ------------------------------GTP_DUAL:DRP11[2]
GTP_DUAL:TERMINATION_IMP_1
GTP_DUAL:DRP11[3]
GTP_DUAL:TRANS_TIME_FROM_P2_1[15]
10 ------------------------------GTP_DUAL:DRP11[5]
GTP_DUAL:TRANS_TIME_FROM_P2_1[13]
GTP_DUAL:DRP11[4]
GTP_DUAL:TRANS_TIME_FROM_P2_1[14]
11 ------------------------------GTP_DUAL:DRP11[6]
GTP_DUAL:TRANS_TIME_FROM_P2_1[12]
GTP_DUAL:DRP11[7]
GTP_DUAL:TRANS_TIME_FROM_P2_1[11]
12 ------------------------------GTP_DUAL:DRP11[9]
GTP_DUAL:TRANS_TIME_FROM_P2_1[9]
GTP_DUAL:DRP11[8]
GTP_DUAL:TRANS_TIME_FROM_P2_1[10]
13 ------------------------------GTP_DUAL:DRP11[10]
GTP_DUAL:TRANS_TIME_FROM_P2_1[8]
GTP_DUAL:DRP11[11]
GTP_DUAL:TRANS_TIME_FROM_P2_1[7]
14 ------------------------------GTP_DUAL:DRP11[13]
GTP_DUAL:TRANS_TIME_FROM_P2_1[5]
GTP_DUAL:DRP11[12]
GTP_DUAL:TRANS_TIME_FROM_P2_1[6]
15 ------------------------------GTP_DUAL:DRP11[14]
GTP_DUAL:TRANS_TIME_FROM_P2_1[4]
GTP_DUAL:DRP11[15]
GTP_DUAL:TRANS_TIME_FROM_P2_1[3]
16 ------------------------------GTP_DUAL:DRP12[1]
GTP_DUAL:TRANS_TIME_FROM_P2_1[1]
GTP_DUAL:DRP12[0]
GTP_DUAL:TRANS_TIME_FROM_P2_1[2]
17 ------------------------------GTP_DUAL:DRP12[2]
GTP_DUAL:TRANS_TIME_FROM_P2_1[0]
GTP_DUAL:DRP12[3]
GTP_DUAL:TRANS_TIME_NON_P2_1[15]
18 ------------------------------GTP_DUAL:DRP12[5]
GTP_DUAL:TRANS_TIME_NON_P2_1[13]
GTP_DUAL:DRP12[4]
GTP_DUAL:TRANS_TIME_NON_P2_1[14]
19 ------------------------------GTP_DUAL:DRP12[6]
GTP_DUAL:TRANS_TIME_NON_P2_1[12]
GTP_DUAL:DRP12[7]
GTP_DUAL:TRANS_TIME_NON_P2_1[11]
20 ------------------------------GTP_DUAL:DRP12[9]
GTP_DUAL:TRANS_TIME_NON_P2_1[9]
GTP_DUAL:DRP12[8]
GTP_DUAL:TRANS_TIME_NON_P2_1[10]
21 ------------------------------GTP_DUAL:DRP12[10]
GTP_DUAL:TRANS_TIME_NON_P2_1[8]
GTP_DUAL:DRP12[11]
GTP_DUAL:TRANS_TIME_NON_P2_1[7]
22 ------------------------------GTP_DUAL:DRP12[13]
GTP_DUAL:TRANS_TIME_NON_P2_1[5]
GTP_DUAL:DRP12[12]
GTP_DUAL:TRANS_TIME_NON_P2_1[6]
23 ------------------------------GTP_DUAL:DRP12[14]
GTP_DUAL:TRANS_TIME_NON_P2_1[4]
GTP_DUAL:DRP12[15]
GTP_DUAL:TRANS_TIME_NON_P2_1[3]
24 ------------------------------GTP_DUAL:DRP13[1]
GTP_DUAL:TRANS_TIME_NON_P2_1[1]
GTP_DUAL:DRP13[0]
GTP_DUAL:TRANS_TIME_NON_P2_1[2]
25 ------------------------------GTP_DUAL:DRP13[2]
GTP_DUAL:TRANS_TIME_NON_P2_1[0]
GTP_DUAL:DRP13[3]
GTP_DUAL:TRANS_TIME_TO_P2_1[15]
26 ------------------------------GTP_DUAL:DRP13[5]
GTP_DUAL:TRANS_TIME_TO_P2_1[13]
GTP_DUAL:DRP13[4]
GTP_DUAL:TRANS_TIME_TO_P2_1[14]
27 ------------------------------GTP_DUAL:DRP13[6]
GTP_DUAL:TRANS_TIME_TO_P2_1[12]
GTP_DUAL:DRP13[7]
GTP_DUAL:TRANS_TIME_TO_P2_1[11]
28 ------------------------------GTP_DUAL:DRP13[9]
GTP_DUAL:TRANS_TIME_TO_P2_1[9]
GTP_DUAL:DRP13[8]
GTP_DUAL:TRANS_TIME_TO_P2_1[10]
29 ------------------------------GTP_DUAL:DRP13[10]
GTP_DUAL:TRANS_TIME_TO_P2_1[8]
GTP_DUAL:DRP13[11]
GTP_DUAL:TRANS_TIME_TO_P2_1[7]
30 ------------------------------GTP_DUAL:DRP13[13]
GTP_DUAL:TRANS_TIME_TO_P2_1[5]
GTP_DUAL:DRP13[12]
GTP_DUAL:TRANS_TIME_TO_P2_1[6]
31 ------------------------------GTP_DUAL:DRP13[14]
GTP_DUAL:TRANS_TIME_TO_P2_1[4]
GTP_DUAL:DRP13[15]
GTP_DUAL:TRANS_TIME_TO_P2_1[3]
32 ------------------------------GTP_DUAL:DRP14[1]
GTP_DUAL:TRANS_TIME_TO_P2_1[1]
GTP_DUAL:DRP14[0]
GTP_DUAL:TRANS_TIME_TO_P2_1[2]
33 ------------------------------GTP_DUAL:DRP14[2]
GTP_DUAL:TRANS_TIME_TO_P2_1[0]
GTP_DUAL:DRP14[3]
GTP_DUAL:TX_BUFFER_USE_1
34 ------------------------------GTP_DUAL:DRP14[5]
GTP_DUAL:TX_DETECT_RX_CFG_1[12]
GTP_DUAL:DRP14[4]
GTP_DUAL:TX_DETECT_RX_CFG_1[13]
35 ------------------------------GTP_DUAL:DRP14[6]
GTP_DUAL:TX_DETECT_RX_CFG_1[11]
GTP_DUAL:DRP14[7]
GTP_DUAL:TX_DETECT_RX_CFG_1[10]
36 ------------------------------GTP_DUAL:DRP14[9]
GTP_DUAL:TX_DETECT_RX_CFG_1[8]
GTP_DUAL:DRP14[8]
GTP_DUAL:TX_DETECT_RX_CFG_1[9]
37 ------------------------------GTP_DUAL:DRP14[10]
GTP_DUAL:TX_DETECT_RX_CFG_1[7]
GTP_DUAL:DRP14[11]
GTP_DUAL:TX_DETECT_RX_CFG_1[6]
38 ------------------------------GTP_DUAL:DRP14[13]
GTP_DUAL:TX_DETECT_RX_CFG_1[4]
GTP_DUAL:DRP14[12]
GTP_DUAL:TX_DETECT_RX_CFG_1[5]
39 ------------------------------GTP_DUAL:DRP14[14]
GTP_DUAL:TX_DETECT_RX_CFG_1[3]
GTP_DUAL:DRP14[15]
GTP_DUAL:TX_DETECT_RX_CFG_1[2]
40 ------------------------------GTP_DUAL:DRP15[1]
GTP_DUAL:TX_DETECT_RX_CFG_1[0]
GTP_DUAL:DRP15[0]
GTP_DUAL:TX_DETECT_RX_CFG_1[1]
41 ------------------------------GTP_DUAL:DRP15[2]
GTP_DUAL:TXRX_INVERT_1[4]
GTP_DUAL:DRP15[3]
GTP_DUAL:TXRX_INVERT_1[3]
42 ------------------------------GTP_DUAL:DRP15[5]
GTP_DUAL:TXRX_INVERT_1[1]
GTP_DUAL:DRP15[4]
GTP_DUAL:TXRX_INVERT_1[2]
43 ------------------------------GTP_DUAL:DRP15[6]
GTP_DUAL:TXRX_INVERT_1[0]
GTP_DUAL:DRP15[7]
GTP_DUAL:TX_XCLK_SEL_1
44 ------------------------------GTP_DUAL:DRP15[9]GTP_DUAL:DRP15[8]
GTP_DUAL:TXOUTCLK_SEL_1
45 ------------------------------GTP_DUAL:DRP15[10]
GTP_DUAL:OOBDETECT_THRESHOLD_1[2]
GTP_DUAL:DRP15[11]
GTP_DUAL:OOBDETECT_THRESHOLD_1[1]
46 ------------------------------GTP_DUAL:DRP15[13]
GTP_DUAL:PMA_COM_CFG[8]
GTP_DUAL:DRP15[12]
GTP_DUAL:OOBDETECT_THRESHOLD_1[0]
47 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_1[3]
GTP_DUAL:DRP15[14]
GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_1[2]
GTP_DUAL:DRP15[15]
48 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_1[0]
GTP_DUAL:DRP16[1]
GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_1[1]
GTP_DUAL:DRP16[0]
49 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_USE_1
GTP_DUAL:DRP16[2]
GTP_DUAL:CHAN_BOND_SEQ_LEN_1[1]
GTP_DUAL:DRP16[3]
50 ------------------------------GTP_DUAL:CLK_COR_ADJ_LEN_1[1]
GTP_DUAL:DRP16[5]
GTP_DUAL:CHAN_BOND_SEQ_LEN_1[0]
GTP_DUAL:DRP16[4]
51 ------------------------------GTP_DUAL:CLK_COR_ADJ_LEN_1[0]
GTP_DUAL:DRP16[6]
GTP_DUAL:CLK_COR_DET_LEN_1[1]
GTP_DUAL:DRP16[7]
52 ------------------------------GTP_DUAL:CLK_COR_INSERT_IDLE_FLAG_1
GTP_DUAL:DRP16[9]
GTP_DUAL:CLK_COR_DET_LEN_1[0]
GTP_DUAL:DRP16[8]
53 ------------------------------GTP_DUAL:CLK_COR_KEEP_IDLE_1
GTP_DUAL:DRP16[10]
GTP_DUAL:CLK_COR_MAX_LAT_1[5]
GTP_DUAL:DRP16[11]
54 ------------------------------GTP_DUAL:CLK_COR_MAX_LAT_1[3]
GTP_DUAL:DRP16[13]
GTP_DUAL:CLK_COR_MAX_LAT_1[4]
GTP_DUAL:DRP16[12]
55 ------------------------------GTP_DUAL:CLK_COR_MAX_LAT_1[2]
GTP_DUAL:DRP16[14]
GTP_DUAL:CLK_COR_MAX_LAT_1[1]
GTP_DUAL:DRP16[15]
56 ------------------------------GTP_DUAL:CLK_COR_MIN_LAT_1[5]
GTP_DUAL:DRP17[1]
GTP_DUAL:CLK_COR_MAX_LAT_1[0]
GTP_DUAL:DRP17[0]
57 ------------------------------GTP_DUAL:CLK_COR_MIN_LAT_1[4]
GTP_DUAL:DRP17[2]
GTP_DUAL:CLK_COR_MIN_LAT_1[3]
GTP_DUAL:DRP17[3]
58 ------------------------------GTP_DUAL:CLK_COR_MIN_LAT_1[1]
GTP_DUAL:DRP17[5]
GTP_DUAL:CLK_COR_MIN_LAT_1[2]
GTP_DUAL:DRP17[4]
59 ------------------------------GTP_DUAL:CLK_COR_MIN_LAT_1[0]
GTP_DUAL:DRP17[6]
GTP_DUAL:CLK_COR_PRECEDENCE_1
GTP_DUAL:DRP17[7]
60 ------------------------------GTP_DUAL:CLK_COR_REPEAT_WAIT_1[4]
GTP_DUAL:DRP17[9]
GTP_DUAL:CLK_CORRECT_USE_1
GTP_DUAL:DRP17[8]
61 ------------------------------GTP_DUAL:CLK_COR_REPEAT_WAIT_1[3]
GTP_DUAL:DRP17[10]
GTP_DUAL:CLK_COR_REPEAT_WAIT_1[2]
GTP_DUAL:DRP17[11]
62 ------------------------------GTP_DUAL:CLK_COR_REPEAT_WAIT_1[0]
GTP_DUAL:DRP17[13]
GTP_DUAL:CLK_COR_REPEAT_WAIT_1[1]
GTP_DUAL:DRP17[12]
63 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_1_1[9]
GTP_DUAL:DRP17[14]
GTP_DUAL:CLK_COR_SEQ_1_1_1[8]
GTP_DUAL:DRP17[15]
GTP bittile 8
RowColumn
012345678910111213141516171819202122232425262728293031
0 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_1_1[6]
GTP_DUAL:DRP18[1]
GTP_DUAL:CLK_COR_SEQ_1_1_1[7]
GTP_DUAL:DRP18[0]
1 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_1_1[5]
GTP_DUAL:DRP18[2]
GTP_DUAL:CLK_COR_SEQ_1_1_1[4]
GTP_DUAL:DRP18[3]
2 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_1_1[2]
GTP_DUAL:DRP18[5]
GTP_DUAL:CLK_COR_SEQ_1_1_1[3]
GTP_DUAL:DRP18[4]
3 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_1_1[1]
GTP_DUAL:DRP18[6]
GTP_DUAL:CLK_COR_SEQ_1_1_1[0]
GTP_DUAL:DRP18[7]
4 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_2_1[8]
GTP_DUAL:DRP18[9]
GTP_DUAL:CLK_COR_SEQ_1_2_1[9]
GTP_DUAL:DRP18[8]
5 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_2_1[7]
GTP_DUAL:DRP18[10]
GTP_DUAL:CLK_COR_SEQ_1_2_1[6]
GTP_DUAL:DRP18[11]
6 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_2_1[4]
GTP_DUAL:DRP18[13]
GTP_DUAL:CLK_COR_SEQ_1_2_1[5]
GTP_DUAL:DRP18[12]
7 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_2_1[3]
GTP_DUAL:DRP18[14]
GTP_DUAL:CLK_COR_SEQ_1_2_1[2]
GTP_DUAL:DRP18[15]
8 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_2_1[0]
GTP_DUAL:DRP19[1]
GTP_DUAL:CLK_COR_SEQ_1_2_1[1]
GTP_DUAL:DRP19[0]
9 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_3_1[9]
GTP_DUAL:DRP19[2]
GTP_DUAL:CLK_COR_SEQ_1_3_1[8]
GTP_DUAL:DRP19[3]
10 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_3_1[6]
GTP_DUAL:DRP19[5]
GTP_DUAL:CLK_COR_SEQ_1_3_1[7]
GTP_DUAL:DRP19[4]
11 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_3_1[5]
GTP_DUAL:DRP19[6]
GTP_DUAL:CLK_COR_SEQ_1_3_1[4]
GTP_DUAL:DRP19[7]
12 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_3_1[2]
GTP_DUAL:DRP19[9]
GTP_DUAL:CLK_COR_SEQ_1_3_1[3]
GTP_DUAL:DRP19[8]
13 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_3_1[1]
GTP_DUAL:DRP19[10]
GTP_DUAL:CLK_COR_SEQ_1_3_1[0]
GTP_DUAL:DRP19[11]
14 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_4_1[8]
GTP_DUAL:DRP19[13]
GTP_DUAL:CLK_COR_SEQ_1_4_1[9]
GTP_DUAL:DRP19[12]
15 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_4_1[7]
GTP_DUAL:DRP19[14]
GTP_DUAL:CLK_COR_SEQ_1_4_1[6]
GTP_DUAL:DRP19[15]
16 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_4_1[4]
GTP_DUAL:DRP1A[1]
GTP_DUAL:CLK_COR_SEQ_1_4_1[5]
GTP_DUAL:DRP1A[0]
17 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_4_1[3]
GTP_DUAL:DRP1A[2]
GTP_DUAL:CLK_COR_SEQ_1_4_1[2]
GTP_DUAL:DRP1A[3]
18 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_4_1[0]
GTP_DUAL:DRP1A[5]
GTP_DUAL:CLK_COR_SEQ_1_4_1[1]
GTP_DUAL:DRP1A[4]
19 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_ENABLE_1[3]
GTP_DUAL:DRP1A[6]
GTP_DUAL:CLK_COR_SEQ_1_ENABLE_1[2]
GTP_DUAL:DRP1A[7]
20 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_ENABLE_1[0]
GTP_DUAL:DRP1A[9]
GTP_DUAL:CLK_COR_SEQ_1_ENABLE_1[1]
GTP_DUAL:DRP1A[8]
21 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_1_1[9]
GTP_DUAL:DRP1A[10]
GTP_DUAL:CLK_COR_SEQ_2_1_1[8]
GTP_DUAL:DRP1A[11]
22 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_1_1[6]
GTP_DUAL:DRP1A[13]
GTP_DUAL:CLK_COR_SEQ_2_1_1[7]
GTP_DUAL:DRP1A[12]
23 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_1_1[5]
GTP_DUAL:DRP1A[14]
GTP_DUAL:CLK_COR_SEQ_2_1_1[4]
GTP_DUAL:DRP1A[15]
24 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_1_1[2]
GTP_DUAL:DRP1B[1]
GTP_DUAL:CLK_COR_SEQ_2_1_1[3]
GTP_DUAL:DRP1B[0]
25 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_1_1[1]
GTP_DUAL:DRP1B[2]
GTP_DUAL:CLK_COR_SEQ_2_1_1[0]
GTP_DUAL:DRP1B[3]
26 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_2_1[8]
GTP_DUAL:DRP1B[5]
GTP_DUAL:CLK_COR_SEQ_2_2_1[9]
GTP_DUAL:DRP1B[4]
27 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_2_1[7]
GTP_DUAL:DRP1B[6]
GTP_DUAL:CLK_COR_SEQ_2_2_1[6]
GTP_DUAL:DRP1B[7]
28 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_2_1[4]
GTP_DUAL:DRP1B[9]
GTP_DUAL:CLK_COR_SEQ_2_2_1[5]
GTP_DUAL:DRP1B[8]
29 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_2_1[3]
GTP_DUAL:DRP1B[10]
GTP_DUAL:CLK_COR_SEQ_2_2_1[2]
GTP_DUAL:DRP1B[11]
30 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_2_1[0]
GTP_DUAL:DRP1B[13]
GTP_DUAL:CLK_COR_SEQ_2_2_1[1]
GTP_DUAL:DRP1B[12]
31 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_3_1[9]
GTP_DUAL:DRP1B[14]
GTP_DUAL:CLK_COR_SEQ_2_3_1[8]
GTP_DUAL:DRP1B[15]
32 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_3_1[6]
GTP_DUAL:DRP1C[1]
GTP_DUAL:CLK_COR_SEQ_2_3_1[7]
GTP_DUAL:DRP1C[0]
33 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_3_1[5]
GTP_DUAL:DRP1C[2]
GTP_DUAL:CLK_COR_SEQ_2_3_1[4]
GTP_DUAL:DRP1C[3]
34 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_3_1[2]
GTP_DUAL:DRP1C[5]
GTP_DUAL:CLK_COR_SEQ_2_3_1[3]
GTP_DUAL:DRP1C[4]
35 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_3_1[1]
GTP_DUAL:DRP1C[6]
GTP_DUAL:CLK_COR_SEQ_2_3_1[0]
GTP_DUAL:DRP1C[7]
36 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_4_1[8]
GTP_DUAL:DRP1C[9]
GTP_DUAL:CLK_COR_SEQ_2_4_1[9]
GTP_DUAL:DRP1C[8]
37 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_4_1[7]
GTP_DUAL:DRP1C[10]
GTP_DUAL:CLK_COR_SEQ_2_4_1[6]
GTP_DUAL:DRP1C[11]
38 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_4_1[4]
GTP_DUAL:DRP1C[13]
GTP_DUAL:CLK_COR_SEQ_2_4_1[5]
GTP_DUAL:DRP1C[12]
39 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_4_1[3]
GTP_DUAL:DRP1C[14]
GTP_DUAL:CLK_COR_SEQ_2_4_1[2]
GTP_DUAL:DRP1C[15]
40 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_4_1[0]
GTP_DUAL:DRP1D[1]
GTP_DUAL:CLK_COR_SEQ_2_4_1[1]
GTP_DUAL:DRP1D[0]
41 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_ENABLE_1[3]
GTP_DUAL:DRP1D[2]
GTP_DUAL:CLK_COR_SEQ_2_ENABLE_1[2]
GTP_DUAL:DRP1D[3]
42 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_ENABLE_1[0]
GTP_DUAL:DRP1D[5]
GTP_DUAL:CLK_COR_SEQ_2_ENABLE_1[1]
GTP_DUAL:DRP1D[4]
43 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_USE_1
GTP_DUAL:DRP1D[6]
GTP_DUAL:COM_BURST_VAL_1[3]
GTP_DUAL:DRP1D[7]
44 ------------------------------GTP_DUAL:COM_BURST_VAL_1[1]
GTP_DUAL:DRP1D[9]
GTP_DUAL:COM_BURST_VAL_1[2]
GTP_DUAL:DRP1D[8]
45 ------------------------------GTP_DUAL:COM_BURST_VAL_1[0]
GTP_DUAL:DRP1D[10]
GTP_DUAL:COMMA_10B_ENABLE_1[9]
GTP_DUAL:DRP1D[11]
46 ------------------------------GTP_DUAL:COMMA_10B_ENABLE_1[7]
GTP_DUAL:DRP1D[13]
GTP_DUAL:COMMA_10B_ENABLE_1[8]
GTP_DUAL:DRP1D[12]
47 ------------------------------GTP_DUAL:COMMA_10B_ENABLE_1[6]
GTP_DUAL:DRP1D[14]
GTP_DUAL:COMMA_10B_ENABLE_1[5]
GTP_DUAL:DRP1D[15]
48 ------------------------------GTP_DUAL:COMMA_10B_ENABLE_1[3]
GTP_DUAL:DRP1E[1]
GTP_DUAL:COMMA_10B_ENABLE_1[4]
GTP_DUAL:DRP1E[0]
49 ------------------------------GTP_DUAL:COMMA_10B_ENABLE_1[2]
GTP_DUAL:DRP1E[2]
GTP_DUAL:COMMA_10B_ENABLE_1[1]
GTP_DUAL:DRP1E[3]
50 ------------------------------GTP_DUAL:COMMA_DOUBLE_1
GTP_DUAL:DRP1E[5]
GTP_DUAL:COMMA_10B_ENABLE_1[0]
GTP_DUAL:DRP1E[4]
51 ------------------------------GTP_DUAL:DEC_MCOMMA_DETECT_1
GTP_DUAL:DRP1E[6]
GTP_DUAL:DEC_PCOMMA_DETECT_1
GTP_DUAL:DRP1E[7]
52 ------------------------------GTP_DUAL:DRP1E[9]
GTP_DUAL:MCOMMA_10B_VALUE_1[9]
GTP_DUAL:DEC_VALID_COMMA_ONLY_1
GTP_DUAL:DRP1E[8]
53 ------------------------------GTP_DUAL:DRP1E[10]
GTP_DUAL:MCOMMA_10B_VALUE_1[8]
GTP_DUAL:DRP1E[11]
GTP_DUAL:MCOMMA_10B_VALUE_1[7]
54 ------------------------------GTP_DUAL:DRP1E[13]
GTP_DUAL:MCOMMA_10B_VALUE_1[5]
GTP_DUAL:DRP1E[12]
GTP_DUAL:MCOMMA_10B_VALUE_1[6]
55 ------------------------------GTP_DUAL:DRP1E[14]
GTP_DUAL:MCOMMA_10B_VALUE_1[4]
GTP_DUAL:DRP1E[15]
GTP_DUAL:MCOMMA_10B_VALUE_1[3]
56 ------------------------------GTP_DUAL:DRP1F[1]
GTP_DUAL:MCOMMA_10B_VALUE_1[1]
GTP_DUAL:DRP1F[0]
GTP_DUAL:MCOMMA_10B_VALUE_1[2]
57 ------------------------------GTP_DUAL:DRP1F[2]
GTP_DUAL:MCOMMA_10B_VALUE_1[0]
GTP_DUAL:DRP1F[3]
GTP_DUAL:MCOMMA_DETECT_1
58 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_2_1[0]
GTP_DUAL:DRP1F[5]
GTP_DUAL:CHAN_BOND_SEQ_2_3_1[9]
GTP_DUAL:DRP1F[4]
59 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_2_1[1]
GTP_DUAL:DRP1F[6]
GTP_DUAL:CHAN_BOND_SEQ_2_2_1[2]
GTP_DUAL:DRP1F[7]
60 ----------------------------CRC32_1:CRC_INIT[31]-GTP_DUAL:CHAN_BOND_SEQ_2_2_1[4]
GTP_DUAL:DRP1F[9]
GTP_DUAL:CHAN_BOND_SEQ_2_2_1[3]
GTP_DUAL:DRP1F[8]
61 -----------------------------CRC32_1:CRC_INIT[30]GTP_DUAL:CHAN_BOND_SEQ_2_2_1[5]
GTP_DUAL:DRP1F[10]
GTP_DUAL:CHAN_BOND_SEQ_2_2_1[6]
GTP_DUAL:DRP1F[11]
62 ----------------------------CRC32_1:CRC_INIT[29]-GTP_DUAL:DRP1F[13]GTP_DUAL:CHAN_BOND_SEQ_2_2_1[7]
GTP_DUAL:DRP1F[12]
63 -----------------------------CRC32_1:CRC_INIT[28]GTP_DUAL:CHAN_BOND_SEQ_2_2_1[8]
GTP_DUAL:DRP1F[14]
GTP_DUAL:CHAN_BOND_SEQ_2_2_1[9]
GTP_DUAL:DRP1F[15]
GTP bittile 9
RowColumn
012345678910111213141516171819202122232425262728293031
0 ----------------------------CRC32_1:CRC_INIT[27]-GTP_DUAL:CHAN_BOND_SEQ_2_1_1[1]
GTP_DUAL:DRP20[1]
GTP_DUAL:CHAN_BOND_SEQ_2_1_1[0]
GTP_DUAL:DRP20[0]
1 -----------------------------CRC32_1:CRC_INIT[26]GTP_DUAL:CHAN_BOND_SEQ_2_1_1[2]
GTP_DUAL:DRP20[2]
GTP_DUAL:CHAN_BOND_SEQ_2_1_1[3]
GTP_DUAL:DRP20[3]
2 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_1_1[5]
GTP_DUAL:DRP20[5]
GTP_DUAL:CHAN_BOND_SEQ_2_1_1[4]
GTP_DUAL:DRP20[4]
3 ----------------------------CRC32_1:CRC_INIT[25]CRC32_1:CRC_INIT[24]GTP_DUAL:CHAN_BOND_SEQ_2_1_1[6]
GTP_DUAL:DRP20[6]
GTP_DUAL:CHAN_BOND_SEQ_2_1_1[7]
GTP_DUAL:DRP20[7]
4 ----------------------------CRC32_1:CRC_INIT[23]-GTP_DUAL:CHAN_BOND_SEQ_2_1_1[9]
GTP_DUAL:DRP20[9]
GTP_DUAL:CHAN_BOND_SEQ_2_1_1[8]
GTP_DUAL:DRP20[8]
5 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_1[0]
GTP_DUAL:DRP20[10]
GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_1[1]
GTP_DUAL:DRP20[11]
6 ----------------------------CRC32_1:CRC_INIT[21]CRC32_1:CRC_INIT[22]GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_1[3]
GTP_DUAL:DRP20[13]
GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_1[2]
GTP_DUAL:DRP20[12]
7 -----------------------------CRC32_1:CRC_INIT[20]GTP_DUAL:CHAN_BOND_SEQ_1_4_1[0]
GTP_DUAL:DRP20[14]
GTP_DUAL:CHAN_BOND_SEQ_1_4_1[1]
GTP_DUAL:DRP20[15]
8 ----------------------------CRC32_1:CRC_INIT[19]-GTP_DUAL:CHAN_BOND_SEQ_1_4_1[3]
GTP_DUAL:DRP21[1]
GTP_DUAL:CHAN_BOND_SEQ_1_4_1[2]
GTP_DUAL:DRP21[0]
9 ----------------------------CRC32_1:CRC_INIT[18]-GTP_DUAL:CHAN_BOND_SEQ_1_4_1[4]
GTP_DUAL:DRP21[2]
GTP_DUAL:CHAN_BOND_SEQ_1_4_1[5]
GTP_DUAL:DRP21[3]
10 -----------------------------CRC32_1:CRC_INIT[17]GTP_DUAL:CHAN_BOND_SEQ_1_4_1[7]
GTP_DUAL:DRP21[5]
GTP_DUAL:CHAN_BOND_SEQ_1_4_1[6]
GTP_DUAL:DRP21[4]
11 ----------------------------CRC32_1:CRC_INIT[16]-GTP_DUAL:CHAN_BOND_SEQ_1_4_1[8]
GTP_DUAL:DRP21[6]
GTP_DUAL:CHAN_BOND_SEQ_1_4_1[9]
GTP_DUAL:DRP21[7]
12 ----------------------------CRC32_1:CRC_INIT[14]CRC32_1:CRC_INIT[15]GTP_DUAL:CHAN_BOND_SEQ_1_3_1[1]
GTP_DUAL:DRP21[9]
GTP_DUAL:CHAN_BOND_SEQ_1_3_1[0]
GTP_DUAL:DRP21[8]
13 -----------------------------CRC32_1:CRC_INIT[13]GTP_DUAL:CHAN_BOND_SEQ_1_3_1[2]
GTP_DUAL:DRP21[10]
GTP_DUAL:CHAN_BOND_SEQ_1_3_1[3]
GTP_DUAL:DRP21[11]
14 ----------------------------CRC32_1:CRC_INIT[12]-GTP_DUAL:CHAN_BOND_SEQ_1_3_1[5]
GTP_DUAL:DRP21[13]
GTP_DUAL:CHAN_BOND_SEQ_1_3_1[4]
GTP_DUAL:DRP21[12]
15 -----------------------------CRC32_1:CRC_INIT[11]GTP_DUAL:CHAN_BOND_SEQ_1_3_1[6]
GTP_DUAL:DRP21[14]
GTP_DUAL:CHAN_BOND_SEQ_1_3_1[7]
GTP_DUAL:DRP21[15]
16 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_1_3_1[9]
GTP_DUAL:DRP22[1]
GTP_DUAL:CHAN_BOND_SEQ_1_3_1[8]
GTP_DUAL:DRP22[0]
17 ----------------------------CRC32_1:CRC_INIT[10]-GTP_DUAL:CHAN_BOND_SEQ_1_2_1[0]
GTP_DUAL:DRP22[2]
GTP_DUAL:CHAN_BOND_SEQ_1_2_1[1]
GTP_DUAL:DRP22[3]
18 -----------------------------CRC32_1:CRC_INIT[9]GTP_DUAL:CHAN_BOND_SEQ_1_2_1[3]
GTP_DUAL:DRP22[5]
GTP_DUAL:CHAN_BOND_SEQ_1_2_1[2]
GTP_DUAL:DRP22[4]
19 ----------------------------CRC32_1:CRC_INIT[8]-GTP_DUAL:CHAN_BOND_SEQ_1_2_1[4]
GTP_DUAL:DRP22[6]
GTP_DUAL:CHAN_BOND_SEQ_1_2_1[5]
GTP_DUAL:DRP22[7]
20 -----------------------------CRC32_1:CRC_INIT[7]GTP_DUAL:CHAN_BOND_SEQ_1_2_1[7]
GTP_DUAL:DRP22[9]
GTP_DUAL:CHAN_BOND_SEQ_1_2_1[6]
GTP_DUAL:DRP22[8]
21 ----------------------------CRC32_1:CRC_INIT[6]-GTP_DUAL:CHAN_BOND_SEQ_1_2_1[8]
GTP_DUAL:DRP22[10]
GTP_DUAL:CHAN_BOND_SEQ_1_2_1[9]
GTP_DUAL:DRP22[11]
22 -----------------------------CRC32_1:CRC_INIT[5]GTP_DUAL:CHAN_BOND_SEQ_1_1_1[1]
GTP_DUAL:DRP22[13]
GTP_DUAL:CHAN_BOND_SEQ_1_1_1[0]
GTP_DUAL:DRP22[12]
23 ----------------------------CRC32_1:CRC_INIT[4]-GTP_DUAL:CHAN_BOND_SEQ_1_1_1[2]
GTP_DUAL:DRP22[14]
GTP_DUAL:CHAN_BOND_SEQ_1_1_1[3]
GTP_DUAL:DRP22[15]
24 -----------------------------CRC32_1:CRC_INIT[3]GTP_DUAL:CHAN_BOND_SEQ_1_1_1[5]
GTP_DUAL:DRP23[1]
GTP_DUAL:CHAN_BOND_SEQ_1_1_1[4]
GTP_DUAL:DRP23[0]
25 ----------------------------CRC32_1:CRC_INIT[2]-GTP_DUAL:CHAN_BOND_SEQ_1_1_1[6]
GTP_DUAL:DRP23[2]
GTP_DUAL:CHAN_BOND_SEQ_1_1_1[7]
GTP_DUAL:DRP23[3]
26 -----------------------------CRC32_1:CRC_INIT[1]GTP_DUAL:CHAN_BOND_SEQ_1_1_1[9]
GTP_DUAL:DRP23[5]
GTP_DUAL:CHAN_BOND_SEQ_1_1_1[8]
GTP_DUAL:DRP23[4]
27 -----------------------------CRC32_1:CRC_INIT[0]GTP_DUAL:CHAN_BOND_MODE_1[1]
GTP_DUAL:DRP23[6]
GTP_DUAL:CHAN_BOND_MODE_1[0]
GTP_DUAL:DRP23[7]
28 ------------------------------GTP_DUAL:CHAN_BOND_LEVEL_1[1]
GTP_DUAL:DRP23[9]
GTP_DUAL:CHAN_BOND_LEVEL_1[0]
GTP_DUAL:DRP23[8]
29 ------------------------------GTP_DUAL:CHAN_BOND_LEVEL_1[2]
GTP_DUAL:DRP23[10]
GTP_DUAL:CHAN_BOND_2_MAX_SKEW_1[0]
GTP_DUAL:DRP23[11]
30 ------------------------------GTP_DUAL:CHAN_BOND_2_MAX_SKEW_1[2]
GTP_DUAL:DRP23[13]
GTP_DUAL:CHAN_BOND_2_MAX_SKEW_1[1]
GTP_DUAL:DRP23[12]
31 ------------------------------GTP_DUAL:CHAN_BOND_2_MAX_SKEW_1[3]
GTP_DUAL:DRP23[14]
GTP_DUAL:CHAN_BOND_1_MAX_SKEW_1[0]
GTP_DUAL:DRP23[15]
32 ------------------------------GTP_DUAL:CHAN_BOND_1_MAX_SKEW_1[2]
GTP_DUAL:DRP24[1]
GTP_DUAL:CHAN_BOND_1_MAX_SKEW_1[1]
GTP_DUAL:DRP24[0]
33 ------------------------------GTP_DUAL:CHAN_BOND_1_MAX_SKEW_1[3]
GTP_DUAL:DRP24[2]
GTP_DUAL:ALIGN_COMMA_WORD_1
GTP_DUAL:DRP24[3]
34 ------------------------------GTP_DUAL:DRP24[5]
GTP_DUAL:PMA_COM_CFG[17]
GTP_DUAL:DRP24[4]
GTP_DUAL:PMA_COM_CFG[18]
35 ------------------------------GTP_DUAL:DRP24[6]
GTP_DUAL:PMA_COM_CFG[16]
GTP_DUAL:DRP24[7]
GTP_DUAL:PMA_COM_CFG[15]
36 ------------------------------GTP_DUAL:DRP24[9]
GTP_DUAL:PMA_COM_CFG[13]
GTP_DUAL:DRP24[8]
GTP_DUAL:PMA_COM_CFG[14]
37 ------------------------------GTP_DUAL:DRP24[10]
GTP_DUAL:PMA_COM_CFG[12]
GTP_DUAL:DRP24[11]
GTP_DUAL:PMA_COM_CFG[11]
38 ------------------------------GTP_DUAL:DRP24[13]
GTP_DUAL:TX_SYNC_FILTERB
GTP_DUAL:DRP24[12]
GTP_DUAL:PMA_COM_CFG[10]
39 ------------------------------GTP_DUAL:DRP24[14]
GTP_DUAL:PMA_COM_CFG[86]
GTP_DUAL:DRP24[15]
GTP_DUAL:PMA_COM_CFG[74]
40 ------------------------------GTP_DUAL:DRP25[1]
GTP_DUAL:PMA_COM_CFG[52]
GTP_DUAL:DRP25[0]
GTP_DUAL:PMA_COM_CFG[72]
41 ------------------------------GTP_DUAL:DRP25[2]
GTP_DUAL:PMA_COM_CFG[50]
GTP_DUAL:DRP25[3]
GTP_DUAL:PMA_COM_CFG[84]
42 ------------------------------GTP_DUAL:DRP25[5]
GTP_DUAL:PMA_COM_CFG[78]
GTP_DUAL:DRP25[4]
GTP_DUAL:PMA_COM_CFG[82]
43 ------------------------------GTP_DUAL:DRP25[6]
GTP_DUAL:PMA_COM_CFG[76]
GTP_DUAL:DRP25[7]
GTP_DUAL:PMA_COM_CFG[70]
44 ------------------------------GTP_DUAL:DRP25[9]
GTP_DUAL:PMA_COM_CFG[66]
GTP_DUAL:DRP25[8]
GTP_DUAL:PMA_COM_CFG[80]
45 ------------------------------GTP_DUAL:DRP25[10]
GTP_DUAL:PMA_COM_CFG[68]
GTP_DUAL:DRP25[11]
GTP_DUAL:PMA_COM_CFG[63]
46 ------------------------------GTP_DUAL:DRP25[13]
GTP_DUAL:PMA_COM_CFG[62]
GTP_DUAL:DRP25[12]
GTP_DUAL:PMA_COM_CFG[61]
47 ------------------------------GTP_DUAL:DRP25[14]
GTP_DUAL:PMA_COM_CFG[64]
GTP_DUAL:DRP25[15]
GTP_DUAL:PMA_COM_CFG[54]
48 ------------------------------GTP_DUAL:DRP26[1]
GTP_DUAL:PMA_COM_CFG[34]
GTP_DUAL:DRP26[0]
GTP_DUAL:PMA_COM_CFG[56]
49 ------------------------------GTP_DUAL:DRP26[2]
GTP_DUAL:PMA_COM_CFG[36]
GTP_DUAL:DRP26[3]
GTP_DUAL:PMA_COM_CFG[40]
50 ------------------------------GTP_DUAL:DRP26[5]
GTP_DUAL:PMA_COM_CFG[42]
GTP_DUAL:DRP26[4]
GTP_DUAL:PMA_COM_CFG[38]
51 ------------------------------GTP_DUAL:DRP26[6]
GTP_DUAL:PMA_COM_CFG[44]
GTP_DUAL:DRP26[7]
GTP_DUAL:PMA_COM_CFG[46]
52 ------------------------------GTP_DUAL:CLK25_DIVIDER[2]
GTP_DUAL:DRP26[9]
GTP_DUAL:DRP26[8]
GTP_DUAL:PMA_COM_CFG[48]
53 ------------------------------GTP_DUAL:CLK25_DIVIDER[1]
GTP_DUAL:DRP26[10]
GTP_DUAL:CLK25_DIVIDER[0]
GTP_DUAL:DRP26[11]
54 ------------------------------GTP_DUAL:DRP26[13]
GTP_DUAL:OOB_CLK_DIVIDER[1]
GTP_DUAL:DRP26[12]
GTP_DUAL:OOB_CLK_DIVIDER[2]
55 ------------------------------GTP_DUAL:DRP26[14]
GTP_DUAL:OOB_CLK_DIVIDER[0]
GTP_DUAL:DRP26[15]
GTP_DUAL:OVERSAMPLE_MODE
56 ------------------------------GTP_DUAL:DRP27[1]
GTP_DUAL:PCS_COM_CFG[26]
GTP_DUAL:DRP27[0]
GTP_DUAL:PCS_COM_CFG[27]
57 ------------------------------GTP_DUAL:DRP27[2]
GTP_DUAL:PCS_COM_CFG[25]
GTP_DUAL:DRP27[3]
GTP_DUAL:PCS_COM_CFG[24]
58 ------------------------------GTP_DUAL:DRP27[5]
GTP_DUAL:PCS_COM_CFG[22]
GTP_DUAL:DRP27[4]
GTP_DUAL:PCS_COM_CFG[23]
59 ------------------------------GTP_DUAL:DRP27[6]
GTP_DUAL:PCS_COM_CFG[21]
GTP_DUAL:DRP27[7]
GTP_DUAL:PCS_COM_CFG[20]
60 ------------------------------GTP_DUAL:DRP27[9]
GTP_DUAL:PCS_COM_CFG[18]
GTP_DUAL:DRP27[8]
GTP_DUAL:PCS_COM_CFG[19]
61 ------------------------------GTP_DUAL:DRP27[10]
GTP_DUAL:PCS_COM_CFG[17]
GTP_DUAL:DRP27[11]
GTP_DUAL:PCS_COM_CFG[16]
62 ------------------------------GTP_DUAL:DRP27[13]
GTP_DUAL:PCS_COM_CFG[14]
GTP_DUAL:DRP27[12]
GTP_DUAL:PCS_COM_CFG[15]
63 ------------------------------GTP_DUAL:DRP27[14]
GTP_DUAL:PCS_COM_CFG[13]
GTP_DUAL:DRP27[15]
GTP_DUAL:PCS_COM_CFG[12]
GTP bittile 10
RowColumn
012345678910111213141516171819202122232425262728293031
0 ------------------------------GTP_DUAL:DRP28[1]
GTP_DUAL:PCS_COM_CFG[10]
GTP_DUAL:DRP28[0]
GTP_DUAL:PCS_COM_CFG[11]
1 ------------------------------GTP_DUAL:DRP28[2]
GTP_DUAL:PCS_COM_CFG[9]
GTP_DUAL:DRP28[3]
GTP_DUAL:PCS_COM_CFG[8]
2 ------------------------------GTP_DUAL:DRP28[5]
GTP_DUAL:PCS_COM_CFG[6]
GTP_DUAL:DRP28[4]
GTP_DUAL:PCS_COM_CFG[7]
3 ------------------------------GTP_DUAL:DRP28[6]
GTP_DUAL:PCS_COM_CFG[5]
GTP_DUAL:DRP28[7]
GTP_DUAL:PCS_COM_CFG[4]
4 ------------------------------GTP_DUAL:DRP28[9]
GTP_DUAL:PCS_COM_CFG[2]
GTP_DUAL:DRP28[8]
GTP_DUAL:PCS_COM_CFG[3]
5 ------------------------------GTP_DUAL:DRP28[10]
GTP_DUAL:PCS_COM_CFG[1]
GTP_DUAL:DRP28[11]
GTP_DUAL:PCS_COM_CFG[0]
6 ------------------------------GTP_DUAL:DRP28[13]GTP_DUAL:DRP28[12]
GTP_DUAL:PLL_DIVSEL_FB[0]
7 ------------------------------GTP_DUAL:DRP28[14]
GTP_DUAL:PLL_DIVSEL_FB[3]
GTP_DUAL:DRP28[15]
GTP_DUAL:PLL_DIVSEL_FB[2]
8 ------------------------------GTP_DUAL:DRP29[1]
GTP_DUAL:TERMINATION_CTRL[4]
GTP_DUAL:DRP29[0]
GTP_DUAL:PLL_DIVSEL_FB[1]
9 ------------------------------GTP_DUAL:DRP29[2]
GTP_DUAL:TERMINATION_CTRL[3]
GTP_DUAL:DRP29[3]
GTP_DUAL:TERMINATION_CTRL[2]
10 ------------------------------GTP_DUAL:DRP29[5]
GTP_DUAL:TERMINATION_CTRL[0]
GTP_DUAL:DRP29[4]
GTP_DUAL:TERMINATION_CTRL[1]
11 ------------------------------GTP_DUAL:DRP29[6]
GTP_DUAL:TERMINATION_OVRD
GTP_DUAL:DRP29[7]
GTP_DUAL:PMA_COM_CFG[32]
12 ------------------------------GTP_DUAL:DRP29[9]
GTP_DUAL:PMA_COM_CFG[45]
GTP_DUAL:DRP29[8]
GTP_DUAL:PMA_COM_CFG[47]
13 ------------------------------GTP_DUAL:DRP29[10]
GTP_DUAL:PMA_COM_CFG[43]
GTP_DUAL:DRP29[11]
GTP_DUAL:PMA_COM_CFG[41]
14 ------------------------------GTP_DUAL:DRP29[13]
GTP_DUAL:PMA_COM_CFG[37]
GTP_DUAL:DRP29[12]
GTP_DUAL:PMA_COM_CFG[39]
15 ------------------------------GTP_DUAL:DRP29[14]
GTP_DUAL:PMA_COM_CFG[33]
GTP_DUAL:DRP29[15]
GTP_DUAL:PMA_COM_CFG[35]
16 ------------------------------GTP_DUAL:DRP2A[1]
GTP_DUAL:PMA_COM_CFG[55]
GTP_DUAL:DRP2A[0]
GTP_DUAL:PMA_COM_CFG[53]
17 ------------------------------GTP_DUAL:DRP2A[2]
GTP_DUAL:PMA_COM_CFG[60]
GTP_DUAL:DRP2A[3]
GTP_DUAL:PMA_COM_CFG[58]
18 ------------------------------GTP_DUAL:DRP2A[5]
GTP_DUAL:PMA_COM_CFG[59]
GTP_DUAL:DRP2A[4]
GTP_DUAL:PMA_COM_CFG[57]
19 ------------------------------GTP_DUAL:DRP2A[6]
GTP_DUAL:PMA_COM_CFG[67]
GTP_DUAL:DRP2A[7]
GTP_DUAL:PMA_COM_CFG[65]
20 ------------------------------GTP_DUAL:DRP2A[9]
GTP_DUAL:PMA_COM_CFG[69]
GTP_DUAL:DRP2A[8]
GTP_DUAL:PMA_COM_CFG[79]
21 ------------------------------GTP_DUAL:DRP2A[10]
GTP_DUAL:PMA_COM_CFG[75]
GTP_DUAL:DRP2A[11]
GTP_DUAL:PMA_COM_CFG[77]
22 ------------------------------GTP_DUAL:DRP2A[13]
GTP_DUAL:PMA_COM_CFG[83]
GTP_DUAL:DRP2A[12]
GTP_DUAL:PMA_COM_CFG[81]
23 ------------------------------GTP_DUAL:DRP2A[14]
GTP_DUAL:PMA_COM_CFG[51]
GTP_DUAL:DRP2A[15]
GTP_DUAL:PMA_COM_CFG[49]
24 ------------------------------GTP_DUAL:DRP2B[1]
GTP_DUAL:PMA_COM_CFG[71]
GTP_DUAL:DRP2B[0]
GTP_DUAL:PMA_COM_CFG[73]
25 ------------------------------GTP_DUAL:DRP2B[2]
GTP_DUAL:PMA_COM_CFG[85]
GTP_DUAL:DRP2B[3]
GTP_DUAL:PMA_COM_CFG[7]
26 ------------------------------GTP_DUAL:DRP2B[5]
GTP_DUAL:PMA_COM_CFG[5]
GTP_DUAL:DRP2B[4]
GTP_DUAL:PMA_COM_CFG[6]
27 ------------------------------GTP_DUAL:DRP2B[6]
GTP_DUAL:PMA_COM_CFG[0]
GTP_DUAL:DRP2B[7]
GTP_DUAL:PMA_COM_CFG[4]
28 ------------------------------GTP_DUAL:DRP2B[9]
GTP_DUAL:PMA_COM_CFG[2]
GTP_DUAL:DRP2B[8]
GTP_DUAL:PMA_COM_CFG[3]
29 ------------------------------GTP_DUAL:DRP2B[10]
GTP_DUAL:PMA_COM_CFG[1]
GTP_DUAL:DRP2B[11]
GTP_DUAL:PMA_COM_CFG[9]
30 ------------------------------GTP_DUAL:CHAN_BOND_1_MAX_SKEW_0[3]
GTP_DUAL:DRP2B[13]
GTP_DUAL:ALIGN_COMMA_WORD_0
GTP_DUAL:DRP2B[12]
31 ------------------------------GTP_DUAL:CHAN_BOND_1_MAX_SKEW_0[2]
GTP_DUAL:DRP2B[14]
GTP_DUAL:CHAN_BOND_1_MAX_SKEW_0[1]
GTP_DUAL:DRP2B[15]
32 ------------------------------GTP_DUAL:CHAN_BOND_2_MAX_SKEW_0[3]
GTP_DUAL:DRP2C[1]
GTP_DUAL:CHAN_BOND_1_MAX_SKEW_0[0]
GTP_DUAL:DRP2C[0]
33 ------------------------------GTP_DUAL:CHAN_BOND_2_MAX_SKEW_0[2]
GTP_DUAL:DRP2C[2]
GTP_DUAL:CHAN_BOND_2_MAX_SKEW_0[1]
GTP_DUAL:DRP2C[3]
34 ------------------------------GTP_DUAL:CHAN_BOND_LEVEL_0[2]
GTP_DUAL:DRP2C[5]
GTP_DUAL:CHAN_BOND_2_MAX_SKEW_0[0]
GTP_DUAL:DRP2C[4]
35 ------------------------------GTP_DUAL:CHAN_BOND_LEVEL_0[1]
GTP_DUAL:DRP2C[6]
GTP_DUAL:CHAN_BOND_LEVEL_0[0]
GTP_DUAL:DRP2C[7]
36 -----------------------------CRC32_2:CRC_INIT[0]GTP_DUAL:CHAN_BOND_MODE_0[1]
GTP_DUAL:DRP2C[9]
GTP_DUAL:CHAN_BOND_MODE_0[0]
GTP_DUAL:DRP2C[8]
37 -----------------------------CRC32_2:CRC_INIT[1]GTP_DUAL:CHAN_BOND_SEQ_1_1_0[9]
GTP_DUAL:DRP2C[10]
GTP_DUAL:CHAN_BOND_SEQ_1_1_0[8]
GTP_DUAL:DRP2C[11]
38 ----------------------------CRC32_2:CRC_INIT[2]-GTP_DUAL:CHAN_BOND_SEQ_1_1_0[6]
GTP_DUAL:DRP2C[13]
GTP_DUAL:CHAN_BOND_SEQ_1_1_0[7]
GTP_DUAL:DRP2C[12]
39 -----------------------------CRC32_2:CRC_INIT[3]GTP_DUAL:CHAN_BOND_SEQ_1_1_0[5]
GTP_DUAL:DRP2C[14]
GTP_DUAL:CHAN_BOND_SEQ_1_1_0[4]
GTP_DUAL:DRP2C[15]
40 ----------------------------CRC32_2:CRC_INIT[4]-GTP_DUAL:CHAN_BOND_SEQ_1_1_0[2]
GTP_DUAL:DRP2D[1]
GTP_DUAL:CHAN_BOND_SEQ_1_1_0[3]
GTP_DUAL:DRP2D[0]
41 -----------------------------CRC32_2:CRC_INIT[5]GTP_DUAL:CHAN_BOND_SEQ_1_1_0[1]
GTP_DUAL:DRP2D[2]
GTP_DUAL:CHAN_BOND_SEQ_1_1_0[0]
GTP_DUAL:DRP2D[3]
42 ----------------------------CRC32_2:CRC_INIT[6]-GTP_DUAL:CHAN_BOND_SEQ_1_2_0[8]
GTP_DUAL:DRP2D[5]
GTP_DUAL:CHAN_BOND_SEQ_1_2_0[9]
GTP_DUAL:DRP2D[4]
43 -----------------------------CRC32_2:CRC_INIT[7]GTP_DUAL:CHAN_BOND_SEQ_1_2_0[7]
GTP_DUAL:DRP2D[6]
GTP_DUAL:CHAN_BOND_SEQ_1_2_0[6]
GTP_DUAL:DRP2D[7]
44 ----------------------------CRC32_2:CRC_INIT[8]-GTP_DUAL:CHAN_BOND_SEQ_1_2_0[4]
GTP_DUAL:DRP2D[9]
GTP_DUAL:CHAN_BOND_SEQ_1_2_0[5]
GTP_DUAL:DRP2D[8]
45 -----------------------------CRC32_2:CRC_INIT[9]GTP_DUAL:CHAN_BOND_SEQ_1_2_0[3]
GTP_DUAL:DRP2D[10]
GTP_DUAL:CHAN_BOND_SEQ_1_2_0[2]
GTP_DUAL:DRP2D[11]
46 ----------------------------CRC32_2:CRC_INIT[10]-GTP_DUAL:CHAN_BOND_SEQ_1_2_0[0]
GTP_DUAL:DRP2D[13]
GTP_DUAL:CHAN_BOND_SEQ_1_2_0[1]
GTP_DUAL:DRP2D[12]
47 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_1_3_0[9]
GTP_DUAL:DRP2D[14]
GTP_DUAL:CHAN_BOND_SEQ_1_3_0[8]
GTP_DUAL:DRP2D[15]
48 -----------------------------CRC32_2:CRC_INIT[11]GTP_DUAL:CHAN_BOND_SEQ_1_3_0[6]
GTP_DUAL:DRP2E[1]
GTP_DUAL:CHAN_BOND_SEQ_1_3_0[7]
GTP_DUAL:DRP2E[0]
49 ----------------------------CRC32_2:CRC_INIT[12]-GTP_DUAL:CHAN_BOND_SEQ_1_3_0[5]
GTP_DUAL:DRP2E[2]
GTP_DUAL:CHAN_BOND_SEQ_1_3_0[4]
GTP_DUAL:DRP2E[3]
50 -----------------------------CRC32_2:CRC_INIT[13]GTP_DUAL:CHAN_BOND_SEQ_1_3_0[2]
GTP_DUAL:DRP2E[5]
GTP_DUAL:CHAN_BOND_SEQ_1_3_0[3]
GTP_DUAL:DRP2E[4]
51 ----------------------------CRC32_2:CRC_INIT[14]CRC32_2:CRC_INIT[15]GTP_DUAL:CHAN_BOND_SEQ_1_3_0[1]
GTP_DUAL:DRP2E[6]
GTP_DUAL:CHAN_BOND_SEQ_1_3_0[0]
GTP_DUAL:DRP2E[7]
52 ----------------------------CRC32_2:CRC_INIT[16]-GTP_DUAL:CHAN_BOND_SEQ_1_4_0[8]
GTP_DUAL:DRP2E[9]
GTP_DUAL:CHAN_BOND_SEQ_1_4_0[9]
GTP_DUAL:DRP2E[8]
53 -----------------------------CRC32_2:CRC_INIT[17]GTP_DUAL:CHAN_BOND_SEQ_1_4_0[7]
GTP_DUAL:DRP2E[10]
GTP_DUAL:CHAN_BOND_SEQ_1_4_0[6]
GTP_DUAL:DRP2E[11]
54 ----------------------------CRC32_2:CRC_INIT[18]-GTP_DUAL:CHAN_BOND_SEQ_1_4_0[4]
GTP_DUAL:DRP2E[13]
GTP_DUAL:CHAN_BOND_SEQ_1_4_0[5]
GTP_DUAL:DRP2E[12]
55 ----------------------------CRC32_2:CRC_INIT[19]-GTP_DUAL:CHAN_BOND_SEQ_1_4_0[3]
GTP_DUAL:DRP2E[14]
GTP_DUAL:CHAN_BOND_SEQ_1_4_0[2]
GTP_DUAL:DRP2E[15]
56 -----------------------------CRC32_2:CRC_INIT[20]GTP_DUAL:CHAN_BOND_SEQ_1_4_0[0]
GTP_DUAL:DRP2F[1]
GTP_DUAL:CHAN_BOND_SEQ_1_4_0[1]
GTP_DUAL:DRP2F[0]
57 ----------------------------CRC32_2:CRC_INIT[21]CRC32_2:CRC_INIT[22]GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_0[3]
GTP_DUAL:DRP2F[2]
GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_0[2]
GTP_DUAL:DRP2F[3]
58 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_0[0]
GTP_DUAL:DRP2F[5]
GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_0[1]
GTP_DUAL:DRP2F[4]
59 ----------------------------CRC32_2:CRC_INIT[23]-GTP_DUAL:CHAN_BOND_SEQ_2_1_0[9]
GTP_DUAL:DRP2F[6]
GTP_DUAL:CHAN_BOND_SEQ_2_1_0[8]
GTP_DUAL:DRP2F[7]
60 ----------------------------CRC32_2:CRC_INIT[25]CRC32_2:CRC_INIT[24]GTP_DUAL:CHAN_BOND_SEQ_2_1_0[6]
GTP_DUAL:DRP2F[9]
GTP_DUAL:CHAN_BOND_SEQ_2_1_0[7]
GTP_DUAL:DRP2F[8]
61 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_1_0[5]
GTP_DUAL:DRP2F[10]
GTP_DUAL:CHAN_BOND_SEQ_2_1_0[4]
GTP_DUAL:DRP2F[11]
62 -----------------------------CRC32_2:CRC_INIT[26]GTP_DUAL:CHAN_BOND_SEQ_2_1_0[2]
GTP_DUAL:DRP2F[13]
GTP_DUAL:CHAN_BOND_SEQ_2_1_0[3]
GTP_DUAL:DRP2F[12]
63 ----------------------------CRC32_2:CRC_INIT[27]-GTP_DUAL:CHAN_BOND_SEQ_2_1_0[1]
GTP_DUAL:DRP2F[14]
GTP_DUAL:CHAN_BOND_SEQ_2_1_0[0]
GTP_DUAL:DRP2F[15]
GTP bittile 11
RowColumn
012345678910111213141516171819202122232425262728293031
0 -----------------------------CRC32_2:CRC_INIT[28]GTP_DUAL:CHAN_BOND_SEQ_2_2_0[8]
GTP_DUAL:DRP30[1]
GTP_DUAL:CHAN_BOND_SEQ_2_2_0[9]
GTP_DUAL:DRP30[0]
1 ----------------------------CRC32_2:CRC_INIT[29]-GTP_DUAL:DRP30[2]GTP_DUAL:CHAN_BOND_SEQ_2_2_0[7]
GTP_DUAL:DRP30[3]
2 -----------------------------CRC32_2:CRC_INIT[30]GTP_DUAL:CHAN_BOND_SEQ_2_2_0[5]
GTP_DUAL:DRP30[5]
GTP_DUAL:CHAN_BOND_SEQ_2_2_0[6]
GTP_DUAL:DRP30[4]
3 ----------------------------CRC32_2:CRC_INIT[31]-GTP_DUAL:CHAN_BOND_SEQ_2_2_0[4]
GTP_DUAL:DRP30[6]
GTP_DUAL:CHAN_BOND_SEQ_2_2_0[3]
GTP_DUAL:DRP30[7]
4 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_2_0[1]
GTP_DUAL:DRP30[9]
GTP_DUAL:CHAN_BOND_SEQ_2_2_0[2]
GTP_DUAL:DRP30[8]
5 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_2_0[0]
GTP_DUAL:DRP30[10]
GTP_DUAL:CHAN_BOND_SEQ_2_3_0[9]
GTP_DUAL:DRP30[11]
6 ------------------------------GTP_DUAL:DRP30[13]
GTP_DUAL:MCOMMA_10B_VALUE_0[0]
GTP_DUAL:DRP30[12]
GTP_DUAL:MCOMMA_DETECT_0
7 ------------------------------GTP_DUAL:DRP30[14]
GTP_DUAL:MCOMMA_10B_VALUE_0[1]
GTP_DUAL:DRP30[15]
GTP_DUAL:MCOMMA_10B_VALUE_0[2]
8 ------------------------------GTP_DUAL:DRP31[1]
GTP_DUAL:MCOMMA_10B_VALUE_0[4]
GTP_DUAL:DRP31[0]
GTP_DUAL:MCOMMA_10B_VALUE_0[3]
9 ------------------------------GTP_DUAL:DRP31[2]
GTP_DUAL:MCOMMA_10B_VALUE_0[5]
GTP_DUAL:DRP31[3]
GTP_DUAL:MCOMMA_10B_VALUE_0[6]
10 ------------------------------GTP_DUAL:DRP31[5]
GTP_DUAL:MCOMMA_10B_VALUE_0[8]
GTP_DUAL:DRP31[4]
GTP_DUAL:MCOMMA_10B_VALUE_0[7]
11 ------------------------------GTP_DUAL:DRP31[6]
GTP_DUAL:MCOMMA_10B_VALUE_0[9]
GTP_DUAL:DEC_VALID_COMMA_ONLY_0
GTP_DUAL:DRP31[7]
12 ------------------------------GTP_DUAL:DEC_MCOMMA_DETECT_0
GTP_DUAL:DRP31[9]
GTP_DUAL:DEC_PCOMMA_DETECT_0
GTP_DUAL:DRP31[8]
13 ------------------------------GTP_DUAL:COMMA_DOUBLE_0
GTP_DUAL:DRP31[10]
GTP_DUAL:COMMA_10B_ENABLE_0[0]
GTP_DUAL:DRP31[11]
14 ------------------------------GTP_DUAL:COMMA_10B_ENABLE_0[2]
GTP_DUAL:DRP31[13]
GTP_DUAL:COMMA_10B_ENABLE_0[1]
GTP_DUAL:DRP31[12]
15 ------------------------------GTP_DUAL:COMMA_10B_ENABLE_0[3]
GTP_DUAL:DRP31[14]
GTP_DUAL:COMMA_10B_ENABLE_0[4]
GTP_DUAL:DRP31[15]
16 ------------------------------GTP_DUAL:COMMA_10B_ENABLE_0[6]
GTP_DUAL:DRP32[1]
GTP_DUAL:COMMA_10B_ENABLE_0[5]
GTP_DUAL:DRP32[0]
17 ------------------------------GTP_DUAL:COMMA_10B_ENABLE_0[7]
GTP_DUAL:DRP32[2]
GTP_DUAL:COMMA_10B_ENABLE_0[8]
GTP_DUAL:DRP32[3]
18 ------------------------------GTP_DUAL:COM_BURST_VAL_0[0]
GTP_DUAL:DRP32[5]
GTP_DUAL:COMMA_10B_ENABLE_0[9]
GTP_DUAL:DRP32[4]
19 ------------------------------GTP_DUAL:COM_BURST_VAL_0[1]
GTP_DUAL:DRP32[6]
GTP_DUAL:COM_BURST_VAL_0[2]
GTP_DUAL:DRP32[7]
20 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_USE_0
GTP_DUAL:DRP32[9]
GTP_DUAL:COM_BURST_VAL_0[3]
GTP_DUAL:DRP32[8]
21 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_ENABLE_0[0]
GTP_DUAL:DRP32[10]
GTP_DUAL:CLK_COR_SEQ_2_ENABLE_0[1]
GTP_DUAL:DRP32[11]
22 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_ENABLE_0[3]
GTP_DUAL:DRP32[13]
GTP_DUAL:CLK_COR_SEQ_2_ENABLE_0[2]
GTP_DUAL:DRP32[12]
23 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_4_0[0]
GTP_DUAL:DRP32[14]
GTP_DUAL:CLK_COR_SEQ_2_4_0[1]
GTP_DUAL:DRP32[15]
24 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_4_0[3]
GTP_DUAL:DRP33[1]
GTP_DUAL:CLK_COR_SEQ_2_4_0[2]
GTP_DUAL:DRP33[0]
25 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_4_0[4]
GTP_DUAL:DRP33[2]
GTP_DUAL:CLK_COR_SEQ_2_4_0[5]
GTP_DUAL:DRP33[3]
26 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_4_0[7]
GTP_DUAL:DRP33[5]
GTP_DUAL:CLK_COR_SEQ_2_4_0[6]
GTP_DUAL:DRP33[4]
27 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_4_0[8]
GTP_DUAL:DRP33[6]
GTP_DUAL:CLK_COR_SEQ_2_4_0[9]
GTP_DUAL:DRP33[7]
28 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_3_0[1]
GTP_DUAL:DRP33[9]
GTP_DUAL:CLK_COR_SEQ_2_3_0[0]
GTP_DUAL:DRP33[8]
29 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_3_0[2]
GTP_DUAL:DRP33[10]
GTP_DUAL:CLK_COR_SEQ_2_3_0[3]
GTP_DUAL:DRP33[11]
30 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_3_0[5]
GTP_DUAL:DRP33[13]
GTP_DUAL:CLK_COR_SEQ_2_3_0[4]
GTP_DUAL:DRP33[12]
31 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_3_0[6]
GTP_DUAL:DRP33[14]
GTP_DUAL:CLK_COR_SEQ_2_3_0[7]
GTP_DUAL:DRP33[15]
32 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_3_0[9]
GTP_DUAL:DRP34[1]
GTP_DUAL:CLK_COR_SEQ_2_3_0[8]
GTP_DUAL:DRP34[0]
33 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_2_0[0]
GTP_DUAL:DRP34[2]
GTP_DUAL:CLK_COR_SEQ_2_2_0[1]
GTP_DUAL:DRP34[3]
34 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_2_0[3]
GTP_DUAL:DRP34[5]
GTP_DUAL:CLK_COR_SEQ_2_2_0[2]
GTP_DUAL:DRP34[4]
35 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_2_0[4]
GTP_DUAL:DRP34[6]
GTP_DUAL:CLK_COR_SEQ_2_2_0[5]
GTP_DUAL:DRP34[7]
36 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_2_0[7]
GTP_DUAL:DRP34[9]
GTP_DUAL:CLK_COR_SEQ_2_2_0[6]
GTP_DUAL:DRP34[8]
37 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_2_0[8]
GTP_DUAL:DRP34[10]
GTP_DUAL:CLK_COR_SEQ_2_2_0[9]
GTP_DUAL:DRP34[11]
38 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_1_0[1]
GTP_DUAL:DRP34[13]
GTP_DUAL:CLK_COR_SEQ_2_1_0[0]
GTP_DUAL:DRP34[12]
39 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_1_0[2]
GTP_DUAL:DRP34[14]
GTP_DUAL:CLK_COR_SEQ_2_1_0[3]
GTP_DUAL:DRP34[15]
40 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_1_0[5]
GTP_DUAL:DRP35[1]
GTP_DUAL:CLK_COR_SEQ_2_1_0[4]
GTP_DUAL:DRP35[0]
41 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_1_0[6]
GTP_DUAL:DRP35[2]
GTP_DUAL:CLK_COR_SEQ_2_1_0[7]
GTP_DUAL:DRP35[3]
42 ------------------------------GTP_DUAL:CLK_COR_SEQ_2_1_0[9]
GTP_DUAL:DRP35[5]
GTP_DUAL:CLK_COR_SEQ_2_1_0[8]
GTP_DUAL:DRP35[4]
43 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_ENABLE_0[0]
GTP_DUAL:DRP35[6]
GTP_DUAL:CLK_COR_SEQ_1_ENABLE_0[1]
GTP_DUAL:DRP35[7]
44 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_ENABLE_0[3]
GTP_DUAL:DRP35[9]
GTP_DUAL:CLK_COR_SEQ_1_ENABLE_0[2]
GTP_DUAL:DRP35[8]
45 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_4_0[0]
GTP_DUAL:DRP35[10]
GTP_DUAL:CLK_COR_SEQ_1_4_0[1]
GTP_DUAL:DRP35[11]
46 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_4_0[3]
GTP_DUAL:DRP35[13]
GTP_DUAL:CLK_COR_SEQ_1_4_0[2]
GTP_DUAL:DRP35[12]
47 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_4_0[4]
GTP_DUAL:DRP35[14]
GTP_DUAL:CLK_COR_SEQ_1_4_0[5]
GTP_DUAL:DRP35[15]
48 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_4_0[7]
GTP_DUAL:DRP36[1]
GTP_DUAL:CLK_COR_SEQ_1_4_0[6]
GTP_DUAL:DRP36[0]
49 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_4_0[8]
GTP_DUAL:DRP36[2]
GTP_DUAL:CLK_COR_SEQ_1_4_0[9]
GTP_DUAL:DRP36[3]
50 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_3_0[1]
GTP_DUAL:DRP36[5]
GTP_DUAL:CLK_COR_SEQ_1_3_0[0]
GTP_DUAL:DRP36[4]
51 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_3_0[2]
GTP_DUAL:DRP36[6]
GTP_DUAL:CLK_COR_SEQ_1_3_0[3]
GTP_DUAL:DRP36[7]
52 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_3_0[5]
GTP_DUAL:DRP36[9]
GTP_DUAL:CLK_COR_SEQ_1_3_0[4]
GTP_DUAL:DRP36[8]
53 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_3_0[6]
GTP_DUAL:DRP36[10]
GTP_DUAL:CLK_COR_SEQ_1_3_0[7]
GTP_DUAL:DRP36[11]
54 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_3_0[9]
GTP_DUAL:DRP36[13]
GTP_DUAL:CLK_COR_SEQ_1_3_0[8]
GTP_DUAL:DRP36[12]
55 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_2_0[0]
GTP_DUAL:DRP36[14]
GTP_DUAL:CLK_COR_SEQ_1_2_0[1]
GTP_DUAL:DRP36[15]
56 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_2_0[3]
GTP_DUAL:DRP37[1]
GTP_DUAL:CLK_COR_SEQ_1_2_0[2]
GTP_DUAL:DRP37[0]
57 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_2_0[4]
GTP_DUAL:DRP37[2]
GTP_DUAL:CLK_COR_SEQ_1_2_0[5]
GTP_DUAL:DRP37[3]
58 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_2_0[7]
GTP_DUAL:DRP37[5]
GTP_DUAL:CLK_COR_SEQ_1_2_0[6]
GTP_DUAL:DRP37[4]
59 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_2_0[8]
GTP_DUAL:DRP37[6]
GTP_DUAL:CLK_COR_SEQ_1_2_0[9]
GTP_DUAL:DRP37[7]
60 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_1_0[1]
GTP_DUAL:DRP37[9]
GTP_DUAL:CLK_COR_SEQ_1_1_0[0]
GTP_DUAL:DRP37[8]
61 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_1_0[2]
GTP_DUAL:DRP37[10]
GTP_DUAL:CLK_COR_SEQ_1_1_0[3]
GTP_DUAL:DRP37[11]
62 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_1_0[5]
GTP_DUAL:DRP37[13]
GTP_DUAL:CLK_COR_SEQ_1_1_0[4]
GTP_DUAL:DRP37[12]
63 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_1_0[6]
GTP_DUAL:DRP37[14]
GTP_DUAL:CLK_COR_SEQ_1_1_0[7]
GTP_DUAL:DRP37[15]
GTP bittile 12
RowColumn
012345678910111213141516171819202122232425262728293031
0 ------------------------------GTP_DUAL:CLK_COR_SEQ_1_1_0[9]
GTP_DUAL:DRP38[1]
GTP_DUAL:CLK_COR_SEQ_1_1_0[8]
GTP_DUAL:DRP38[0]
1 ------------------------------GTP_DUAL:CLK_COR_REPEAT_WAIT_0[0]
GTP_DUAL:DRP38[2]
GTP_DUAL:CLK_COR_REPEAT_WAIT_0[1]
GTP_DUAL:DRP38[3]
2 ------------------------------GTP_DUAL:CLK_COR_REPEAT_WAIT_0[3]
GTP_DUAL:DRP38[5]
GTP_DUAL:CLK_COR_REPEAT_WAIT_0[2]
GTP_DUAL:DRP38[4]
3 ------------------------------GTP_DUAL:CLK_COR_REPEAT_WAIT_0[4]
GTP_DUAL:DRP38[6]
GTP_DUAL:CLK_CORRECT_USE_0
GTP_DUAL:DRP38[7]
4 ------------------------------GTP_DUAL:CLK_COR_MIN_LAT_0[0]
GTP_DUAL:DRP38[9]
GTP_DUAL:CLK_COR_PRECEDENCE_0
GTP_DUAL:DRP38[8]
5 ------------------------------GTP_DUAL:CLK_COR_MIN_LAT_0[1]
GTP_DUAL:DRP38[10]
GTP_DUAL:CLK_COR_MIN_LAT_0[2]
GTP_DUAL:DRP38[11]
6 ------------------------------GTP_DUAL:CLK_COR_MIN_LAT_0[4]
GTP_DUAL:DRP38[13]
GTP_DUAL:CLK_COR_MIN_LAT_0[3]
GTP_DUAL:DRP38[12]
7 ------------------------------GTP_DUAL:CLK_COR_MIN_LAT_0[5]
GTP_DUAL:DRP38[14]
GTP_DUAL:CLK_COR_MAX_LAT_0[0]
GTP_DUAL:DRP38[15]
8 ------------------------------GTP_DUAL:CLK_COR_MAX_LAT_0[2]
GTP_DUAL:DRP39[1]
GTP_DUAL:CLK_COR_MAX_LAT_0[1]
GTP_DUAL:DRP39[0]
9 ------------------------------GTP_DUAL:CLK_COR_MAX_LAT_0[3]
GTP_DUAL:DRP39[2]
GTP_DUAL:CLK_COR_MAX_LAT_0[4]
GTP_DUAL:DRP39[3]
10 ------------------------------GTP_DUAL:CLK_COR_KEEP_IDLE_0
GTP_DUAL:DRP39[5]
GTP_DUAL:CLK_COR_MAX_LAT_0[5]
GTP_DUAL:DRP39[4]
11 ------------------------------GTP_DUAL:CLK_COR_INSERT_IDLE_FLAG_0
GTP_DUAL:DRP39[6]
GTP_DUAL:CLK_COR_DET_LEN_0[0]
GTP_DUAL:DRP39[7]
12 ------------------------------GTP_DUAL:CLK_COR_ADJ_LEN_0[0]
GTP_DUAL:DRP39[9]
GTP_DUAL:CLK_COR_DET_LEN_0[1]
GTP_DUAL:DRP39[8]
13 ------------------------------GTP_DUAL:CLK_COR_ADJ_LEN_0[1]
GTP_DUAL:DRP39[10]
GTP_DUAL:CHAN_BOND_SEQ_LEN_0[0]
GTP_DUAL:DRP39[11]
14 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_USE_0
GTP_DUAL:DRP39[13]
GTP_DUAL:CHAN_BOND_SEQ_LEN_0[1]
GTP_DUAL:DRP39[12]
15 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_0[0]
GTP_DUAL:DRP39[14]
GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_0[1]
GTP_DUAL:DRP39[15]
16 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_0[3]
GTP_DUAL:DRP3A[1]
GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_0[2]
GTP_DUAL:DRP3A[0]
17 ------------------------------GTP_DUAL:DRP3A[2]GTP_DUAL:DRP3A[3]
GTP_DUAL:OOBDETECT_THRESHOLD_0[0]
18 ------------------------------GTP_DUAL:DRP3A[5]
GTP_DUAL:OOBDETECT_THRESHOLD_0[2]
GTP_DUAL:DRP3A[4]
GTP_DUAL:OOBDETECT_THRESHOLD_0[1]
19 ------------------------------GTP_DUAL:DRP3A[6]
GTP_DUAL:PMA_COM_CFG[19]
GTP_DUAL:DRP3A[7]
GTP_DUAL:TXOUTCLK_SEL_0
20 ------------------------------GTP_DUAL:DRP3A[9]
GTP_DUAL:TXRX_INVERT_0[0]
GTP_DUAL:DRP3A[8]
GTP_DUAL:TX_XCLK_SEL_0
21 ------------------------------GTP_DUAL:DRP3A[10]
GTP_DUAL:TXRX_INVERT_0[1]
GTP_DUAL:DRP3A[11]
GTP_DUAL:TXRX_INVERT_0[2]
22 ------------------------------GTP_DUAL:DRP3A[13]
GTP_DUAL:TXRX_INVERT_0[4]
GTP_DUAL:DRP3A[12]
GTP_DUAL:TXRX_INVERT_0[3]
23 ------------------------------GTP_DUAL:DRP3A[14]
GTP_DUAL:TX_DETECT_RX_CFG_0[0]
GTP_DUAL:DRP3A[15]
GTP_DUAL:TX_DETECT_RX_CFG_0[1]
24 ------------------------------GTP_DUAL:DRP3B[1]
GTP_DUAL:TX_DETECT_RX_CFG_0[3]
GTP_DUAL:DRP3B[0]
GTP_DUAL:TX_DETECT_RX_CFG_0[2]
25 ------------------------------GTP_DUAL:DRP3B[2]
GTP_DUAL:TX_DETECT_RX_CFG_0[4]
GTP_DUAL:DRP3B[3]
GTP_DUAL:TX_DETECT_RX_CFG_0[5]
26 ------------------------------GTP_DUAL:DRP3B[5]
GTP_DUAL:TX_DETECT_RX_CFG_0[7]
GTP_DUAL:DRP3B[4]
GTP_DUAL:TX_DETECT_RX_CFG_0[6]
27 ------------------------------GTP_DUAL:DRP3B[6]
GTP_DUAL:TX_DETECT_RX_CFG_0[8]
GTP_DUAL:DRP3B[7]
GTP_DUAL:TX_DETECT_RX_CFG_0[9]
28 ------------------------------GTP_DUAL:DRP3B[9]
GTP_DUAL:TX_DETECT_RX_CFG_0[11]
GTP_DUAL:DRP3B[8]
GTP_DUAL:TX_DETECT_RX_CFG_0[10]
29 ------------------------------GTP_DUAL:DRP3B[10]
GTP_DUAL:TX_DETECT_RX_CFG_0[12]
GTP_DUAL:DRP3B[11]
GTP_DUAL:TX_DETECT_RX_CFG_0[13]
30 ------------------------------GTP_DUAL:DRP3B[13]
GTP_DUAL:TRANS_TIME_TO_P2_0[0]
GTP_DUAL:DRP3B[12]
GTP_DUAL:TX_BUFFER_USE_0
31 ------------------------------GTP_DUAL:DRP3B[14]
GTP_DUAL:TRANS_TIME_TO_P2_0[1]
GTP_DUAL:DRP3B[15]
GTP_DUAL:TRANS_TIME_TO_P2_0[2]
32 ------------------------------GTP_DUAL:DRP3C[1]
GTP_DUAL:TRANS_TIME_TO_P2_0[4]
GTP_DUAL:DRP3C[0]
GTP_DUAL:TRANS_TIME_TO_P2_0[3]
33 ------------------------------GTP_DUAL:DRP3C[2]
GTP_DUAL:TRANS_TIME_TO_P2_0[5]
GTP_DUAL:DRP3C[3]
GTP_DUAL:TRANS_TIME_TO_P2_0[6]
34 ------------------------------GTP_DUAL:DRP3C[5]
GTP_DUAL:TRANS_TIME_TO_P2_0[8]
GTP_DUAL:DRP3C[4]
GTP_DUAL:TRANS_TIME_TO_P2_0[7]
35 ------------------------------GTP_DUAL:DRP3C[6]
GTP_DUAL:TRANS_TIME_TO_P2_0[9]
GTP_DUAL:DRP3C[7]
GTP_DUAL:TRANS_TIME_TO_P2_0[10]
36 ------------------------------GTP_DUAL:DRP3C[9]
GTP_DUAL:TRANS_TIME_TO_P2_0[12]
GTP_DUAL:DRP3C[8]
GTP_DUAL:TRANS_TIME_TO_P2_0[11]
37 ------------------------------GTP_DUAL:DRP3C[10]
GTP_DUAL:TRANS_TIME_TO_P2_0[13]
GTP_DUAL:DRP3C[11]
GTP_DUAL:TRANS_TIME_TO_P2_0[14]
38 ------------------------------GTP_DUAL:DRP3C[13]
GTP_DUAL:TRANS_TIME_NON_P2_0[0]
GTP_DUAL:DRP3C[12]
GTP_DUAL:TRANS_TIME_TO_P2_0[15]
39 ------------------------------GTP_DUAL:DRP3C[14]
GTP_DUAL:TRANS_TIME_NON_P2_0[1]
GTP_DUAL:DRP3C[15]
GTP_DUAL:TRANS_TIME_NON_P2_0[2]
40 ------------------------------GTP_DUAL:DRP3D[1]
GTP_DUAL:TRANS_TIME_NON_P2_0[4]
GTP_DUAL:DRP3D[0]
GTP_DUAL:TRANS_TIME_NON_P2_0[3]
41 ------------------------------GTP_DUAL:DRP3D[2]
GTP_DUAL:TRANS_TIME_NON_P2_0[5]
GTP_DUAL:DRP3D[3]
GTP_DUAL:TRANS_TIME_NON_P2_0[6]
42 ------------------------------GTP_DUAL:DRP3D[5]
GTP_DUAL:TRANS_TIME_NON_P2_0[8]
GTP_DUAL:DRP3D[4]
GTP_DUAL:TRANS_TIME_NON_P2_0[7]
43 ------------------------------GTP_DUAL:DRP3D[6]
GTP_DUAL:TRANS_TIME_NON_P2_0[9]
GTP_DUAL:DRP3D[7]
GTP_DUAL:TRANS_TIME_NON_P2_0[10]
44 ------------------------------GTP_DUAL:DRP3D[9]
GTP_DUAL:TRANS_TIME_NON_P2_0[12]
GTP_DUAL:DRP3D[8]
GTP_DUAL:TRANS_TIME_NON_P2_0[11]
45 ------------------------------GTP_DUAL:DRP3D[10]
GTP_DUAL:TRANS_TIME_NON_P2_0[13]
GTP_DUAL:DRP3D[11]
GTP_DUAL:TRANS_TIME_NON_P2_0[14]
46 ------------------------------GTP_DUAL:DRP3D[13]
GTP_DUAL:TRANS_TIME_FROM_P2_0[0]
GTP_DUAL:DRP3D[12]
GTP_DUAL:TRANS_TIME_NON_P2_0[15]
47 ------------------------------GTP_DUAL:DRP3D[14]
GTP_DUAL:TRANS_TIME_FROM_P2_0[1]
GTP_DUAL:DRP3D[15]
GTP_DUAL:TRANS_TIME_FROM_P2_0[2]
48 ------------------------------GTP_DUAL:DRP3E[1]
GTP_DUAL:TRANS_TIME_FROM_P2_0[4]
GTP_DUAL:DRP3E[0]
GTP_DUAL:TRANS_TIME_FROM_P2_0[3]
49 ------------------------------GTP_DUAL:DRP3E[2]
GTP_DUAL:TRANS_TIME_FROM_P2_0[5]
GTP_DUAL:DRP3E[3]
GTP_DUAL:TRANS_TIME_FROM_P2_0[6]
50 ------------------------------GTP_DUAL:DRP3E[5]
GTP_DUAL:TRANS_TIME_FROM_P2_0[8]
GTP_DUAL:DRP3E[4]
GTP_DUAL:TRANS_TIME_FROM_P2_0[7]
51 ------------------------------GTP_DUAL:DRP3E[6]
GTP_DUAL:TRANS_TIME_FROM_P2_0[9]
GTP_DUAL:DRP3E[7]
GTP_DUAL:TRANS_TIME_FROM_P2_0[10]
52 ------------------------------GTP_DUAL:DRP3E[9]
GTP_DUAL:TRANS_TIME_FROM_P2_0[12]
GTP_DUAL:DRP3E[8]
GTP_DUAL:TRANS_TIME_FROM_P2_0[11]
53 ------------------------------GTP_DUAL:DRP3E[10]
GTP_DUAL:TRANS_TIME_FROM_P2_0[13]
GTP_DUAL:DRP3E[11]
GTP_DUAL:TRANS_TIME_FROM_P2_0[14]
54 ------------------------------GTP_DUAL:DRP3E[13]
GTP_DUAL:TERMINATION_IMP_0
GTP_DUAL:DRP3E[12]
GTP_DUAL:TRANS_TIME_FROM_P2_0[15]
55 ------------------------------GTP_DUAL:DRP3E[14]
GTP_DUAL:SATA_MIN_WAKE_0[0]
GTP_DUAL:DRP3E[15]
GTP_DUAL:SATA_MIN_WAKE_0[1]
56 ------------------------------GTP_DUAL:DRP3F[1]
GTP_DUAL:SATA_MIN_WAKE_0[3]
GTP_DUAL:DRP3F[0]
GTP_DUAL:SATA_MIN_WAKE_0[2]
57 ------------------------------GTP_DUAL:DRP3F[2]
GTP_DUAL:SATA_MIN_WAKE_0[4]
GTP_DUAL:DRP3F[3]
GTP_DUAL:SATA_MIN_WAKE_0[5]
58 ------------------------------GTP_DUAL:DRP3F[5]
GTP_DUAL:SATA_MIN_INIT_0[1]
GTP_DUAL:DRP3F[4]
GTP_DUAL:SATA_MIN_INIT_0[0]
59 ------------------------------GTP_DUAL:DRP3F[6]
GTP_DUAL:SATA_MIN_INIT_0[2]
GTP_DUAL:DRP3F[7]
GTP_DUAL:SATA_MIN_INIT_0[3]
60 ------------------------------GTP_DUAL:DRP3F[9]
GTP_DUAL:SATA_MIN_INIT_0[5]
GTP_DUAL:DRP3F[8]
GTP_DUAL:SATA_MIN_INIT_0[4]
61 ------------------------------GTP_DUAL:DRP3F[10]
GTP_DUAL:SATA_MIN_BURST_0[0]
GTP_DUAL:DRP3F[11]
GTP_DUAL:SATA_MIN_BURST_0[1]
62 ------------------------------GTP_DUAL:DRP3F[13]
GTP_DUAL:SATA_MIN_BURST_0[3]
GTP_DUAL:DRP3F[12]
GTP_DUAL:SATA_MIN_BURST_0[2]
63 ------------------------------GTP_DUAL:DRP3F[14]
GTP_DUAL:SATA_MIN_BURST_0[4]
GTP_DUAL:DRP3F[15]
GTP_DUAL:SATA_MIN_BURST_0[5]
GTP bittile 13
RowColumn
012345678910111213141516171819202122232425262728293031
0 ------------------------------GTP_DUAL:DRP40[1]
GTP_DUAL:SATA_MAX_WAKE_0[1]
GTP_DUAL:DRP40[0]
GTP_DUAL:SATA_MAX_WAKE_0[0]
1 ------------------------------GTP_DUAL:DRP40[2]
GTP_DUAL:SATA_MAX_WAKE_0[2]
GTP_DUAL:DRP40[3]
GTP_DUAL:SATA_MAX_WAKE_0[3]
2 ------------------------------GTP_DUAL:DRP40[5]
GTP_DUAL:SATA_MAX_WAKE_0[5]
GTP_DUAL:DRP40[4]
GTP_DUAL:SATA_MAX_WAKE_0[4]
3 ------------------------------GTP_DUAL:DRP40[6]
GTP_DUAL:SATA_MAX_INIT_0[0]
GTP_DUAL:DRP40[7]
GTP_DUAL:SATA_MAX_INIT_0[1]
4 ------------------------------GTP_DUAL:DRP40[9]
GTP_DUAL:SATA_MAX_INIT_0[3]
GTP_DUAL:DRP40[8]
GTP_DUAL:SATA_MAX_INIT_0[2]
5 ------------------------------GTP_DUAL:DRP40[10]
GTP_DUAL:SATA_MAX_INIT_0[4]
GTP_DUAL:DRP40[11]
GTP_DUAL:SATA_MAX_INIT_0[5]
6 ------------------------------GTP_DUAL:DRP40[13]
GTP_DUAL:SATA_MAX_BURST_0[1]
GTP_DUAL:DRP40[12]
GTP_DUAL:SATA_MAX_BURST_0[0]
7 ------------------------------GTP_DUAL:DRP40[14]
GTP_DUAL:SATA_MAX_BURST_0[2]
GTP_DUAL:DRP40[15]
GTP_DUAL:SATA_MAX_BURST_0[3]
8 ------------------------------GTP_DUAL:DRP41[1]
GTP_DUAL:SATA_MAX_BURST_0[5]
GTP_DUAL:DRP41[0]
GTP_DUAL:SATA_MAX_BURST_0[4]
9 ------------------------------GTP_DUAL:DRP41[2]
GTP_DUAL:SATA_IDLE_VAL_0[0]
GTP_DUAL:DRP41[3]
GTP_DUAL:SATA_IDLE_VAL_0[1]
10 ------------------------------GTP_DUAL:DRP41[5]
GTP_DUAL:SATA_BURST_VAL_0[0]
GTP_DUAL:DRP41[4]
GTP_DUAL:SATA_IDLE_VAL_0[2]
11 ------------------------------GTP_DUAL:DRP41[6]
GTP_DUAL:SATA_BURST_VAL_0[1]
GTP_DUAL:DRP41[7]
GTP_DUAL:SATA_BURST_VAL_0[2]
12 ------------------------------GTP_DUAL:DRP41[9]
GTP_DUAL:RX_STATUS_FMT_0
GTP_DUAL:DRP41[8]
GTP_DUAL:RX_XCLK_SEL_0
13 ------------------------------GTP_DUAL:DRP41[10]
GTP_DUAL:RX_SLIDE_MODE_0
GTP_DUAL:DRP41[11]
GTP_DUAL:RX_LOS_THRESHOLD_0[0]
14 ------------------------------GTP_DUAL:DRP41[13]
GTP_DUAL:RX_LOS_THRESHOLD_0[2]
GTP_DUAL:DRP41[12]
GTP_DUAL:RX_LOS_THRESHOLD_0[1]
15 ------------------------------GTP_DUAL:DRP41[14]
GTP_DUAL:RX_LOSS_OF_SYNC_FSM_0
GTP_DUAL:DRP41[15]
GTP_DUAL:RX_LOS_INVALID_INCR_0[0]
16 ------------------------------GTP_DUAL:DRP42[1]
GTP_DUAL:RX_LOS_INVALID_INCR_0[2]
GTP_DUAL:DRP42[0]
GTP_DUAL:RX_LOS_INVALID_INCR_0[1]
17 ------------------------------GTP_DUAL:DRP42[2]
GTP_DUAL:RX_DECODE_SEQ_MATCH_0
GTP_DUAL:DRP42[3]
GTP_DUAL:RX_BUFFER_USE_0
18 ------------------------------GTP_DUAL:DRP42[5]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[1]
GTP_DUAL:DRP42[4]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[0]
19 ------------------------------GTP_DUAL:DRP42[6]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[2]
GTP_DUAL:DRP42[7]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[3]
20 ------------------------------GTP_DUAL:DRP42[9]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[5]
GTP_DUAL:DRP42[8]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[4]
21 ------------------------------GTP_DUAL:DRP42[10]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[6]
GTP_DUAL:DRP42[11]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[7]
22 ------------------------------GTP_DUAL:DRP42[13]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[9]
GTP_DUAL:DRP42[12]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[8]
23 ------------------------------GTP_DUAL:DRP42[14]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[10]
GTP_DUAL:DRP42[15]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[11]
24 ------------------------------GTP_DUAL:DRP43[1]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[13]
GTP_DUAL:DRP43[0]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[12]
25 ------------------------------GTP_DUAL:DRP43[2]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[14]
GTP_DUAL:DRP43[3]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[15]
26 ------------------------------GTP_DUAL:DRP43[5]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[17]
GTP_DUAL:DRP43[4]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[16]
27 ------------------------------GTP_DUAL:DRP43[6]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[18]
GTP_DUAL:DRP43[7]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[19]
28 ------------------------------GTP_DUAL:DRP43[9]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[21]
GTP_DUAL:DRP43[8]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[20]
29 ------------------------------GTP_DUAL:DRP43[10]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[22]
GTP_DUAL:DRP43[11]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[23]
30 ------------------------------GTP_DUAL:DRP43[13]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[25]
GTP_DUAL:DRP43[12]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[24]
31 ------------------------------GTP_DUAL:DRP43[14]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[26]
GTP_DUAL:DRP43[15]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[27]
32 ------------------------------GTP_DUAL:DRP44[1]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[29]
GTP_DUAL:DRP44[0]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[28]
33 ------------------------------GTP_DUAL:DRP44[2]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[30]
GTP_DUAL:DRP44[3]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[31]
34 ------------------------------GTP_DUAL:DRP44[5]
GTP_DUAL:PMA_CDR_SCAN_0[1]
GTP_DUAL:DRP44[4]
GTP_DUAL:PMA_CDR_SCAN_0[0]
35 ------------------------------GTP_DUAL:DRP44[6]
GTP_DUAL:PMA_CDR_SCAN_0[2]
GTP_DUAL:DRP44[7]
GTP_DUAL:PMA_CDR_SCAN_0[3]
36 ------------------------------GTP_DUAL:DRP44[9]
GTP_DUAL:PMA_CDR_SCAN_0[5]
GTP_DUAL:DRP44[8]
GTP_DUAL:PMA_CDR_SCAN_0[4]
37 ------------------------------GTP_DUAL:DRP44[10]
GTP_DUAL:PMA_CDR_SCAN_0[6]
GTP_DUAL:DRP44[11]
GTP_DUAL:PMA_CDR_SCAN_0[7]
38 ------------------------------GTP_DUAL:DRP44[13]
GTP_DUAL:PMA_CDR_SCAN_0[9]
GTP_DUAL:DRP44[12]
GTP_DUAL:PMA_CDR_SCAN_0[8]
39 ------------------------------GTP_DUAL:DRP44[14]
GTP_DUAL:PMA_CDR_SCAN_0[10]
GTP_DUAL:DRP44[15]
GTP_DUAL:PMA_CDR_SCAN_0[11]
40 ------------------------------GTP_DUAL:DRP45[1]
GTP_DUAL:PMA_CDR_SCAN_0[13]
GTP_DUAL:DRP45[0]
GTP_DUAL:PMA_CDR_SCAN_0[12]
41 ------------------------------GTP_DUAL:DRP45[2]
GTP_DUAL:PMA_CDR_SCAN_0[14]
GTP_DUAL:DRP45[3]
GTP_DUAL:PMA_CDR_SCAN_0[15]
42 ------------------------------GTP_DUAL:DRP45[5]
GTP_DUAL:PMA_CDR_SCAN_0[17]
GTP_DUAL:DRP45[4]
GTP_DUAL:PMA_CDR_SCAN_0[16]
43 ------------------------------GTP_DUAL:DRP45[6]
GTP_DUAL:PMA_CDR_SCAN_0[18]
GTP_DUAL:DRP45[7]
GTP_DUAL:PMA_CDR_SCAN_0[19]
44 ------------------------------GTP_DUAL:DRP45[9]
GTP_DUAL:PMA_CDR_SCAN_0[21]
GTP_DUAL:DRP45[8]
GTP_DUAL:PMA_CDR_SCAN_0[20]
45 ------------------------------GTP_DUAL:DRP45[10]
GTP_DUAL:PMA_CDR_SCAN_0[22]
GTP_DUAL:DRP45[11]
GTP_DUAL:PMA_CDR_SCAN_0[23]
46 ------------------------------GTP_DUAL:DRP45[13]
GTP_DUAL:PMA_CDR_SCAN_0[25]
GTP_DUAL:DRP45[12]
GTP_DUAL:PMA_CDR_SCAN_0[24]
47 ------------------------------GTP_DUAL:DRP45[14]
GTP_DUAL:PMA_CDR_SCAN_0[26]
GTP_DUAL:DRP45[15]
GTP_DUAL:PLL_TXDIVSEL_OUT_0[0]
48 ------------------------------GTP_DUAL:DRP46[1]
GTP_DUAL:PLL_SATA_0
GTP_DUAL:DRP46[0]
GTP_DUAL:PLL_TXDIVSEL_OUT_0[1]
49 ------------------------------GTP_DUAL:DRP46[2]
GTP_DUAL:PLL_RXDIVSEL_OUT_0[0]
GTP_DUAL:DRP46[3]
GTP_DUAL:PLL_RXDIVSEL_OUT_0[1]
50 ------------------------------GTP_DUAL:DRP46[5]
GTP_DUAL:PCOMMA_10B_VALUE_0[0]
GTP_DUAL:DRP46[4]
GTP_DUAL:PCOMMA_DETECT_0
51 ------------------------------GTP_DUAL:DRP46[6]
GTP_DUAL:PCOMMA_10B_VALUE_0[1]
GTP_DUAL:DRP46[7]
GTP_DUAL:PCOMMA_10B_VALUE_0[2]
52 ------------------------------GTP_DUAL:DRP46[9]
GTP_DUAL:PCOMMA_10B_VALUE_0[4]
GTP_DUAL:DRP46[8]
GTP_DUAL:PCOMMA_10B_VALUE_0[3]
53 ------------------------------GTP_DUAL:DRP46[10]
GTP_DUAL:PCOMMA_10B_VALUE_0[5]
GTP_DUAL:DRP46[11]
GTP_DUAL:PCOMMA_10B_VALUE_0[6]
54 ------------------------------GTP_DUAL:DRP46[13]
GTP_DUAL:PCOMMA_10B_VALUE_0[8]
GTP_DUAL:DRP46[12]
GTP_DUAL:PCOMMA_10B_VALUE_0[7]
55 ------------------------------GTP_DUAL:DRP46[14]
GTP_DUAL:PCOMMA_10B_VALUE_0[9]
GTP_DUAL:DRP46[15]
GTP_DUAL:PCI_EXPRESS_MODE_0
56 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_3_0[8]
GTP_DUAL:DRP47[1]
GTP_DUAL:DRP47[0]
57 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_3_0[7]
GTP_DUAL:DRP47[2]
GTP_DUAL:CHAN_BOND_SEQ_2_3_0[6]
GTP_DUAL:DRP47[3]
58 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_3_0[4]
GTP_DUAL:DRP47[5]
GTP_DUAL:CHAN_BOND_SEQ_2_3_0[5]
GTP_DUAL:DRP47[4]
59 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_3_0[3]
GTP_DUAL:DRP47[6]
GTP_DUAL:CHAN_BOND_SEQ_2_3_0[2]
GTP_DUAL:DRP47[7]
60 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_3_0[0]
GTP_DUAL:DRP47[9]
GTP_DUAL:CHAN_BOND_SEQ_2_3_0[1]
GTP_DUAL:DRP47[8]
61 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_4_0[9]
GTP_DUAL:DRP47[10]
GTP_DUAL:CHAN_BOND_SEQ_2_4_0[8]
GTP_DUAL:DRP47[11]
62 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_4_0[6]
GTP_DUAL:DRP47[13]
GTP_DUAL:CHAN_BOND_SEQ_2_4_0[7]
GTP_DUAL:DRP47[12]
63 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_4_0[5]
GTP_DUAL:DRP47[14]
GTP_DUAL:CHAN_BOND_SEQ_2_4_0[4]
GTP_DUAL:DRP47[15]
GTP bittile 14
RowColumn
012345678910111213141516171819202122232425262728293031
0 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_4_0[2]
GTP_DUAL:DRP48[1]
GTP_DUAL:CHAN_BOND_SEQ_2_4_0[3]
GTP_DUAL:DRP48[0]
1 ------------------------------GTP_DUAL:CHAN_BOND_SEQ_2_4_0[1]
GTP_DUAL:DRP48[2]
GTP_DUAL:CHAN_BOND_SEQ_2_4_0[0]
GTP_DUAL:DRP48[3]
2 ------------------------------GTP_DUAL:DRP48[5]
GTP_DUAL:PMA_RX_CFG_0[7]
GTP_DUAL:DRP48[4]
GTP_DUAL:PMA_RX_CFG_0[6]
3 ------------------------------GTP_DUAL:DRP48[6]
GTP_DUAL:PMA_RX_CFG_0[8]
GTP_DUAL:DRP48[7]
GTP_DUAL:PMA_RX_CFG_0[9]
4 ------------------------------GTP_DUAL:DRP48[9]
GTP_DUAL:PMA_RX_CFG_0[23]
GTP_DUAL:DRP48[8]
GTP_DUAL:PMA_RX_CFG_0[10]
5 ------------------------------GTP_DUAL:DRP48[10]
GTP_DUAL:PMA_RX_CFG_0[2]
GTP_DUAL:DRP48[11]
GTP_DUAL:PMA_RX_CFG_0[3]
6 ------------------------------GTP_DUAL:DRP48[13]
GTP_DUAL:PMA_RX_CFG_0[5]
GTP_DUAL:DRP48[12]
GTP_DUAL:PMA_RX_CFG_0[4]
7 ------------------------------GTP_DUAL:DRP48[14]
GTP_DUAL:RX_CDR_FORCE_ROTATE_0
GTP_DUAL:DRP48[15]
GTP_DUAL:PMA_RX_CFG_1[13]
8 ------------------------------GTP_DUAL:DRP49[1]
GTP_DUAL:PMA_RX_CFG_0[15]
GTP_DUAL:DRP49[0]
GTP_DUAL:PMA_RX_CFG_0[14]
9 ------------------------------GTP_DUAL:DRP49[2]
GTP_DUAL:PMA_RX_CFG_0[16]
GTP_DUAL:DRP49[3]
GTP_DUAL:PMA_RX_CFG_0[17]
10 ------------------------------GTP_DUAL:DRP49[5]
GTP_DUAL:PMA_RX_CFG_0[19]
GTP_DUAL:DRP49[4]
GTP_DUAL:PMA_RX_CFG_0[18]
11 ------------------------------GTP_DUAL:DRP49[6]
GTP_DUAL:PMA_RX_CFG_0[20]
GTP_DUAL:DRP49[7]
GTP_DUAL:PMA_RX_CFG_0[21]
12 ------------------------------GTP_DUAL:DRP49[9]
GTP_DUAL:PMA_RX_CFG_1[11]
GTP_DUAL:DRP49[8]
GTP_DUAL:PMA_RX_CFG_0[22]
13 ------------------------------GTP_DUAL:DRP49[10]
GTP_DUAL:PMA_RX_CFG_0[0]
GTP_DUAL:DRP49[11]
GTP_DUAL:PMA_RX_CFG_0[1]
14 ------------------------------GTP_DUAL:DRP49[13]
GTP_DUAL:PMA_RX_CFG_0[12]
GTP_DUAL:DRP49[12]
GTP_DUAL:PMA_RX_CFG_0[24]
15 ------------------------------GTP_DUAL:AC_CAP_DIS_0
GTP_DUAL:DRP49[14]
GTP_DUAL:DRP49[15]
GTP_DUAL:RCV_TERM_MID_0
16 ------------------------------GTP_DUAL:DRP4A[1]
GTP_DUAL:RCV_TERM_VTTRX_0
GTP_DUAL:DRP4A[0]
GTP_DUAL:RCV_TERM_GND_0
17 ------------------------------GTP_DUAL:DRP4A[2]
GTP_DUAL:PMA_COM_CFG[27]
GTP_DUAL:DRP4A[3]
GTP_DUAL:PMA_COM_CFG[28]
18 ------------------------------GTP_DUAL:DRP4A[5]
GTP_DUAL:PMA_COM_CFG[30]
GTP_DUAL:DRP4A[4]
GTP_DUAL:PMA_COM_CFG[29]
19 ------------------------------GTP_DUAL:DRP4A[6]
GTP_DUAL:PMA_COM_CFG[31]
GTP_DUAL:DRP4A[7]
GTP_DUAL:PMA_COM_CFG[20]
20 ------------------------------GTP_DUAL:DRP4A[9]
GTP_DUAL:PLL_TXDIVSEL_COMM_OUT[0]
GTP_DUAL:DRP4A[8]
GTP_DUAL:PLL_TXDIVSEL_COMM_OUT[1]
21 ------------------------------GTP_DUAL:DRP4A[10]
GTP_DUAL:PLL_STARTUP_EN
GTP_DUAL:DRP4A[11]
22 ------------------------------GTP_DUAL:DRP4A[13]
GTP_DUAL:TX_DIFF_BOOST_0
GTP_DUAL:DRP4A[12]
23 ------------------------------GTP_DUAL:DRP4A[14]
GTP_DUAL:PMA_COM_CFG[88]
GTP_DUAL:DRP4A[15]
GTP_DUAL:PMA_COM_CFG[87]
24 ------------------------------GTP_DUAL:DRP4B[1]GTP_DUAL:DRP4B[0]
GTP_DUAL:PMA_COM_CFG[89]
25 ------------------------------GTP_DUAL:DRP4B[2]GTP_DUAL:DRP4B[3]
26 ------------------------------GTP_DUAL:DRP4B[5]GTP_DUAL:DRP4B[4]
27 ------------------------------GTP_DUAL:DRP4B[6]GTP_DUAL:DRP4B[7]
28 ------------------------------GTP_DUAL:DRP4B[9]GTP_DUAL:DRP4B[8]
29 ------------------------------GTP_DUAL:DRP4B[10]GTP_DUAL:DRP4B[11]
30 ------------------------------GTP_DUAL:DRP4B[13]GTP_DUAL:DRP4B[12]
31 ------------------------------GTP_DUAL:DRP4B[14]GTP_DUAL:DRP4B[15]
32 ------------------------------GTP_DUAL:DRP4C[1]GTP_DUAL:DRP4C[0]
33 ------------------------------GTP_DUAL:DRP4C[2]GTP_DUAL:DRP4C[3]
34 ------------------------------GTP_DUAL:DRP4C[5]GTP_DUAL:DRP4C[4]
35 ------------------------------GTP_DUAL:DRP4C[6]GTP_DUAL:DRP4C[7]
36 ------------------------------GTP_DUAL:DRP4C[9]GTP_DUAL:DRP4C[8]
37 ------------------------------GTP_DUAL:DRP4C[10]GTP_DUAL:DRP4C[11]
38 ------------------------------GTP_DUAL:DRP4C[13]GTP_DUAL:DRP4C[12]
39 ------------------------------GTP_DUAL:DRP4C[14]GTP_DUAL:DRP4C[15]
40 ------------------------------GTP_DUAL:DRP4D[1]GTP_DUAL:DRP4D[0]
41 ------------------------------GTP_DUAL:DRP4D[2]GTP_DUAL:DRP4D[3]
42 ------------------------------GTP_DUAL:DRP4D[5]GTP_DUAL:DRP4D[4]
43 ------------------------------GTP_DUAL:DRP4D[6]GTP_DUAL:DRP4D[7]
44 ------------------------------GTP_DUAL:DRP4D[9]GTP_DUAL:DRP4D[8]
45 ------------------------------GTP_DUAL:DRP4D[10]GTP_DUAL:DRP4D[11]
46 ------------------------------GTP_DUAL:DRP4D[13]GTP_DUAL:DRP4D[12]
47 ------------------------------GTP_DUAL:DRP4D[14]GTP_DUAL:DRP4D[15]
48 ------------------------------GTP_DUAL:DRP4E[1]GTP_DUAL:DRP4E[0]
49 ------------------------------GTP_DUAL:DRP4E[2]GTP_DUAL:DRP4E[3]
50 ------------------------------GTP_DUAL:DRP4E[5]GTP_DUAL:DRP4E[4]
51 ------------------------------GTP_DUAL:DRP4E[6]GTP_DUAL:DRP4E[7]
52 ------------------------------GTP_DUAL:DRP4E[9]GTP_DUAL:DRP4E[8]
53 ------------------------------GTP_DUAL:DRP4E[10]GTP_DUAL:DRP4E[11]
54 ------------------------------GTP_DUAL:DRP4E[13]GTP_DUAL:DRP4E[12]
55 ------------------------------GTP_DUAL:DRP4E[14]GTP_DUAL:DRP4E[15]
56 ------------------------------GTP_DUAL:DRP4F[1]GTP_DUAL:DRP4F[0]
57 ------------------------------GTP_DUAL:DRP4F[2]GTP_DUAL:DRP4F[3]
58 ------------------------------GTP_DUAL:DRP4F[5]GTP_DUAL:DRP4F[4]
59 ------------------------------GTP_DUAL:DRP4F[6]GTP_DUAL:DRP4F[7]
60 ------------------------------GTP_DUAL:DRP4F[9]GTP_DUAL:DRP4F[8]
61 ------------------------------GTP_DUAL:DRP4F[10]GTP_DUAL:DRP4F[11]
62 ------------------------------GTP_DUAL:DRP4F[13]GTP_DUAL:DRP4F[12]
63 ------------------------------GTP_DUAL:DRP4F[14]GTP_DUAL:DRP4F[15]
GTP bittile 15
RowColumn
GTP bittile 16
RowColumn
01234567891011121314151617181920212223242526272829
0 ------------------------------
1 ------------------------------
2 ------------------------------
3 ------------------------------
4 ------------------------------
5 ------------------------------
6 ------------------------------
7 ------------------------------
8 ------------------------------
9 ------------------------------
10 ------------------------------
11 ------------------------------
12 ------------------------------
13 ------------------------------
14 ------------------------------
15 ------------------------------
16 ------------------------------
17 ------------------------------
18 ------------------------------
19 ------------------------------
20 ------------------------------
21 ------------------------------
22 ------------------------------
23 ------------------------------
24 ------------------------------
25 ------------------------------
26 ------------------------------
27 ------------------------------
28 ------------------------------
29 ------------------------------
30 ------------------------------
31 ------------------------------
32 ------------------------------
33 ------------------------------
34 ------------------------------
35 ------------------------------
36 ------------------------------
37 ------------------------------
38 ------------------------------
39 -----------------------------CRC32_3:CRC_INIT[0]
40 ------------------------------
41 -----------------------------CRC32_3:CRC_INIT[1]
42 ------------------------------
43 -----------------------------CRC32_3:CRC_INIT[2]
44 ------------------------------
45 -----------------------------CRC32_3:CRC_INIT[3]
46 ------------------------------
47 -----------------------------CRC32_3:CRC_INIT[4]
48 ------------------------------
49 -----------------------------CRC32_3:CRC_INIT[5]
50 ------------------------------
51 -----------------------------CRC32_3:CRC_INIT[6]
52 ------------------------------
53 -----------------------------CRC32_3:CRC_INIT[7]
54 ------------------------------
55 -----------------------------CRC32_3:CRC_INIT[8]
56 ------------------------------
57 ------------------------------
58 -----------------------------CRC32_3:CRC_INIT[9]
59 ------------------------------
60 -----------------------------CRC32_3:CRC_INIT[10]
61 ------------------------------
62 -----------------------------CRC32_3:CRC_INIT[11]
GTP bittile 17
RowColumn
01234567891011121314151617181920212223242526272829
0 -----------------------------CRC32_3:CRC_INIT[12]
1 ------------------------------
2 -----------------------------CRC32_3:CRC_INIT[13]
3 ------------------------------
4 -----------------------------CRC32_3:CRC_INIT[14]
5 ------------------------------
6 -----------------------------CRC32_3:CRC_INIT[15]
7 ------------------------------
8 ----------------------------CRC32_3:CRC_INIT[16]-
9 ------------------------------
10 ----------------------------CRC32_3:CRC_INIT[17]-
11 ------------------------------
12 ----------------------------CRC32_3:CRC_INIT[18]-
13 ------------------------------
14 ----------------------------CRC32_3:CRC_INIT[19]-
15 ------------------------------
16 ----------------------------CRC32_3:CRC_INIT[20]-
17 ------------------------------
18 ----------------------------CRC32_3:CRC_INIT[21]-
19 ------------------------------
20 ----------------------------CRC32_3:CRC_INIT[22]-
21 ------------------------------
22 ----------------------------CRC32_3:CRC_INIT[23]-
23 ------------------------------
24 ----------------------------CRC32_3:CRC_INIT[24]-
25 ------------------------------
26 ------------------------------
27 ----------------------------CRC32_3:CRC_INIT[25]-
28 ----------------------------CRC32_3:CRC_INIT[26]-
29 ------------------------------
30 ------------------------------
31 ----------------------------CRC32_3:CRC_INIT[27]-
32 ------------------------------
33 ----------------------------CRC32_3:CRC_INIT[28]-
34 ------------------------------
35 ----------------------------CRC32_3:CRC_INIT[29]-
36 ------------------------------
37 ----------------------------CRC32_3:CRC_INIT[30]-
38 ------------------------------
39 ----------------------------CRC32_3:CRC_INIT[31]-
40 ------------------------------
41 -----------------------------CRC32_3:ENABLE64
GTP bittile 18
RowColumn
GTP bittile 19
RowColumn
GTP bittile 20
RowColumn
012345678910111213141516171819202122232425262728
0 -----------------------------
1 -----------------------------
2 -----------------------------
3 -----------------------------
4 -----------------------------
5 -----------------------------
6 -----------------------------
7 -----------------------------
8 -----------------------------
9 -----------------------------
10 -----------------------------
11 -----------------------------
12 ------------------GTP_DUAL:USRCLK1~CRC32_1:INV.CRCCLKGTP_DUAL:INV.TXUSRCLK21GTP_DUAL:INV.RXUSRCLK21GTP_DUAL:INV.RXUSRCLK0GTP_DUAL:INV.TXUSRCLK0----GTP_DUAL:ENABLE
13 ------------------~CRC32_3:INV.CRCCLKGTP_DUAL:INV.DCLKGTP_DUAL:INV.TXUSRCLK1GTP_DUAL:INV.RXUSRCLK1GTP_DUAL:INV.RXUSRCLK20GTP_DUAL:INV.TXUSRCLK20-----
14 ------------------~CRC32_2:INV.CRCCLK----------
15 -----------------GTP_DUAL:USRCLK0~CRC32_0:INV.CRCCLK----------
CRC32_0:ENABLE64[2, 29, 22]
CRC32_3:ENABLE64[17, 29, 41]
GTP_DUAL:AC_CAP_DIS_0[14, 30, 15]
GTP_DUAL:AC_CAP_DIS_1[5, 30, 48]
GTP_DUAL:CHAN_BOND_SEQ_2_USE_0[12, 30, 14]
GTP_DUAL:CHAN_BOND_SEQ_2_USE_1[7, 30, 49]
GTP_DUAL:CLKINDC_B[5, 31, 33]
GTP_DUAL:CLK_CORRECT_USE_0[12, 31, 3]
GTP_DUAL:CLK_CORRECT_USE_1[7, 31, 60]
GTP_DUAL:CLK_COR_INSERT_IDLE_FLAG_0[12, 30, 11]
GTP_DUAL:CLK_COR_INSERT_IDLE_FLAG_1[7, 30, 52]
GTP_DUAL:CLK_COR_KEEP_IDLE_0[12, 30, 10]
GTP_DUAL:CLK_COR_KEEP_IDLE_1[7, 30, 53]
GTP_DUAL:CLK_COR_PRECEDENCE_0[12, 31, 4]
GTP_DUAL:CLK_COR_PRECEDENCE_1[7, 31, 59]
GTP_DUAL:CLK_COR_SEQ_2_USE_0[11, 30, 20]
GTP_DUAL:CLK_COR_SEQ_2_USE_1[8, 30, 43]
GTP_DUAL:COMMA_DOUBLE_0[11, 30, 13]
GTP_DUAL:COMMA_DOUBLE_1[8, 30, 50]
GTP_DUAL:DEC_MCOMMA_DETECT_0[11, 30, 12]
GTP_DUAL:DEC_MCOMMA_DETECT_1[8, 30, 51]
GTP_DUAL:DEC_PCOMMA_DETECT_0[11, 31, 12]
GTP_DUAL:DEC_PCOMMA_DETECT_1[8, 31, 51]
GTP_DUAL:DEC_VALID_COMMA_ONLY_0[11, 31, 11]
GTP_DUAL:DEC_VALID_COMMA_ONLY_1[8, 31, 52]
GTP_DUAL:ENABLE[20, 28, 12]
GTP_DUAL:INV.DCLK[20, 19, 13]
GTP_DUAL:INV.RXUSRCLK0[20, 22, 12]
GTP_DUAL:INV.RXUSRCLK1[20, 21, 13]
GTP_DUAL:INV.RXUSRCLK20[20, 22, 13]
GTP_DUAL:INV.RXUSRCLK21[20, 21, 12]
GTP_DUAL:INV.TXUSRCLK0[20, 23, 12]
GTP_DUAL:INV.TXUSRCLK1[20, 20, 13]
GTP_DUAL:INV.TXUSRCLK20[20, 23, 13]
GTP_DUAL:INV.TXUSRCLK21[20, 20, 12]
GTP_DUAL:MCOMMA_DETECT_0[11, 31, 6]
GTP_DUAL:MCOMMA_DETECT_1[8, 31, 57]
GTP_DUAL:OVERSAMPLE_MODE[9, 31, 55]
GTP_DUAL:PCI_EXPRESS_MODE_0[13, 31, 55]
GTP_DUAL:PCI_EXPRESS_MODE_1[6, 31, 8]
GTP_DUAL:PCOMMA_DETECT_0[13, 31, 50]
GTP_DUAL:PCOMMA_DETECT_1[6, 31, 13]
GTP_DUAL:PLL_SATA_0[13, 30, 48]
GTP_DUAL:PLL_SATA_1[6, 30, 15]
GTP_DUAL:PLL_STARTUP_EN[14, 30, 21]
GTP_DUAL:RCV_TERM_GND_0[14, 31, 16]
GTP_DUAL:RCV_TERM_GND_1[5, 31, 47]
GTP_DUAL:RCV_TERM_MID_0[14, 31, 15]
GTP_DUAL:RCV_TERM_MID_1[5, 31, 48]
GTP_DUAL:RCV_TERM_VTTRX_0[14, 30, 16]
GTP_DUAL:RCV_TERM_VTTRX_1[5, 30, 47]
GTP_DUAL:RX_BUFFER_USE_0[13, 31, 17]
GTP_DUAL:RX_BUFFER_USE_1[6, 31, 46]
GTP_DUAL:RX_CDR_FORCE_ROTATE_0[14, 30, 7]
GTP_DUAL:RX_CDR_FORCE_ROTATE_1[5, 30, 56]
GTP_DUAL:RX_DECODE_SEQ_MATCH_0[13, 30, 17]
GTP_DUAL:RX_DECODE_SEQ_MATCH_1[6, 30, 46]
GTP_DUAL:RX_LOSS_OF_SYNC_FSM_0[13, 30, 15]
GTP_DUAL:RX_LOSS_OF_SYNC_FSM_1[6, 30, 48]
GTP_DUAL:SYS_CLK_EN[5, 30, 42]
GTP_DUAL:TERMINATION_OVRD[10, 30, 11]
GTP_DUAL:TXOUTCLK_SEL_0[12, 31, 19]
GTP_DUAL:TXOUTCLK_SEL_1[7, 31, 44]
GTP_DUAL:TX_BUFFER_USE_0[12, 31, 30]
GTP_DUAL:TX_BUFFER_USE_1[7, 31, 33]
GTP_DUAL:TX_DIFF_BOOST_0[14, 30, 22]
GTP_DUAL:TX_DIFF_BOOST_1[5, 30, 41]
GTP_DUAL:TX_SYNC_FILTERB[9, 30, 38]
GTP_DUAL:USRCLK0[20, 17, 15]
GTP_DUAL:USRCLK1[20, 18, 12]
Non-inverted[0]
CRC32_0:CRC_INIT[2, 28, 24][2, 28, 26][2, 28, 28][2, 28, 30][2, 28, 32][2, 28, 35][2, 28, 36][2, 28, 39][2, 28, 41][2, 28, 43][2, 28, 45][2, 28, 47][2, 28, 49][2, 28, 51][2, 28, 53][2, 28, 55][2, 29, 57][2, 29, 59][2, 29, 61][2, 29, 63][3, 29, 1][3, 29, 3][3, 29, 5][3, 29, 8][3, 29, 10][3, 29, 12][3, 29, 14][3, 29, 16][3, 29, 18][3, 29, 20][3, 29, 22][3, 29, 24]
CRC32_1:CRC_INIT[8, 28, 60][8, 29, 61][8, 28, 62][8, 29, 63][9, 28, 0][9, 29, 1][9, 28, 3][9, 29, 3][9, 28, 4][9, 29, 6][9, 28, 6][9, 29, 7][9, 28, 8][9, 28, 9][9, 29, 10][9, 28, 11][9, 29, 12][9, 28, 12][9, 29, 13][9, 28, 14][9, 29, 15][9, 28, 17][9, 29, 18][9, 28, 19][9, 29, 20][9, 28, 21][9, 29, 22][9, 28, 23][9, 29, 24][9, 28, 25][9, 29, 26][9, 29, 27]
CRC32_2:CRC_INIT[11, 28, 3][11, 29, 2][11, 28, 1][11, 29, 0][10, 28, 63][10, 29, 62][10, 28, 60][10, 29, 60][10, 28, 59][10, 29, 57][10, 28, 57][10, 29, 56][10, 28, 55][10, 28, 54][10, 29, 53][10, 28, 52][10, 29, 51][10, 28, 51][10, 29, 50][10, 28, 49][10, 29, 48][10, 28, 46][10, 29, 45][10, 28, 44][10, 29, 43][10, 28, 42][10, 29, 41][10, 28, 40][10, 29, 39][10, 28, 38][10, 29, 37][10, 29, 36]
CRC32_3:CRC_INIT[17, 28, 39][17, 28, 37][17, 28, 35][17, 28, 33][17, 28, 31][17, 28, 28][17, 28, 27][17, 28, 24][17, 28, 22][17, 28, 20][17, 28, 18][17, 28, 16][17, 28, 14][17, 28, 12][17, 28, 10][17, 28, 8][17, 29, 6][17, 29, 4][17, 29, 2][17, 29, 0][16, 29, 62][16, 29, 60][16, 29, 58][16, 29, 55][16, 29, 53][16, 29, 51][16, 29, 49][16, 29, 47][16, 29, 45][16, 29, 43][16, 29, 41][16, 29, 39]
GTP_DUAL:PRBS_ERR_THRESHOLD_0[13, 31, 33][13, 30, 33][13, 30, 32][13, 31, 32][13, 31, 31][13, 30, 31][13, 30, 30][13, 31, 30][13, 31, 29][13, 30, 29][13, 30, 28][13, 31, 28][13, 31, 27][13, 30, 27][13, 30, 26][13, 31, 26][13, 31, 25][13, 30, 25][13, 30, 24][13, 31, 24][13, 31, 23][13, 30, 23][13, 30, 22][13, 31, 22][13, 31, 21][13, 30, 21][13, 30, 20][13, 31, 20][13, 31, 19][13, 30, 19][13, 30, 18][13, 31, 18]
GTP_DUAL:PRBS_ERR_THRESHOLD_1[6, 31, 30][6, 30, 30][6, 30, 31][6, 31, 31][6, 31, 32][6, 30, 32][6, 30, 33][6, 31, 33][6, 31, 34][6, 30, 34][6, 30, 35][6, 31, 35][6, 31, 36][6, 30, 36][6, 30, 37][6, 31, 37][6, 31, 38][6, 30, 38][6, 30, 39][6, 31, 39][6, 31, 40][6, 30, 40][6, 30, 41][6, 31, 41][6, 31, 42][6, 30, 42][6, 30, 43][6, 31, 43][6, 31, 44][6, 30, 44][6, 30, 45][6, 31, 45]
Non-inverted[31][30][29][28][27][26][25][24][23][22][21][20][19][18][17][16][15][14][13][12][11][10][9][8][7][6][5][4][3][2][1][0]
GTP_DUAL:MUX.CLKIN[5, 31, 34][5, 30, 34][5, 30, 35]
GREFCLK000
CLKOUT_SOUTH_N001
CLKPN011
CLKOUT_NORTH_S101
GTP_DUAL:PLL_DIVSEL_REF[5, 31, 38][5, 31, 37][5, 30, 37][5, 30, 36][5, 30, 38]
200000
100001
300010
400100
500110
601010
801100
1001110
1211010
1611100
2011110
GTP_DUAL:CHAN_BOND_LEVEL_0[10, 30, 34][10, 30, 35][10, 31, 35]
GTP_DUAL:CHAN_BOND_LEVEL_1[9, 30, 29][9, 30, 28][9, 31, 28]
GTP_DUAL:OOBDETECT_THRESHOLD_0[12, 30, 18][12, 31, 18][12, 31, 17]
GTP_DUAL:OOBDETECT_THRESHOLD_1[7, 30, 45][7, 31, 45][7, 31, 46]
GTP_DUAL:PLLLKDET_CFG[5, 31, 39][5, 31, 40][5, 30, 40]
GTP_DUAL:SATA_BURST_VAL_0[13, 31, 11][13, 30, 11][13, 30, 10]
GTP_DUAL:SATA_BURST_VAL_1[6, 31, 52][6, 30, 52][6, 30, 53]
GTP_DUAL:SATA_IDLE_VAL_0[13, 31, 10][13, 31, 9][13, 30, 9]
GTP_DUAL:SATA_IDLE_VAL_1[6, 31, 53][6, 31, 54][6, 30, 54]
Non-inverted[2][1][0]
GTP_DUAL:PMA_RX_CFG_0[14, 31, 14][14, 30, 4][14, 31, 12][14, 31, 11][14, 30, 11][14, 30, 10][14, 31, 10][14, 31, 9][14, 30, 9][14, 30, 8][14, 31, 8][5, 31, 56][14, 30, 14][5, 30, 51][14, 31, 4][14, 31, 3][14, 30, 3][14, 30, 2][14, 31, 2][14, 30, 6][14, 31, 6][14, 31, 5][14, 30, 5][14, 31, 13][14, 30, 13]
GTP_DUAL:PMA_RX_CFG_1[5, 31, 49][5, 30, 59][5, 31, 51][5, 31, 52][5, 30, 52][5, 30, 53][5, 31, 53][5, 31, 54][5, 30, 54][5, 30, 55][5, 31, 55][14, 31, 7][5, 30, 49][14, 30, 12][5, 31, 59][5, 31, 60][5, 30, 60][5, 30, 61][5, 31, 61][5, 30, 57][5, 31, 57][5, 31, 58][5, 30, 58][5, 31, 50][5, 30, 50]
Non-inverted[24][23][22][21][20][19][18][17][16][15][14][13][12][11][10][9][8][7][6][5][4][3][2][1][0]
GTP_DUAL:DRP00[5, 31, 7][5, 30, 7][5, 30, 6][5, 31, 6][5, 31, 5][5, 30, 5][5, 30, 4][5, 31, 4][5, 31, 3][5, 30, 3][5, 30, 2][5, 31, 2][5, 31, 1][5, 30, 1][5, 30, 0][5, 31, 0]
GTP_DUAL:DRP01[5, 31, 15][5, 30, 15][5, 30, 14][5, 31, 14][5, 31, 13][5, 30, 13][5, 30, 12][5, 31, 12][5, 31, 11][5, 30, 11][5, 30, 10][5, 31, 10][5, 31, 9][5, 30, 9][5, 30, 8][5, 31, 8]
GTP_DUAL:DRP02[5, 31, 23][5, 30, 23][5, 30, 22][5, 31, 22][5, 31, 21][5, 30, 21][5, 30, 20][5, 31, 20][5, 31, 19][5, 30, 19][5, 30, 18][5, 31, 18][5, 31, 17][5, 30, 17][5, 30, 16][5, 31, 16]
GTP_DUAL:DRP03[5, 31, 31][5, 30, 31][5, 30, 30][5, 31, 30][5, 31, 29][5, 30, 29][5, 30, 28][5, 31, 28][5, 31, 27][5, 30, 27][5, 30, 26][5, 31, 26][5, 31, 25][5, 30, 25][5, 30, 24][5, 31, 24]
GTP_DUAL:DRP04[5, 31, 39][5, 30, 39][5, 30, 38][5, 31, 38][5, 31, 37][5, 30, 37][5, 30, 36][5, 31, 36][5, 31, 35][5, 30, 35][5, 30, 34][5, 31, 34][5, 31, 33][5, 30, 33][5, 30, 32][5, 31, 32]
GTP_DUAL:DRP05[5, 31, 47][5, 30, 47][5, 30, 46][5, 31, 46][5, 31, 45][5, 30, 45][5, 30, 44][5, 31, 44][5, 31, 43][5, 30, 43][5, 30, 42][5, 31, 42][5, 31, 41][5, 30, 41][5, 30, 40][5, 31, 40]
GTP_DUAL:DRP06[5, 31, 55][5, 30, 55][5, 30, 54][5, 31, 54][5, 31, 53][5, 30, 53][5, 30, 52][5, 31, 52][5, 31, 51][5, 30, 51][5, 30, 50][5, 31, 50][5, 31, 49][5, 30, 49][5, 30, 48][5, 31, 48]
GTP_DUAL:DRP07[5, 31, 63][5, 30, 63][5, 30, 62][5, 31, 62][5, 31, 61][5, 30, 61][5, 30, 60][5, 31, 60][5, 31, 59][5, 30, 59][5, 30, 58][5, 31, 58][5, 31, 57][5, 30, 57][5, 30, 56][5, 31, 56]
GTP_DUAL:DRP08[6, 31, 7][6, 30, 7][6, 30, 6][6, 31, 6][6, 31, 5][6, 30, 5][6, 30, 4][6, 31, 4][6, 31, 3][6, 30, 3][6, 30, 2][6, 31, 2][6, 31, 1][6, 30, 1][6, 30, 0][6, 31, 0]
GTP_DUAL:DRP09[6, 31, 15][6, 30, 15][6, 30, 14][6, 31, 14][6, 31, 13][6, 30, 13][6, 30, 12][6, 31, 12][6, 31, 11][6, 30, 11][6, 30, 10][6, 31, 10][6, 31, 9][6, 30, 9][6, 30, 8][6, 31, 8]
GTP_DUAL:DRP0A[6, 31, 23][6, 30, 23][6, 30, 22][6, 31, 22][6, 31, 21][6, 30, 21][6, 30, 20][6, 31, 20][6, 31, 19][6, 30, 19][6, 30, 18][6, 31, 18][6, 31, 17][6, 30, 17][6, 30, 16][6, 31, 16]
GTP_DUAL:DRP0B[6, 31, 31][6, 30, 31][6, 30, 30][6, 31, 30][6, 31, 29][6, 30, 29][6, 30, 28][6, 31, 28][6, 31, 27][6, 30, 27][6, 30, 26][6, 31, 26][6, 31, 25][6, 30, 25][6, 30, 24][6, 31, 24]
GTP_DUAL:DRP0C[6, 31, 39][6, 30, 39][6, 30, 38][6, 31, 38][6, 31, 37][6, 30, 37][6, 30, 36][6, 31, 36][6, 31, 35][6, 30, 35][6, 30, 34][6, 31, 34][6, 31, 33][6, 30, 33][6, 30, 32][6, 31, 32]
GTP_DUAL:DRP0D[6, 31, 47][6, 30, 47][6, 30, 46][6, 31, 46][6, 31, 45][6, 30, 45][6, 30, 44][6, 31, 44][6, 31, 43][6, 30, 43][6, 30, 42][6, 31, 42][6, 31, 41][6, 30, 41][6, 30, 40][6, 31, 40]
GTP_DUAL:DRP0E[6, 31, 55][6, 30, 55][6, 30, 54][6, 31, 54][6, 31, 53][6, 30, 53][6, 30, 52][6, 31, 52][6, 31, 51][6, 30, 51][6, 30, 50][6, 31, 50][6, 31, 49][6, 30, 49][6, 30, 48][6, 31, 48]
GTP_DUAL:DRP0F[6, 31, 63][6, 30, 63][6, 30, 62][6, 31, 62][6, 31, 61][6, 30, 61][6, 30, 60][6, 31, 60][6, 31, 59][6, 30, 59][6, 30, 58][6, 31, 58][6, 31, 57][6, 30, 57][6, 30, 56][6, 31, 56]
GTP_DUAL:DRP10[7, 31, 7][7, 30, 7][7, 30, 6][7, 31, 6][7, 31, 5][7, 30, 5][7, 30, 4][7, 31, 4][7, 31, 3][7, 30, 3][7, 30, 2][7, 31, 2][7, 31, 1][7, 30, 1][7, 30, 0][7, 31, 0]
GTP_DUAL:DRP11[7, 31, 15][7, 30, 15][7, 30, 14][7, 31, 14][7, 31, 13][7, 30, 13][7, 30, 12][7, 31, 12][7, 31, 11][7, 30, 11][7, 30, 10][7, 31, 10][7, 31, 9][7, 30, 9][7, 30, 8][7, 31, 8]
GTP_DUAL:DRP12[7, 31, 23][7, 30, 23][7, 30, 22][7, 31, 22][7, 31, 21][7, 30, 21][7, 30, 20][7, 31, 20][7, 31, 19][7, 30, 19][7, 30, 18][7, 31, 18][7, 31, 17][7, 30, 17][7, 30, 16][7, 31, 16]
GTP_DUAL:DRP13[7, 31, 31][7, 30, 31][7, 30, 30][7, 31, 30][7, 31, 29][7, 30, 29][7, 30, 28][7, 31, 28][7, 31, 27][7, 30, 27][7, 30, 26][7, 31, 26][7, 31, 25][7, 30, 25][7, 30, 24][7, 31, 24]
GTP_DUAL:DRP14[7, 31, 39][7, 30, 39][7, 30, 38][7, 31, 38][7, 31, 37][7, 30, 37][7, 30, 36][7, 31, 36][7, 31, 35][7, 30, 35][7, 30, 34][7, 31, 34][7, 31, 33][7, 30, 33][7, 30, 32][7, 31, 32]
GTP_DUAL:DRP15[7, 31, 47][7, 30, 47][7, 30, 46][7, 31, 46][7, 31, 45][7, 30, 45][7, 30, 44][7, 31, 44][7, 31, 43][7, 30, 43][7, 30, 42][7, 31, 42][7, 31, 41][7, 30, 41][7, 30, 40][7, 31, 40]
GTP_DUAL:DRP16[7, 31, 55][7, 30, 55][7, 30, 54][7, 31, 54][7, 31, 53][7, 30, 53][7, 30, 52][7, 31, 52][7, 31, 51][7, 30, 51][7, 30, 50][7, 31, 50][7, 31, 49][7, 30, 49][7, 30, 48][7, 31, 48]
GTP_DUAL:DRP17[7, 31, 63][7, 30, 63][7, 30, 62][7, 31, 62][7, 31, 61][7, 30, 61][7, 30, 60][7, 31, 60][7, 31, 59][7, 30, 59][7, 30, 58][7, 31, 58][7, 31, 57][7, 30, 57][7, 30, 56][7, 31, 56]
GTP_DUAL:DRP18[8, 31, 7][8, 30, 7][8, 30, 6][8, 31, 6][8, 31, 5][8, 30, 5][8, 30, 4][8, 31, 4][8, 31, 3][8, 30, 3][8, 30, 2][8, 31, 2][8, 31, 1][8, 30, 1][8, 30, 0][8, 31, 0]
GTP_DUAL:DRP19[8, 31, 15][8, 30, 15][8, 30, 14][8, 31, 14][8, 31, 13][8, 30, 13][8, 30, 12][8, 31, 12][8, 31, 11][8, 30, 11][8, 30, 10][8, 31, 10][8, 31, 9][8, 30, 9][8, 30, 8][8, 31, 8]
GTP_DUAL:DRP1A[8, 31, 23][8, 30, 23][8, 30, 22][8, 31, 22][8, 31, 21][8, 30, 21][8, 30, 20][8, 31, 20][8, 31, 19][8, 30, 19][8, 30, 18][8, 31, 18][8, 31, 17][8, 30, 17][8, 30, 16][8, 31, 16]
GTP_DUAL:DRP1B[8, 31, 31][8, 30, 31][8, 30, 30][8, 31, 30][8, 31, 29][8, 30, 29][8, 30, 28][8, 31, 28][8, 31, 27][8, 30, 27][8, 30, 26][8, 31, 26][8, 31, 25][8, 30, 25][8, 30, 24][8, 31, 24]
GTP_DUAL:DRP1C[8, 31, 39][8, 30, 39][8, 30, 38][8, 31, 38][8, 31, 37][8, 30, 37][8, 30, 36][8, 31, 36][8, 31, 35][8, 30, 35][8, 30, 34][8, 31, 34][8, 31, 33][8, 30, 33][8, 30, 32][8, 31, 32]
GTP_DUAL:DRP1D[8, 31, 47][8, 30, 47][8, 30, 46][8, 31, 46][8, 31, 45][8, 30, 45][8, 30, 44][8, 31, 44][8, 31, 43][8, 30, 43][8, 30, 42][8, 31, 42][8, 31, 41][8, 30, 41][8, 30, 40][8, 31, 40]
GTP_DUAL:DRP1E[8, 31, 55][8, 30, 55][8, 30, 54][8, 31, 54][8, 31, 53][8, 30, 53][8, 30, 52][8, 31, 52][8, 31, 51][8, 30, 51][8, 30, 50][8, 31, 50][8, 31, 49][8, 30, 49][8, 30, 48][8, 31, 48]
GTP_DUAL:DRP1F[8, 31, 63][8, 30, 63][8, 30, 62][8, 31, 62][8, 31, 61][8, 30, 61][8, 30, 60][8, 31, 60][8, 31, 59][8, 30, 59][8, 30, 58][8, 31, 58][8, 31, 57][8, 30, 57][8, 30, 56][8, 31, 56]
GTP_DUAL:DRP20[9, 31, 7][9, 30, 7][9, 30, 6][9, 31, 6][9, 31, 5][9, 30, 5][9, 30, 4][9, 31, 4][9, 31, 3][9, 30, 3][9, 30, 2][9, 31, 2][9, 31, 1][9, 30, 1][9, 30, 0][9, 31, 0]
GTP_DUAL:DRP21[9, 31, 15][9, 30, 15][9, 30, 14][9, 31, 14][9, 31, 13][9, 30, 13][9, 30, 12][9, 31, 12][9, 31, 11][9, 30, 11][9, 30, 10][9, 31, 10][9, 31, 9][9, 30, 9][9, 30, 8][9, 31, 8]
GTP_DUAL:DRP22[9, 31, 23][9, 30, 23][9, 30, 22][9, 31, 22][9, 31, 21][9, 30, 21][9, 30, 20][9, 31, 20][9, 31, 19][9, 30, 19][9, 30, 18][9, 31, 18][9, 31, 17][9, 30, 17][9, 30, 16][9, 31, 16]
GTP_DUAL:DRP23[9, 31, 31][9, 30, 31][9, 30, 30][9, 31, 30][9, 31, 29][9, 30, 29][9, 30, 28][9, 31, 28][9, 31, 27][9, 30, 27][9, 30, 26][9, 31, 26][9, 31, 25][9, 30, 25][9, 30, 24][9, 31, 24]
GTP_DUAL:DRP24[9, 31, 39][9, 30, 39][9, 30, 38][9, 31, 38][9, 31, 37][9, 30, 37][9, 30, 36][9, 31, 36][9, 31, 35][9, 30, 35][9, 30, 34][9, 31, 34][9, 31, 33][9, 30, 33][9, 30, 32][9, 31, 32]
GTP_DUAL:DRP25[9, 31, 47][9, 30, 47][9, 30, 46][9, 31, 46][9, 31, 45][9, 30, 45][9, 30, 44][9, 31, 44][9, 31, 43][9, 30, 43][9, 30, 42][9, 31, 42][9, 31, 41][9, 30, 41][9, 30, 40][9, 31, 40]
GTP_DUAL:DRP26[9, 31, 55][9, 30, 55][9, 30, 54][9, 31, 54][9, 31, 53][9, 30, 53][9, 30, 52][9, 31, 52][9, 31, 51][9, 30, 51][9, 30, 50][9, 31, 50][9, 31, 49][9, 30, 49][9, 30, 48][9, 31, 48]
GTP_DUAL:DRP27[9, 31, 63][9, 30, 63][9, 30, 62][9, 31, 62][9, 31, 61][9, 30, 61][9, 30, 60][9, 31, 60][9, 31, 59][9, 30, 59][9, 30, 58][9, 31, 58][9, 31, 57][9, 30, 57][9, 30, 56][9, 31, 56]
GTP_DUAL:DRP28[10, 31, 7][10, 30, 7][10, 30, 6][10, 31, 6][10, 31, 5][10, 30, 5][10, 30, 4][10, 31, 4][10, 31, 3][10, 30, 3][10, 30, 2][10, 31, 2][10, 31, 1][10, 30, 1][10, 30, 0][10, 31, 0]
GTP_DUAL:DRP29[10, 31, 15][10, 30, 15][10, 30, 14][10, 31, 14][10, 31, 13][10, 30, 13][10, 30, 12][10, 31, 12][10, 31, 11][10, 30, 11][10, 30, 10][10, 31, 10][10, 31, 9][10, 30, 9][10, 30, 8][10, 31, 8]
GTP_DUAL:DRP2A[10, 31, 23][10, 30, 23][10, 30, 22][10, 31, 22][10, 31, 21][10, 30, 21][10, 30, 20][10, 31, 20][10, 31, 19][10, 30, 19][10, 30, 18][10, 31, 18][10, 31, 17][10, 30, 17][10, 30, 16][10, 31, 16]
GTP_DUAL:DRP2B[10, 31, 31][10, 30, 31][10, 30, 30][10, 31, 30][10, 31, 29][10, 30, 29][10, 30, 28][10, 31, 28][10, 31, 27][10, 30, 27][10, 30, 26][10, 31, 26][10, 31, 25][10, 30, 25][10, 30, 24][10, 31, 24]
GTP_DUAL:DRP2C[10, 31, 39][10, 30, 39][10, 30, 38][10, 31, 38][10, 31, 37][10, 30, 37][10, 30, 36][10, 31, 36][10, 31, 35][10, 30, 35][10, 30, 34][10, 31, 34][10, 31, 33][10, 30, 33][10, 30, 32][10, 31, 32]
GTP_DUAL:DRP2D[10, 31, 47][10, 30, 47][10, 30, 46][10, 31, 46][10, 31, 45][10, 30, 45][10, 30, 44][10, 31, 44][10, 31, 43][10, 30, 43][10, 30, 42][10, 31, 42][10, 31, 41][10, 30, 41][10, 30, 40][10, 31, 40]
GTP_DUAL:DRP2E[10, 31, 55][10, 30, 55][10, 30, 54][10, 31, 54][10, 31, 53][10, 30, 53][10, 30, 52][10, 31, 52][10, 31, 51][10, 30, 51][10, 30, 50][10, 31, 50][10, 31, 49][10, 30, 49][10, 30, 48][10, 31, 48]
GTP_DUAL:DRP2F[10, 31, 63][10, 30, 63][10, 30, 62][10, 31, 62][10, 31, 61][10, 30, 61][10, 30, 60][10, 31, 60][10, 31, 59][10, 30, 59][10, 30, 58][10, 31, 58][10, 31, 57][10, 30, 57][10, 30, 56][10, 31, 56]
GTP_DUAL:DRP30[11, 31, 7][11, 30, 7][11, 30, 6][11, 31, 6][11, 31, 5][11, 30, 5][11, 30, 4][11, 31, 4][11, 31, 3][11, 30, 3][11, 30, 2][11, 31, 2][11, 31, 1][11, 30, 1][11, 30, 0][11, 31, 0]
GTP_DUAL:DRP31[11, 31, 15][11, 30, 15][11, 30, 14][11, 31, 14][11, 31, 13][11, 30, 13][11, 30, 12][11, 31, 12][11, 31, 11][11, 30, 11][11, 30, 10][11, 31, 10][11, 31, 9][11, 30, 9][11, 30, 8][11, 31, 8]
GTP_DUAL:DRP32[11, 31, 23][11, 30, 23][11, 30, 22][11, 31, 22][11, 31, 21][11, 30, 21][11, 30, 20][11, 31, 20][11, 31, 19][11, 30, 19][11, 30, 18][11, 31, 18][11, 31, 17][11, 30, 17][11, 30, 16][11, 31, 16]
GTP_DUAL:DRP33[11, 31, 31][11, 30, 31][11, 30, 30][11, 31, 30][11, 31, 29][11, 30, 29][11, 30, 28][11, 31, 28][11, 31, 27][11, 30, 27][11, 30, 26][11, 31, 26][11, 31, 25][11, 30, 25][11, 30, 24][11, 31, 24]
GTP_DUAL:DRP34[11, 31, 39][11, 30, 39][11, 30, 38][11, 31, 38][11, 31, 37][11, 30, 37][11, 30, 36][11, 31, 36][11, 31, 35][11, 30, 35][11, 30, 34][11, 31, 34][11, 31, 33][11, 30, 33][11, 30, 32][11, 31, 32]
GTP_DUAL:DRP35[11, 31, 47][11, 30, 47][11, 30, 46][11, 31, 46][11, 31, 45][11, 30, 45][11, 30, 44][11, 31, 44][11, 31, 43][11, 30, 43][11, 30, 42][11, 31, 42][11, 31, 41][11, 30, 41][11, 30, 40][11, 31, 40]
GTP_DUAL:DRP36[11, 31, 55][11, 30, 55][11, 30, 54][11, 31, 54][11, 31, 53][11, 30, 53][11, 30, 52][11, 31, 52][11, 31, 51][11, 30, 51][11, 30, 50][11, 31, 50][11, 31, 49][11, 30, 49][11, 30, 48][11, 31, 48]
GTP_DUAL:DRP37[11, 31, 63][11, 30, 63][11, 30, 62][11, 31, 62][11, 31, 61][11, 30, 61][11, 30, 60][11, 31, 60][11, 31, 59][11, 30, 59][11, 30, 58][11, 31, 58][11, 31, 57][11, 30, 57][11, 30, 56][11, 31, 56]
GTP_DUAL:DRP38[12, 31, 7][12, 30, 7][12, 30, 6][12, 31, 6][12, 31, 5][12, 30, 5][12, 30, 4][12, 31, 4][12, 31, 3][12, 30, 3][12, 30, 2][12, 31, 2][12, 31, 1][12, 30, 1][12, 30, 0][12, 31, 0]
GTP_DUAL:DRP39[12, 31, 15][12, 30, 15][12, 30, 14][12, 31, 14][12, 31, 13][12, 30, 13][12, 30, 12][12, 31, 12][12, 31, 11][12, 30, 11][12, 30, 10][12, 31, 10][12, 31, 9][12, 30, 9][12, 30, 8][12, 31, 8]
GTP_DUAL:DRP3A[12, 31, 23][12, 30, 23][12, 30, 22][12, 31, 22][12, 31, 21][12, 30, 21][12, 30, 20][12, 31, 20][12, 31, 19][12, 30, 19][12, 30, 18][12, 31, 18][12, 31, 17][12, 30, 17][12, 30, 16][12, 31, 16]
GTP_DUAL:DRP3B[12, 31, 31][12, 30, 31][12, 30, 30][12, 31, 30][12, 31, 29][12, 30, 29][12, 30, 28][12, 31, 28][12, 31, 27][12, 30, 27][12, 30, 26][12, 31, 26][12, 31, 25][12, 30, 25][12, 30, 24][12, 31, 24]
GTP_DUAL:DRP3C[12, 31, 39][12, 30, 39][12, 30, 38][12, 31, 38][12, 31, 37][12, 30, 37][12, 30, 36][12, 31, 36][12, 31, 35][12, 30, 35][12, 30, 34][12, 31, 34][12, 31, 33][12, 30, 33][12, 30, 32][12, 31, 32]
GTP_DUAL:DRP3D[12, 31, 47][12, 30, 47][12, 30, 46][12, 31, 46][12, 31, 45][12, 30, 45][12, 30, 44][12, 31, 44][12, 31, 43][12, 30, 43][12, 30, 42][12, 31, 42][12, 31, 41][12, 30, 41][12, 30, 40][12, 31, 40]
GTP_DUAL:DRP3E[12, 31, 55][12, 30, 55][12, 30, 54][12, 31, 54][12, 31, 53][12, 30, 53][12, 30, 52][12, 31, 52][12, 31, 51][12, 30, 51][12, 30, 50][12, 31, 50][12, 31, 49][12, 30, 49][12, 30, 48][12, 31, 48]
GTP_DUAL:DRP3F[12, 31, 63][12, 30, 63][12, 30, 62][12, 31, 62][12, 31, 61][12, 30, 61][12, 30, 60][12, 31, 60][12, 31, 59][12, 30, 59][12, 30, 58][12, 31, 58][12, 31, 57][12, 30, 57][12, 30, 56][12, 31, 56]
GTP_DUAL:DRP40[13, 31, 7][13, 30, 7][13, 30, 6][13, 31, 6][13, 31, 5][13, 30, 5][13, 30, 4][13, 31, 4][13, 31, 3][13, 30, 3][13, 30, 2][13, 31, 2][13, 31, 1][13, 30, 1][13, 30, 0][13, 31, 0]
GTP_DUAL:DRP41[13, 31, 15][13, 30, 15][13, 30, 14][13, 31, 14][13, 31, 13][13, 30, 13][13, 30, 12][13, 31, 12][13, 31, 11][13, 30, 11][13, 30, 10][13, 31, 10][13, 31, 9][13, 30, 9][13, 30, 8][13, 31, 8]
GTP_DUAL:DRP42[13, 31, 23][13, 30, 23][13, 30, 22][13, 31, 22][13, 31, 21][13, 30, 21][13, 30, 20][13, 31, 20][13, 31, 19][13, 30, 19][13, 30, 18][13, 31, 18][13, 31, 17][13, 30, 17][13, 30, 16][13, 31, 16]
GTP_DUAL:DRP43[13, 31, 31][13, 30, 31][13, 30, 30][13, 31, 30][13, 31, 29][13, 30, 29][13, 30, 28][13, 31, 28][13, 31, 27][13, 30, 27][13, 30, 26][13, 31, 26][13, 31, 25][13, 30, 25][13, 30, 24][13, 31, 24]
GTP_DUAL:DRP44[13, 31, 39][13, 30, 39][13, 30, 38][13, 31, 38][13, 31, 37][13, 30, 37][13, 30, 36][13, 31, 36][13, 31, 35][13, 30, 35][13, 30, 34][13, 31, 34][13, 31, 33][13, 30, 33][13, 30, 32][13, 31, 32]
GTP_DUAL:DRP45[13, 31, 47][13, 30, 47][13, 30, 46][13, 31, 46][13, 31, 45][13, 30, 45][13, 30, 44][13, 31, 44][13, 31, 43][13, 30, 43][13, 30, 42][13, 31, 42][13, 31, 41][13, 30, 41][13, 30, 40][13, 31, 40]
GTP_DUAL:DRP46[13, 31, 55][13, 30, 55][13, 30, 54][13, 31, 54][13, 31, 53][13, 30, 53][13, 30, 52][13, 31, 52][13, 31, 51][13, 30, 51][13, 30, 50][13, 31, 50][13, 31, 49][13, 30, 49][13, 30, 48][13, 31, 48]
GTP_DUAL:DRP47[13, 31, 63][13, 30, 63][13, 30, 62][13, 31, 62][13, 31, 61][13, 30, 61][13, 30, 60][13, 31, 60][13, 31, 59][13, 30, 59][13, 30, 58][13, 31, 58][13, 31, 57][13, 30, 57][13, 30, 56][13, 31, 56]
GTP_DUAL:DRP48[14, 31, 7][14, 30, 7][14, 30, 6][14, 31, 6][14, 31, 5][14, 30, 5][14, 30, 4][14, 31, 4][14, 31, 3][14, 30, 3][14, 30, 2][14, 31, 2][14, 31, 1][14, 30, 1][14, 30, 0][14, 31, 0]
GTP_DUAL:DRP49[14, 31, 15][14, 30, 15][14, 30, 14][14, 31, 14][14, 31, 13][14, 30, 13][14, 30, 12][14, 31, 12][14, 31, 11][14, 30, 11][14, 30, 10][14, 31, 10][14, 31, 9][14, 30, 9][14, 30, 8][14, 31, 8]
GTP_DUAL:DRP4A[14, 31, 23][14, 30, 23][14, 30, 22][14, 31, 22][14, 31, 21][14, 30, 21][14, 30, 20][14, 31, 20][14, 31, 19][14, 30, 19][14, 30, 18][14, 31, 18][14, 31, 17][14, 30, 17][14, 30, 16][14, 31, 16]
GTP_DUAL:DRP4B[14, 31, 31][14, 30, 31][14, 30, 30][14, 31, 30][14, 31, 29][14, 30, 29][14, 30, 28][14, 31, 28][14, 31, 27][14, 30, 27][14, 30, 26][14, 31, 26][14, 31, 25][14, 30, 25][14, 30, 24][14, 31, 24]
GTP_DUAL:DRP4C[14, 31, 39][14, 30, 39][14, 30, 38][14, 31, 38][14, 31, 37][14, 30, 37][14, 30, 36][14, 31, 36][14, 31, 35][14, 30, 35][14, 30, 34][14, 31, 34][14, 31, 33][14, 30, 33][14, 30, 32][14, 31, 32]
GTP_DUAL:DRP4D[14, 31, 47][14, 30, 47][14, 30, 46][14, 31, 46][14, 31, 45][14, 30, 45][14, 30, 44][14, 31, 44][14, 31, 43][14, 30, 43][14, 30, 42][14, 31, 42][14, 31, 41][14, 30, 41][14, 30, 40][14, 31, 40]
GTP_DUAL:DRP4E[14, 31, 55][14, 30, 55][14, 30, 54][14, 31, 54][14, 31, 53][14, 30, 53][14, 30, 52][14, 31, 52][14, 31, 51][14, 30, 51][14, 30, 50][14, 31, 50][14, 31, 49][14, 30, 49][14, 30, 48][14, 31, 48]
GTP_DUAL:DRP4F[14, 31, 63][14, 30, 63][14, 30, 62][14, 31, 62][14, 31, 61][14, 30, 61][14, 30, 60][14, 31, 60][14, 31, 59][14, 30, 59][14, 30, 58][14, 31, 58][14, 31, 57][14, 30, 57][14, 30, 56][14, 31, 56]
GTP_DUAL:TRANS_TIME_FROM_P2_0[12, 31, 54][12, 31, 53][12, 30, 53][12, 30, 52][12, 31, 52][12, 31, 51][12, 30, 51][12, 30, 50][12, 31, 50][12, 31, 49][12, 30, 49][12, 30, 48][12, 31, 48][12, 31, 47][12, 30, 47][12, 30, 46]
GTP_DUAL:TRANS_TIME_FROM_P2_1[7, 31, 9][7, 31, 10][7, 30, 10][7, 30, 11][7, 31, 11][7, 31, 12][7, 30, 12][7, 30, 13][7, 31, 13][7, 31, 14][7, 30, 14][7, 30, 15][7, 31, 15][7, 31, 16][7, 30, 16][7, 30, 17]
GTP_DUAL:TRANS_TIME_NON_P2_0[12, 31, 46][12, 31, 45][12, 30, 45][12, 30, 44][12, 31, 44][12, 31, 43][12, 30, 43][12, 30, 42][12, 31, 42][12, 31, 41][12, 30, 41][12, 30, 40][12, 31, 40][12, 31, 39][12, 30, 39][12, 30, 38]
GTP_DUAL:TRANS_TIME_NON_P2_1[7, 31, 17][7, 31, 18][7, 30, 18][7, 30, 19][7, 31, 19][7, 31, 20][7, 30, 20][7, 30, 21][7, 31, 21][7, 31, 22][7, 30, 22][7, 30, 23][7, 31, 23][7, 31, 24][7, 30, 24][7, 30, 25]
GTP_DUAL:TRANS_TIME_TO_P2_0[12, 31, 38][12, 31, 37][12, 30, 37][12, 30, 36][12, 31, 36][12, 31, 35][12, 30, 35][12, 30, 34][12, 31, 34][12, 31, 33][12, 30, 33][12, 30, 32][12, 31, 32][12, 31, 31][12, 30, 31][12, 30, 30]
GTP_DUAL:TRANS_TIME_TO_P2_1[7, 31, 25][7, 31, 26][7, 30, 26][7, 30, 27][7, 31, 27][7, 31, 28][7, 30, 28][7, 30, 29][7, 31, 29][7, 31, 30][7, 30, 30][7, 30, 31][7, 31, 31][7, 31, 32][7, 30, 32][7, 30, 33]
Non-inverted[15][14][13][12][11][10][9][8][7][6][5][4][3][2][1][0]
GTP_DUAL:MUX.CLKOUT_SOUTH[5, 31, 35]
CLKOUT_SOUTH_N0
CLKPN1
GTP_DUAL:MUX.CLKOUT_NORTH[5, 31, 36]
CLKOUT_NORTH_S0
CLKPN1
GTP_DUAL:PLL_RXDIVSEL_OUT_0[13, 31, 49][13, 30, 49]
GTP_DUAL:PLL_RXDIVSEL_OUT_1[6, 31, 15][6, 31, 16]
GTP_DUAL:PLL_TXDIVSEL_COMM_OUT[14, 31, 20][14, 30, 20]
GTP_DUAL:PLL_TXDIVSEL_OUT_0[13, 31, 48][13, 31, 47]
GTP_DUAL:PLL_TXDIVSEL_OUT_1[5, 31, 41][5, 31, 42]
100
201
410
GTP_DUAL:CHAN_BOND_SEQ_1_1_0[10, 30, 37][10, 31, 37][10, 31, 38][10, 30, 38][10, 30, 39][10, 31, 39][10, 31, 40][10, 30, 40][10, 30, 41][10, 31, 41]
GTP_DUAL:CHAN_BOND_SEQ_1_1_1[9, 30, 26][9, 31, 26][9, 31, 25][9, 30, 25][9, 30, 24][9, 31, 24][9, 31, 23][9, 30, 23][9, 30, 22][9, 31, 22]
GTP_DUAL:CHAN_BOND_SEQ_1_2_0[10, 31, 42][10, 30, 42][10, 30, 43][10, 31, 43][10, 31, 44][10, 30, 44][10, 30, 45][10, 31, 45][10, 31, 46][10, 30, 46]
GTP_DUAL:CHAN_BOND_SEQ_1_2_1[9, 31, 21][9, 30, 21][9, 30, 20][9, 31, 20][9, 31, 19][9, 30, 19][9, 30, 18][9, 31, 18][9, 31, 17][9, 30, 17]
GTP_DUAL:CHAN_BOND_SEQ_1_3_0[10, 30, 47][10, 31, 47][10, 31, 48][10, 30, 48][10, 30, 49][10, 31, 49][10, 31, 50][10, 30, 50][10, 30, 51][10, 31, 51]
GTP_DUAL:CHAN_BOND_SEQ_1_3_1[9, 30, 16][9, 31, 16][9, 31, 15][9, 30, 15][9, 30, 14][9, 31, 14][9, 31, 13][9, 30, 13][9, 30, 12][9, 31, 12]
GTP_DUAL:CHAN_BOND_SEQ_1_4_0[10, 31, 52][10, 30, 52][10, 30, 53][10, 31, 53][10, 31, 54][10, 30, 54][10, 30, 55][10, 31, 55][10, 31, 56][10, 30, 56]
GTP_DUAL:CHAN_BOND_SEQ_1_4_1[9, 31, 11][9, 30, 11][9, 30, 10][9, 31, 10][9, 31, 9][9, 30, 9][9, 30, 8][9, 31, 8][9, 31, 7][9, 30, 7]
GTP_DUAL:CHAN_BOND_SEQ_2_1_0[10, 30, 59][10, 31, 59][10, 31, 60][10, 30, 60][10, 30, 61][10, 31, 61][10, 31, 62][10, 30, 62][10, 30, 63][10, 31, 63]
GTP_DUAL:CHAN_BOND_SEQ_2_1_1[9, 30, 4][9, 31, 4][9, 31, 3][9, 30, 3][9, 30, 2][9, 31, 2][9, 31, 1][9, 30, 1][9, 30, 0][9, 31, 0]
GTP_DUAL:CHAN_BOND_SEQ_2_2_0[11, 31, 0][11, 30, 0][11, 31, 1][11, 31, 2][11, 30, 2][11, 30, 3][11, 31, 3][11, 31, 4][11, 30, 4][11, 30, 5]
GTP_DUAL:CHAN_BOND_SEQ_2_2_1[8, 31, 63][8, 30, 63][8, 31, 62][8, 31, 61][8, 30, 61][8, 30, 60][8, 31, 60][8, 31, 59][8, 30, 59][8, 30, 58]
GTP_DUAL:CHAN_BOND_SEQ_2_3_0[11, 31, 5][13, 30, 56][13, 30, 57][13, 31, 57][13, 31, 58][13, 30, 58][13, 30, 59][13, 31, 59][13, 31, 60][13, 30, 60]
GTP_DUAL:CHAN_BOND_SEQ_2_3_1[8, 31, 58][6, 30, 7][6, 30, 6][6, 31, 6][6, 31, 5][6, 30, 5][6, 30, 4][6, 31, 4][6, 31, 3][6, 30, 3]
GTP_DUAL:CHAN_BOND_SEQ_2_4_0[13, 30, 61][13, 31, 61][13, 31, 62][13, 30, 62][13, 30, 63][13, 31, 63][14, 31, 0][14, 30, 0][14, 30, 1][14, 31, 1]
GTP_DUAL:CHAN_BOND_SEQ_2_4_1[6, 30, 2][6, 31, 2][6, 31, 1][6, 30, 1][6, 30, 0][6, 31, 0][5, 31, 63][5, 30, 63][5, 30, 62][5, 31, 62]
GTP_DUAL:CLK_COR_SEQ_1_1_0[12, 30, 0][12, 31, 0][11, 31, 63][11, 30, 63][11, 30, 62][11, 31, 62][11, 31, 61][11, 30, 61][11, 30, 60][11, 31, 60]
GTP_DUAL:CLK_COR_SEQ_1_1_1[7, 30, 63][7, 31, 63][8, 31, 0][8, 30, 0][8, 30, 1][8, 31, 1][8, 31, 2][8, 30, 2][8, 30, 3][8, 31, 3]
GTP_DUAL:CLK_COR_SEQ_1_2_0[11, 31, 59][11, 30, 59][11, 30, 58][11, 31, 58][11, 31, 57][11, 30, 57][11, 30, 56][11, 31, 56][11, 31, 55][11, 30, 55]
GTP_DUAL:CLK_COR_SEQ_1_2_1[8, 31, 4][8, 30, 4][8, 30, 5][8, 31, 5][8, 31, 6][8, 30, 6][8, 30, 7][8, 31, 7][8, 31, 8][8, 30, 8]
GTP_DUAL:CLK_COR_SEQ_1_3_0[11, 30, 54][11, 31, 54][11, 31, 53][11, 30, 53][11, 30, 52][11, 31, 52][11, 31, 51][11, 30, 51][11, 30, 50][11, 31, 50]
GTP_DUAL:CLK_COR_SEQ_1_3_1[8, 30, 9][8, 31, 9][8, 31, 10][8, 30, 10][8, 30, 11][8, 31, 11][8, 31, 12][8, 30, 12][8, 30, 13][8, 31, 13]
GTP_DUAL:CLK_COR_SEQ_1_4_0[11, 31, 49][11, 30, 49][11, 30, 48][11, 31, 48][11, 31, 47][11, 30, 47][11, 30, 46][11, 31, 46][11, 31, 45][11, 30, 45]
GTP_DUAL:CLK_COR_SEQ_1_4_1[8, 31, 14][8, 30, 14][8, 30, 15][8, 31, 15][8, 31, 16][8, 30, 16][8, 30, 17][8, 31, 17][8, 31, 18][8, 30, 18]
GTP_DUAL:CLK_COR_SEQ_2_1_0[11, 30, 42][11, 31, 42][11, 31, 41][11, 30, 41][11, 30, 40][11, 31, 40][11, 31, 39][11, 30, 39][11, 30, 38][11, 31, 38]
GTP_DUAL:CLK_COR_SEQ_2_1_1[8, 30, 21][8, 31, 21][8, 31, 22][8, 30, 22][8, 30, 23][8, 31, 23][8, 31, 24][8, 30, 24][8, 30, 25][8, 31, 25]
GTP_DUAL:CLK_COR_SEQ_2_2_0[11, 31, 37][11, 30, 37][11, 30, 36][11, 31, 36][11, 31, 35][11, 30, 35][11, 30, 34][11, 31, 34][11, 31, 33][11, 30, 33]
GTP_DUAL:CLK_COR_SEQ_2_2_1[8, 31, 26][8, 30, 26][8, 30, 27][8, 31, 27][8, 31, 28][8, 30, 28][8, 30, 29][8, 31, 29][8, 31, 30][8, 30, 30]
GTP_DUAL:CLK_COR_SEQ_2_3_0[11, 30, 32][11, 31, 32][11, 31, 31][11, 30, 31][11, 30, 30][11, 31, 30][11, 31, 29][11, 30, 29][11, 30, 28][11, 31, 28]
GTP_DUAL:CLK_COR_SEQ_2_3_1[8, 30, 31][8, 31, 31][8, 31, 32][8, 30, 32][8, 30, 33][8, 31, 33][8, 31, 34][8, 30, 34][8, 30, 35][8, 31, 35]
GTP_DUAL:CLK_COR_SEQ_2_4_0[11, 31, 27][11, 30, 27][11, 30, 26][11, 31, 26][11, 31, 25][11, 30, 25][11, 30, 24][11, 31, 24][11, 31, 23][11, 30, 23]
GTP_DUAL:CLK_COR_SEQ_2_4_1[8, 31, 36][8, 30, 36][8, 30, 37][8, 31, 37][8, 31, 38][8, 30, 38][8, 30, 39][8, 31, 39][8, 31, 40][8, 30, 40]
GTP_DUAL:COMMA_10B_ENABLE_0[11, 31, 18][11, 31, 17][11, 30, 17][11, 30, 16][11, 31, 16][11, 31, 15][11, 30, 15][11, 30, 14][11, 31, 14][11, 31, 13]
GTP_DUAL:COMMA_10B_ENABLE_1[8, 31, 45][8, 31, 46][8, 30, 46][8, 30, 47][8, 31, 47][8, 31, 48][8, 30, 48][8, 30, 49][8, 31, 49][8, 31, 50]
GTP_DUAL:MCOMMA_10B_VALUE_0[11, 30, 11][11, 30, 10][11, 31, 10][11, 31, 9][11, 30, 9][11, 30, 8][11, 31, 8][11, 31, 7][11, 30, 7][11, 30, 6]
GTP_DUAL:MCOMMA_10B_VALUE_1[8, 30, 52][8, 30, 53][8, 31, 53][8, 31, 54][8, 30, 54][8, 30, 55][8, 31, 55][8, 31, 56][8, 30, 56][8, 30, 57]
GTP_DUAL:PCOMMA_10B_VALUE_0[13, 30, 55][13, 30, 54][13, 31, 54][13, 31, 53][13, 30, 53][13, 30, 52][13, 31, 52][13, 31, 51][13, 30, 51][13, 30, 50]
GTP_DUAL:PCOMMA_10B_VALUE_1[6, 30, 8][6, 30, 9][6, 31, 9][6, 31, 10][6, 30, 10][6, 30, 11][6, 31, 11][6, 31, 12][6, 30, 12][6, 30, 13]
Non-inverted[9][8][7][6][5][4][3][2][1][0]
GTP_DUAL:RX_SLIDE_MODE_0[13, 30, 13]
GTP_DUAL:RX_SLIDE_MODE_1[6, 30, 50]
PCS0
PMA1
GTP_DUAL:RX_STATUS_FMT_0[13, 30, 12]
GTP_DUAL:RX_STATUS_FMT_1[6, 30, 51]
PCIE0
SATA1
GTP_DUAL:CLK_COR_MAX_LAT_0[12, 31, 10][12, 31, 9][12, 30, 9][12, 30, 8][12, 31, 8][12, 31, 7]
GTP_DUAL:CLK_COR_MAX_LAT_1[7, 31, 53][7, 31, 54][7, 30, 54][7, 30, 55][7, 31, 55][7, 31, 56]
GTP_DUAL:CLK_COR_MIN_LAT_0[12, 30, 7][12, 30, 6][12, 31, 6][12, 31, 5][12, 30, 5][12, 30, 4]
GTP_DUAL:CLK_COR_MIN_LAT_1[7, 30, 56][7, 30, 57][7, 31, 57][7, 31, 58][7, 30, 58][7, 30, 59]
GTP_DUAL:SATA_MAX_BURST_0[13, 30, 8][13, 31, 8][13, 31, 7][13, 30, 7][13, 30, 6][13, 31, 6]
GTP_DUAL:SATA_MAX_BURST_1[6, 30, 55][6, 31, 55][6, 31, 56][6, 30, 56][6, 30, 57][6, 31, 57]
GTP_DUAL:SATA_MAX_INIT_0[13, 31, 5][13, 30, 5][13, 30, 4][13, 31, 4][13, 31, 3][13, 30, 3]
GTP_DUAL:SATA_MAX_INIT_1[6, 31, 58][6, 30, 58][6, 30, 59][6, 31, 59][6, 31, 60][6, 30, 60]
GTP_DUAL:SATA_MAX_WAKE_0[13, 30, 2][13, 31, 2][13, 31, 1][13, 30, 1][13, 30, 0][13, 31, 0]
GTP_DUAL:SATA_MAX_WAKE_1[6, 30, 61][6, 31, 61][6, 31, 62][6, 30, 62][6, 30, 63][6, 31, 63]
GTP_DUAL:SATA_MIN_BURST_0[12, 31, 63][12, 30, 63][12, 30, 62][12, 31, 62][12, 31, 61][12, 30, 61]
GTP_DUAL:SATA_MIN_BURST_1[7, 31, 0][7, 30, 0][7, 30, 1][7, 31, 1][7, 31, 2][7, 30, 2]
GTP_DUAL:SATA_MIN_INIT_0[12, 30, 60][12, 31, 60][12, 31, 59][12, 30, 59][12, 30, 58][12, 31, 58]
GTP_DUAL:SATA_MIN_INIT_1[7, 30, 3][7, 31, 3][7, 31, 4][7, 30, 4][7, 30, 5][7, 31, 5]
GTP_DUAL:SATA_MIN_WAKE_0[12, 31, 57][12, 30, 57][12, 30, 56][12, 31, 56][12, 31, 55][12, 30, 55]
GTP_DUAL:SATA_MIN_WAKE_1[7, 31, 6][7, 30, 6][7, 30, 7][7, 31, 7][7, 31, 8][7, 30, 8]
Non-inverted[5][4][3][2][1][0]
GTP_DUAL:PMA_CDR_SCAN_0[13, 30, 47][13, 30, 46][13, 31, 46][13, 31, 45][13, 30, 45][13, 30, 44][13, 31, 44][13, 31, 43][13, 30, 43][13, 30, 42][13, 31, 42][13, 31, 41][13, 30, 41][13, 30, 40][13, 31, 40][13, 31, 39][13, 30, 39][13, 30, 38][13, 31, 38][13, 31, 37][13, 30, 37][13, 30, 36][13, 31, 36][13, 31, 35][13, 30, 35][13, 30, 34][13, 31, 34]
GTP_DUAL:PMA_CDR_SCAN_1[6, 30, 16][6, 30, 17][6, 31, 17][6, 31, 18][6, 30, 18][6, 30, 19][6, 31, 19][6, 31, 20][6, 30, 20][6, 30, 21][6, 31, 21][6, 31, 22][6, 30, 22][6, 30, 23][6, 31, 23][6, 31, 24][6, 30, 24][6, 30, 25][6, 31, 25][6, 31, 26][6, 30, 26][6, 30, 27][6, 31, 27][6, 31, 28][6, 30, 28][6, 30, 29][6, 31, 29]
Non-inverted[26][25][24][23][22][21][20][19][18][17][16][15][14][13][12][11][10][9][8][7][6][5][4][3][2][1][0]
GTP_DUAL:RX_LOS_INVALID_INCR_0[13, 30, 16][13, 31, 16][13, 31, 15]
GTP_DUAL:RX_LOS_INVALID_INCR_1[6, 30, 47][6, 31, 47][6, 31, 48]
1000
2001
4010
8011
16100
32101
64110
128111
GTP_DUAL:RX_LOS_THRESHOLD_0[13, 30, 14][13, 31, 14][13, 31, 13]
GTP_DUAL:RX_LOS_THRESHOLD_1[6, 30, 49][6, 31, 49][6, 31, 50]
4000
8001
16010
32011
64100
128101
256110
512111
GTP_DUAL:RX_XCLK_SEL_0[13, 31, 12]
GTP_DUAL:RX_XCLK_SEL_1[6, 31, 51]
RXREC0
RXUSR1
GTP_DUAL:TERMINATION_IMP_0[12, 30, 54]
GTP_DUAL:TERMINATION_IMP_1[7, 30, 9]
500
751
GTP_DUAL:TX_DETECT_RX_CFG_0[12, 31, 29][12, 30, 29][12, 30, 28][12, 31, 28][12, 31, 27][12, 30, 27][12, 30, 26][12, 31, 26][12, 31, 25][12, 30, 25][12, 30, 24][12, 31, 24][12, 31, 23][12, 30, 23]
GTP_DUAL:TX_DETECT_RX_CFG_1[7, 31, 34][7, 30, 34][7, 30, 35][7, 31, 35][7, 31, 36][7, 30, 36][7, 30, 37][7, 31, 37][7, 31, 38][7, 30, 38][7, 30, 39][7, 31, 39][7, 31, 40][7, 30, 40]
Non-inverted[13][12][11][10][9][8][7][6][5][4][3][2][1][0]
GTP_DUAL:CLK_COR_REPEAT_WAIT_0[12, 30, 3][12, 30, 2][12, 31, 2][12, 31, 1][12, 30, 1]
GTP_DUAL:CLK_COR_REPEAT_WAIT_1[7, 30, 60][7, 30, 61][7, 31, 61][7, 31, 62][7, 30, 62]
GTP_DUAL:TERMINATION_CTRL[10, 30, 8][10, 30, 9][10, 31, 9][10, 31, 10][10, 30, 10]
GTP_DUAL:TXRX_INVERT_0[12, 30, 22][12, 31, 22][12, 31, 21][12, 30, 21][12, 30, 20]
GTP_DUAL:TXRX_INVERT_1[7, 30, 41][7, 31, 41][7, 31, 42][7, 30, 42][7, 30, 43]
Non-inverted[4][3][2][1][0]
GTP_DUAL:CHAN_BOND_1_MAX_SKEW_0[10, 30, 30][10, 30, 31][10, 31, 31][10, 31, 32]
GTP_DUAL:CHAN_BOND_1_MAX_SKEW_1[9, 30, 33][9, 30, 32][9, 31, 32][9, 31, 31]
GTP_DUAL:CHAN_BOND_2_MAX_SKEW_0[10, 30, 32][10, 30, 33][10, 31, 33][10, 31, 34]
GTP_DUAL:CHAN_BOND_2_MAX_SKEW_1[9, 30, 31][9, 30, 30][9, 31, 30][9, 31, 29]
GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_0[10, 30, 57][10, 31, 57][10, 31, 58][10, 30, 58]
GTP_DUAL:CHAN_BOND_SEQ_1_ENABLE_1[9, 30, 6][9, 31, 6][9, 31, 5][9, 30, 5]
GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_0[12, 30, 16][12, 31, 16][12, 31, 15][12, 30, 15]
GTP_DUAL:CHAN_BOND_SEQ_2_ENABLE_1[7, 30, 47][7, 31, 47][7, 31, 48][7, 30, 48]
GTP_DUAL:CLK_COR_SEQ_1_ENABLE_0[11, 30, 44][11, 31, 44][11, 31, 43][11, 30, 43]
GTP_DUAL:CLK_COR_SEQ_1_ENABLE_1[8, 30, 19][8, 31, 19][8, 31, 20][8, 30, 20]
GTP_DUAL:CLK_COR_SEQ_2_ENABLE_0[11, 30, 22][11, 31, 22][11, 31, 21][11, 30, 21]
GTP_DUAL:CLK_COR_SEQ_2_ENABLE_1[8, 30, 41][8, 31, 41][8, 31, 42][8, 30, 42]
GTP_DUAL:COM_BURST_VAL_0[11, 31, 20][11, 31, 19][11, 30, 19][11, 30, 18]
GTP_DUAL:COM_BURST_VAL_1[8, 31, 43][8, 31, 44][8, 30, 44][8, 30, 45]
Non-inverted[3][2][1][0]
GTP_DUAL:CHAN_BOND_SEQ_LEN_0[12, 31, 14][12, 31, 13]
GTP_DUAL:CHAN_BOND_SEQ_LEN_1[7, 31, 49][7, 31, 50]
GTP_DUAL:CLK_COR_ADJ_LEN_0[12, 30, 13][12, 30, 12]
GTP_DUAL:CLK_COR_ADJ_LEN_1[7, 30, 50][7, 30, 51]
GTP_DUAL:CLK_COR_DET_LEN_0[12, 31, 12][12, 31, 11]
GTP_DUAL:CLK_COR_DET_LEN_1[7, 31, 51][7, 31, 52]
100
201
310
411
GTP_DUAL:TX_XCLK_SEL_0[12, 31, 20]
GTP_DUAL:TX_XCLK_SEL_1[7, 31, 43]
TXOUT0
TXUSR1
GTP_DUAL:OOB_CLK_DIVIDER[9, 31, 54][9, 30, 54][9, 30, 55]
1000
2001
4010
6011
8100
10101
12110
14111
GTP_DUAL:CHAN_BOND_MODE_0[10, 30, 36][10, 31, 36]
GTP_DUAL:CHAN_BOND_MODE_1[9, 30, 27][9, 31, 27]
#OFF00
SLAVE01
MASTER10
GTP_DUAL:ALIGN_COMMA_WORD_0[10, 31, 30]
GTP_DUAL:ALIGN_COMMA_WORD_1[9, 31, 33]
10
21
GTP_DUAL:CLK25_DIVIDER[9, 30, 52][9, 30, 53][9, 31, 53]
1000
2001
3010
4011
5100
6101
10110
12111
GTP_DUAL:PMA_COM_CFG[14, 31, 24][14, 30, 23][14, 31, 23][9, 30, 39][10, 30, 25][9, 31, 41][10, 30, 22][9, 31, 42][10, 31, 22][9, 31, 44][10, 31, 20][9, 30, 42][10, 31, 21][9, 30, 43][10, 30, 21][9, 31, 39][10, 31, 24][9, 31, 40][10, 30, 24][9, 31, 43][10, 30, 20][9, 30, 45][10, 30, 19][9, 30, 44][10, 31, 19][9, 30, 47][9, 31, 45][9, 30, 46][9, 31, 46][10, 30, 17][10, 30, 18][10, 31, 17][10, 31, 18][9, 31, 48][10, 30, 16][9, 31, 47][10, 31, 16][9, 30, 40][10, 30, 23][9, 30, 41][10, 31, 23][9, 31, 52][10, 31, 12][9, 31, 51][10, 30, 12][9, 30, 51][10, 30, 13][9, 30, 50][10, 31, 13][9, 31, 49][10, 31, 14][9, 31, 50][10, 30, 14][9, 30, 49][10, 31, 15][9, 30, 48][10, 30, 15][10, 31, 11][14, 30, 19][14, 30, 18][14, 31, 18][14, 31, 17][14, 30, 17][5, 30, 44][5, 30, 45][5, 31, 45][5, 31, 46][5, 30, 46][5, 31, 44][14, 31, 19][12, 30, 19][9, 31, 34][9, 30, 34][9, 30, 35][9, 31, 35][9, 31, 36][9, 30, 36][9, 30, 37][9, 31, 37][9, 31, 38][10, 31, 29][7, 30, 46][10, 31, 25][10, 31, 26][10, 30, 26][10, 31, 27][10, 31, 28][10, 30, 28][10, 30, 29][10, 30, 27]
Non-inverted[89][88][87][86][85][84][83][82][81][80][79][78][77][76][75][74][73][72][71][70][69][68][67][66][65][64][63][62][61][60][59][58][57][56][55][54][53][52][51][50][49][48][47][46][45][44][43][42][41][40][39][38][37][36][35][34][33][32][31][30][29][28][27][26][25][24][23][22][21][20][19][18][17][16][15][14][13][12][11][10][9][8][7][6][5][4][3][2][1][0]
GTP_DUAL:PCS_COM_CFG[9, 31, 56][9, 30, 56][9, 30, 57][9, 31, 57][9, 31, 58][9, 30, 58][9, 30, 59][9, 31, 59][9, 31, 60][9, 30, 60][9, 30, 61][9, 31, 61][9, 31, 62][9, 30, 62][9, 30, 63][9, 31, 63][10, 31, 0][10, 30, 0][10, 30, 1][10, 31, 1][10, 31, 2][10, 30, 2][10, 30, 3][10, 31, 3][10, 31, 4][10, 30, 4][10, 30, 5][10, 31, 5]
Non-inverted[27][26][25][24][23][22][21][20][19][18][17][16][15][14][13][12][11][10][9][8][7][6][5][4][3][2][1][0]
GTP_DUAL:PLL_DIVSEL_FB[10, 30, 7][10, 31, 7][10, 31, 8][10, 31, 6]
20000
10001
30010
40100
50110
81100
101110
CRC32_0:INV.CRCCLK[20, 18, 15]
CRC32_1:INV.CRCCLK[20, 19, 12]
CRC32_2:INV.CRCCLK[20, 18, 14]
CRC32_3:INV.CRCCLK[20, 18, 13]
Inverted~[0]