PCI Express Gen2 cores
PCIE_L
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Row | Column | |||||||||||||||||||||||||||||
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ECRC_CHECK_CAPABLE | PCIE:AER_CAP_ECRC_GEN_CAPABLE |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ID[0] | PCIE:AER_CAP_ID[1] |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ID[2] | PCIE:AER_CAP_ID[3] |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ID[4] | PCIE:AER_CAP_ID[5] |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ID[6] | PCIE:AER_CAP_ID[7] |
12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ID[8] | PCIE:AER_CAP_ID[9] |
13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ID[10] | PCIE:AER_CAP_ID[11] |
14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ID[12] | PCIE:AER_CAP_ID[13] |
15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ID[14] | PCIE:AER_CAP_ID[15] |
16 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_PERMIT_ROOTERR_UPDATE | PCIE:AER_CAP_VERSION[0] |
17 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_VERSION[1] | PCIE:AER_CAP_VERSION[2] |
18 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_VERSION[3] | - |
19 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
20 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
21 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
22 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
23 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
24 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_BASE_PTR[0] | PCIE:AER_BASE_PTR[1] |
25 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_BASE_PTR[2] | PCIE:AER_BASE_PTR[3] |
26 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_BASE_PTR[4] | PCIE:AER_BASE_PTR[5] |
27 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_BASE_PTR[6] | PCIE:AER_BASE_PTR[7] |
28 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_BASE_PTR[8] | PCIE:AER_BASE_PTR[9] |
29 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_BASE_PTR[10] | PCIE:AER_BASE_PTR[11] |
30 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
31 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
32 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_NEXTPTR[0] | PCIE:AER_CAP_NEXTPTR[1] |
33 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_NEXTPTR[2] | PCIE:AER_CAP_NEXTPTR[3] |
34 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_NEXTPTR[4] | PCIE:AER_CAP_NEXTPTR[5] |
35 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_NEXTPTR[6] | PCIE:AER_CAP_NEXTPTR[7] |
36 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_NEXTPTR[8] | PCIE:AER_CAP_NEXTPTR[9] |
37 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_NEXTPTR[10] | PCIE:AER_CAP_NEXTPTR[11] |
38 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ON | - |
39 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
40 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[0] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[1] |
41 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[2] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[3] |
42 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[4] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[5] |
43 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[6] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[7] |
44 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[8] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[9] |
45 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[10] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[11] |
46 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[12] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[13] |
47 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[14] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[15] |
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0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[16] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[17] |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[18] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[19] |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[20] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[21] |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[22] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[23] |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_MULTIHEADER | - |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[0] | PCIE:BAR0[1] |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[2] | PCIE:BAR0[3] |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[4] | PCIE:BAR0[5] |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[6] | PCIE:BAR0[7] |
12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[8] | PCIE:BAR0[9] |
13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[10] | PCIE:BAR0[11] |
14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[12] | PCIE:BAR0[13] |
15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[14] | PCIE:BAR0[15] |
16 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[16] | PCIE:BAR0[17] |
17 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[18] | PCIE:BAR0[19] |
18 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[20] | PCIE:BAR0[21] |
19 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[22] | PCIE:BAR0[23] |
20 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[24] | PCIE:BAR0[25] |
21 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[26] | PCIE:BAR0[27] |
22 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[28] | PCIE:BAR0[29] |
23 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[30] | PCIE:BAR0[31] |
24 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[0] | PCIE:BAR1[1] |
25 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[2] | PCIE:BAR1[3] |
26 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[4] | PCIE:BAR1[5] |
27 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[6] | PCIE:BAR1[7] |
28 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[8] | PCIE:BAR1[9] |
29 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[10] | PCIE:BAR1[11] |
30 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[12] | PCIE:BAR1[13] |
31 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[14] | PCIE:BAR1[15] |
32 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[16] | PCIE:BAR1[17] |
33 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[18] | PCIE:BAR1[19] |
34 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[20] | PCIE:BAR1[21] |
35 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[22] | PCIE:BAR1[23] |
36 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[24] | PCIE:BAR1[25] |
37 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[26] | PCIE:BAR1[27] |
38 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[28] | PCIE:BAR1[29] |
39 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[30] | PCIE:BAR1[31] |
40 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[0] | PCIE:BAR2[1] |
41 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[2] | PCIE:BAR2[3] |
42 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[4] | PCIE:BAR2[5] |
43 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[6] | PCIE:BAR2[7] |
44 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[8] | PCIE:BAR2[9] |
45 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[10] | PCIE:BAR2[11] |
46 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[12] | PCIE:BAR2[13] |
47 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[14] | PCIE:BAR2[15] |
PCIE_L bittile 27 | ||||||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Row | Column | |||||||||||||||||||||||||||||
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[16] | PCIE:BAR2[17] |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[18] | PCIE:BAR2[19] |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[20] | PCIE:BAR2[21] |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[22] | PCIE:BAR2[23] |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[24] | PCIE:BAR2[25] |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[26] | PCIE:BAR2[27] |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[28] | PCIE:BAR2[29] |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[30] | PCIE:BAR2[31] |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[0] | PCIE:BAR3[1] |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[2] | PCIE:BAR3[3] |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[4] | PCIE:BAR3[5] |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[6] | PCIE:BAR3[7] |
12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[8] | PCIE:BAR3[9] |
13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[10] | PCIE:BAR3[11] |
14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[12] | PCIE:BAR3[13] |
15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[14] | PCIE:BAR3[15] |
16 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[16] | PCIE:BAR3[17] |
17 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[18] | PCIE:BAR3[19] |
18 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[20] | PCIE:BAR3[21] |
19 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[22] | PCIE:BAR3[23] |
20 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[24] | PCIE:BAR3[25] |
21 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[26] | PCIE:BAR3[27] |
22 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[28] | PCIE:BAR3[29] |
23 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[30] | PCIE:BAR3[31] |
24 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[0] | PCIE:BAR4[1] |
25 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[2] | PCIE:BAR4[3] |
26 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[4] | PCIE:BAR4[5] |
27 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[6] | PCIE:BAR4[7] |
28 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[8] | PCIE:BAR4[9] |
29 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[10] | PCIE:BAR4[11] |
30 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[12] | PCIE:BAR4[13] |
31 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[14] | PCIE:BAR4[15] |
32 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[16] | PCIE:BAR4[17] |
33 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[18] | PCIE:BAR4[19] |
34 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[20] | PCIE:BAR4[21] |
35 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[22] | PCIE:BAR4[23] |
36 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[24] | PCIE:BAR4[25] |
37 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[26] | PCIE:BAR4[27] |
38 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[28] | PCIE:BAR4[29] |
39 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[30] | PCIE:BAR4[31] |
40 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR5[0] | PCIE:BAR5[1] |
41 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR5[2] | PCIE:BAR5[3] |
42 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR5[4] | PCIE:BAR5[5] |
43 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR5[6] | PCIE:BAR5[7] |
44 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR5[8] | PCIE:BAR5[9] |
45 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR5[10] | PCIE:BAR5[11] |
46 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR5[12] | PCIE:BAR5[13] |
47 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR5[14] | PCIE:BAR5[15] |
PCIE_L bittile 40 | ||||||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Row | Column | |||||||||||||||||||||||||||||
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:VSEC_CAP_VERSION[0] | PCIE:VSEC_CAP_VERSION[1] |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:VSEC_CAP_VERSION[2] | PCIE:VSEC_CAP_VERSION[3] |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:USER_CLK_FREQ[0] | PCIE:USER_CLK_FREQ[1] |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:USER_CLK_FREQ[2] | PCIE:CRM_MODULE_RSTS[0] |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:CRM_MODULE_RSTS[1] | PCIE:CRM_MODULE_RSTS[2] |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:CRM_MODULE_RSTS[3] | PCIE:CRM_MODULE_RSTS[4] |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:CRM_MODULE_RSTS[5] | PCIE:CRM_MODULE_RSTS[6] |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_ACK_TIMEOUT[0] | PCIE:LL_ACK_TIMEOUT[1] |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_ACK_TIMEOUT[2] | PCIE:LL_ACK_TIMEOUT[3] |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_ACK_TIMEOUT[4] | PCIE:LL_ACK_TIMEOUT[5] |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_ACK_TIMEOUT[6] | PCIE:LL_ACK_TIMEOUT[7] |
12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_ACK_TIMEOUT[8] | PCIE:LL_ACK_TIMEOUT[9] |
13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_ACK_TIMEOUT[10] | PCIE:LL_ACK_TIMEOUT[11] |
14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_ACK_TIMEOUT[12] | PCIE:LL_ACK_TIMEOUT[13] |
15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_ACK_TIMEOUT[14] | PCIE:LL_ACK_TIMEOUT_EN |
16 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_ACK_TIMEOUT_FUNC[0] | PCIE:LL_ACK_TIMEOUT_FUNC[1] |
17 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
18 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
19 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
20 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
21 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
22 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
23 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
24 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_REPLAY_TIMEOUT[0] | PCIE:LL_REPLAY_TIMEOUT[1] |
25 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_REPLAY_TIMEOUT[2] | PCIE:LL_REPLAY_TIMEOUT[3] |
26 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_REPLAY_TIMEOUT[4] | PCIE:LL_REPLAY_TIMEOUT[5] |
27 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_REPLAY_TIMEOUT[6] | PCIE:LL_REPLAY_TIMEOUT[7] |
28 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_REPLAY_TIMEOUT[8] | PCIE:LL_REPLAY_TIMEOUT[9] |
29 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_REPLAY_TIMEOUT[10] | PCIE:LL_REPLAY_TIMEOUT[11] |
30 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_REPLAY_TIMEOUT[12] | PCIE:LL_REPLAY_TIMEOUT[13] |
31 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_REPLAY_TIMEOUT[14] | PCIE:LL_REPLAY_TIMEOUT_EN |
32 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_REPLAY_TIMEOUT_FUNC[0] | PCIE:LL_REPLAY_TIMEOUT_FUNC[1] |
33 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
34 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
35 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
36 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
37 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
38 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
39 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
40 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:PM_ASPML0S_TIMEOUT[0] | PCIE:PM_ASPML0S_TIMEOUT[1] |
41 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:PM_ASPML0S_TIMEOUT[2] | PCIE:PM_ASPML0S_TIMEOUT[3] |
42 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:PM_ASPML0S_TIMEOUT[4] | PCIE:PM_ASPML0S_TIMEOUT[5] |
43 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:PM_ASPML0S_TIMEOUT[6] | PCIE:PM_ASPML0S_TIMEOUT[7] |
44 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:PM_ASPML0S_TIMEOUT[8] | PCIE:PM_ASPML0S_TIMEOUT[9] |
45 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:PM_ASPML0S_TIMEOUT[10] | PCIE:PM_ASPML0S_TIMEOUT[11] |
46 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:PM_ASPML0S_TIMEOUT[12] | PCIE:PM_ASPML0S_TIMEOUT[13] |
47 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:PM_ASPML0S_TIMEOUT[14] | PCIE:PM_ASPML0S_TIMEOUT_EN |
PCIE:AER_CAP_ECRC_CHECK_CAPABLE | [25, 28, 0] |
---|---|
PCIE:AER_CAP_ECRC_GEN_CAPABLE | [25, 29, 0] |
PCIE:AER_CAP_MULTIHEADER | [26, 28, 4] |
PCIE:AER_CAP_ON | [25, 28, 38] |
PCIE:AER_CAP_PERMIT_ROOTERR_UPDATE | [25, 28, 16] |
PCIE:ALLOW_X8_GEN2 | [41, 28, 32] |
PCIE:CMD_INTX_IMPLEMENTED | [29, 28, 12] |
PCIE:CPL_TIMEOUT_DISABLE_SUPPORTED | [29, 29, 12] |
PCIE:DEV_CAP2_ARI_FORWARDING_SUPPORTED | [29, 28, 15] |
PCIE:DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED | [29, 28, 16] |
PCIE:DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED | [29, 29, 16] |
PCIE:DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED | [29, 29, 15] |
PCIE:DEV_CAP2_CAS128_COMPLETER_SUPPORTED | [29, 28, 17] |
PCIE:DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED | [29, 28, 20] |
PCIE:DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED | [29, 29, 19] |
PCIE:DEV_CAP2_LTR_MECHANISM_SUPPORTED | [29, 28, 18] |
PCIE:DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING | [29, 29, 17] |
PCIE:DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE | [29, 28, 22] |
PCIE:DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE | [29, 29, 22] |
PCIE:DEV_CAP_EXT_TAG_SUPPORTED | [29, 28, 27] |
PCIE:DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE | [29, 29, 27] |
PCIE:DEV_CAP_ROLE_BASED_ERROR | [29, 29, 30] |
PCIE:DEV_CONTROL_AUX_POWER_SUPPORTED | [29, 28, 36] |
PCIE:DEV_CONTROL_EXT_TAG_DEFAULT | [29, 29, 36] |
PCIE:DISABLE_ASPM_L1_TIMER | [41, 28, 40] |
PCIE:DISABLE_BAR_FILTERING | [41, 29, 40] |
PCIE:DISABLE_ERR_MSG | [42, 29, 5] |
PCIE:DISABLE_ID_CHECK | [41, 28, 41] |
PCIE:DISABLE_LANE_REVERSAL | [41, 29, 1] |
PCIE:DISABLE_LOCKED_FILTER | [42, 29, 4] |
PCIE:DISABLE_PPM_FILTER | [42, 28, 4] |
PCIE:DISABLE_RX_POISONED_RESP | [41, 28, 42] |
PCIE:DISABLE_RX_TC_FILTER | [41, 29, 41] |
PCIE:DISABLE_SCRAMBLING | [41, 28, 2] |
PCIE:DSN_CAP_ON | [30, 28, 14] |
PCIE:ENABLE_RX_TD_ECRC_TRIM | [42, 28, 0] |
PCIE:ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED | [29, 29, 21] |
PCIE:ENTER_RVRY_EI_L0 | [41, 29, 2] |
PCIE:EXIT_LOOPBACK_ON_EI | [41, 29, 35] |
PCIE:INTERRUPT_STAT_AUTO | [30, 28, 40] |
PCIE:IS_SWITCH | [30, 29, 40] |
PCIE:LINK_CAP_ASPM_OPTIONALITY | [31, 28, 15] |
PCIE:LINK_CAP_CLOCK_POWER_MANAGEMENT | [30, 28, 47] |
PCIE:LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP | [30, 29, 47] |
PCIE:LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP | [31, 29, 12] |
PCIE:LINK_CAP_RSVD_23 | [31, 29, 15] |
PCIE:LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE | [31, 28, 16] |
PCIE:LINK_CONTROL_RCB | [31, 29, 16] |
PCIE:LINK_CTRL2_DEEMPHASIS | [31, 28, 17] |
PCIE:LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE | [31, 29, 17] |
PCIE:LINK_STATUS_SLOT_CLOCK_CONFIG | [31, 28, 20] |
PCIE:LL_ACK_TIMEOUT_EN | [40, 29, 15] |
PCIE:LL_REPLAY_TIMEOUT_EN | [40, 29, 31] |
PCIE:MPS_FORCE | [31, 29, 20] |
PCIE:MSIX_CAP_ON | [32, 28, 12] |
PCIE:MSI_CAP_64_BIT_ADDR_CAPABLE | [31, 28, 28] |
PCIE:MSI_CAP_MULTIMSG_EXTENSION | [31, 28, 36] |
PCIE:MSI_CAP_ON | [31, 28, 44] |
PCIE:MSI_CAP_PER_VECTOR_MASKING_CAPABLE | [31, 29, 44] |
PCIE:PCIE_CAP_ON | [33, 28, 24] |
PCIE:PCIE_CAP_SLOT_IMPLEMENTED | [33, 29, 25] |
PCIE:PL_FAST_TRAIN | [41, 28, 34] |
PCIE:PM_ASPML0S_TIMEOUT_EN | [40, 29, 47] |
PCIE:PM_ASPM_FASTEXIT | [41, 28, 1] |
PCIE:PM_CAP_D1SUPPORT | [33, 29, 33] |
PCIE:PM_CAP_D2SUPPORT | [33, 28, 34] |
PCIE:PM_CAP_DSI | [33, 29, 34] |
PCIE:PM_CAP_ON | [33, 28, 44] |
PCIE:PM_CAP_PME_CLOCK | [33, 29, 44] |
PCIE:PM_CAP_RSVD_04 | [33, 29, 47] |
PCIE:PM_CSR_B2B3 | [34, 29, 1] |
PCIE:PM_CSR_BPCCEN | [34, 28, 2] |
PCIE:PM_CSR_NOSOFTRST | [34, 29, 2] |
PCIE:PM_MF | [42, 28, 6] |
PCIE:RBAR_CAP_ON | [35, 28, 14] |
PCIE:RECRC_CHK_TRIM | [43, 28, 15] |
PCIE:ROOT_CAP_CRS_SW_VISIBILITY | [38, 29, 10] |
PCIE:SELECT_DLL_IF | [38, 28, 11] |
PCIE:SLOT_CAP_ATT_BUTTON_PRESENT | [38, 29, 11] |
PCIE:SLOT_CAP_ATT_INDICATOR_PRESENT | [38, 28, 12] |
PCIE:SLOT_CAP_ELEC_INTERLOCK_PRESENT | [38, 29, 12] |
PCIE:SLOT_CAP_HOTPLUG_CAPABLE | [38, 28, 13] |
PCIE:SLOT_CAP_HOTPLUG_SURPRISE | [38, 29, 13] |
PCIE:SLOT_CAP_MRL_SENSOR_PRESENT | [38, 28, 14] |
PCIE:SLOT_CAP_NO_CMD_COMPLETED_SUPPORT | [38, 29, 14] |
PCIE:SLOT_CAP_POWER_CONTROLLER_PRESENT | [38, 29, 22] |
PCIE:SLOT_CAP_POWER_INDICATOR_PRESENT | [38, 28, 23] |
PCIE:SPARE_BIT0 | [43, 29, 24] |
PCIE:SPARE_BIT1 | [43, 28, 25] |
PCIE:SPARE_BIT2 | [43, 29, 25] |
PCIE:SPARE_BIT3 | [43, 28, 26] |
PCIE:SPARE_BIT4 | [43, 29, 26] |
PCIE:SPARE_BIT5 | [43, 28, 27] |
PCIE:SPARE_BIT6 | [43, 29, 27] |
PCIE:SPARE_BIT7 | [43, 28, 28] |
PCIE:SPARE_BIT8 | [43, 29, 28] |
PCIE:SSL_MESSAGE_AUTO | [38, 28, 29] |
PCIE:TECRC_EP_INV | [43, 29, 15] |
PCIE:TEST_MODE_PIN_CHAR | [43, 28, 24] |
PCIE:TL_RBYPASS | [42, 29, 3] |
PCIE:TL_RX_RAM_RADDR_LATENCY | [42, 29, 0] |
PCIE:TL_RX_RAM_WRITE_LATENCY | [42, 28, 2] |
PCIE:TL_TFC_DISABLE | [42, 29, 2] |
PCIE:TL_TX_CHECKS_DISABLE | [42, 28, 3] |
PCIE:TL_TX_RAM_RADDR_LATENCY | [42, 29, 6] |
PCIE:TL_TX_RAM_WRITE_LATENCY | [42, 28, 8] |
PCIE:TRN_DW | [43, 28, 19] |
PCIE:TRN_NP_FC | [43, 29, 19] |
PCIE:UPCONFIG_CAPABLE | [41, 29, 34] |
PCIE:UPSTREAM_FACING | [41, 28, 35] |
PCIE:UR_ATOMIC | [43, 28, 18] |
PCIE:UR_CFG1 | [43, 29, 18] |
PCIE:UR_INV_REQ | [43, 28, 17] |
PCIE:UR_PRS_RESPONSE | [43, 29, 17] |
PCIE:USER_CLK2_DIV2 | [43, 28, 20] |
PCIE:USE_RID_PINS | [42, 28, 5] |
PCIE:VC0_CPL_INFINITE | [42, 29, 10] |
PCIE:VC_CAP_ON | [38, 28, 46] |
PCIE:VC_CAP_REJECT_SNOOP_TRANSACTIONS | [39, 28, 8] |
PCIE:VSEC_CAP_IS_LINK_VISIBLE | [39, 28, 40] |
PCIE:VSEC_CAP_ON | [39, 29, 46] |
Non-inverted | [0] |
PCIE:AER_CAP_ID | [25, 29, 15] | [25, 28, 15] | [25, 29, 14] | [25, 28, 14] | [25, 29, 13] | [25, 28, 13] | [25, 29, 12] | [25, 28, 12] | [25, 29, 11] | [25, 28, 11] | [25, 29, 10] | [25, 28, 10] | [25, 29, 9] | [25, 28, 9] | [25, 29, 8] | [25, 28, 8] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PCIE:DSN_CAP_ID | [30, 29, 7] | [30, 28, 7] | [30, 29, 6] | [30, 28, 6] | [30, 29, 5] | [30, 28, 5] | [30, 29, 4] | [30, 28, 4] | [30, 29, 3] | [30, 28, 3] | [30, 29, 2] | [30, 28, 2] | [30, 29, 1] | [30, 28, 1] | [30, 29, 0] | [30, 28, 0] |
PCIE:RBAR_CAP_ID | [35, 29, 23] | [35, 28, 23] | [35, 29, 22] | [35, 28, 22] | [35, 29, 21] | [35, 28, 21] | [35, 29, 20] | [35, 28, 20] | [35, 29, 19] | [35, 28, 19] | [35, 29, 18] | [35, 28, 18] | [35, 29, 17] | [35, 28, 17] | [35, 29, 16] | [35, 28, 16] |
PCIE:VC_CAP_ID | [39, 29, 7] | [39, 28, 7] | [39, 29, 6] | [39, 28, 6] | [39, 29, 5] | [39, 28, 5] | [39, 29, 4] | [39, 28, 4] | [39, 29, 3] | [39, 28, 3] | [39, 29, 2] | [39, 28, 2] | [39, 29, 1] | [39, 28, 1] | [39, 29, 0] | [39, 28, 0] |
PCIE:VSEC_CAP_HDR_ID | [39, 29, 23] | [39, 28, 23] | [39, 29, 22] | [39, 28, 22] | [39, 29, 21] | [39, 28, 21] | [39, 29, 20] | [39, 28, 20] | [39, 29, 19] | [39, 28, 19] | [39, 29, 18] | [39, 28, 18] | [39, 29, 17] | [39, 28, 17] | [39, 29, 16] | [39, 28, 16] |
PCIE:VSEC_CAP_ID | [39, 29, 39] | [39, 28, 39] | [39, 29, 38] | [39, 28, 38] | [39, 29, 37] | [39, 28, 37] | [39, 29, 36] | [39, 28, 36] | [39, 29, 35] | [39, 28, 35] | [39, 29, 34] | [39, 28, 34] | [39, 29, 33] | [39, 28, 33] | [39, 29, 32] | [39, 28, 32] |
Non-inverted | [15] | [14] | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:AER_BASE_PTR | [25, 29, 29] | [25, 28, 29] | [25, 29, 28] | [25, 28, 28] | [25, 29, 27] | [25, 28, 27] | [25, 29, 26] | [25, 28, 26] | [25, 29, 25] | [25, 28, 25] | [25, 29, 24] | [25, 28, 24] |
---|---|---|---|---|---|---|---|---|---|---|---|---|
PCIE:AER_CAP_NEXTPTR | [25, 29, 37] | [25, 28, 37] | [25, 29, 36] | [25, 28, 36] | [25, 29, 35] | [25, 28, 35] | [25, 29, 34] | [25, 28, 34] | [25, 29, 33] | [25, 28, 33] | [25, 29, 32] | [25, 28, 32] |
PCIE:DSN_BASE_PTR | [29, 29, 45] | [29, 28, 45] | [29, 29, 44] | [29, 28, 44] | [29, 29, 43] | [29, 28, 43] | [29, 29, 42] | [29, 28, 42] | [29, 29, 41] | [29, 28, 41] | [29, 29, 40] | [29, 28, 40] |
PCIE:DSN_CAP_NEXTPTR | [30, 29, 13] | [30, 28, 13] | [30, 29, 12] | [30, 28, 12] | [30, 29, 11] | [30, 28, 11] | [30, 29, 10] | [30, 28, 10] | [30, 29, 9] | [30, 28, 9] | [30, 29, 8] | [30, 28, 8] |
PCIE:RBAR_BASE_PTR | [35, 29, 5] | [35, 28, 5] | [35, 29, 4] | [35, 28, 4] | [35, 29, 3] | [35, 28, 3] | [35, 29, 2] | [35, 28, 2] | [35, 29, 1] | [35, 28, 1] | [35, 29, 0] | [35, 28, 0] |
PCIE:RBAR_CAP_NEXTPTR | [35, 29, 13] | [35, 28, 13] | [35, 29, 12] | [35, 28, 12] | [35, 29, 11] | [35, 28, 11] | [35, 29, 10] | [35, 28, 10] | [35, 29, 9] | [35, 28, 9] | [35, 29, 8] | [35, 28, 8] |
PCIE:VC_BASE_PTR | [38, 29, 37] | [38, 28, 37] | [38, 29, 36] | [38, 28, 36] | [38, 29, 35] | [38, 28, 35] | [38, 29, 34] | [38, 28, 34] | [38, 29, 33] | [38, 28, 33] | [38, 29, 32] | [38, 28, 32] |
PCIE:VC_CAP_NEXTPTR | [38, 29, 45] | [38, 28, 45] | [38, 29, 44] | [38, 28, 44] | [38, 29, 43] | [38, 28, 43] | [38, 29, 42] | [38, 28, 42] | [38, 29, 41] | [38, 28, 41] | [38, 29, 40] | [38, 28, 40] |
PCIE:VSEC_BASE_PTR | [39, 28, 14] | [39, 29, 13] | [39, 28, 13] | [39, 29, 12] | [39, 28, 12] | [39, 29, 11] | [39, 28, 11] | [39, 29, 10] | [39, 28, 10] | [39, 29, 9] | [39, 28, 9] | [39, 29, 8] |
PCIE:VSEC_CAP_HDR_LENGTH | [39, 29, 29] | [39, 28, 29] | [39, 29, 28] | [39, 28, 28] | [39, 29, 27] | [39, 28, 27] | [39, 29, 26] | [39, 28, 26] | [39, 29, 25] | [39, 28, 25] | [39, 29, 24] | [39, 28, 24] |
PCIE:VSEC_CAP_NEXTPTR | [39, 28, 46] | [39, 29, 45] | [39, 28, 45] | [39, 29, 44] | [39, 28, 44] | [39, 29, 43] | [39, 28, 43] | [39, 29, 42] | [39, 28, 42] | [39, 29, 41] | [39, 28, 41] | [39, 29, 40] |
Non-inverted | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT | [26, 29, 3] | [26, 28, 3] | [26, 29, 2] | [26, 28, 2] | [26, 29, 1] | [26, 28, 1] | [26, 29, 0] | [26, 28, 0] | [25, 29, 47] | [25, 28, 47] | [25, 29, 46] | [25, 28, 46] | [25, 29, 45] | [25, 28, 45] | [25, 29, 44] | [25, 28, 44] | [25, 29, 43] | [25, 28, 43] | [25, 29, 42] | [25, 28, 42] | [25, 29, 41] | [25, 28, 41] | [25, 29, 40] | [25, 28, 40] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PCIE:CLASS_CODE | [29, 29, 11] | [29, 28, 11] | [29, 29, 10] | [29, 28, 10] | [29, 29, 9] | [29, 28, 9] | [29, 29, 8] | [29, 28, 8] | [29, 29, 7] | [29, 28, 7] | [29, 29, 6] | [29, 28, 6] | [29, 29, 5] | [29, 28, 5] | [29, 29, 4] | [29, 28, 4] | [29, 29, 3] | [29, 28, 3] | [29, 29, 2] | [29, 28, 2] | [29, 29, 1] | [29, 28, 1] | [29, 29, 0] | [29, 28, 0] |
Non-inverted | [23] | [22] | [21] | [20] | [19] | [18] | [17] | [16] | [15] | [14] | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:AER_CAP_VERSION | [25, 28, 18] | [25, 29, 17] | [25, 28, 17] | [25, 29, 16] |
---|---|---|---|---|
PCIE:CPL_TIMEOUT_RANGES_SUPPORTED | [29, 29, 14] | [29, 28, 14] | [29, 29, 13] | [29, 28, 13] |
PCIE:DSN_CAP_VERSION | [30, 29, 17] | [30, 28, 17] | [30, 29, 16] | [30, 28, 16] |
PCIE:LINK_CAP_MAX_LINK_SPEED | [31, 29, 14] | [31, 28, 14] | [31, 29, 13] | [31, 28, 13] |
PCIE:LINK_CTRL2_TARGET_LINK_SPEED | [31, 29, 19] | [31, 28, 19] | [31, 29, 18] | [31, 28, 18] |
PCIE:PCIE_CAP_CAPABILITY_VERSION | [33, 29, 17] | [33, 28, 17] | [33, 29, 16] | [33, 28, 16] |
PCIE:PCIE_CAP_DEVICE_PORT_TYPE | [33, 29, 19] | [33, 28, 19] | [33, 29, 18] | [33, 28, 18] |
PCIE:PCIE_REVISION | [33, 29, 27] | [33, 28, 27] | [33, 29, 26] | [33, 28, 26] |
PCIE:RBAR_CAP_VERSION | [35, 29, 25] | [35, 28, 25] | [35, 29, 24] | [35, 28, 24] |
PCIE:VC_CAP_VERSION | [42, 28, 10] | [42, 29, 9] | [42, 28, 9] | [42, 29, 8] |
PCIE:VSEC_CAP_HDR_REVISION | [39, 29, 31] | [39, 28, 31] | [39, 29, 30] | [39, 28, 30] |
PCIE:VSEC_CAP_VERSION | [40, 29, 1] | [40, 28, 1] | [40, 29, 0] | [40, 28, 0] |
Non-inverted | [3] | [2] | [1] | [0] |
PCIE:BAR0 | [26, 29, 23] | [26, 28, 23] | [26, 29, 22] | [26, 28, 22] | [26, 29, 21] | [26, 28, 21] | [26, 29, 20] | [26, 28, 20] | [26, 29, 19] | [26, 28, 19] | [26, 29, 18] | [26, 28, 18] | [26, 29, 17] | [26, 28, 17] | [26, 29, 16] | [26, 28, 16] | [26, 29, 15] | [26, 28, 15] | [26, 29, 14] | [26, 28, 14] | [26, 29, 13] | [26, 28, 13] | [26, 29, 12] | [26, 28, 12] | [26, 29, 11] | [26, 28, 11] | [26, 29, 10] | [26, 28, 10] | [26, 29, 9] | [26, 28, 9] | [26, 29, 8] | [26, 28, 8] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PCIE:BAR1 | [26, 29, 39] | [26, 28, 39] | [26, 29, 38] | [26, 28, 38] | [26, 29, 37] | [26, 28, 37] | [26, 29, 36] | [26, 28, 36] | [26, 29, 35] | [26, 28, 35] | [26, 29, 34] | [26, 28, 34] | [26, 29, 33] | [26, 28, 33] | [26, 29, 32] | [26, 28, 32] | [26, 29, 31] | [26, 28, 31] | [26, 29, 30] | [26, 28, 30] | [26, 29, 29] | [26, 28, 29] | [26, 29, 28] | [26, 28, 28] | [26, 29, 27] | [26, 28, 27] | [26, 29, 26] | [26, 28, 26] | [26, 29, 25] | [26, 28, 25] | [26, 29, 24] | [26, 28, 24] |
PCIE:BAR2 | [27, 29, 7] | [27, 28, 7] | [27, 29, 6] | [27, 28, 6] | [27, 29, 5] | [27, 28, 5] | [27, 29, 4] | [27, 28, 4] | [27, 29, 3] | [27, 28, 3] | [27, 29, 2] | [27, 28, 2] | [27, 29, 1] | [27, 28, 1] | [27, 29, 0] | [27, 28, 0] | [26, 29, 47] | [26, 28, 47] | [26, 29, 46] | [26, 28, 46] | [26, 29, 45] | [26, 28, 45] | [26, 29, 44] | [26, 28, 44] | [26, 29, 43] | [26, 28, 43] | [26, 29, 42] | [26, 28, 42] | [26, 29, 41] | [26, 28, 41] | [26, 29, 40] | [26, 28, 40] |
PCIE:BAR3 | [27, 29, 23] | [27, 28, 23] | [27, 29, 22] | [27, 28, 22] | [27, 29, 21] | [27, 28, 21] | [27, 29, 20] | [27, 28, 20] | [27, 29, 19] | [27, 28, 19] | [27, 29, 18] | [27, 28, 18] | [27, 29, 17] | [27, 28, 17] | [27, 29, 16] | [27, 28, 16] | [27, 29, 15] | [27, 28, 15] | [27, 29, 14] | [27, 28, 14] | [27, 29, 13] | [27, 28, 13] | [27, 29, 12] | [27, 28, 12] | [27, 29, 11] | [27, 28, 11] | [27, 29, 10] | [27, 28, 10] | [27, 29, 9] | [27, 28, 9] | [27, 29, 8] | [27, 28, 8] |
PCIE:BAR4 | [27, 29, 39] | [27, 28, 39] | [27, 29, 38] | [27, 28, 38] | [27, 29, 37] | [27, 28, 37] | [27, 29, 36] | [27, 28, 36] | [27, 29, 35] | [27, 28, 35] | [27, 29, 34] | [27, 28, 34] | [27, 29, 33] | [27, 28, 33] | [27, 29, 32] | [27, 28, 32] | [27, 29, 31] | [27, 28, 31] | [27, 29, 30] | [27, 28, 30] | [27, 29, 29] | [27, 28, 29] | [27, 29, 28] | [27, 28, 28] | [27, 29, 27] | [27, 28, 27] | [27, 29, 26] | [27, 28, 26] | [27, 29, 25] | [27, 28, 25] | [27, 29, 24] | [27, 28, 24] |
PCIE:BAR5 | [28, 29, 7] | [28, 28, 7] | [28, 29, 6] | [28, 28, 6] | [28, 29, 5] | [28, 28, 5] | [28, 29, 4] | [28, 28, 4] | [28, 29, 3] | [28, 28, 3] | [28, 29, 2] | [28, 28, 2] | [28, 29, 1] | [28, 28, 1] | [28, 29, 0] | [28, 28, 0] | [27, 29, 47] | [27, 28, 47] | [27, 29, 46] | [27, 28, 46] | [27, 29, 45] | [27, 28, 45] | [27, 29, 44] | [27, 28, 44] | [27, 29, 43] | [27, 28, 43] | [27, 29, 42] | [27, 28, 42] | [27, 29, 41] | [27, 28, 41] | [27, 29, 40] | [27, 28, 40] |
PCIE:CARDBUS_CIS_POINTER | [28, 29, 47] | [28, 28, 47] | [28, 29, 46] | [28, 28, 46] | [28, 29, 45] | [28, 28, 45] | [28, 29, 44] | [28, 28, 44] | [28, 29, 43] | [28, 28, 43] | [28, 29, 42] | [28, 28, 42] | [28, 29, 41] | [28, 28, 41] | [28, 29, 40] | [28, 28, 40] | [28, 29, 39] | [28, 28, 39] | [28, 29, 38] | [28, 28, 38] | [28, 29, 37] | [28, 28, 37] | [28, 29, 36] | [28, 28, 36] | [28, 29, 35] | [28, 28, 35] | [28, 29, 34] | [28, 28, 34] | [28, 29, 33] | [28, 28, 33] | [28, 29, 32] | [28, 28, 32] |
PCIE:EXPANSION_ROM | [28, 29, 23] | [28, 28, 23] | [28, 29, 22] | [28, 28, 22] | [28, 29, 21] | [28, 28, 21] | [28, 29, 20] | [28, 28, 20] | [28, 29, 19] | [28, 28, 19] | [28, 29, 18] | [28, 28, 18] | [28, 29, 17] | [28, 28, 17] | [28, 29, 16] | [28, 28, 16] | [28, 29, 15] | [28, 28, 15] | [28, 29, 14] | [28, 28, 14] | [28, 29, 13] | [28, 28, 13] | [28, 29, 12] | [28, 28, 12] | [28, 29, 11] | [28, 28, 11] | [28, 29, 10] | [28, 28, 10] | [28, 29, 9] | [28, 28, 9] | [28, 29, 8] | [28, 28, 8] |
PCIE:RBAR_CAP_SUP0 | [35, 29, 47] | [35, 28, 47] | [35, 29, 46] | [35, 28, 46] | [35, 29, 45] | [35, 28, 45] | [35, 29, 44] | [35, 28, 44] | [35, 29, 43] | [35, 28, 43] | [35, 29, 42] | [35, 28, 42] | [35, 29, 41] | [35, 28, 41] | [35, 29, 40] | [35, 28, 40] | [35, 29, 39] | [35, 28, 39] | [35, 29, 38] | [35, 28, 38] | [35, 29, 37] | [35, 28, 37] | [35, 29, 36] | [35, 28, 36] | [35, 29, 35] | [35, 28, 35] | [35, 29, 34] | [35, 28, 34] | [35, 29, 33] | [35, 28, 33] | [35, 29, 32] | [35, 28, 32] |
PCIE:RBAR_CAP_SUP1 | [36, 29, 15] | [36, 28, 15] | [36, 29, 14] | [36, 28, 14] | [36, 29, 13] | [36, 28, 13] | [36, 29, 12] | [36, 28, 12] | [36, 29, 11] | [36, 28, 11] | [36, 29, 10] | [36, 28, 10] | [36, 29, 9] | [36, 28, 9] | [36, 29, 8] | [36, 28, 8] | [36, 29, 7] | [36, 28, 7] | [36, 29, 6] | [36, 28, 6] | [36, 29, 5] | [36, 28, 5] | [36, 29, 4] | [36, 28, 4] | [36, 29, 3] | [36, 28, 3] | [36, 29, 2] | [36, 28, 2] | [36, 29, 1] | [36, 28, 1] | [36, 29, 0] | [36, 28, 0] |
PCIE:RBAR_CAP_SUP2 | [36, 29, 31] | [36, 28, 31] | [36, 29, 30] | [36, 28, 30] | [36, 29, 29] | [36, 28, 29] | [36, 29, 28] | [36, 28, 28] | [36, 29, 27] | [36, 28, 27] | [36, 29, 26] | [36, 28, 26] | [36, 29, 25] | [36, 28, 25] | [36, 29, 24] | [36, 28, 24] | [36, 29, 23] | [36, 28, 23] | [36, 29, 22] | [36, 28, 22] | [36, 29, 21] | [36, 28, 21] | [36, 29, 20] | [36, 28, 20] | [36, 29, 19] | [36, 28, 19] | [36, 29, 18] | [36, 28, 18] | [36, 29, 17] | [36, 28, 17] | [36, 29, 16] | [36, 28, 16] |
PCIE:RBAR_CAP_SUP3 | [36, 29, 47] | [36, 28, 47] | [36, 29, 46] | [36, 28, 46] | [36, 29, 45] | [36, 28, 45] | [36, 29, 44] | [36, 28, 44] | [36, 29, 43] | [36, 28, 43] | [36, 29, 42] | [36, 28, 42] | [36, 29, 41] | [36, 28, 41] | [36, 29, 40] | [36, 28, 40] | [36, 29, 39] | [36, 28, 39] | [36, 29, 38] | [36, 28, 38] | [36, 29, 37] | [36, 28, 37] | [36, 29, 36] | [36, 28, 36] | [36, 29, 35] | [36, 28, 35] | [36, 29, 34] | [36, 28, 34] | [36, 29, 33] | [36, 28, 33] | [36, 29, 32] | [36, 28, 32] |
PCIE:RBAR_CAP_SUP4 | [37, 29, 15] | [37, 28, 15] | [37, 29, 14] | [37, 28, 14] | [37, 29, 13] | [37, 28, 13] | [37, 29, 12] | [37, 28, 12] | [37, 29, 11] | [37, 28, 11] | [37, 29, 10] | [37, 28, 10] | [37, 29, 9] | [37, 28, 9] | [37, 29, 8] | [37, 28, 8] | [37, 29, 7] | [37, 28, 7] | [37, 29, 6] | [37, 28, 6] | [37, 29, 5] | [37, 28, 5] | [37, 29, 4] | [37, 28, 4] | [37, 29, 3] | [37, 28, 3] | [37, 29, 2] | [37, 28, 2] | [37, 29, 1] | [37, 28, 1] | [37, 29, 0] | [37, 28, 0] |
PCIE:RBAR_CAP_SUP5 | [37, 29, 31] | [37, 28, 31] | [37, 29, 30] | [37, 28, 30] | [37, 29, 29] | [37, 28, 29] | [37, 29, 28] | [37, 28, 28] | [37, 29, 27] | [37, 28, 27] | [37, 29, 26] | [37, 28, 26] | [37, 29, 25] | [37, 28, 25] | [37, 29, 24] | [37, 28, 24] | [37, 29, 23] | [37, 28, 23] | [37, 29, 22] | [37, 28, 22] | [37, 29, 21] | [37, 28, 21] | [37, 29, 20] | [37, 28, 20] | [37, 29, 19] | [37, 28, 19] | [37, 29, 18] | [37, 28, 18] | [37, 29, 17] | [37, 28, 17] | [37, 29, 16] | [37, 28, 16] |
PCIE:SPARE_WORD0 | [44, 29, 15] | [44, 28, 15] | [44, 29, 14] | [44, 28, 14] | [44, 29, 13] | [44, 28, 13] | [44, 29, 12] | [44, 28, 12] | [44, 29, 11] | [44, 28, 11] | [44, 29, 10] | [44, 28, 10] | [44, 29, 9] | [44, 28, 9] | [44, 29, 8] | [44, 28, 8] | [44, 29, 7] | [44, 28, 7] | [44, 29, 6] | [44, 28, 6] | [44, 29, 5] | [44, 28, 5] | [44, 29, 4] | [44, 28, 4] | [44, 29, 3] | [44, 28, 3] | [44, 29, 2] | [44, 28, 2] | [44, 29, 1] | [44, 28, 1] | [44, 29, 0] | [44, 28, 0] |
PCIE:SPARE_WORD1 | [44, 29, 31] | [44, 28, 31] | [44, 29, 30] | [44, 28, 30] | [44, 29, 29] | [44, 28, 29] | [44, 29, 28] | [44, 28, 28] | [44, 29, 27] | [44, 28, 27] | [44, 29, 26] | [44, 28, 26] | [44, 29, 25] | [44, 28, 25] | [44, 29, 24] | [44, 28, 24] | [44, 29, 23] | [44, 28, 23] | [44, 29, 22] | [44, 28, 22] | [44, 29, 21] | [44, 28, 21] | [44, 29, 20] | [44, 28, 20] | [44, 29, 19] | [44, 28, 19] | [44, 29, 18] | [44, 28, 18] | [44, 29, 17] | [44, 28, 17] | [44, 29, 16] | [44, 28, 16] |
PCIE:SPARE_WORD2 | [44, 29, 47] | [44, 28, 47] | [44, 29, 46] | [44, 28, 46] | [44, 29, 45] | [44, 28, 45] | [44, 29, 44] | [44, 28, 44] | [44, 29, 43] | [44, 28, 43] | [44, 29, 42] | [44, 28, 42] | [44, 29, 41] | [44, 28, 41] | [44, 29, 40] | [44, 28, 40] | [44, 29, 39] | [44, 28, 39] | [44, 29, 38] | [44, 28, 38] | [44, 29, 37] | [44, 28, 37] | [44, 29, 36] | [44, 28, 36] | [44, 29, 35] | [44, 28, 35] | [44, 29, 34] | [44, 28, 34] | [44, 29, 33] | [44, 28, 33] | [44, 29, 32] | [44, 28, 32] |
PCIE:SPARE_WORD3 | [45, 29, 15] | [45, 28, 15] | [45, 29, 14] | [45, 28, 14] | [45, 29, 13] | [45, 28, 13] | [45, 29, 12] | [45, 28, 12] | [45, 29, 11] | [45, 28, 11] | [45, 29, 10] | [45, 28, 10] | [45, 29, 9] | [45, 28, 9] | [45, 29, 8] | [45, 28, 8] | [45, 29, 7] | [45, 28, 7] | [45, 29, 6] | [45, 28, 6] | [45, 29, 5] | [45, 28, 5] | [45, 29, 4] | [45, 28, 4] | [45, 29, 3] | [45, 28, 3] | [45, 29, 2] | [45, 28, 2] | [45, 29, 1] | [45, 28, 1] | [45, 29, 0] | [45, 28, 0] |
Non-inverted | [31] | [30] | [29] | [28] | [27] | [26] | [25] | [24] | [23] | [22] | [21] | [20] | [19] | [18] | [17] | [16] | [15] | [14] | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:CAPABILITIES_PTR | [28, 29, 27] | [28, 28, 27] | [28, 29, 26] | [28, 28, 26] | [28, 29, 25] | [28, 28, 25] | [28, 29, 24] | [28, 28, 24] |
---|---|---|---|---|---|---|---|---|
PCIE:DNSTREAM_LINK_NUM | [41, 29, 39] | [41, 28, 39] | [41, 29, 38] | [41, 28, 38] | [41, 29, 37] | [41, 28, 37] | [41, 29, 36] | [41, 28, 36] |
PCIE:HEADER_TYPE | [30, 29, 35] | [30, 28, 35] | [30, 29, 34] | [30, 28, 34] | [30, 29, 33] | [30, 28, 33] | [30, 29, 32] | [30, 28, 32] |
PCIE:INTERRUPT_PIN | [30, 29, 39] | [30, 28, 39] | [30, 29, 38] | [30, 28, 38] | [30, 29, 37] | [30, 28, 37] | [30, 29, 36] | [30, 28, 36] |
PCIE:MSIX_BASE_PTR | [32, 29, 3] | [32, 28, 3] | [32, 29, 2] | [32, 28, 2] | [32, 29, 1] | [32, 28, 1] | [32, 29, 0] | [32, 28, 0] |
PCIE:MSIX_CAP_ID | [32, 29, 7] | [32, 28, 7] | [32, 29, 6] | [32, 28, 6] | [32, 29, 5] | [32, 28, 5] | [32, 29, 4] | [32, 28, 4] |
PCIE:MSIX_CAP_NEXTPTR | [32, 29, 11] | [32, 28, 11] | [32, 29, 10] | [32, 28, 10] | [32, 29, 9] | [32, 28, 9] | [32, 29, 8] | [32, 28, 8] |
PCIE:MSI_BASE_PTR | [31, 29, 27] | [31, 28, 27] | [31, 29, 26] | [31, 28, 26] | [31, 29, 25] | [31, 28, 25] | [31, 29, 24] | [31, 28, 24] |
PCIE:MSI_CAP_ID | [31, 29, 35] | [31, 28, 35] | [31, 29, 34] | [31, 28, 34] | [31, 29, 33] | [31, 28, 33] | [31, 29, 32] | [31, 28, 32] |
PCIE:MSI_CAP_NEXTPTR | [31, 29, 43] | [31, 28, 43] | [31, 29, 42] | [31, 28, 42] | [31, 29, 41] | [31, 28, 41] | [31, 29, 40] | [31, 28, 40] |
PCIE:N_FTS_COMCLK_GEN1 | [41, 29, 19] | [41, 28, 19] | [41, 29, 18] | [41, 28, 18] | [41, 29, 17] | [41, 28, 17] | [41, 29, 16] | [41, 28, 16] |
PCIE:N_FTS_COMCLK_GEN2 | [41, 29, 23] | [41, 28, 23] | [41, 29, 22] | [41, 28, 22] | [41, 29, 21] | [41, 28, 21] | [41, 29, 20] | [41, 28, 20] |
PCIE:N_FTS_GEN1 | [41, 29, 27] | [41, 28, 27] | [41, 29, 26] | [41, 28, 26] | [41, 29, 25] | [41, 28, 25] | [41, 29, 24] | [41, 28, 24] |
PCIE:N_FTS_GEN2 | [41, 29, 31] | [41, 28, 31] | [41, 29, 30] | [41, 28, 30] | [41, 29, 29] | [41, 28, 29] | [41, 29, 28] | [41, 28, 28] |
PCIE:PCIE_BASE_PTR | [33, 29, 11] | [33, 28, 11] | [33, 29, 10] | [33, 28, 10] | [33, 29, 9] | [33, 28, 9] | [33, 29, 8] | [33, 28, 8] |
PCIE:PCIE_CAP_CAPABILITY_ID | [33, 29, 15] | [33, 28, 15] | [33, 29, 14] | [33, 28, 14] | [33, 29, 13] | [33, 28, 13] | [33, 29, 12] | [33, 28, 12] |
PCIE:PCIE_CAP_NEXTPTR | [33, 29, 23] | [33, 28, 23] | [33, 29, 22] | [33, 28, 22] | [33, 29, 21] | [33, 28, 21] | [33, 29, 20] | [33, 28, 20] |
PCIE:PM_BASE_PTR | [33, 29, 31] | [33, 28, 31] | [33, 29, 30] | [33, 28, 30] | [33, 29, 29] | [33, 28, 29] | [33, 29, 28] | [33, 28, 28] |
PCIE:PM_CAP_ID | [33, 29, 38] | [33, 28, 38] | [33, 29, 37] | [33, 28, 37] | [33, 29, 36] | [33, 28, 36] | [33, 29, 35] | [33, 28, 35] |
PCIE:PM_CAP_NEXTPTR | [33, 29, 43] | [33, 28, 43] | [33, 29, 42] | [33, 28, 42] | [33, 29, 41] | [33, 28, 41] | [33, 29, 40] | [33, 28, 40] |
PCIE:PM_DATA0 | [34, 29, 14] | [34, 28, 14] | [34, 29, 13] | [34, 28, 13] | [34, 29, 12] | [34, 28, 12] | [34, 29, 11] | [34, 28, 11] |
PCIE:PM_DATA1 | [34, 29, 19] | [34, 28, 19] | [34, 29, 18] | [34, 28, 18] | [34, 29, 17] | [34, 28, 17] | [34, 29, 16] | [34, 28, 16] |
PCIE:PM_DATA2 | [34, 29, 23] | [34, 28, 23] | [34, 29, 22] | [34, 28, 22] | [34, 29, 21] | [34, 28, 21] | [34, 29, 20] | [34, 28, 20] |
PCIE:PM_DATA3 | [34, 29, 27] | [34, 28, 27] | [34, 29, 26] | [34, 28, 26] | [34, 29, 25] | [34, 28, 25] | [34, 29, 24] | [34, 28, 24] |
PCIE:PM_DATA4 | [34, 29, 31] | [34, 28, 31] | [34, 29, 30] | [34, 28, 30] | [34, 29, 29] | [34, 28, 29] | [34, 29, 28] | [34, 28, 28] |
PCIE:PM_DATA5 | [34, 29, 35] | [34, 28, 35] | [34, 29, 34] | [34, 28, 34] | [34, 29, 33] | [34, 28, 33] | [34, 29, 32] | [34, 28, 32] |
PCIE:PM_DATA6 | [34, 29, 39] | [34, 28, 39] | [34, 29, 38] | [34, 28, 38] | [34, 29, 37] | [34, 28, 37] | [34, 29, 36] | [34, 28, 36] |
PCIE:PM_DATA7 | [34, 29, 43] | [34, 28, 43] | [34, 29, 42] | [34, 28, 42] | [34, 29, 41] | [34, 28, 41] | [34, 29, 40] | [34, 28, 40] |
PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE | [38, 29, 28] | [38, 28, 28] | [38, 29, 27] | [38, 28, 27] | [38, 29, 26] | [38, 28, 26] | [38, 29, 25] | [38, 28, 25] |
PCIE:SPARE_BYTE0 | [43, 29, 35] | [43, 28, 35] | [43, 29, 34] | [43, 28, 34] | [43, 29, 33] | [43, 28, 33] | [43, 29, 32] | [43, 28, 32] |
PCIE:SPARE_BYTE1 | [43, 29, 39] | [43, 28, 39] | [43, 29, 38] | [43, 28, 38] | [43, 29, 37] | [43, 28, 37] | [43, 29, 36] | [43, 28, 36] |
PCIE:SPARE_BYTE2 | [43, 29, 43] | [43, 28, 43] | [43, 29, 42] | [43, 28, 42] | [43, 29, 41] | [43, 28, 41] | [43, 29, 40] | [43, 28, 40] |
PCIE:SPARE_BYTE3 | [43, 29, 47] | [43, 28, 47] | [43, 29, 46] | [43, 28, 46] | [43, 29, 45] | [43, 28, 45] | [43, 29, 44] | [43, 28, 44] |
Non-inverted | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:DEV_CAP_ENDPOINT_L0S_LATENCY | [29, 28, 25] | [29, 29, 24] | [29, 28, 24] |
---|---|---|---|
PCIE:DEV_CAP_ENDPOINT_L1_LATENCY | [29, 29, 26] | [29, 28, 26] | [29, 29, 25] |
PCIE:DEV_CAP_MAX_PAYLOAD_SUPPORTED | [29, 28, 29] | [29, 29, 28] | [29, 28, 28] |
PCIE:DEV_CAP_RSVD_14_12 | [29, 28, 33] | [29, 29, 32] | [29, 28, 32] |
PCIE:DEV_CAP_RSVD_31_29 | [29, 29, 35] | [29, 28, 35] | [29, 29, 34] |
PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 | [31, 28, 1] | [31, 29, 0] | [31, 28, 0] |
PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 | [31, 29, 2] | [31, 28, 2] | [31, 29, 1] |
PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN1 | [31, 28, 4] | [31, 29, 3] | [31, 28, 3] |
PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN2 | [31, 29, 5] | [31, 28, 5] | [31, 29, 4] |
PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 | [31, 28, 7] | [31, 29, 6] | [31, 28, 6] |
PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 | [31, 28, 9] | [31, 29, 8] | [31, 28, 8] |
PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN1 | [31, 29, 10] | [31, 28, 10] | [31, 29, 9] |
PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN2 | [31, 28, 12] | [31, 29, 11] | [31, 28, 11] |
PCIE:MSIX_CAP_PBA_BIR | [32, 29, 13] | [32, 28, 13] | [32, 29, 12] |
PCIE:MSIX_CAP_TABLE_BIR | [32, 29, 31] | [32, 28, 31] | [32, 29, 30] |
PCIE:MSI_CAP_MULTIMSGCAP | [31, 29, 37] | [31, 28, 37] | [31, 29, 36] |
PCIE:PL_AUTO_CONFIG | [41, 29, 33] | [41, 28, 33] | [41, 29, 32] |
PCIE:PM_CAP_AUXCURRENT | [33, 28, 33] | [33, 29, 32] | [33, 28, 32] |
PCIE:PM_CAP_VERSION | [34, 28, 1] | [34, 29, 0] | [34, 28, 0] |
PCIE:RBAR_CAP_INDEX0 | [37, 28, 33] | [37, 29, 32] | [37, 28, 32] |
PCIE:RBAR_CAP_INDEX1 | [37, 29, 34] | [37, 28, 34] | [37, 29, 33] |
PCIE:RBAR_CAP_INDEX2 | [37, 28, 36] | [37, 29, 35] | [37, 28, 35] |
PCIE:RBAR_CAP_INDEX3 | [37, 29, 37] | [37, 28, 37] | [37, 29, 36] |
PCIE:RBAR_CAP_INDEX4 | [37, 28, 39] | [37, 29, 38] | [37, 28, 38] |
PCIE:RBAR_CAP_INDEX5 | [37, 28, 41] | [37, 29, 40] | [37, 28, 40] |
PCIE:RBAR_NUM | [35, 28, 27] | [35, 29, 26] | [35, 28, 26] |
PCIE:USER_CLK_FREQ | [40, 28, 3] | [40, 29, 2] | [40, 28, 2] |
Non-inverted | [2] | [1] | [0] |
PCIE:CFG_ECRC_ERR_CPLSTAT | [43, 29, 16] | [43, 28, 16] |
---|---|---|
PCIE:DEV_CAP2_MAX_ENDEND_TLP_PREFIXES | [29, 28, 21] | [29, 29, 20] |
PCIE:DEV_CAP2_TPH_COMPLETER_SUPPORTED | [29, 28, 19] | [29, 29, 18] |
PCIE:DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT | [29, 28, 30] | [29, 29, 29] |
PCIE:DEV_CAP_RSVD_17_16 | [29, 28, 34] | [29, 29, 33] |
PCIE:LINK_CAP_ASPM_SUPPORT | [30, 29, 46] | [30, 28, 46] |
PCIE:LL_ACK_TIMEOUT_FUNC | [40, 29, 16] | [40, 28, 16] |
PCIE:LL_REPLAY_TIMEOUT_FUNC | [40, 29, 32] | [40, 28, 32] |
PCIE:PCIE_CAP_RSVD_15_14 | [33, 28, 25] | [33, 29, 24] |
PCIE:PM_ASPML0S_TIMEOUT_FUNC | [41, 29, 0] | [41, 28, 0] |
PCIE:PM_DATA_SCALE0 | [34, 29, 3] | [34, 28, 3] |
PCIE:PM_DATA_SCALE1 | [34, 29, 4] | [34, 28, 4] |
PCIE:PM_DATA_SCALE2 | [34, 29, 5] | [34, 28, 5] |
PCIE:PM_DATA_SCALE3 | [34, 29, 6] | [34, 28, 6] |
PCIE:PM_DATA_SCALE4 | [34, 29, 7] | [34, 28, 7] |
PCIE:PM_DATA_SCALE5 | [34, 29, 8] | [34, 28, 8] |
PCIE:PM_DATA_SCALE6 | [34, 29, 9] | [34, 28, 9] |
PCIE:PM_DATA_SCALE7 | [34, 29, 10] | [34, 28, 10] |
PCIE:RECRC_CHK | [43, 29, 14] | [43, 28, 14] |
PCIE:RP_AUTO_SPD | [43, 28, 21] | [43, 29, 20] |
PCIE:SLOT_CAP_SLOT_POWER_LIMIT_SCALE | [38, 29, 24] | [38, 28, 24] |
PCIE:TL_RX_RAM_RDATA_LATENCY | [42, 29, 1] | [42, 28, 1] |
PCIE:TL_TX_RAM_RDATA_LATENCY | [42, 29, 7] | [42, 28, 7] |
Non-inverted | [1] | [0] |
PCIE:EXT_CFG_CAP_PTR | [30, 29, 20] | [30, 28, 20] | [30, 29, 19] | [30, 28, 19] | [30, 29, 18] | [30, 28, 18] |
---|---|---|---|---|---|---|
PCIE:LINK_CAP_MAX_LINK_WIDTH | [41, 29, 10] | [41, 28, 10] | [41, 29, 9] | [41, 28, 9] | [41, 29, 8] | [41, 28, 8] |
PCIE:LTSSM_MAX_LINK_WIDTH | [41, 29, 13] | [41, 28, 13] | [41, 29, 12] | [41, 28, 12] | [41, 29, 11] | [41, 28, 11] |
Non-inverted | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:EXT_CFG_XP_CAP_PTR | [30, 29, 28] | [30, 28, 28] | [30, 29, 27] | [30, 28, 27] | [30, 29, 26] | [30, 28, 26] | [30, 29, 25] | [30, 28, 25] | [30, 29, 24] | [30, 28, 24] |
---|---|---|---|---|---|---|---|---|---|---|
PCIE:LAST_CONFIG_DWORD | [30, 29, 45] | [30, 28, 45] | [30, 29, 44] | [30, 28, 44] | [30, 29, 43] | [30, 28, 43] | [30, 29, 42] | [30, 28, 42] | [30, 29, 41] | [30, 28, 41] |
Non-inverted | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:MSIX_CAP_PBA_OFFSET | [32, 28, 30] | [32, 29, 29] | [32, 28, 29] | [32, 29, 28] | [32, 28, 28] | [32, 29, 27] | [32, 28, 27] | [32, 29, 26] | [32, 28, 26] | [32, 29, 25] | [32, 28, 25] | [32, 29, 24] | [32, 28, 24] | [32, 29, 23] | [32, 28, 23] | [32, 29, 22] | [32, 28, 22] | [32, 29, 21] | [32, 28, 21] | [32, 29, 20] | [32, 28, 20] | [32, 29, 19] | [32, 28, 19] | [32, 29, 18] | [32, 28, 18] | [32, 29, 17] | [32, 28, 17] | [32, 29, 16] | [32, 28, 16] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PCIE:MSIX_CAP_TABLE_OFFSET | [32, 28, 46] | [32, 29, 45] | [32, 28, 45] | [32, 29, 44] | [32, 28, 44] | [32, 29, 43] | [32, 28, 43] | [32, 29, 42] | [32, 28, 42] | [32, 29, 41] | [32, 28, 41] | [32, 29, 40] | [32, 28, 40] | [32, 29, 39] | [32, 28, 39] | [32, 29, 38] | [32, 28, 38] | [32, 29, 37] | [32, 28, 37] | [32, 29, 36] | [32, 28, 36] | [32, 29, 35] | [32, 28, 35] | [32, 29, 34] | [32, 28, 34] | [32, 29, 33] | [32, 28, 33] | [32, 29, 32] | [32, 28, 32] |
Non-inverted | [28] | [27] | [26] | [25] | [24] | [23] | [22] | [21] | [20] | [19] | [18] | [17] | [16] | [15] | [14] | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:ENABLE_MSG_ROUTE | [41, 29, 47] | [41, 28, 47] | [41, 29, 46] | [41, 28, 46] | [41, 29, 45] | [41, 28, 45] | [41, 29, 44] | [41, 28, 44] | [41, 29, 43] | [41, 28, 43] | [41, 29, 42] |
---|---|---|---|---|---|---|---|---|---|---|---|
PCIE:MSIX_CAP_TABLE_SIZE | [33, 28, 5] | [33, 29, 4] | [33, 28, 4] | [33, 29, 3] | [33, 28, 3] | [33, 29, 2] | [33, 28, 2] | [33, 29, 1] | [33, 28, 1] | [33, 29, 0] | [33, 28, 0] |
PCIE:VC0_TOTAL_CREDITS_CD | [42, 28, 29] | [42, 29, 28] | [42, 28, 28] | [42, 29, 27] | [42, 28, 27] | [42, 29, 26] | [42, 28, 26] | [42, 29, 25] | [42, 28, 25] | [42, 29, 24] | [42, 28, 24] |
PCIE:VC0_TOTAL_CREDITS_NPD | [42, 28, 45] | [42, 29, 44] | [42, 28, 44] | [42, 29, 43] | [42, 28, 43] | [42, 29, 42] | [42, 28, 42] | [42, 29, 41] | [42, 28, 41] | [42, 29, 40] | [42, 28, 40] |
PCIE:VC0_TOTAL_CREDITS_PD | [43, 28, 5] | [43, 29, 4] | [43, 28, 4] | [43, 29, 3] | [43, 28, 3] | [43, 29, 2] | [43, 28, 2] | [43, 29, 1] | [43, 28, 1] | [43, 29, 0] | [43, 28, 0] |
Non-inverted | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:INFER_EI | [41, 28, 5] | [41, 29, 4] | [41, 28, 4] | [41, 29, 3] | [41, 28, 3] |
---|---|---|---|---|---|
PCIE:PM_CAP_PMESUPPORT | [33, 28, 47] | [33, 29, 46] | [33, 28, 46] | [33, 29, 45] | [33, 28, 45] |
PCIE:RBAR_CAP_CONTROL_ENCODEDBAR0 | [37, 29, 43] | [37, 28, 43] | [37, 29, 42] | [37, 28, 42] | [37, 29, 41] |
PCIE:RBAR_CAP_CONTROL_ENCODEDBAR1 | [37, 28, 46] | [37, 29, 45] | [37, 28, 45] | [37, 29, 44] | [37, 28, 44] |
PCIE:RBAR_CAP_CONTROL_ENCODEDBAR2 | [38, 28, 2] | [38, 29, 1] | [38, 28, 1] | [38, 29, 0] | [38, 28, 0] |
PCIE:RBAR_CAP_CONTROL_ENCODEDBAR3 | [38, 29, 4] | [38, 28, 4] | [38, 29, 3] | [38, 28, 3] | [38, 29, 2] |
PCIE:RBAR_CAP_CONTROL_ENCODEDBAR4 | [38, 28, 7] | [38, 29, 6] | [38, 28, 6] | [38, 29, 5] | [38, 28, 5] |
PCIE:RBAR_CAP_CONTROL_ENCODEDBAR5 | [38, 28, 10] | [38, 29, 9] | [38, 28, 9] | [38, 29, 8] | [38, 28, 8] |
PCIE:RP_AUTO_SPD_LOOPCNT | [43, 29, 23] | [43, 28, 23] | [43, 29, 22] | [43, 28, 22] | [43, 29, 21] |
PCIE:VC0_TX_LASTPACKET | [43, 29, 13] | [43, 28, 13] | [43, 29, 12] | [43, 28, 12] | [43, 29, 11] |
Non-inverted | [4] | [3] | [2] | [1] | [0] |
PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM | [38, 28, 22] | [38, 29, 21] | [38, 28, 21] | [38, 29, 20] | [38, 28, 20] | [38, 29, 19] | [38, 28, 19] | [38, 29, 18] | [38, 28, 18] | [38, 29, 17] | [38, 28, 17] | [38, 29, 16] | [38, 28, 16] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PCIE:VC0_RX_RAM_LIMIT | [42, 28, 22] | [42, 29, 21] | [42, 28, 21] | [42, 29, 20] | [42, 28, 20] | [42, 29, 19] | [42, 28, 19] | [42, 29, 18] | [42, 28, 18] | [42, 29, 17] | [42, 28, 17] | [42, 29, 16] | [42, 28, 16] |
Non-inverted | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:LL_ACK_TIMEOUT | [40, 28, 15] | [40, 29, 14] | [40, 28, 14] | [40, 29, 13] | [40, 28, 13] | [40, 29, 12] | [40, 28, 12] | [40, 29, 11] | [40, 28, 11] | [40, 29, 10] | [40, 28, 10] | [40, 29, 9] | [40, 28, 9] | [40, 29, 8] | [40, 28, 8] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PCIE:LL_REPLAY_TIMEOUT | [40, 28, 31] | [40, 29, 30] | [40, 28, 30] | [40, 29, 29] | [40, 28, 29] | [40, 29, 28] | [40, 28, 28] | [40, 29, 27] | [40, 28, 27] | [40, 29, 26] | [40, 28, 26] | [40, 29, 25] | [40, 28, 25] | [40, 29, 24] | [40, 28, 24] |
PCIE:PM_ASPML0S_TIMEOUT | [40, 28, 47] | [40, 29, 46] | [40, 28, 46] | [40, 29, 45] | [40, 28, 45] | [40, 29, 44] | [40, 28, 44] | [40, 29, 43] | [40, 28, 43] | [40, 29, 42] | [40, 28, 42] | [40, 29, 41] | [40, 28, 41] | [40, 29, 40] | [40, 28, 40] |
Non-inverted | [14] | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:CRM_MODULE_RSTS | [40, 29, 6] | [40, 28, 6] | [40, 29, 5] | [40, 28, 5] | [40, 29, 4] | [40, 28, 4] | [40, 29, 3] |
---|---|---|---|---|---|---|---|
PCIE:VC0_TOTAL_CREDITS_CH | [42, 28, 35] | [42, 29, 34] | [42, 28, 34] | [42, 29, 33] | [42, 28, 33] | [42, 29, 32] | [42, 28, 32] |
PCIE:VC0_TOTAL_CREDITS_NPH | [42, 29, 38] | [42, 28, 38] | [42, 29, 37] | [42, 28, 37] | [42, 29, 36] | [42, 28, 36] | [42, 29, 35] |
PCIE:VC0_TOTAL_CREDITS_PH | [43, 28, 11] | [43, 29, 10] | [43, 28, 10] | [43, 29, 9] | [43, 28, 9] | [43, 29, 8] | [43, 28, 8] |
Non-inverted | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE_R
PCIE_R bittile 0 | ||||||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Row | Column | |||||||||||||||||||||||||||||
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ECRC_CHECK_CAPABLE | PCIE:AER_CAP_ECRC_GEN_CAPABLE |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ID[0] | PCIE:AER_CAP_ID[1] |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ID[2] | PCIE:AER_CAP_ID[3] |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ID[4] | PCIE:AER_CAP_ID[5] |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ID[6] | PCIE:AER_CAP_ID[7] |
12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ID[8] | PCIE:AER_CAP_ID[9] |
13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ID[10] | PCIE:AER_CAP_ID[11] |
14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ID[12] | PCIE:AER_CAP_ID[13] |
15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ID[14] | PCIE:AER_CAP_ID[15] |
16 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_PERMIT_ROOTERR_UPDATE | PCIE:AER_CAP_VERSION[0] |
17 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_VERSION[1] | PCIE:AER_CAP_VERSION[2] |
18 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_VERSION[3] | - |
19 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
20 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
21 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
22 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
23 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
24 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_BASE_PTR[0] | PCIE:AER_BASE_PTR[1] |
25 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_BASE_PTR[2] | PCIE:AER_BASE_PTR[3] |
26 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_BASE_PTR[4] | PCIE:AER_BASE_PTR[5] |
27 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_BASE_PTR[6] | PCIE:AER_BASE_PTR[7] |
28 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_BASE_PTR[8] | PCIE:AER_BASE_PTR[9] |
29 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_BASE_PTR[10] | PCIE:AER_BASE_PTR[11] |
30 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
31 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
32 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_NEXTPTR[0] | PCIE:AER_CAP_NEXTPTR[1] |
33 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_NEXTPTR[2] | PCIE:AER_CAP_NEXTPTR[3] |
34 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_NEXTPTR[4] | PCIE:AER_CAP_NEXTPTR[5] |
35 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_NEXTPTR[6] | PCIE:AER_CAP_NEXTPTR[7] |
36 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_NEXTPTR[8] | PCIE:AER_CAP_NEXTPTR[9] |
37 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_NEXTPTR[10] | PCIE:AER_CAP_NEXTPTR[11] |
38 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_ON | - |
39 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
40 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[0] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[1] |
41 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[2] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[3] |
42 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[4] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[5] |
43 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[6] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[7] |
44 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[8] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[9] |
45 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[10] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[11] |
46 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[12] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[13] |
47 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[14] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[15] |
PCIE_R bittile 1 | ||||||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Row | Column | |||||||||||||||||||||||||||||
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[16] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[17] |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[18] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[19] |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[20] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[21] |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[22] | PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT[23] |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:AER_CAP_MULTIHEADER | - |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[0] | PCIE:BAR0[1] |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[2] | PCIE:BAR0[3] |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[4] | PCIE:BAR0[5] |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[6] | PCIE:BAR0[7] |
12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[8] | PCIE:BAR0[9] |
13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[10] | PCIE:BAR0[11] |
14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[12] | PCIE:BAR0[13] |
15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[14] | PCIE:BAR0[15] |
16 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[16] | PCIE:BAR0[17] |
17 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[18] | PCIE:BAR0[19] |
18 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[20] | PCIE:BAR0[21] |
19 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[22] | PCIE:BAR0[23] |
20 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[24] | PCIE:BAR0[25] |
21 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[26] | PCIE:BAR0[27] |
22 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[28] | PCIE:BAR0[29] |
23 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR0[30] | PCIE:BAR0[31] |
24 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[0] | PCIE:BAR1[1] |
25 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[2] | PCIE:BAR1[3] |
26 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[4] | PCIE:BAR1[5] |
27 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[6] | PCIE:BAR1[7] |
28 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[8] | PCIE:BAR1[9] |
29 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[10] | PCIE:BAR1[11] |
30 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[12] | PCIE:BAR1[13] |
31 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[14] | PCIE:BAR1[15] |
32 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[16] | PCIE:BAR1[17] |
33 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[18] | PCIE:BAR1[19] |
34 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[20] | PCIE:BAR1[21] |
35 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[22] | PCIE:BAR1[23] |
36 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[24] | PCIE:BAR1[25] |
37 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[26] | PCIE:BAR1[27] |
38 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[28] | PCIE:BAR1[29] |
39 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR1[30] | PCIE:BAR1[31] |
40 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[0] | PCIE:BAR2[1] |
41 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[2] | PCIE:BAR2[3] |
42 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[4] | PCIE:BAR2[5] |
43 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[6] | PCIE:BAR2[7] |
44 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[8] | PCIE:BAR2[9] |
45 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[10] | PCIE:BAR2[11] |
46 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[12] | PCIE:BAR2[13] |
47 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[14] | PCIE:BAR2[15] |
PCIE_R bittile 2 | ||||||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Row | Column | |||||||||||||||||||||||||||||
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[16] | PCIE:BAR2[17] |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[18] | PCIE:BAR2[19] |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[20] | PCIE:BAR2[21] |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[22] | PCIE:BAR2[23] |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[24] | PCIE:BAR2[25] |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[26] | PCIE:BAR2[27] |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[28] | PCIE:BAR2[29] |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR2[30] | PCIE:BAR2[31] |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[0] | PCIE:BAR3[1] |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[2] | PCIE:BAR3[3] |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[4] | PCIE:BAR3[5] |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[6] | PCIE:BAR3[7] |
12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[8] | PCIE:BAR3[9] |
13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[10] | PCIE:BAR3[11] |
14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[12] | PCIE:BAR3[13] |
15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[14] | PCIE:BAR3[15] |
16 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[16] | PCIE:BAR3[17] |
17 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[18] | PCIE:BAR3[19] |
18 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[20] | PCIE:BAR3[21] |
19 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[22] | PCIE:BAR3[23] |
20 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[24] | PCIE:BAR3[25] |
21 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[26] | PCIE:BAR3[27] |
22 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[28] | PCIE:BAR3[29] |
23 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR3[30] | PCIE:BAR3[31] |
24 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[0] | PCIE:BAR4[1] |
25 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[2] | PCIE:BAR4[3] |
26 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[4] | PCIE:BAR4[5] |
27 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[6] | PCIE:BAR4[7] |
28 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[8] | PCIE:BAR4[9] |
29 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[10] | PCIE:BAR4[11] |
30 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[12] | PCIE:BAR4[13] |
31 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[14] | PCIE:BAR4[15] |
32 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[16] | PCIE:BAR4[17] |
33 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[18] | PCIE:BAR4[19] |
34 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[20] | PCIE:BAR4[21] |
35 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[22] | PCIE:BAR4[23] |
36 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[24] | PCIE:BAR4[25] |
37 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[26] | PCIE:BAR4[27] |
38 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[28] | PCIE:BAR4[29] |
39 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR4[30] | PCIE:BAR4[31] |
40 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR5[0] | PCIE:BAR5[1] |
41 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR5[2] | PCIE:BAR5[3] |
42 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR5[4] | PCIE:BAR5[5] |
43 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR5[6] | PCIE:BAR5[7] |
44 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR5[8] | PCIE:BAR5[9] |
45 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR5[10] | PCIE:BAR5[11] |
46 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR5[12] | PCIE:BAR5[13] |
47 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:BAR5[14] | PCIE:BAR5[15] |
PCIE_R bittile 15 | ||||||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Row | Column | |||||||||||||||||||||||||||||
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | |
0 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:VSEC_CAP_VERSION[0] | PCIE:VSEC_CAP_VERSION[1] |
1 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:VSEC_CAP_VERSION[2] | PCIE:VSEC_CAP_VERSION[3] |
2 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:USER_CLK_FREQ[0] | PCIE:USER_CLK_FREQ[1] |
3 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:USER_CLK_FREQ[2] | PCIE:CRM_MODULE_RSTS[0] |
4 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:CRM_MODULE_RSTS[1] | PCIE:CRM_MODULE_RSTS[2] |
5 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:CRM_MODULE_RSTS[3] | PCIE:CRM_MODULE_RSTS[4] |
6 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:CRM_MODULE_RSTS[5] | PCIE:CRM_MODULE_RSTS[6] |
7 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
8 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_ACK_TIMEOUT[0] | PCIE:LL_ACK_TIMEOUT[1] |
9 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_ACK_TIMEOUT[2] | PCIE:LL_ACK_TIMEOUT[3] |
10 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_ACK_TIMEOUT[4] | PCIE:LL_ACK_TIMEOUT[5] |
11 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_ACK_TIMEOUT[6] | PCIE:LL_ACK_TIMEOUT[7] |
12 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_ACK_TIMEOUT[8] | PCIE:LL_ACK_TIMEOUT[9] |
13 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_ACK_TIMEOUT[10] | PCIE:LL_ACK_TIMEOUT[11] |
14 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_ACK_TIMEOUT[12] | PCIE:LL_ACK_TIMEOUT[13] |
15 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_ACK_TIMEOUT[14] | PCIE:LL_ACK_TIMEOUT_EN |
16 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_ACK_TIMEOUT_FUNC[0] | PCIE:LL_ACK_TIMEOUT_FUNC[1] |
17 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
18 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
19 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
20 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
21 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
22 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
23 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
24 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_REPLAY_TIMEOUT[0] | PCIE:LL_REPLAY_TIMEOUT[1] |
25 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_REPLAY_TIMEOUT[2] | PCIE:LL_REPLAY_TIMEOUT[3] |
26 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_REPLAY_TIMEOUT[4] | PCIE:LL_REPLAY_TIMEOUT[5] |
27 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_REPLAY_TIMEOUT[6] | PCIE:LL_REPLAY_TIMEOUT[7] |
28 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_REPLAY_TIMEOUT[8] | PCIE:LL_REPLAY_TIMEOUT[9] |
29 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_REPLAY_TIMEOUT[10] | PCIE:LL_REPLAY_TIMEOUT[11] |
30 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_REPLAY_TIMEOUT[12] | PCIE:LL_REPLAY_TIMEOUT[13] |
31 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_REPLAY_TIMEOUT[14] | PCIE:LL_REPLAY_TIMEOUT_EN |
32 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:LL_REPLAY_TIMEOUT_FUNC[0] | PCIE:LL_REPLAY_TIMEOUT_FUNC[1] |
33 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
34 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
35 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
36 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
37 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
38 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
39 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
40 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:PM_ASPML0S_TIMEOUT[0] | PCIE:PM_ASPML0S_TIMEOUT[1] |
41 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:PM_ASPML0S_TIMEOUT[2] | PCIE:PM_ASPML0S_TIMEOUT[3] |
42 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:PM_ASPML0S_TIMEOUT[4] | PCIE:PM_ASPML0S_TIMEOUT[5] |
43 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:PM_ASPML0S_TIMEOUT[6] | PCIE:PM_ASPML0S_TIMEOUT[7] |
44 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:PM_ASPML0S_TIMEOUT[8] | PCIE:PM_ASPML0S_TIMEOUT[9] |
45 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:PM_ASPML0S_TIMEOUT[10] | PCIE:PM_ASPML0S_TIMEOUT[11] |
46 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:PM_ASPML0S_TIMEOUT[12] | PCIE:PM_ASPML0S_TIMEOUT[13] |
47 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | PCIE:PM_ASPML0S_TIMEOUT[14] | PCIE:PM_ASPML0S_TIMEOUT_EN |
PCIE:AER_CAP_ECRC_CHECK_CAPABLE | [0, 28, 0] |
---|---|
PCIE:AER_CAP_ECRC_GEN_CAPABLE | [0, 29, 0] |
PCIE:AER_CAP_MULTIHEADER | [1, 28, 4] |
PCIE:AER_CAP_ON | [0, 28, 38] |
PCIE:AER_CAP_PERMIT_ROOTERR_UPDATE | [0, 28, 16] |
PCIE:ALLOW_X8_GEN2 | [16, 28, 32] |
PCIE:CMD_INTX_IMPLEMENTED | [4, 28, 12] |
PCIE:CPL_TIMEOUT_DISABLE_SUPPORTED | [4, 29, 12] |
PCIE:DEV_CAP2_ARI_FORWARDING_SUPPORTED | [4, 28, 15] |
PCIE:DEV_CAP2_ATOMICOP32_COMPLETER_SUPPORTED | [4, 28, 16] |
PCIE:DEV_CAP2_ATOMICOP64_COMPLETER_SUPPORTED | [4, 29, 16] |
PCIE:DEV_CAP2_ATOMICOP_ROUTING_SUPPORTED | [4, 29, 15] |
PCIE:DEV_CAP2_CAS128_COMPLETER_SUPPORTED | [4, 28, 17] |
PCIE:DEV_CAP2_ENDEND_TLP_PREFIX_SUPPORTED | [4, 28, 20] |
PCIE:DEV_CAP2_EXTENDED_FMT_FIELD_SUPPORTED | [4, 29, 19] |
PCIE:DEV_CAP2_LTR_MECHANISM_SUPPORTED | [4, 28, 18] |
PCIE:DEV_CAP2_NO_RO_ENABLED_PRPR_PASSING | [4, 29, 17] |
PCIE:DEV_CAP_ENABLE_SLOT_PWR_LIMIT_SCALE | [4, 28, 22] |
PCIE:DEV_CAP_ENABLE_SLOT_PWR_LIMIT_VALUE | [4, 29, 22] |
PCIE:DEV_CAP_EXT_TAG_SUPPORTED | [4, 28, 27] |
PCIE:DEV_CAP_FUNCTION_LEVEL_RESET_CAPABLE | [4, 29, 27] |
PCIE:DEV_CAP_ROLE_BASED_ERROR | [4, 29, 30] |
PCIE:DEV_CONTROL_AUX_POWER_SUPPORTED | [4, 28, 36] |
PCIE:DEV_CONTROL_EXT_TAG_DEFAULT | [4, 29, 36] |
PCIE:DISABLE_ASPM_L1_TIMER | [16, 28, 40] |
PCIE:DISABLE_BAR_FILTERING | [16, 29, 40] |
PCIE:DISABLE_ERR_MSG | [17, 29, 5] |
PCIE:DISABLE_ID_CHECK | [16, 28, 41] |
PCIE:DISABLE_LANE_REVERSAL | [16, 29, 1] |
PCIE:DISABLE_LOCKED_FILTER | [17, 29, 4] |
PCIE:DISABLE_PPM_FILTER | [17, 28, 4] |
PCIE:DISABLE_RX_POISONED_RESP | [16, 28, 42] |
PCIE:DISABLE_RX_TC_FILTER | [16, 29, 41] |
PCIE:DISABLE_SCRAMBLING | [16, 28, 2] |
PCIE:DSN_CAP_ON | [5, 28, 14] |
PCIE:ENABLE_RX_TD_ECRC_TRIM | [17, 28, 0] |
PCIE:ENDEND_TLP_PREFIX_FORWARDING_SUPPORTED | [4, 29, 21] |
PCIE:ENTER_RVRY_EI_L0 | [16, 29, 2] |
PCIE:EXIT_LOOPBACK_ON_EI | [16, 29, 35] |
PCIE:INTERRUPT_STAT_AUTO | [5, 28, 40] |
PCIE:IS_SWITCH | [5, 29, 40] |
PCIE:LINK_CAP_ASPM_OPTIONALITY | [6, 28, 15] |
PCIE:LINK_CAP_CLOCK_POWER_MANAGEMENT | [5, 28, 47] |
PCIE:LINK_CAP_DLL_LINK_ACTIVE_REPORTING_CAP | [5, 29, 47] |
PCIE:LINK_CAP_LINK_BANDWIDTH_NOTIFICATION_CAP | [6, 29, 12] |
PCIE:LINK_CAP_RSVD_23 | [6, 29, 15] |
PCIE:LINK_CAP_SURPRISE_DOWN_ERROR_CAPABLE | [6, 28, 16] |
PCIE:LINK_CONTROL_RCB | [6, 29, 16] |
PCIE:LINK_CTRL2_DEEMPHASIS | [6, 28, 17] |
PCIE:LINK_CTRL2_HW_AUTONOMOUS_SPEED_DISABLE | [6, 29, 17] |
PCIE:LINK_STATUS_SLOT_CLOCK_CONFIG | [6, 28, 20] |
PCIE:LL_ACK_TIMEOUT_EN | [15, 29, 15] |
PCIE:LL_REPLAY_TIMEOUT_EN | [15, 29, 31] |
PCIE:MPS_FORCE | [6, 29, 20] |
PCIE:MSIX_CAP_ON | [7, 28, 12] |
PCIE:MSI_CAP_64_BIT_ADDR_CAPABLE | [6, 28, 28] |
PCIE:MSI_CAP_MULTIMSG_EXTENSION | [6, 28, 36] |
PCIE:MSI_CAP_ON | [6, 28, 44] |
PCIE:MSI_CAP_PER_VECTOR_MASKING_CAPABLE | [6, 29, 44] |
PCIE:PCIE_CAP_ON | [8, 28, 24] |
PCIE:PCIE_CAP_SLOT_IMPLEMENTED | [8, 29, 25] |
PCIE:PL_FAST_TRAIN | [16, 28, 34] |
PCIE:PM_ASPML0S_TIMEOUT_EN | [15, 29, 47] |
PCIE:PM_ASPM_FASTEXIT | [16, 28, 1] |
PCIE:PM_CAP_D1SUPPORT | [8, 29, 33] |
PCIE:PM_CAP_D2SUPPORT | [8, 28, 34] |
PCIE:PM_CAP_DSI | [8, 29, 34] |
PCIE:PM_CAP_ON | [8, 28, 44] |
PCIE:PM_CAP_PME_CLOCK | [8, 29, 44] |
PCIE:PM_CAP_RSVD_04 | [8, 29, 47] |
PCIE:PM_CSR_B2B3 | [9, 29, 1] |
PCIE:PM_CSR_BPCCEN | [9, 28, 2] |
PCIE:PM_CSR_NOSOFTRST | [9, 29, 2] |
PCIE:PM_MF | [17, 28, 6] |
PCIE:RBAR_CAP_ON | [10, 28, 14] |
PCIE:RECRC_CHK_TRIM | [18, 28, 15] |
PCIE:ROOT_CAP_CRS_SW_VISIBILITY | [13, 29, 10] |
PCIE:SELECT_DLL_IF | [13, 28, 11] |
PCIE:SLOT_CAP_ATT_BUTTON_PRESENT | [13, 29, 11] |
PCIE:SLOT_CAP_ATT_INDICATOR_PRESENT | [13, 28, 12] |
PCIE:SLOT_CAP_ELEC_INTERLOCK_PRESENT | [13, 29, 12] |
PCIE:SLOT_CAP_HOTPLUG_CAPABLE | [13, 28, 13] |
PCIE:SLOT_CAP_HOTPLUG_SURPRISE | [13, 29, 13] |
PCIE:SLOT_CAP_MRL_SENSOR_PRESENT | [13, 28, 14] |
PCIE:SLOT_CAP_NO_CMD_COMPLETED_SUPPORT | [13, 29, 14] |
PCIE:SLOT_CAP_POWER_CONTROLLER_PRESENT | [13, 29, 22] |
PCIE:SLOT_CAP_POWER_INDICATOR_PRESENT | [13, 28, 23] |
PCIE:SPARE_BIT0 | [18, 29, 24] |
PCIE:SPARE_BIT1 | [18, 28, 25] |
PCIE:SPARE_BIT2 | [18, 29, 25] |
PCIE:SPARE_BIT3 | [18, 28, 26] |
PCIE:SPARE_BIT4 | [18, 29, 26] |
PCIE:SPARE_BIT5 | [18, 28, 27] |
PCIE:SPARE_BIT6 | [18, 29, 27] |
PCIE:SPARE_BIT7 | [18, 28, 28] |
PCIE:SPARE_BIT8 | [18, 29, 28] |
PCIE:SSL_MESSAGE_AUTO | [13, 28, 29] |
PCIE:TECRC_EP_INV | [18, 29, 15] |
PCIE:TEST_MODE_PIN_CHAR | [18, 28, 24] |
PCIE:TL_RBYPASS | [17, 29, 3] |
PCIE:TL_RX_RAM_RADDR_LATENCY | [17, 29, 0] |
PCIE:TL_RX_RAM_WRITE_LATENCY | [17, 28, 2] |
PCIE:TL_TFC_DISABLE | [17, 29, 2] |
PCIE:TL_TX_CHECKS_DISABLE | [17, 28, 3] |
PCIE:TL_TX_RAM_RADDR_LATENCY | [17, 29, 6] |
PCIE:TL_TX_RAM_WRITE_LATENCY | [17, 28, 8] |
PCIE:TRN_DW | [18, 28, 19] |
PCIE:TRN_NP_FC | [18, 29, 19] |
PCIE:UPCONFIG_CAPABLE | [16, 29, 34] |
PCIE:UPSTREAM_FACING | [16, 28, 35] |
PCIE:UR_ATOMIC | [18, 28, 18] |
PCIE:UR_CFG1 | [18, 29, 18] |
PCIE:UR_INV_REQ | [18, 28, 17] |
PCIE:UR_PRS_RESPONSE | [18, 29, 17] |
PCIE:USER_CLK2_DIV2 | [18, 28, 20] |
PCIE:USE_RID_PINS | [17, 28, 5] |
PCIE:VC0_CPL_INFINITE | [17, 29, 10] |
PCIE:VC_CAP_ON | [13, 28, 46] |
PCIE:VC_CAP_REJECT_SNOOP_TRANSACTIONS | [14, 28, 8] |
PCIE:VSEC_CAP_IS_LINK_VISIBLE | [14, 28, 40] |
PCIE:VSEC_CAP_ON | [14, 29, 46] |
Non-inverted | [0] |
PCIE:AER_CAP_ID | [0, 29, 15] | [0, 28, 15] | [0, 29, 14] | [0, 28, 14] | [0, 29, 13] | [0, 28, 13] | [0, 29, 12] | [0, 28, 12] | [0, 29, 11] | [0, 28, 11] | [0, 29, 10] | [0, 28, 10] | [0, 29, 9] | [0, 28, 9] | [0, 29, 8] | [0, 28, 8] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PCIE:DSN_CAP_ID | [5, 29, 7] | [5, 28, 7] | [5, 29, 6] | [5, 28, 6] | [5, 29, 5] | [5, 28, 5] | [5, 29, 4] | [5, 28, 4] | [5, 29, 3] | [5, 28, 3] | [5, 29, 2] | [5, 28, 2] | [5, 29, 1] | [5, 28, 1] | [5, 29, 0] | [5, 28, 0] |
PCIE:RBAR_CAP_ID | [10, 29, 23] | [10, 28, 23] | [10, 29, 22] | [10, 28, 22] | [10, 29, 21] | [10, 28, 21] | [10, 29, 20] | [10, 28, 20] | [10, 29, 19] | [10, 28, 19] | [10, 29, 18] | [10, 28, 18] | [10, 29, 17] | [10, 28, 17] | [10, 29, 16] | [10, 28, 16] |
PCIE:VC_CAP_ID | [14, 29, 7] | [14, 28, 7] | [14, 29, 6] | [14, 28, 6] | [14, 29, 5] | [14, 28, 5] | [14, 29, 4] | [14, 28, 4] | [14, 29, 3] | [14, 28, 3] | [14, 29, 2] | [14, 28, 2] | [14, 29, 1] | [14, 28, 1] | [14, 29, 0] | [14, 28, 0] |
PCIE:VSEC_CAP_HDR_ID | [14, 29, 23] | [14, 28, 23] | [14, 29, 22] | [14, 28, 22] | [14, 29, 21] | [14, 28, 21] | [14, 29, 20] | [14, 28, 20] | [14, 29, 19] | [14, 28, 19] | [14, 29, 18] | [14, 28, 18] | [14, 29, 17] | [14, 28, 17] | [14, 29, 16] | [14, 28, 16] |
PCIE:VSEC_CAP_ID | [14, 29, 39] | [14, 28, 39] | [14, 29, 38] | [14, 28, 38] | [14, 29, 37] | [14, 28, 37] | [14, 29, 36] | [14, 28, 36] | [14, 29, 35] | [14, 28, 35] | [14, 29, 34] | [14, 28, 34] | [14, 29, 33] | [14, 28, 33] | [14, 29, 32] | [14, 28, 32] |
Non-inverted | [15] | [14] | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:AER_BASE_PTR | [0, 29, 29] | [0, 28, 29] | [0, 29, 28] | [0, 28, 28] | [0, 29, 27] | [0, 28, 27] | [0, 29, 26] | [0, 28, 26] | [0, 29, 25] | [0, 28, 25] | [0, 29, 24] | [0, 28, 24] |
---|---|---|---|---|---|---|---|---|---|---|---|---|
PCIE:AER_CAP_NEXTPTR | [0, 29, 37] | [0, 28, 37] | [0, 29, 36] | [0, 28, 36] | [0, 29, 35] | [0, 28, 35] | [0, 29, 34] | [0, 28, 34] | [0, 29, 33] | [0, 28, 33] | [0, 29, 32] | [0, 28, 32] |
PCIE:DSN_BASE_PTR | [4, 29, 45] | [4, 28, 45] | [4, 29, 44] | [4, 28, 44] | [4, 29, 43] | [4, 28, 43] | [4, 29, 42] | [4, 28, 42] | [4, 29, 41] | [4, 28, 41] | [4, 29, 40] | [4, 28, 40] |
PCIE:DSN_CAP_NEXTPTR | [5, 29, 13] | [5, 28, 13] | [5, 29, 12] | [5, 28, 12] | [5, 29, 11] | [5, 28, 11] | [5, 29, 10] | [5, 28, 10] | [5, 29, 9] | [5, 28, 9] | [5, 29, 8] | [5, 28, 8] |
PCIE:RBAR_BASE_PTR | [10, 29, 5] | [10, 28, 5] | [10, 29, 4] | [10, 28, 4] | [10, 29, 3] | [10, 28, 3] | [10, 29, 2] | [10, 28, 2] | [10, 29, 1] | [10, 28, 1] | [10, 29, 0] | [10, 28, 0] |
PCIE:RBAR_CAP_NEXTPTR | [10, 29, 13] | [10, 28, 13] | [10, 29, 12] | [10, 28, 12] | [10, 29, 11] | [10, 28, 11] | [10, 29, 10] | [10, 28, 10] | [10, 29, 9] | [10, 28, 9] | [10, 29, 8] | [10, 28, 8] |
PCIE:VC_BASE_PTR | [13, 29, 37] | [13, 28, 37] | [13, 29, 36] | [13, 28, 36] | [13, 29, 35] | [13, 28, 35] | [13, 29, 34] | [13, 28, 34] | [13, 29, 33] | [13, 28, 33] | [13, 29, 32] | [13, 28, 32] |
PCIE:VC_CAP_NEXTPTR | [13, 29, 45] | [13, 28, 45] | [13, 29, 44] | [13, 28, 44] | [13, 29, 43] | [13, 28, 43] | [13, 29, 42] | [13, 28, 42] | [13, 29, 41] | [13, 28, 41] | [13, 29, 40] | [13, 28, 40] |
PCIE:VSEC_BASE_PTR | [14, 28, 14] | [14, 29, 13] | [14, 28, 13] | [14, 29, 12] | [14, 28, 12] | [14, 29, 11] | [14, 28, 11] | [14, 29, 10] | [14, 28, 10] | [14, 29, 9] | [14, 28, 9] | [14, 29, 8] |
PCIE:VSEC_CAP_HDR_LENGTH | [14, 29, 29] | [14, 28, 29] | [14, 29, 28] | [14, 28, 28] | [14, 29, 27] | [14, 28, 27] | [14, 29, 26] | [14, 28, 26] | [14, 29, 25] | [14, 28, 25] | [14, 29, 24] | [14, 28, 24] |
PCIE:VSEC_CAP_NEXTPTR | [14, 28, 46] | [14, 29, 45] | [14, 28, 45] | [14, 29, 44] | [14, 28, 44] | [14, 29, 43] | [14, 28, 43] | [14, 29, 42] | [14, 28, 42] | [14, 29, 41] | [14, 28, 41] | [14, 29, 40] |
Non-inverted | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:AER_CAP_OPTIONAL_ERR_SUPPORT | [1, 29, 3] | [1, 28, 3] | [1, 29, 2] | [1, 28, 2] | [1, 29, 1] | [1, 28, 1] | [1, 29, 0] | [1, 28, 0] | [0, 29, 47] | [0, 28, 47] | [0, 29, 46] | [0, 28, 46] | [0, 29, 45] | [0, 28, 45] | [0, 29, 44] | [0, 28, 44] | [0, 29, 43] | [0, 28, 43] | [0, 29, 42] | [0, 28, 42] | [0, 29, 41] | [0, 28, 41] | [0, 29, 40] | [0, 28, 40] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PCIE:CLASS_CODE | [4, 29, 11] | [4, 28, 11] | [4, 29, 10] | [4, 28, 10] | [4, 29, 9] | [4, 28, 9] | [4, 29, 8] | [4, 28, 8] | [4, 29, 7] | [4, 28, 7] | [4, 29, 6] | [4, 28, 6] | [4, 29, 5] | [4, 28, 5] | [4, 29, 4] | [4, 28, 4] | [4, 29, 3] | [4, 28, 3] | [4, 29, 2] | [4, 28, 2] | [4, 29, 1] | [4, 28, 1] | [4, 29, 0] | [4, 28, 0] |
Non-inverted | [23] | [22] | [21] | [20] | [19] | [18] | [17] | [16] | [15] | [14] | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:AER_CAP_VERSION | [0, 28, 18] | [0, 29, 17] | [0, 28, 17] | [0, 29, 16] |
---|---|---|---|---|
PCIE:CPL_TIMEOUT_RANGES_SUPPORTED | [4, 29, 14] | [4, 28, 14] | [4, 29, 13] | [4, 28, 13] |
PCIE:DSN_CAP_VERSION | [5, 29, 17] | [5, 28, 17] | [5, 29, 16] | [5, 28, 16] |
PCIE:LINK_CAP_MAX_LINK_SPEED | [6, 29, 14] | [6, 28, 14] | [6, 29, 13] | [6, 28, 13] |
PCIE:LINK_CTRL2_TARGET_LINK_SPEED | [6, 29, 19] | [6, 28, 19] | [6, 29, 18] | [6, 28, 18] |
PCIE:PCIE_CAP_CAPABILITY_VERSION | [8, 29, 17] | [8, 28, 17] | [8, 29, 16] | [8, 28, 16] |
PCIE:PCIE_CAP_DEVICE_PORT_TYPE | [8, 29, 19] | [8, 28, 19] | [8, 29, 18] | [8, 28, 18] |
PCIE:PCIE_REVISION | [8, 29, 27] | [8, 28, 27] | [8, 29, 26] | [8, 28, 26] |
PCIE:RBAR_CAP_VERSION | [10, 29, 25] | [10, 28, 25] | [10, 29, 24] | [10, 28, 24] |
PCIE:VC_CAP_VERSION | [17, 28, 10] | [17, 29, 9] | [17, 28, 9] | [17, 29, 8] |
PCIE:VSEC_CAP_HDR_REVISION | [14, 29, 31] | [14, 28, 31] | [14, 29, 30] | [14, 28, 30] |
PCIE:VSEC_CAP_VERSION | [15, 29, 1] | [15, 28, 1] | [15, 29, 0] | [15, 28, 0] |
Non-inverted | [3] | [2] | [1] | [0] |
PCIE:BAR0 | [1, 29, 23] | [1, 28, 23] | [1, 29, 22] | [1, 28, 22] | [1, 29, 21] | [1, 28, 21] | [1, 29, 20] | [1, 28, 20] | [1, 29, 19] | [1, 28, 19] | [1, 29, 18] | [1, 28, 18] | [1, 29, 17] | [1, 28, 17] | [1, 29, 16] | [1, 28, 16] | [1, 29, 15] | [1, 28, 15] | [1, 29, 14] | [1, 28, 14] | [1, 29, 13] | [1, 28, 13] | [1, 29, 12] | [1, 28, 12] | [1, 29, 11] | [1, 28, 11] | [1, 29, 10] | [1, 28, 10] | [1, 29, 9] | [1, 28, 9] | [1, 29, 8] | [1, 28, 8] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PCIE:BAR1 | [1, 29, 39] | [1, 28, 39] | [1, 29, 38] | [1, 28, 38] | [1, 29, 37] | [1, 28, 37] | [1, 29, 36] | [1, 28, 36] | [1, 29, 35] | [1, 28, 35] | [1, 29, 34] | [1, 28, 34] | [1, 29, 33] | [1, 28, 33] | [1, 29, 32] | [1, 28, 32] | [1, 29, 31] | [1, 28, 31] | [1, 29, 30] | [1, 28, 30] | [1, 29, 29] | [1, 28, 29] | [1, 29, 28] | [1, 28, 28] | [1, 29, 27] | [1, 28, 27] | [1, 29, 26] | [1, 28, 26] | [1, 29, 25] | [1, 28, 25] | [1, 29, 24] | [1, 28, 24] |
PCIE:BAR2 | [2, 29, 7] | [2, 28, 7] | [2, 29, 6] | [2, 28, 6] | [2, 29, 5] | [2, 28, 5] | [2, 29, 4] | [2, 28, 4] | [2, 29, 3] | [2, 28, 3] | [2, 29, 2] | [2, 28, 2] | [2, 29, 1] | [2, 28, 1] | [2, 29, 0] | [2, 28, 0] | [1, 29, 47] | [1, 28, 47] | [1, 29, 46] | [1, 28, 46] | [1, 29, 45] | [1, 28, 45] | [1, 29, 44] | [1, 28, 44] | [1, 29, 43] | [1, 28, 43] | [1, 29, 42] | [1, 28, 42] | [1, 29, 41] | [1, 28, 41] | [1, 29, 40] | [1, 28, 40] |
PCIE:BAR3 | [2, 29, 23] | [2, 28, 23] | [2, 29, 22] | [2, 28, 22] | [2, 29, 21] | [2, 28, 21] | [2, 29, 20] | [2, 28, 20] | [2, 29, 19] | [2, 28, 19] | [2, 29, 18] | [2, 28, 18] | [2, 29, 17] | [2, 28, 17] | [2, 29, 16] | [2, 28, 16] | [2, 29, 15] | [2, 28, 15] | [2, 29, 14] | [2, 28, 14] | [2, 29, 13] | [2, 28, 13] | [2, 29, 12] | [2, 28, 12] | [2, 29, 11] | [2, 28, 11] | [2, 29, 10] | [2, 28, 10] | [2, 29, 9] | [2, 28, 9] | [2, 29, 8] | [2, 28, 8] |
PCIE:BAR4 | [2, 29, 39] | [2, 28, 39] | [2, 29, 38] | [2, 28, 38] | [2, 29, 37] | [2, 28, 37] | [2, 29, 36] | [2, 28, 36] | [2, 29, 35] | [2, 28, 35] | [2, 29, 34] | [2, 28, 34] | [2, 29, 33] | [2, 28, 33] | [2, 29, 32] | [2, 28, 32] | [2, 29, 31] | [2, 28, 31] | [2, 29, 30] | [2, 28, 30] | [2, 29, 29] | [2, 28, 29] | [2, 29, 28] | [2, 28, 28] | [2, 29, 27] | [2, 28, 27] | [2, 29, 26] | [2, 28, 26] | [2, 29, 25] | [2, 28, 25] | [2, 29, 24] | [2, 28, 24] |
PCIE:BAR5 | [3, 29, 7] | [3, 28, 7] | [3, 29, 6] | [3, 28, 6] | [3, 29, 5] | [3, 28, 5] | [3, 29, 4] | [3, 28, 4] | [3, 29, 3] | [3, 28, 3] | [3, 29, 2] | [3, 28, 2] | [3, 29, 1] | [3, 28, 1] | [3, 29, 0] | [3, 28, 0] | [2, 29, 47] | [2, 28, 47] | [2, 29, 46] | [2, 28, 46] | [2, 29, 45] | [2, 28, 45] | [2, 29, 44] | [2, 28, 44] | [2, 29, 43] | [2, 28, 43] | [2, 29, 42] | [2, 28, 42] | [2, 29, 41] | [2, 28, 41] | [2, 29, 40] | [2, 28, 40] |
PCIE:CARDBUS_CIS_POINTER | [3, 29, 47] | [3, 28, 47] | [3, 29, 46] | [3, 28, 46] | [3, 29, 45] | [3, 28, 45] | [3, 29, 44] | [3, 28, 44] | [3, 29, 43] | [3, 28, 43] | [3, 29, 42] | [3, 28, 42] | [3, 29, 41] | [3, 28, 41] | [3, 29, 40] | [3, 28, 40] | [3, 29, 39] | [3, 28, 39] | [3, 29, 38] | [3, 28, 38] | [3, 29, 37] | [3, 28, 37] | [3, 29, 36] | [3, 28, 36] | [3, 29, 35] | [3, 28, 35] | [3, 29, 34] | [3, 28, 34] | [3, 29, 33] | [3, 28, 33] | [3, 29, 32] | [3, 28, 32] |
PCIE:EXPANSION_ROM | [3, 29, 23] | [3, 28, 23] | [3, 29, 22] | [3, 28, 22] | [3, 29, 21] | [3, 28, 21] | [3, 29, 20] | [3, 28, 20] | [3, 29, 19] | [3, 28, 19] | [3, 29, 18] | [3, 28, 18] | [3, 29, 17] | [3, 28, 17] | [3, 29, 16] | [3, 28, 16] | [3, 29, 15] | [3, 28, 15] | [3, 29, 14] | [3, 28, 14] | [3, 29, 13] | [3, 28, 13] | [3, 29, 12] | [3, 28, 12] | [3, 29, 11] | [3, 28, 11] | [3, 29, 10] | [3, 28, 10] | [3, 29, 9] | [3, 28, 9] | [3, 29, 8] | [3, 28, 8] |
PCIE:RBAR_CAP_SUP0 | [10, 29, 47] | [10, 28, 47] | [10, 29, 46] | [10, 28, 46] | [10, 29, 45] | [10, 28, 45] | [10, 29, 44] | [10, 28, 44] | [10, 29, 43] | [10, 28, 43] | [10, 29, 42] | [10, 28, 42] | [10, 29, 41] | [10, 28, 41] | [10, 29, 40] | [10, 28, 40] | [10, 29, 39] | [10, 28, 39] | [10, 29, 38] | [10, 28, 38] | [10, 29, 37] | [10, 28, 37] | [10, 29, 36] | [10, 28, 36] | [10, 29, 35] | [10, 28, 35] | [10, 29, 34] | [10, 28, 34] | [10, 29, 33] | [10, 28, 33] | [10, 29, 32] | [10, 28, 32] |
PCIE:RBAR_CAP_SUP1 | [11, 29, 15] | [11, 28, 15] | [11, 29, 14] | [11, 28, 14] | [11, 29, 13] | [11, 28, 13] | [11, 29, 12] | [11, 28, 12] | [11, 29, 11] | [11, 28, 11] | [11, 29, 10] | [11, 28, 10] | [11, 29, 9] | [11, 28, 9] | [11, 29, 8] | [11, 28, 8] | [11, 29, 7] | [11, 28, 7] | [11, 29, 6] | [11, 28, 6] | [11, 29, 5] | [11, 28, 5] | [11, 29, 4] | [11, 28, 4] | [11, 29, 3] | [11, 28, 3] | [11, 29, 2] | [11, 28, 2] | [11, 29, 1] | [11, 28, 1] | [11, 29, 0] | [11, 28, 0] |
PCIE:RBAR_CAP_SUP2 | [11, 29, 31] | [11, 28, 31] | [11, 29, 30] | [11, 28, 30] | [11, 29, 29] | [11, 28, 29] | [11, 29, 28] | [11, 28, 28] | [11, 29, 27] | [11, 28, 27] | [11, 29, 26] | [11, 28, 26] | [11, 29, 25] | [11, 28, 25] | [11, 29, 24] | [11, 28, 24] | [11, 29, 23] | [11, 28, 23] | [11, 29, 22] | [11, 28, 22] | [11, 29, 21] | [11, 28, 21] | [11, 29, 20] | [11, 28, 20] | [11, 29, 19] | [11, 28, 19] | [11, 29, 18] | [11, 28, 18] | [11, 29, 17] | [11, 28, 17] | [11, 29, 16] | [11, 28, 16] |
PCIE:RBAR_CAP_SUP3 | [11, 29, 47] | [11, 28, 47] | [11, 29, 46] | [11, 28, 46] | [11, 29, 45] | [11, 28, 45] | [11, 29, 44] | [11, 28, 44] | [11, 29, 43] | [11, 28, 43] | [11, 29, 42] | [11, 28, 42] | [11, 29, 41] | [11, 28, 41] | [11, 29, 40] | [11, 28, 40] | [11, 29, 39] | [11, 28, 39] | [11, 29, 38] | [11, 28, 38] | [11, 29, 37] | [11, 28, 37] | [11, 29, 36] | [11, 28, 36] | [11, 29, 35] | [11, 28, 35] | [11, 29, 34] | [11, 28, 34] | [11, 29, 33] | [11, 28, 33] | [11, 29, 32] | [11, 28, 32] |
PCIE:RBAR_CAP_SUP4 | [12, 29, 15] | [12, 28, 15] | [12, 29, 14] | [12, 28, 14] | [12, 29, 13] | [12, 28, 13] | [12, 29, 12] | [12, 28, 12] | [12, 29, 11] | [12, 28, 11] | [12, 29, 10] | [12, 28, 10] | [12, 29, 9] | [12, 28, 9] | [12, 29, 8] | [12, 28, 8] | [12, 29, 7] | [12, 28, 7] | [12, 29, 6] | [12, 28, 6] | [12, 29, 5] | [12, 28, 5] | [12, 29, 4] | [12, 28, 4] | [12, 29, 3] | [12, 28, 3] | [12, 29, 2] | [12, 28, 2] | [12, 29, 1] | [12, 28, 1] | [12, 29, 0] | [12, 28, 0] |
PCIE:RBAR_CAP_SUP5 | [12, 29, 31] | [12, 28, 31] | [12, 29, 30] | [12, 28, 30] | [12, 29, 29] | [12, 28, 29] | [12, 29, 28] | [12, 28, 28] | [12, 29, 27] | [12, 28, 27] | [12, 29, 26] | [12, 28, 26] | [12, 29, 25] | [12, 28, 25] | [12, 29, 24] | [12, 28, 24] | [12, 29, 23] | [12, 28, 23] | [12, 29, 22] | [12, 28, 22] | [12, 29, 21] | [12, 28, 21] | [12, 29, 20] | [12, 28, 20] | [12, 29, 19] | [12, 28, 19] | [12, 29, 18] | [12, 28, 18] | [12, 29, 17] | [12, 28, 17] | [12, 29, 16] | [12, 28, 16] |
PCIE:SPARE_WORD0 | [19, 29, 15] | [19, 28, 15] | [19, 29, 14] | [19, 28, 14] | [19, 29, 13] | [19, 28, 13] | [19, 29, 12] | [19, 28, 12] | [19, 29, 11] | [19, 28, 11] | [19, 29, 10] | [19, 28, 10] | [19, 29, 9] | [19, 28, 9] | [19, 29, 8] | [19, 28, 8] | [19, 29, 7] | [19, 28, 7] | [19, 29, 6] | [19, 28, 6] | [19, 29, 5] | [19, 28, 5] | [19, 29, 4] | [19, 28, 4] | [19, 29, 3] | [19, 28, 3] | [19, 29, 2] | [19, 28, 2] | [19, 29, 1] | [19, 28, 1] | [19, 29, 0] | [19, 28, 0] |
PCIE:SPARE_WORD1 | [19, 29, 31] | [19, 28, 31] | [19, 29, 30] | [19, 28, 30] | [19, 29, 29] | [19, 28, 29] | [19, 29, 28] | [19, 28, 28] | [19, 29, 27] | [19, 28, 27] | [19, 29, 26] | [19, 28, 26] | [19, 29, 25] | [19, 28, 25] | [19, 29, 24] | [19, 28, 24] | [19, 29, 23] | [19, 28, 23] | [19, 29, 22] | [19, 28, 22] | [19, 29, 21] | [19, 28, 21] | [19, 29, 20] | [19, 28, 20] | [19, 29, 19] | [19, 28, 19] | [19, 29, 18] | [19, 28, 18] | [19, 29, 17] | [19, 28, 17] | [19, 29, 16] | [19, 28, 16] |
PCIE:SPARE_WORD2 | [19, 29, 47] | [19, 28, 47] | [19, 29, 46] | [19, 28, 46] | [19, 29, 45] | [19, 28, 45] | [19, 29, 44] | [19, 28, 44] | [19, 29, 43] | [19, 28, 43] | [19, 29, 42] | [19, 28, 42] | [19, 29, 41] | [19, 28, 41] | [19, 29, 40] | [19, 28, 40] | [19, 29, 39] | [19, 28, 39] | [19, 29, 38] | [19, 28, 38] | [19, 29, 37] | [19, 28, 37] | [19, 29, 36] | [19, 28, 36] | [19, 29, 35] | [19, 28, 35] | [19, 29, 34] | [19, 28, 34] | [19, 29, 33] | [19, 28, 33] | [19, 29, 32] | [19, 28, 32] |
PCIE:SPARE_WORD3 | [20, 29, 15] | [20, 28, 15] | [20, 29, 14] | [20, 28, 14] | [20, 29, 13] | [20, 28, 13] | [20, 29, 12] | [20, 28, 12] | [20, 29, 11] | [20, 28, 11] | [20, 29, 10] | [20, 28, 10] | [20, 29, 9] | [20, 28, 9] | [20, 29, 8] | [20, 28, 8] | [20, 29, 7] | [20, 28, 7] | [20, 29, 6] | [20, 28, 6] | [20, 29, 5] | [20, 28, 5] | [20, 29, 4] | [20, 28, 4] | [20, 29, 3] | [20, 28, 3] | [20, 29, 2] | [20, 28, 2] | [20, 29, 1] | [20, 28, 1] | [20, 29, 0] | [20, 28, 0] |
Non-inverted | [31] | [30] | [29] | [28] | [27] | [26] | [25] | [24] | [23] | [22] | [21] | [20] | [19] | [18] | [17] | [16] | [15] | [14] | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:CAPABILITIES_PTR | [3, 29, 27] | [3, 28, 27] | [3, 29, 26] | [3, 28, 26] | [3, 29, 25] | [3, 28, 25] | [3, 29, 24] | [3, 28, 24] |
---|---|---|---|---|---|---|---|---|
PCIE:DNSTREAM_LINK_NUM | [16, 29, 39] | [16, 28, 39] | [16, 29, 38] | [16, 28, 38] | [16, 29, 37] | [16, 28, 37] | [16, 29, 36] | [16, 28, 36] |
PCIE:HEADER_TYPE | [5, 29, 35] | [5, 28, 35] | [5, 29, 34] | [5, 28, 34] | [5, 29, 33] | [5, 28, 33] | [5, 29, 32] | [5, 28, 32] |
PCIE:INTERRUPT_PIN | [5, 29, 39] | [5, 28, 39] | [5, 29, 38] | [5, 28, 38] | [5, 29, 37] | [5, 28, 37] | [5, 29, 36] | [5, 28, 36] |
PCIE:MSIX_BASE_PTR | [7, 29, 3] | [7, 28, 3] | [7, 29, 2] | [7, 28, 2] | [7, 29, 1] | [7, 28, 1] | [7, 29, 0] | [7, 28, 0] |
PCIE:MSIX_CAP_ID | [7, 29, 7] | [7, 28, 7] | [7, 29, 6] | [7, 28, 6] | [7, 29, 5] | [7, 28, 5] | [7, 29, 4] | [7, 28, 4] |
PCIE:MSIX_CAP_NEXTPTR | [7, 29, 11] | [7, 28, 11] | [7, 29, 10] | [7, 28, 10] | [7, 29, 9] | [7, 28, 9] | [7, 29, 8] | [7, 28, 8] |
PCIE:MSI_BASE_PTR | [6, 29, 27] | [6, 28, 27] | [6, 29, 26] | [6, 28, 26] | [6, 29, 25] | [6, 28, 25] | [6, 29, 24] | [6, 28, 24] |
PCIE:MSI_CAP_ID | [6, 29, 35] | [6, 28, 35] | [6, 29, 34] | [6, 28, 34] | [6, 29, 33] | [6, 28, 33] | [6, 29, 32] | [6, 28, 32] |
PCIE:MSI_CAP_NEXTPTR | [6, 29, 43] | [6, 28, 43] | [6, 29, 42] | [6, 28, 42] | [6, 29, 41] | [6, 28, 41] | [6, 29, 40] | [6, 28, 40] |
PCIE:N_FTS_COMCLK_GEN1 | [16, 29, 19] | [16, 28, 19] | [16, 29, 18] | [16, 28, 18] | [16, 29, 17] | [16, 28, 17] | [16, 29, 16] | [16, 28, 16] |
PCIE:N_FTS_COMCLK_GEN2 | [16, 29, 23] | [16, 28, 23] | [16, 29, 22] | [16, 28, 22] | [16, 29, 21] | [16, 28, 21] | [16, 29, 20] | [16, 28, 20] |
PCIE:N_FTS_GEN1 | [16, 29, 27] | [16, 28, 27] | [16, 29, 26] | [16, 28, 26] | [16, 29, 25] | [16, 28, 25] | [16, 29, 24] | [16, 28, 24] |
PCIE:N_FTS_GEN2 | [16, 29, 31] | [16, 28, 31] | [16, 29, 30] | [16, 28, 30] | [16, 29, 29] | [16, 28, 29] | [16, 29, 28] | [16, 28, 28] |
PCIE:PCIE_BASE_PTR | [8, 29, 11] | [8, 28, 11] | [8, 29, 10] | [8, 28, 10] | [8, 29, 9] | [8, 28, 9] | [8, 29, 8] | [8, 28, 8] |
PCIE:PCIE_CAP_CAPABILITY_ID | [8, 29, 15] | [8, 28, 15] | [8, 29, 14] | [8, 28, 14] | [8, 29, 13] | [8, 28, 13] | [8, 29, 12] | [8, 28, 12] |
PCIE:PCIE_CAP_NEXTPTR | [8, 29, 23] | [8, 28, 23] | [8, 29, 22] | [8, 28, 22] | [8, 29, 21] | [8, 28, 21] | [8, 29, 20] | [8, 28, 20] |
PCIE:PM_BASE_PTR | [8, 29, 31] | [8, 28, 31] | [8, 29, 30] | [8, 28, 30] | [8, 29, 29] | [8, 28, 29] | [8, 29, 28] | [8, 28, 28] |
PCIE:PM_CAP_ID | [8, 29, 38] | [8, 28, 38] | [8, 29, 37] | [8, 28, 37] | [8, 29, 36] | [8, 28, 36] | [8, 29, 35] | [8, 28, 35] |
PCIE:PM_CAP_NEXTPTR | [8, 29, 43] | [8, 28, 43] | [8, 29, 42] | [8, 28, 42] | [8, 29, 41] | [8, 28, 41] | [8, 29, 40] | [8, 28, 40] |
PCIE:PM_DATA0 | [9, 29, 14] | [9, 28, 14] | [9, 29, 13] | [9, 28, 13] | [9, 29, 12] | [9, 28, 12] | [9, 29, 11] | [9, 28, 11] |
PCIE:PM_DATA1 | [9, 29, 19] | [9, 28, 19] | [9, 29, 18] | [9, 28, 18] | [9, 29, 17] | [9, 28, 17] | [9, 29, 16] | [9, 28, 16] |
PCIE:PM_DATA2 | [9, 29, 23] | [9, 28, 23] | [9, 29, 22] | [9, 28, 22] | [9, 29, 21] | [9, 28, 21] | [9, 29, 20] | [9, 28, 20] |
PCIE:PM_DATA3 | [9, 29, 27] | [9, 28, 27] | [9, 29, 26] | [9, 28, 26] | [9, 29, 25] | [9, 28, 25] | [9, 29, 24] | [9, 28, 24] |
PCIE:PM_DATA4 | [9, 29, 31] | [9, 28, 31] | [9, 29, 30] | [9, 28, 30] | [9, 29, 29] | [9, 28, 29] | [9, 29, 28] | [9, 28, 28] |
PCIE:PM_DATA5 | [9, 29, 35] | [9, 28, 35] | [9, 29, 34] | [9, 28, 34] | [9, 29, 33] | [9, 28, 33] | [9, 29, 32] | [9, 28, 32] |
PCIE:PM_DATA6 | [9, 29, 39] | [9, 28, 39] | [9, 29, 38] | [9, 28, 38] | [9, 29, 37] | [9, 28, 37] | [9, 29, 36] | [9, 28, 36] |
PCIE:PM_DATA7 | [9, 29, 43] | [9, 28, 43] | [9, 29, 42] | [9, 28, 42] | [9, 29, 41] | [9, 28, 41] | [9, 29, 40] | [9, 28, 40] |
PCIE:SLOT_CAP_SLOT_POWER_LIMIT_VALUE | [13, 29, 28] | [13, 28, 28] | [13, 29, 27] | [13, 28, 27] | [13, 29, 26] | [13, 28, 26] | [13, 29, 25] | [13, 28, 25] |
PCIE:SPARE_BYTE0 | [18, 29, 35] | [18, 28, 35] | [18, 29, 34] | [18, 28, 34] | [18, 29, 33] | [18, 28, 33] | [18, 29, 32] | [18, 28, 32] |
PCIE:SPARE_BYTE1 | [18, 29, 39] | [18, 28, 39] | [18, 29, 38] | [18, 28, 38] | [18, 29, 37] | [18, 28, 37] | [18, 29, 36] | [18, 28, 36] |
PCIE:SPARE_BYTE2 | [18, 29, 43] | [18, 28, 43] | [18, 29, 42] | [18, 28, 42] | [18, 29, 41] | [18, 28, 41] | [18, 29, 40] | [18, 28, 40] |
PCIE:SPARE_BYTE3 | [18, 29, 47] | [18, 28, 47] | [18, 29, 46] | [18, 28, 46] | [18, 29, 45] | [18, 28, 45] | [18, 29, 44] | [18, 28, 44] |
Non-inverted | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:DEV_CAP_ENDPOINT_L0S_LATENCY | [4, 28, 25] | [4, 29, 24] | [4, 28, 24] |
---|---|---|---|
PCIE:DEV_CAP_ENDPOINT_L1_LATENCY | [4, 29, 26] | [4, 28, 26] | [4, 29, 25] |
PCIE:DEV_CAP_MAX_PAYLOAD_SUPPORTED | [4, 28, 29] | [4, 29, 28] | [4, 28, 28] |
PCIE:DEV_CAP_RSVD_14_12 | [4, 28, 33] | [4, 29, 32] | [4, 28, 32] |
PCIE:DEV_CAP_RSVD_31_29 | [4, 29, 35] | [4, 28, 35] | [4, 29, 34] |
PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN1 | [6, 28, 1] | [6, 29, 0] | [6, 28, 0] |
PCIE:LINK_CAP_L0S_EXIT_LATENCY_COMCLK_GEN2 | [6, 29, 2] | [6, 28, 2] | [6, 29, 1] |
PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN1 | [6, 28, 4] | [6, 29, 3] | [6, 28, 3] |
PCIE:LINK_CAP_L0S_EXIT_LATENCY_GEN2 | [6, 29, 5] | [6, 28, 5] | [6, 29, 4] |
PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN1 | [6, 28, 7] | [6, 29, 6] | [6, 28, 6] |
PCIE:LINK_CAP_L1_EXIT_LATENCY_COMCLK_GEN2 | [6, 28, 9] | [6, 29, 8] | [6, 28, 8] |
PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN1 | [6, 29, 10] | [6, 28, 10] | [6, 29, 9] |
PCIE:LINK_CAP_L1_EXIT_LATENCY_GEN2 | [6, 28, 12] | [6, 29, 11] | [6, 28, 11] |
PCIE:MSIX_CAP_PBA_BIR | [7, 29, 13] | [7, 28, 13] | [7, 29, 12] |
PCIE:MSIX_CAP_TABLE_BIR | [7, 29, 31] | [7, 28, 31] | [7, 29, 30] |
PCIE:MSI_CAP_MULTIMSGCAP | [6, 29, 37] | [6, 28, 37] | [6, 29, 36] |
PCIE:PL_AUTO_CONFIG | [16, 29, 33] | [16, 28, 33] | [16, 29, 32] |
PCIE:PM_CAP_AUXCURRENT | [8, 28, 33] | [8, 29, 32] | [8, 28, 32] |
PCIE:PM_CAP_VERSION | [9, 28, 1] | [9, 29, 0] | [9, 28, 0] |
PCIE:RBAR_CAP_INDEX0 | [12, 28, 33] | [12, 29, 32] | [12, 28, 32] |
PCIE:RBAR_CAP_INDEX1 | [12, 29, 34] | [12, 28, 34] | [12, 29, 33] |
PCIE:RBAR_CAP_INDEX2 | [12, 28, 36] | [12, 29, 35] | [12, 28, 35] |
PCIE:RBAR_CAP_INDEX3 | [12, 29, 37] | [12, 28, 37] | [12, 29, 36] |
PCIE:RBAR_CAP_INDEX4 | [12, 28, 39] | [12, 29, 38] | [12, 28, 38] |
PCIE:RBAR_CAP_INDEX5 | [12, 28, 41] | [12, 29, 40] | [12, 28, 40] |
PCIE:RBAR_NUM | [10, 28, 27] | [10, 29, 26] | [10, 28, 26] |
PCIE:USER_CLK_FREQ | [15, 28, 3] | [15, 29, 2] | [15, 28, 2] |
Non-inverted | [2] | [1] | [0] |
PCIE:CFG_ECRC_ERR_CPLSTAT | [18, 29, 16] | [18, 28, 16] |
---|---|---|
PCIE:DEV_CAP2_MAX_ENDEND_TLP_PREFIXES | [4, 28, 21] | [4, 29, 20] |
PCIE:DEV_CAP2_TPH_COMPLETER_SUPPORTED | [4, 28, 19] | [4, 29, 18] |
PCIE:DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT | [4, 28, 30] | [4, 29, 29] |
PCIE:DEV_CAP_RSVD_17_16 | [4, 28, 34] | [4, 29, 33] |
PCIE:LINK_CAP_ASPM_SUPPORT | [5, 29, 46] | [5, 28, 46] |
PCIE:LL_ACK_TIMEOUT_FUNC | [15, 29, 16] | [15, 28, 16] |
PCIE:LL_REPLAY_TIMEOUT_FUNC | [15, 29, 32] | [15, 28, 32] |
PCIE:PCIE_CAP_RSVD_15_14 | [8, 28, 25] | [8, 29, 24] |
PCIE:PM_ASPML0S_TIMEOUT_FUNC | [16, 29, 0] | [16, 28, 0] |
PCIE:PM_DATA_SCALE0 | [9, 29, 3] | [9, 28, 3] |
PCIE:PM_DATA_SCALE1 | [9, 29, 4] | [9, 28, 4] |
PCIE:PM_DATA_SCALE2 | [9, 29, 5] | [9, 28, 5] |
PCIE:PM_DATA_SCALE3 | [9, 29, 6] | [9, 28, 6] |
PCIE:PM_DATA_SCALE4 | [9, 29, 7] | [9, 28, 7] |
PCIE:PM_DATA_SCALE5 | [9, 29, 8] | [9, 28, 8] |
PCIE:PM_DATA_SCALE6 | [9, 29, 9] | [9, 28, 9] |
PCIE:PM_DATA_SCALE7 | [9, 29, 10] | [9, 28, 10] |
PCIE:RECRC_CHK | [18, 29, 14] | [18, 28, 14] |
PCIE:RP_AUTO_SPD | [18, 28, 21] | [18, 29, 20] |
PCIE:SLOT_CAP_SLOT_POWER_LIMIT_SCALE | [13, 29, 24] | [13, 28, 24] |
PCIE:TL_RX_RAM_RDATA_LATENCY | [17, 29, 1] | [17, 28, 1] |
PCIE:TL_TX_RAM_RDATA_LATENCY | [17, 29, 7] | [17, 28, 7] |
Non-inverted | [1] | [0] |
PCIE:EXT_CFG_CAP_PTR | [5, 29, 20] | [5, 28, 20] | [5, 29, 19] | [5, 28, 19] | [5, 29, 18] | [5, 28, 18] |
---|---|---|---|---|---|---|
PCIE:LINK_CAP_MAX_LINK_WIDTH | [16, 29, 10] | [16, 28, 10] | [16, 29, 9] | [16, 28, 9] | [16, 29, 8] | [16, 28, 8] |
PCIE:LTSSM_MAX_LINK_WIDTH | [16, 29, 13] | [16, 28, 13] | [16, 29, 12] | [16, 28, 12] | [16, 29, 11] | [16, 28, 11] |
Non-inverted | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:EXT_CFG_XP_CAP_PTR | [5, 29, 28] | [5, 28, 28] | [5, 29, 27] | [5, 28, 27] | [5, 29, 26] | [5, 28, 26] | [5, 29, 25] | [5, 28, 25] | [5, 29, 24] | [5, 28, 24] |
---|---|---|---|---|---|---|---|---|---|---|
PCIE:LAST_CONFIG_DWORD | [5, 29, 45] | [5, 28, 45] | [5, 29, 44] | [5, 28, 44] | [5, 29, 43] | [5, 28, 43] | [5, 29, 42] | [5, 28, 42] | [5, 29, 41] | [5, 28, 41] |
Non-inverted | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:MSIX_CAP_PBA_OFFSET | [7, 28, 30] | [7, 29, 29] | [7, 28, 29] | [7, 29, 28] | [7, 28, 28] | [7, 29, 27] | [7, 28, 27] | [7, 29, 26] | [7, 28, 26] | [7, 29, 25] | [7, 28, 25] | [7, 29, 24] | [7, 28, 24] | [7, 29, 23] | [7, 28, 23] | [7, 29, 22] | [7, 28, 22] | [7, 29, 21] | [7, 28, 21] | [7, 29, 20] | [7, 28, 20] | [7, 29, 19] | [7, 28, 19] | [7, 29, 18] | [7, 28, 18] | [7, 29, 17] | [7, 28, 17] | [7, 29, 16] | [7, 28, 16] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PCIE:MSIX_CAP_TABLE_OFFSET | [7, 28, 46] | [7, 29, 45] | [7, 28, 45] | [7, 29, 44] | [7, 28, 44] | [7, 29, 43] | [7, 28, 43] | [7, 29, 42] | [7, 28, 42] | [7, 29, 41] | [7, 28, 41] | [7, 29, 40] | [7, 28, 40] | [7, 29, 39] | [7, 28, 39] | [7, 29, 38] | [7, 28, 38] | [7, 29, 37] | [7, 28, 37] | [7, 29, 36] | [7, 28, 36] | [7, 29, 35] | [7, 28, 35] | [7, 29, 34] | [7, 28, 34] | [7, 29, 33] | [7, 28, 33] | [7, 29, 32] | [7, 28, 32] |
Non-inverted | [28] | [27] | [26] | [25] | [24] | [23] | [22] | [21] | [20] | [19] | [18] | [17] | [16] | [15] | [14] | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:ENABLE_MSG_ROUTE | [16, 29, 47] | [16, 28, 47] | [16, 29, 46] | [16, 28, 46] | [16, 29, 45] | [16, 28, 45] | [16, 29, 44] | [16, 28, 44] | [16, 29, 43] | [16, 28, 43] | [16, 29, 42] |
---|---|---|---|---|---|---|---|---|---|---|---|
PCIE:MSIX_CAP_TABLE_SIZE | [8, 28, 5] | [8, 29, 4] | [8, 28, 4] | [8, 29, 3] | [8, 28, 3] | [8, 29, 2] | [8, 28, 2] | [8, 29, 1] | [8, 28, 1] | [8, 29, 0] | [8, 28, 0] |
PCIE:VC0_TOTAL_CREDITS_CD | [17, 28, 29] | [17, 29, 28] | [17, 28, 28] | [17, 29, 27] | [17, 28, 27] | [17, 29, 26] | [17, 28, 26] | [17, 29, 25] | [17, 28, 25] | [17, 29, 24] | [17, 28, 24] |
PCIE:VC0_TOTAL_CREDITS_NPD | [17, 28, 45] | [17, 29, 44] | [17, 28, 44] | [17, 29, 43] | [17, 28, 43] | [17, 29, 42] | [17, 28, 42] | [17, 29, 41] | [17, 28, 41] | [17, 29, 40] | [17, 28, 40] |
PCIE:VC0_TOTAL_CREDITS_PD | [18, 28, 5] | [18, 29, 4] | [18, 28, 4] | [18, 29, 3] | [18, 28, 3] | [18, 29, 2] | [18, 28, 2] | [18, 29, 1] | [18, 28, 1] | [18, 29, 0] | [18, 28, 0] |
Non-inverted | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:INFER_EI | [16, 28, 5] | [16, 29, 4] | [16, 28, 4] | [16, 29, 3] | [16, 28, 3] |
---|---|---|---|---|---|
PCIE:PM_CAP_PMESUPPORT | [8, 28, 47] | [8, 29, 46] | [8, 28, 46] | [8, 29, 45] | [8, 28, 45] |
PCIE:RBAR_CAP_CONTROL_ENCODEDBAR0 | [12, 29, 43] | [12, 28, 43] | [12, 29, 42] | [12, 28, 42] | [12, 29, 41] |
PCIE:RBAR_CAP_CONTROL_ENCODEDBAR1 | [12, 28, 46] | [12, 29, 45] | [12, 28, 45] | [12, 29, 44] | [12, 28, 44] |
PCIE:RBAR_CAP_CONTROL_ENCODEDBAR2 | [13, 28, 2] | [13, 29, 1] | [13, 28, 1] | [13, 29, 0] | [13, 28, 0] |
PCIE:RBAR_CAP_CONTROL_ENCODEDBAR3 | [13, 29, 4] | [13, 28, 4] | [13, 29, 3] | [13, 28, 3] | [13, 29, 2] |
PCIE:RBAR_CAP_CONTROL_ENCODEDBAR4 | [13, 28, 7] | [13, 29, 6] | [13, 28, 6] | [13, 29, 5] | [13, 28, 5] |
PCIE:RBAR_CAP_CONTROL_ENCODEDBAR5 | [13, 28, 10] | [13, 29, 9] | [13, 28, 9] | [13, 29, 8] | [13, 28, 8] |
PCIE:RP_AUTO_SPD_LOOPCNT | [18, 29, 23] | [18, 28, 23] | [18, 29, 22] | [18, 28, 22] | [18, 29, 21] |
PCIE:VC0_TX_LASTPACKET | [18, 29, 13] | [18, 28, 13] | [18, 29, 12] | [18, 28, 12] | [18, 29, 11] |
Non-inverted | [4] | [3] | [2] | [1] | [0] |
PCIE:SLOT_CAP_PHYSICAL_SLOT_NUM | [13, 28, 22] | [13, 29, 21] | [13, 28, 21] | [13, 29, 20] | [13, 28, 20] | [13, 29, 19] | [13, 28, 19] | [13, 29, 18] | [13, 28, 18] | [13, 29, 17] | [13, 28, 17] | [13, 29, 16] | [13, 28, 16] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PCIE:VC0_RX_RAM_LIMIT | [17, 28, 22] | [17, 29, 21] | [17, 28, 21] | [17, 29, 20] | [17, 28, 20] | [17, 29, 19] | [17, 28, 19] | [17, 29, 18] | [17, 28, 18] | [17, 29, 17] | [17, 28, 17] | [17, 29, 16] | [17, 28, 16] |
Non-inverted | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:LL_ACK_TIMEOUT | [15, 28, 15] | [15, 29, 14] | [15, 28, 14] | [15, 29, 13] | [15, 28, 13] | [15, 29, 12] | [15, 28, 12] | [15, 29, 11] | [15, 28, 11] | [15, 29, 10] | [15, 28, 10] | [15, 29, 9] | [15, 28, 9] | [15, 29, 8] | [15, 28, 8] |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PCIE:LL_REPLAY_TIMEOUT | [15, 28, 31] | [15, 29, 30] | [15, 28, 30] | [15, 29, 29] | [15, 28, 29] | [15, 29, 28] | [15, 28, 28] | [15, 29, 27] | [15, 28, 27] | [15, 29, 26] | [15, 28, 26] | [15, 29, 25] | [15, 28, 25] | [15, 29, 24] | [15, 28, 24] |
PCIE:PM_ASPML0S_TIMEOUT | [15, 28, 47] | [15, 29, 46] | [15, 28, 46] | [15, 29, 45] | [15, 28, 45] | [15, 29, 44] | [15, 28, 44] | [15, 29, 43] | [15, 28, 43] | [15, 29, 42] | [15, 28, 42] | [15, 29, 41] | [15, 28, 41] | [15, 29, 40] | [15, 28, 40] |
Non-inverted | [14] | [13] | [12] | [11] | [10] | [9] | [8] | [7] | [6] | [5] | [4] | [3] | [2] | [1] | [0] |
PCIE:CRM_MODULE_RSTS | [15, 29, 6] | [15, 28, 6] | [15, 29, 5] | [15, 28, 5] | [15, 29, 4] | [15, 28, 4] | [15, 29, 3] |
---|---|---|---|---|---|---|---|
PCIE:VC0_TOTAL_CREDITS_CH | [17, 28, 35] | [17, 29, 34] | [17, 28, 34] | [17, 29, 33] | [17, 28, 33] | [17, 29, 32] | [17, 28, 32] |
PCIE:VC0_TOTAL_CREDITS_NPH | [17, 29, 38] | [17, 28, 38] | [17, 29, 37] | [17, 28, 37] | [17, 29, 36] | [17, 28, 36] | [17, 29, 35] |
PCIE:VC0_TOTAL_CREDITS_PH | [18, 28, 11] | [18, 29, 10] | [18, 28, 10] | [18, 29, 9] | [18, 28, 9] | [18, 29, 8] | [18, 28, 8] |
Non-inverted | [6] | [5] | [4] | [3] | [2] | [1] | [0] |