Corners

Todo

document

Lower left

LL bittile 0
RowColumn
01234567891011121314151617181920212223
0 -----------------------MISC:LEAKER_SLOPE_OPTIONS[3]
1 -----------------------MISC:LEAKER_SLOPE_OPTIONS[2]
2 -----------------------MISC:LEAKER_SLOPE_OPTIONS[1]
3 -----------------------MISC:LEAKER_SLOPE_OPTIONS[0]
4 -----------------------MISC:LEAKER_GAIN_OPTIONS[3]
5 -----------------------MISC:LEAKER_GAIN_OPTIONS[2]
6 -----------------------MISC:LEAKER_GAIN_OPTIONS[1]
7 -----------------------MISC:LEAKER_GAIN_OPTIONS[0]
8 -----------------------MISC:VGG_SLOPE_OPTIONS[3]
9 -----------------------MISC:VGG_SLOPE_OPTIONS[2]
10 -----------------------MISC:VGG_SLOPE_OPTIONS[1]
11 -----------------------MISC:VGG_SLOPE_OPTIONS[0]
12 -----------------------MISC:VBG_SLOPE_OPTIONS[3]
13 -----------------------MISC:VBG_SLOPE_OPTIONS[2]
14 -----------------------MISC:VBG_SLOPE_OPTIONS[1]
15 -----------------------MISC:VBG_SLOPE_OPTIONS[0]
16 -----------------------MISC:VGG_TEST_OPTIONS[2]
17 -----------------------MISC:VGG_TEST_OPTIONS[1]
18 -----------------------MISC:VGG_TEST_OPTIONS[0]
19 -----------------------MISC:VGG_COMP_OPTION
20 -----------------------MISC:MISR_V_ENABLE
21 -----------------------MISC:MISR_V_RESET
22 -----------------------MISC:MISR_H_ENABLE
23 -----------------------MISC:MISR_H_RESET
24 ------------------------
25 ------------------------
26 ------------------------
27 ------------------------
28 ------------------------
29 ------------------------
30 ------------------------
31 ------------------------
32 ------------------------
33 ------------------------
34 ------------------------
35 ------------------------
36 ------------------------
37 ------------------------
38 ------------------------
39 ------------------------
40 ------------------------
41 ------------------------
42 ------------------------
43 ------------------------
44 ------------------------
45 ------------------------
46 ------------------------
47 ------------------------
48 ------------------------
49 ------------------------
50 ------------------------
51 ------------------------
52 ------------------------
53 ------------------------
54 ------------------------
55 ------------------------
56 -----------------------MISC:PROGPIN
57 ------------------------
58 -----------------------MISC:MISO2PIN[0]
59 -----------------------MISC:MISO2PIN[1]
60 ------------------------
61 ------------------------
62 -----------------------OCT_CAL1:ACCESS_MODE
63 -----------------------OCT_CAL0:ACCESS_MODE
MISC:LEAKER_GAIN_OPTIONS[0, 23, 4][0, 23, 5][0, 23, 6][0, 23, 7]
MISC:LEAKER_SLOPE_OPTIONS[0, 23, 0][0, 23, 1][0, 23, 2][0, 23, 3]
MISC:VBG_SLOPE_OPTIONS[0, 23, 12][0, 23, 13][0, 23, 14][0, 23, 15]
MISC:VGG_SLOPE_OPTIONS[0, 23, 8][0, 23, 9][0, 23, 10][0, 23, 11]
Non-inverted[3][2][1][0]
MISC:VGG_TEST_OPTIONS[0, 23, 16][0, 23, 17][0, 23, 18]
Non-inverted[2][1][0]
MISC:MISR_H_ENABLE[0, 23, 22]
MISC:MISR_H_RESET[0, 23, 23]
MISC:MISR_V_ENABLE[0, 23, 20]
MISC:MISR_V_RESET[0, 23, 21]
MISC:VGG_COMP_OPTION[0, 23, 19]
Non-inverted[0]
MISC:PROGPIN[0, 23, 56]
PULLUP0
PULLNONE1
MISC:MISO2PIN[0, 23, 59][0, 23, 58]
PULLUP00
PULLNONE01
PULLDOWN11
OCT_CAL0:ACCESS_MODE[0, 23, 63]
OCT_CAL1:ACCESS_MODE[0, 23, 62]
STATIC0
USER1

Upper left

UL bittile 0
RowColumn
012345678910111213141516171819202122
0 ----------------------MISC:DNA_OPTIONS[2]
1 ----------------------MISC:DNA_OPTIONS[0]
2 ----------------------MISC:DNA_OPTIONS[1]
3 ----------------------DNA_PORT:ENABLE
4 -----------------------
5 ----------------------MISC:M2PIN[1]
6 ----------------------MISC:M2PIN[0]
7 ----------------------MISC:SELECTHSPIN[0]
8 ----------------------MISC:SELECTHSPIN[1]
9 -----------------------
10 -----------------------
11 -----------------------
12 -----------------------
13 -----------------------
14 -----------------------
15 -----------------------
16 -----------------------
17 -----------------------
18 -----------------------
19 -----------------------
20 -----------------------
21 -----------------------
22 -----------------------
23 -----------------------
24 -----------------------
25 -----------------------
26 -----------------------
27 -----------------------
28 -----------------------
29 -----------------------
30 -----------------------
31 -----------------------
32 -----------------------
33 -----------------------
34 -----------------------
35 -----------------------
36 -----------------------
37 -----------------------
38 ----------------------OCT_CAL0:ACCESS_MODE
39 ----------------------OCT_CAL1:ACCESS_MODE
40 -----------------------
41 -----------------------
42 -----------------------
43 -----------------------
44 -----------------------
45 -----------------------
46 -----------------------
47 ----------------------MISC:MISR_V_ENABLE
48 ----------------------MISC:MISR_V_RESET
49 ----------------------MISC:MISR_H_ENABLE
50 ----------------------MISC:MISR_H_RESET
51 ----------------------PMV:PSLEW[3]
52 ----------------------PMV:PSLEW[2]
53 ----------------------PMV:PSLEW[1]
54 ----------------------PMV:PSLEW[0]
55 ----------------------PMV:NSLEW[3]
56 ----------------------PMV:NSLEW[2]
57 ----------------------PMV:NSLEW[1]
58 ----------------------PMV:NSLEW[0]
MISC:DNA_OPTIONS[0, 22, 0][0, 22, 2][0, 22, 1]
READ000
PROGRAM011
ANALOG_READ111
DNA_PORT:ENABLE[0, 22, 3]
MISC:MISR_H_ENABLE[0, 22, 49]
MISC:MISR_H_RESET[0, 22, 50]
MISC:MISR_V_ENABLE[0, 22, 47]
MISC:MISR_V_RESET[0, 22, 48]
Non-inverted[0]
MISC:M2PIN[0, 22, 5][0, 22, 6]
MISC:SELECTHSPIN[0, 22, 8][0, 22, 7]
PULLUP00
PULLNONE01
PULLDOWN11
OCT_CAL0:ACCESS_MODE[0, 22, 38]
OCT_CAL1:ACCESS_MODE[0, 22, 39]
STATIC0
USER1
PMV:NSLEW[0, 22, 55][0, 22, 56][0, 22, 57][0, 22, 58]
PMV:PSLEW[0, 22, 51][0, 22, 52][0, 22, 53][0, 22, 54]
Non-inverted[3][2][1][0]

Lower right

LR bittile 0
RowColumn
012345678910111213141516171819202122
0 -----------------------
1 -----------------------
2 -----------------------
3 -----------------------
4 -----------------------
5 -----------------------
6 -----------------------
7 -----------------------
8 -----------------------
9 -----------------------
10 -----------------------
11 -----------------------
12 -----------------------
13 -----------------------
14 -----------------------
15 -----------------------
16 -----------------------
17 -----------------------
18 -----------------------
19 -----------------------
20 -----------------------
21 -----------------------
22 -----------------------
23 -----------------------
24 -----------------------
25 -----------------------
26 -----------------------
27 -----------------------
28 -----------------------
29 -----------------------
30 -----------------------
31 -----------------------
32 -----------------------
33 -----------------------
34 -----------------------
35 -----------------------
36 -----------------------
37 -----------------------
38 -----------------------
39 -----------------------
40 -----------------------
41 -----------------------
42 -----------------------
43 -----------------------
44 -----------------------
45 -----------------------
46 -----------------------
47 -----------------------
48 -----------------------
49 -----------------------
50 -----------------------
51 -----------------------
52 -----------------------
53 -----------------------
54 ----------------------OCT_CAL:ACCESS_MODE
55 -----------------------
56 ----------------------MISC:CCLK2PIN[1]
57 ----------------------MISC:CCLK2PIN[0]
58 ----------------------MISC:MOSI2PIN[1]
59 ----------------------MISC:MOSI2PIN[0]
60 ----------------------MISC:SS_BPIN[1]
61 ----------------------MISC:SS_BPIN[0]
62 -----------------------
63 ----------------------MISC:DONEPIN
LR bittile 1
RowColumn
012345678910111213141516171819202122
0 ----------------------STARTUP:PIN.CFGCLK
1 ----------------------STARTUP:PIN.CFGMCLK
2 ----------------------SUSPEND_SYNC:ENABLE
3 -----------------------
4 ----------------------STARTUP:GTS_GSR_ENABLE
5 ----------------------STARTUP:GSR_SYNC
6 ----------------------STARTUP:GTS_SYNC
7 ----------------------SPI_ACCESS:ENABLE
8 ----------------------ICAP:ENABLE
9 ----------------------STARTUP:PIN.KEYCLEARB
10 ----------------------MISC:MISR_V_ENABLE
11 ----------------------MISC:MISR_V_RESET
12 ----------------------MISC:MISR_H_ENABLE
13 ----------------------MISC:MISR_H_RESET
OCT_CAL:ACCESS_MODE[0, 22, 54]
STATIC0
USER1
MISC:CCLK2PIN[0, 22, 56][0, 22, 57]
MISC:MOSI2PIN[0, 22, 58][0, 22, 59]
MISC:SS_BPIN[0, 22, 60][0, 22, 61]
PULLUP00
PULLNONE01
PULLDOWN11
MISC:DONEPIN[0, 22, 63]
PULLUP0
PULLNONE1
ICAP:ENABLE[1, 22, 8]
MISC:MISR_H_ENABLE[1, 22, 12]
MISC:MISR_H_RESET[1, 22, 13]
MISC:MISR_V_ENABLE[1, 22, 10]
MISC:MISR_V_RESET[1, 22, 11]
SPI_ACCESS:ENABLE[1, 22, 7]
STARTUP:GSR_SYNC[1, 22, 5]
STARTUP:GTS_GSR_ENABLE[1, 22, 4]
STARTUP:GTS_SYNC[1, 22, 6]
STARTUP:PIN.CFGCLK[1, 22, 0]
STARTUP:PIN.CFGMCLK[1, 22, 1]
STARTUP:PIN.KEYCLEARB[1, 22, 9]
SUSPEND_SYNC:ENABLE[1, 22, 2]
Non-inverted[0]

Upper right

UR bittile 0
RowColumn
UR bittile 1
RowColumn
012345678910111213141516171819202122
0 ----------------------~BSCAN_COMMON:USERID[0]
1 ----------------------~BSCAN_COMMON:USERID[1]
2 ----------------------~BSCAN_COMMON:USERID[2]
3 ----------------------~BSCAN_COMMON:USERID[3]
4 ----------------------~BSCAN_COMMON:USERID[4]
5 ----------------------~BSCAN_COMMON:USERID[5]
6 ----------------------~BSCAN_COMMON:USERID[6]
7 ----------------------~BSCAN_COMMON:USERID[7]
8 ----------------------~BSCAN_COMMON:USERID[8]
9 ----------------------~BSCAN_COMMON:USERID[9]
10 ----------------------~BSCAN_COMMON:USERID[10]
11 ----------------------~BSCAN_COMMON:USERID[11]
12 ----------------------~BSCAN_COMMON:USERID[12]
13 ----------------------~BSCAN_COMMON:USERID[13]
14 ----------------------~BSCAN_COMMON:USERID[14]
15 ----------------------~BSCAN_COMMON:USERID[15]
16 ----------------------~BSCAN_COMMON:USERID[16]
17 ----------------------~BSCAN_COMMON:USERID[17]
18 ----------------------~BSCAN_COMMON:USERID[18]
19 ----------------------~BSCAN_COMMON:USERID[19]
20 ----------------------~BSCAN_COMMON:USERID[20]
21 ----------------------~BSCAN_COMMON:USERID[21]
22 ----------------------~BSCAN_COMMON:USERID[22]
23 ----------------------~BSCAN_COMMON:USERID[23]
24 ----------------------~BSCAN_COMMON:USERID[24]
25 ----------------------~BSCAN_COMMON:USERID[25]
26 ----------------------~BSCAN_COMMON:USERID[26]
27 ----------------------~BSCAN_COMMON:USERID[27]
28 ----------------------~BSCAN_COMMON:USERID[28]
29 ----------------------~BSCAN_COMMON:USERID[29]
30 ----------------------~BSCAN_COMMON:USERID[30]
31 ----------------------~BSCAN_COMMON:USERID[31]
32 ----------------------BSCAN0:ENABLE
33 ----------------------BSCAN1:ENABLE
34 ----------------------BSCAN2:ENABLE
35 ----------------------BSCAN3:ENABLE
36 ----------------------BSCAN_COMMON:JTAG_TEST
37 -----------------------
38 ----------------------MISC:TCKPIN[1]
39 ----------------------MISC:TCKPIN[0]
40 ----------------------MISC:TDIPIN[1]
41 ----------------------MISC:TDIPIN[0]
42 ----------------------MISC:CSO2PIN[1]
43 ----------------------MISC:CSO2PIN[0]
44 ----------------------MISC:TMSPIN[1]
45 ----------------------MISC:TMSPIN[0]
46 ----------------------MISC:TDOPIN[1]
47 ----------------------MISC:TDOPIN[0]
48 -----------------------
49 ----------------------OCT_CAL:ACCESS_MODE
50 -----------------------
51 -----------------------
52 -----------------------
53 ----------------------MISC:MISR_V_ENABLE
54 ----------------------MISC:MISR_V_RESET
55 ----------------------MISC:MISR_H_ENABLE
56 ----------------------MISC:MISR_H_RESET
BSCAN_COMMON:USERID[1, 22, 31][1, 22, 30][1, 22, 29][1, 22, 28][1, 22, 27][1, 22, 26][1, 22, 25][1, 22, 24][1, 22, 23][1, 22, 22][1, 22, 21][1, 22, 20][1, 22, 19][1, 22, 18][1, 22, 17][1, 22, 16][1, 22, 15][1, 22, 14][1, 22, 13][1, 22, 12][1, 22, 11][1, 22, 10][1, 22, 9][1, 22, 8][1, 22, 7][1, 22, 6][1, 22, 5][1, 22, 4][1, 22, 3][1, 22, 2][1, 22, 1][1, 22, 0]
Inverted~[31]~[30]~[29]~[28]~[27]~[26]~[25]~[24]~[23]~[22]~[21]~[20]~[19]~[18]~[17]~[16]~[15]~[14]~[13]~[12]~[11]~[10]~[9]~[8]~[7]~[6]~[5]~[4]~[3]~[2]~[1]~[0]
BSCAN0:ENABLE[1, 22, 32]
BSCAN1:ENABLE[1, 22, 33]
BSCAN2:ENABLE[1, 22, 34]
BSCAN3:ENABLE[1, 22, 35]
BSCAN_COMMON:JTAG_TEST[1, 22, 36]
MISC:MISR_H_ENABLE[1, 22, 55]
MISC:MISR_H_RESET[1, 22, 56]
MISC:MISR_V_ENABLE[1, 22, 53]
MISC:MISR_V_RESET[1, 22, 54]
Non-inverted[0]
MISC:CSO2PIN[1, 22, 42][1, 22, 43]
MISC:TCKPIN[1, 22, 38][1, 22, 39]
MISC:TDIPIN[1, 22, 40][1, 22, 41]
MISC:TDOPIN[1, 22, 46][1, 22, 47]
MISC:TMSPIN[1, 22, 44][1, 22, 45]
PULLUP00
PULLNONE01
PULLDOWN11
OCT_CAL:ACCESS_MODE[1, 22, 49]
STATIC0
USER1