Phase-locked loop

Todo

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Bitstream

CMT_PLL bittile 0
RowColumn
CMT_PLL bittile 1
RowColumn
CMT_PLL bittile 2
RowColumn
CMT_PLL bittile 3
RowColumn
CMT_PLL bittile 4
RowColumn
CMT_PLL bittile 5
RowColumn
0123456789101112131415161718192021222324252627282930
0 -------------------------------
1 -------------------------------
2 -------------------------------
3 -------------------------------
4 -------------------------------
5 -------------------------------
6 -------------------------------
7 -------------------------------
8 -------------------------------
9 -------------------------------
10 -------------------------------
11 -------------------------------
12 -------------------------------
13 -------------------------------
14 -------------------------------
15 -------------------------------
16 -------------------------------
17 -------------------------------
18 -------------------------------
19 -------------------------------
20 -------------------------------
21 -------------------------------
22 -------------------------------
23 -------------------------------
24 -------------------------------
25 -------------------------------
26 -------------------------------
27 -------------------------------
28 -------------------------------
29 -------------------------------
30 -------------------------------
31 -------------------------------
32 ------------------------------PLL:DRP00[0]
PLL:PLL_DVDD_COMP_SET[0]
33 ------------------------------PLL:DRP00[1]
PLL:PLL_DVDD_COMP_SET[1]
34 ------------------------------PLL:DRP00[2]
~PLL:PLL_PWRD_CFG
35 ------------------------------PLL:DRP00[3]
PLL:PLL_VDD_SEL[0]
36 ------------------------------PLL:DRP00[4]
37 ------------------------------PLL:DRP00[5]
38 ------------------------------PLL:DRP00[6]
39 ------------------------------PLL:DRP00[7]
40 ------------------------------PLL:DRP00[8]
41 ------------------------------PLL:DRP00[9]
42 ------------------------------PLL:DRP00[10]
43 ------------------------------PLL:DRP00[11]
44 ------------------------------PLL:DRP00[12]
45 ------------------------------PLL:DRP00[13]
46 ------------------------------PLL:DRP00[14]
47 ------------------------------PLL:DRP00[15]
48 ------------------------------PLL:DRP01[0]
49 ------------------------------PLL:DRP01[1]
50 ------------------------------PLL:DRP01[2]
51 ------------------------------PLL:DRP01[3]
PLL:PLL_AVDD_COMP_SET[1]
52 ------------------------------PLL:DRP01[4]
53 ------------------------------PLL:DRP01[5]
54 ------------------------------PLL:DRP01[6]
55 ------------------------------PLL:DRP01[7]
PLL:PLL_EN_CNTRL[75]
56 ------------------------------PLL:DRP01[8]
PLL:PLL_AVDD_COMP_SET[0]
57 ------------------------------PLL:DRP01[9]
PLL:PLL_EN_CNTRL[76]
58 ------------------------------PLL:DRP01[10]
PLL:PLL_EN_CNTRL[77]
59 ------------------------------PLL:DRP01[11]
PLL:PLL_EN_CNTRL[78]
60 ------------------------------PLL:DRP01[12]
61 ------------------------------PLL:DRP01[13]
62 ------------------------------PLL:DRP01[14]
63 ------------------------------PLL:DRP01[15]
CMT_PLL bittile 6
RowColumn
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0 ------------------------------PLL:DRP02[0]
1 ------------------------------PLL:DRP02[1]
~PLL:PLL_REG_INPUT
2 ------------------------------PLL:DRP02[2]
3 ------------------------------PLL:DRP02[3]
4 ------------------------------PLL:DRP02[4]
5 ------------------------------PLL:DRP02[5]
6 ------------------------------PLL:DRP02[6]
7 ------------------------------PLL:DRP02[7]
8 ------------------------------PLL:DRP02[8]
9 ------------------------------PLL:DRP02[9]
10 ------------------------------PLL:DRP02[10]
11 ------------------------------PLL:DRP02[11]
12 ------------------------------PLL:DRP02[12]
13 ------------------------------PLL:DRP02[13]
14 ------------------------------PLL:DRP02[14]
15 ------------------------------PLL:DRP02[15]
16 ------------------------------PLL:DRP03[0]
17 ------------------------------PLL:DRP03[1]
18 ------------------------------PLL:DRP03[2]
19 ------------------------------PLL:DRP03[3]
20 ------------------------------PLL:DRP03[4]
21 ------------------------------PLL:DRP03[5]
22 ------------------------------PLL:DRP03[6]
23 ------------------------------PLL:DRP03[7]
24 ------------------------------PLL:DRP03[8]
25 ------------------------------PLL:DRP03[9]
26 ------------------------------PLL:DRP03[10]
PLL:MUX.CLKFBIN[2]
27 ------------------------------PLL:DRP03[11]
PLL:PLL_VDD_SEL[1]
28 ------------------------------PLL:DRP03[12]
PLL:MUX.CLKFBIN[3]
29 ------------------------------PLL:DRP03[13]
PLL:MUX.CLKFBIN[0]
30 ------------------------------PLL:DRP03[14]
PLL:MUX.CLKFBIN[4]
31 ------------------------------PLL:DRP03[15]
PLL:MUX.CLKFBIN[1]
32 ------------------------------PLL:DRP04[0]
PLL:MUX.TEST_CLK[2]
33 ------------------------------PLL:DRP04[1]
~PLL:PLL_NBTI_EN
34 ------------------------------PLL:DRP04[2]
PLL:MUX.CLK_TO_DCM0[0]
35 ------------------------------PLL:DRP04[3]
PLL:MUX.CLK_TO_DCM0[1]
36 ------------------------------PLL:DRP04[4]
PLL:MUX.CLKIN[1]
37 ------------------------------PLL:DRP04[5]
PLL:INV.SKEWSTB
38 ------------------------------PLL:DRP04[6]
PLL:INV.SKEWRST
39 ------------------------------PLL:DRP04[7]
PLL:MUX.CLK_TO_DCM1[0]
40 ------------------------------PLL:DRP04[8]
PLL:MUX.CLK_TO_DCM1[1]
41 ------------------------------PLL:DRP04[9]
PLL:MUX.CLK_TO_DCM1[2]
42 ------------------------------PLL:DRP04[10]
PLL:MUX.CLK_TO_DCM0[2]
43 ------------------------------PLL:DRP04[11]
PLL:MUX.TEST_CLK[0]
44 ------------------------------PLL:DRP04[12]
PLL:PLL_ADD_LEAKAGE[1]
45 ------------------------------PLL:DRP04[13]
PLL:MUX.TEST_CLK[1]
46 ------------------------------PLL:DRP04[14]
PLL:PLL_EN_LEAKAGE[0]
47 ------------------------------PLL:DRP04[15]
PLL:PLL_ADD_LEAKAGE[0]
48 ------------------------------PLL:DRP05[0]
PLL:MUX.CLKIN[3]
49 ------------------------------PLL:DRP05[1]
PLL:PLL_EN_LEAKAGE[1]
50 ------------------------------PLL:CLKIN_CLKFBIN_USED
PLL:DRP05[2]
51 ------------------------------PLL:DRP05[3]
PLL:MUX.CLKIN[0]
52 ------------------------------PLL:CLKINSEL_STATIC
PLL:DRP05[4]
53 ------------------------------PLL:CLKINSEL_MODE
PLL:DRP05[5]
54 ------------------------------PLL:DRP05[6]
~PLL:INV.CLKINSEL
55 ------------------------------PLL:DRP05[7]
PLL:MUX.CLKIN[2]
56 ------------------------------PLL:DRP05[8]
PLL:PLL_CLKOUT0_DT[0]
57 ------------------------------PLL:DRP05[9]
PLL:PLL_CLKOUT0_DT[1]
58 ------------------------------PLL:DRP05[10]
PLL:PLL_CLKOUT0_DT[3]
59 ------------------------------PLL:DRP05[11]
PLL:PLL_CLKOUT0_DT[2]
60 ------------------------------PLL:DRP05[12]
PLL:PLL_CLKBURST_CNT[0]
61 ------------------------------PLL:DRP05[13]
PLL:PLL_CLKOUT0_DT[4]
62 ------------------------------PLL:DRP05[14]
~PLL:PLL_CLKBURST_ENABLE
63 ------------------------------PLL:DRP05[15]
PLL:PLL_CLKOUT0_DT[5]
CMT_PLL bittile 7
RowColumn
CMT_PLL bittile 8
RowColumn
012345678910111213141516171819202122
0 -----------------------
1 -----------------------
2 -----------------------
3 -----------------------
4 -----------------------
5 -----------------------
6 -----------------------
7 -----------------------
8 -----------------------
9 -----------------------
10 -----------------------
11 -----------------------
12 -----------------------
13 -----------------------
14 -----------------------
15 -----------------------
16 -----------------------
17 ----------------------PLL:ENABLE
CMT_PLL bittile 9
RowColumn
0123456789101112131415161718192021222324252627282930
0 ------------------------------PLL:DRP06[0]
~PLL:PLL_EN_VCO_DIV1
1 ------------------------------PLL:DRP06[1]
PLL:PLL_CLKBURST_CNT[2]
2 ------------------------------PLL:DRP06[2]
PLL:PLL_CLKOUT0_EDGE
3 ------------------------------PLL:DRP06[3]
PLL:PLL_CLK0MX[1]
4 ------------------------------PLL:DRP06[4]
PLL:PLL_CLKOUT1_DT[1]
5 ------------------------------PLL:DRP06[5]
PLL:PLL_CLKOUT1_DT[0]
6 ------------------------------PLL:DRP06[6]
PLL:PLL_CLKOUT1_DT[2]
7 ------------------------------PLL:DRP06[7]
PLL:PLL_CLKOUT1_DT[3]
8 ------------------------------PLL:DRP06[8]
PLL:PLL_EN_VCO_DIV6
9 ------------------------------PLL:DRP06[9]
PLL:PLL_CLKOUT1_DT[5]
10 ------------------------------PLL:DRP06[10]
PLL:PLL_CLKOUT1_LT[2]
11 ------------------------------PLL:DRP06[11]
PLL:PLL_CLKOUT1_LT[1]
12 ------------------------------PLL:DRP06[12]
PLL:PLL_CLKOUT1_NOCOUNT
13 ------------------------------PLL:DRP06[13]
PLL:PLL_CLKOUT1_LT[3]
14 ------------------------------PLL:DRP06[14]
PLL:PLL_CLKOUT1_LT[5]
15 ------------------------------PLL:DRP06[15]
PLL:PLL_CLKOUT1_LT[4]
16 ------------------------------PLL:DRP07[0]
PLL:PLL_CLKOUT1_PM[2]
17 ------------------------------PLL:DRP07[1]
PLL:PLL_CLKOUT1_PM[1]
18 ------------------------------PLL:DRP07[2]
PLL:PLL_CLK1MX[0]
19 ------------------------------PLL:DRP07[3]
PLL:PLL_CLKOUT1_EN
20 ------------------------------PLL:DRP07[4]
PLL:PLL_CLKOUT1_EDGE
21 ------------------------------PLL:DRP07[5]
PLL:PLL_CLK1MX[1]
22 ------------------------------PLL:DRP07[6]
PLL:PLL_CLKOUT1_PM[0]
23 ------------------------------PLL:DRP07[7]
PLL:PLL_CLKOUT1_HT[0]
24 ------------------------------PLL:DRP07[8]
PLL:PLL_CLKOUT1_HT[1]
25 ------------------------------PLL:DRP07[9]
PLL:PLL_CLKOUT1_HT[2]
26 ------------------------------PLL:DRP07[10]
PLL:PLL_CLKOUT1_HT[4]
27 ------------------------------PLL:DRP07[11]
PLL:PLL_CLKOUT1_HT[3]
28 ------------------------------PLL:DRP07[12]
PLL:PLL_CLKOUT1_HT[5]
29 ------------------------------PLL:DRP07[13]
PLL:INV.CLKBRST
30 ------------------------------PLL:DRP07[14]
PLL:PLL_CLK0MX[0]
31 ------------------------------PLL:DRP07[15]
PLL:PLL_CLKOUT0_EN
32 ------------------------------PLL:DRP08[0]
~PLL:PLL_EN_VCO1
33 ------------------------------PLL:DRP08[1]
PLL:PLL_CLKOUT2_DT[0]
34 ------------------------------PLL:DRP08[2]
PLL:PLL_CLKOUT2_DT[2]
35 ------------------------------PLL:DRP08[3]
PLL:PLL_CLKOUT2_DT[1]
36 ------------------------------PLL:DRP08[4]
PLL:PLL_CLKOUT2_DT[4]
37 ------------------------------PLL:DRP08[5]
PLL:PLL_CLKOUT2_DT[3]
38 ------------------------------PLL:DRP08[6]
PLL:PLL_CLKOUT2_DT[5]
39 ------------------------------PLL:DRP08[7]
PLL:PLL_CLKOUT2_LT[0]
40 ------------------------------PLL:DRP08[8]
PLL:PLL_CLKOUT2_LT[2]
41 ------------------------------PLL:DRP08[9]
PLL:PLL_CLKOUT2_LT[3]
42 ------------------------------PLL:DRP08[10]
PLL:PLL_CLKOUT2_LT[4]
43 ------------------------------PLL:DRP08[11]
PLL:PLL_CLKOUT2_NOCOUNT
44 ------------------------------PLL:DRP08[12]
PLL:PLL_CLKOUT2_PM[1]
45 ------------------------------PLL:DRP08[13]
PLL:PLL_CLKOUT2_LT[5]
46 ------------------------------PLL:DRP08[14]
PLL:PLL_CLKOUT2_EN
47 ------------------------------PLL:DRP08[15]
PLL:PLL_CLKOUT2_PM[2]
48 ------------------------------PLL:DRP09[0]
PLL:PLL_CLK2MX[1]
49 ------------------------------PLL:DRP09[1]
PLL:PLL_CLK2MX[0]
50 ------------------------------PLL:DRP09[2]
PLL:PLL_CLKOUT2_PM[0]
51 ------------------------------PLL:DRP09[3]
PLL:PLL_CLKOUT2_EDGE
52 ------------------------------PLL:DRP09[4]
PLL:PLL_CLKOUT2_HT[1]
53 ------------------------------PLL:DRP09[5]
PLL:PLL_CLKOUT2_HT[0]
54 ------------------------------PLL:DRP09[6]
PLL:PLL_CLKOUT2_HT[2]
55 ------------------------------PLL:DRP09[7]
PLL:PLL_CLKOUT2_HT[3]
56 ------------------------------PLL:DRP09[8]
~PLL:PLL_EN_VCO2
57 ------------------------------PLL:DRP09[9]
PLL:PLL_CLKOUT2_HT[4]
58 ------------------------------PLL:DRP09[10]
~PLL:PLL_EN_VCO3
59 ------------------------------PLL:DRP09[11]
~PLL:PLL_EN_VCO7
60 ------------------------------PLL:DRP09[12]
PLL:PLL_CLKOUT0_PM[2]
61 ------------------------------PLL:DRP09[13]
PLL:PLL_CLKOUT0_PM[1]
62 ------------------------------PLL:DRP09[14]
PLL:PLL_CLKOUT3_DT[1]
63 ------------------------------PLL:DRP09[15]
PLL:PLL_CLKOUT3_DT[0]
CMT_PLL bittile 10
RowColumn
0123456789101112131415161718192021222324252627282930
0 ------------------------------PLL:DRP0A[0]
~PLL:PLL_EN_VCO6
1 ------------------------------PLL:DRP0A[1]
PLL:PLL_CLKOUT3_DT[3]
2 ------------------------------PLL:DRP0A[2]
PLL:PLL_CLKOUT3_DT[5]
3 ------------------------------PLL:DRP0A[3]
PLL:PLL_CLKOUT3_DT[4]
4 ------------------------------PLL:DRP0A[4]
PLL:PLL_CLKOUT3_LT[1]
5 ------------------------------PLL:DRP0A[5]
PLL:PLL_CLKOUT3_LT[0]
6 ------------------------------PLL:DRP0A[6]
PLL:PLL_CLKOUT3_LT[2]
7 ------------------------------PLL:DRP0A[7]
PLL:PLL_CLKOUT3_NOCOUNT
8 ------------------------------PLL:DRP0A[8]
PLL:PLL_CLKOUT3_LT[4]
9 ------------------------------PLL:DRP0A[9]
PLL:PLL_CLKOUT3_LT[5]
10 ------------------------------PLL:DRP0A[10]
PLL:PLL_CLKOUT3_PM[2]
11 ------------------------------PLL:DRP0A[11]
PLL:PLL_CLKOUT3_PM[1]
12 ------------------------------PLL:DRP0A[12]
PLL:PLL_CLK3MX[0]
13 ------------------------------PLL:DRP0A[13]
PLL:PLL_CLKOUT3_EN
14 ------------------------------PLL:DRP0A[14]
PLL:PLL_CLKOUT3_EDGE
15 ------------------------------PLL:DRP0A[15]
PLL:PLL_CLK3MX[1]
16 ------------------------------PLL:DRP0B[0]
PLL:PLL_CLKOUT3_HT[0]
17 ------------------------------PLL:DRP0B[1]
PLL:PLL_CLKOUT3_PM[0]
18 ------------------------------PLL:DRP0B[2]
PLL:PLL_CLKOUT3_HT[2]
19 ------------------------------PLL:DRP0B[3]
PLL:PLL_CLKOUT3_HT[1]
20 ------------------------------PLL:DRP0B[4]
~PLL:PLL_EN_VCO5
21 ------------------------------PLL:DRP0B[5]
PLL:PLL_CLKOUT3_HT[3]
22 ------------------------------PLL:DRP0B[6]
PLL:PLL_CLKOUT3_HT[4]
23 ------------------------------PLL:DRP0B[7]
PLL:PLL_CLKOUT3_HT[5]
24 ------------------------------PLL:DRP0B[8]
~PLL:PLL_EN_VCO4
25 ------------------------------PLL:DRP0B[9]
PLL:PLL_CLKOUT0_LT[4]
26 ------------------------------PLL:DRP0B[10]
PLL:PLL_CLKOUT4_DT[2]
27 ------------------------------PLL:DRP0B[11]
PLL:PLL_CLKOUT4_DT[1]
28 ------------------------------PLL:DRP0B[12]
PLL:PLL_CLKOUT4_DT[3]
29 ------------------------------PLL:DRP0B[13]
PLL:PLL_CLKOUT4_DT[0]
30 ------------------------------PLL:DRP0B[14]
PLL:PLL_CLKOUT4_DT[5]
31 ------------------------------PLL:DRP0B[15]
PLL:PLL_CLKOUT0_LT[5]
32 ------------------------------PLL:DRP0C[0]
PLL:PLL_CLKOUT4_LT[2]
33 ------------------------------PLL:DRP0C[1]
PLL:PLL_CLKOUT4_LT[1]
34 ------------------------------PLL:DRP0C[2]
PLL:PLL_CLKOUT4_NOCOUNT
35 ------------------------------PLL:DRP0C[3]
PLL:PLL_CLKOUT4_LT[3]
36 ------------------------------PLL:DRP0C[4]
PLL:PLL_CLKOUT4_LT[5]
37 ------------------------------PLL:DRP0C[5]
PLL:PLL_CLKOUT4_LT[4]
38 ------------------------------PLL:DRP0C[6]
PLL:PLL_CLKOUT4_PM[1]
39 ------------------------------PLL:DRP0C[7]
PLL:PLL_CLKOUT4_PM[2]
40 ------------------------------PLL:DRP0C[8]
PLL:PLL_CLKOUT4_EN
41 ------------------------------PLL:DRP0C[9]
PLL:PLL_CLK4MX[0]
42 ------------------------------PLL:DRP0C[10]
PLL:PLL_CLKOUT4_EDGE
43 ------------------------------PLL:DRP0C[11]
PLL:PLL_CLK4MX[1]
44 ------------------------------PLL:DRP0C[12]
PLL:PLL_CLKOUT4_HT[0]
45 ------------------------------PLL:DRP0C[13]
PLL:PLL_CLKOUT4_PM[0]
46 ------------------------------PLL:DRP0C[14]
PLL:PLL_CLKOUT4_HT[2]
47 ------------------------------PLL:DRP0C[15]
PLL:PLL_CLKOUT4_HT[1]
48 ------------------------------PLL:DRP0D[0]
PLL:PLL_CLKOUT4_HT[4]
49 ------------------------------PLL:DRP0D[1]
PLL:PLL_CLKOUT4_HT[3]
50 ------------------------------PLL:DRP0D[2]
PLL:PLL_CLKOUT4_HT[5]
51 ------------------------------PLL:DRP0D[3]
~PLL:PLL_EN_VCO0
52 ------------------------------PLL:DRP0D[4]
PLL:PLL_CLKOUT0_LT[2]
53 ------------------------------PLL:DRP0D[5]
PLL:PLL_CLKOUT0_LT[0]
54 ------------------------------PLL:DRP0D[6]
PLL:PLL_CLKOUT0_LT[3]
55 ------------------------------PLL:DRP0D[7]
PLL:PLL_CLKOUT5_DT[1]
56 ------------------------------PLL:DRP0D[8]
PLL:PLL_CLKOUT5_DT[2]
57 ------------------------------PLL:DRP0D[9]
PLL:PLL_CLKOUT5_DT[3]
58 ------------------------------PLL:DRP0D[10]
PLL:PLL_CLKOUT5_DT[5]
59 ------------------------------PLL:DRP0D[11]
PLL:PLL_CLKOUT5_DT[4]
60 ------------------------------PLL:DRP0D[12]
PLL:PLL_CLKOUT5_LT[1]
61 ------------------------------PLL:DRP0D[13]
PLL:PLL_CLKOUT5_LT[0]
62 ------------------------------PLL:DRP0D[14]
PLL:PLL_CLKOUT5_LT[3]
63 ------------------------------PLL:DRP0D[15]
PLL:PLL_CLKOUT5_LT[2]
CMT_PLL bittile 11
RowColumn
0123456789101112131415161718192021222324252627282930
0 ------------------------------PLL:DRP0E[0]
PLL:PLL_CLKOUT5_LT[4]
1 ------------------------------PLL:DRP0E[1]
PLL:PLL_CLKOUT5_NOCOUNT
2 ------------------------------PLL:DRP0E[2]
PLL:PLL_CLKOUT5_PM[1]
3 ------------------------------PLL:DRP0E[3]
PLL:PLL_CLKOUT5_LT[5]
4 ------------------------------PLL:DRP0E[4]
PLL:PLL_CLKOUT5_EN
5 ------------------------------PLL:DRP0E[5]
PLL:PLL_CLKOUT5_PM[2]
6 ------------------------------PLL:DRP0E[6]
PLL:PLL_CLK5MX[0]
7 ------------------------------PLL:DRP0E[7]
PLL:PLL_CLK5MX[1]
8 ------------------------------PLL:DRP0E[8]
PLL:PLL_CLKOUT5_EDGE
9 ------------------------------PLL:DRP0E[9]
PLL:PLL_CLKOUT5_PM[0]
10 ------------------------------PLL:DRP0E[10]
PLL:PLL_CLKOUT5_HT[1]
11 ------------------------------PLL:DRP0E[11]
PLL:PLL_CLKOUT5_HT[0]
12 ------------------------------PLL:DRP0E[12]
PLL:PLL_CLKOUT5_HT[3]
13 ------------------------------PLL:DRP0E[13]
PLL:PLL_CLKOUT5_HT[2]
14 ------------------------------PLL:DRP0E[14]
PLL:PLL_CLKOUT5_HT[5]
15 ------------------------------PLL:DRP0E[15]
PLL:PLL_CLKOUT5_HT[4]
16 ------------------------------PLL:DRP0F[0]
17 ------------------------------PLL:DRP0F[1]
~PLL:PLL_DIRECT_PATH_CNTRL
18 ------------------------------PLL:DRP0F[2]
PLL:PLL_CLKOUT0_LT[1]
19 ------------------------------PLL:DRP0F[3]
PLL:PLL_CLKOUT0_NOCOUNT
20 ------------------------------PLL:DRP0F[4]
PLL:PLL_CLKFBOUT_DT[2]
21 ------------------------------PLL:DRP0F[5]
PLL:PLL_CLKFBOUT_DT[1]
22 ------------------------------PLL:DRP0F[6]
PLL:PLL_CLKFBOUT_DT[3]
23 ------------------------------PLL:DRP0F[7]
PLL:PLL_CLKFBOUT_DT[4]
24 ------------------------------PLL:DRP0F[8]
PLL:PLL_CLKFBOUT_DT[5]
25 ------------------------------PLL:DRP0F[9]
PLL:PLL_CLKFBOUT_LT[0]
26 ------------------------------PLL:DRP0F[10]
PLL:PLL_CLKFBOUT_LT[2]
27 ------------------------------PLL:DRP0F[11]
PLL:PLL_CLKFBOUT_LT[1]
28 ------------------------------PLL:DRP0F[12]
PLL:PLL_CLKFBOUT_NOCOUNT
29 ------------------------------PLL:DRP0F[13]
PLL:PLL_CLKFBOUT_LT[3]
30 ------------------------------PLL:DRP0F[14]
PLL:PLL_CLKFBOUT_LT[5]
31 ------------------------------PLL:DRP0F[15]
PLL:PLL_CLKFBOUT_LT[4]
32 ------------------------------PLL:DRP10[0]
PLL:PLL_CLKFBOUT_PM[2]
33 ------------------------------PLL:DRP10[1]
PLL:PLL_CLKFBOUT_PM[1]
34 ------------------------------PLL:DRP10[2]
PLL:PLL_CLKFBMX[0]
35 ------------------------------PLL:DRP10[3]
PLL:PLL_CLKFBOUT_EN
36 ------------------------------PLL:DRP10[4]
PLL:PLL_CLKFBOUT_PM[0]
37 ------------------------------PLL:DRP10[5]
PLL:PLL_CLKFBOUT_EDGE
38 ------------------------------PLL:DRP10[6]
PLL:PLL_CLKFBOUT_HT[0]
39 ------------------------------PLL:DRP10[7]
PLL:PLL_CLKFBOUT_HT[1]
40 ------------------------------PLL:DRP10[8]
PLL:PLL_CLKFBOUT_HT[2]
41 ------------------------------PLL:DRP10[9]
PLL:PLL_CLKFBOUT_HT[3]
42 ------------------------------PLL:DRP10[10]
PLL:PLL_CLKFBOUT_HT[5]
43 ------------------------------PLL:DRP10[11]
PLL:PLL_CLKFBOUT_HT[4]
44 ------------------------------PLL:DRP10[12]
PLL:PLL_CLKOUT0_HT[4]
45 ------------------------------PLL:DRP10[13]
PLL:PLL_CLKOUT0_HT[5]
46 ------------------------------PLL:DRP10[14]
PLL:PLL_CLKOUT0_HT[3]
47 ------------------------------PLL:DRP10[15]
PLL:PLL_CLKBURST_CNT[1]
48 ------------------------------PLL:DRP11[0]
PLL:PLL_CLKOUT0_HT[1]
49 ------------------------------PLL:DRP11[1]
PLL:PLL_CLKOUT0_HT[2]
50 ------------------------------PLL:DRP11[2]
PLL:PLL_CLKOUT0_PM[0]
51 ------------------------------PLL:DRP11[3]
PLL:PLL_CLKOUT0_HT[0]
52 ------------------------------PLL:DRP11[4]
PLL:PLL_CLKOUT1_LT[0]
53 ------------------------------PLL:DRP11[5]
PLL:PLL_CLKOUT1_DT[4]
54 ------------------------------PLL:DRP11[6]
PLL:PLL_CLKOUT2_LT[1]
55 ------------------------------PLL:DRP11[7]
PLL:PLL_CLKOUT2_HT[5]
56 ------------------------------PLL:DRP11[8]
PLL:PLL_CLKOUT3_DT[2]
57 ------------------------------PLL:DRP11[9]
PLL:PLL_CLKOUT3_LT[3]
58 ------------------------------PLL:DRP11[10]
PLL:PLL_CLKFBOUT2_HT[4]
59 ------------------------------PLL:DRP11[11]
PLL:PLL_CLKFBOUT2_LT[1]
60 ------------------------------PLL:DRP11[12]
PLL:PLL_CLKFBOUT2_HT[1]
61 ------------------------------PLL:DRP11[13]
PLL:PLL_CLKFBOUT2_HT[2]
62 ------------------------------PLL:DRP11[14]
PLL:PLL_CLKFBOUT2_DT[3]
63 ------------------------------PLL:DRP11[15]
PLL:PLL_CLKFBOUT2_LT[0]
CMT_PLL bittile 12
RowColumn
0123456789101112131415161718192021222324252627282930
0 ------------------------------PLL:DRP12[0]
PLL:PLL_CLKFBOUT2_LT[4]
1 ------------------------------PLL:DRP12[1]
PLL:PLL_CLKFBOUT2_DT[2]
2 ------------------------------PLL:DRP12[2]
PLL:PLL_INTFB[1]
3 ------------------------------PLL:DRP12[3]
PLL:PLL_CLKFBOUT2_NOCOUNT
4 ------------------------------PLL:DRP12[4]
PLL:PLL_IN_DLY_MX_SEL[0]
5 ------------------------------PLL:DRP12[5]
~PLL:PLL_EN_TCLK0
6 ------------------------------PLL:DRP12[6]
PLL:PLL_IN_DLY_MX_SEL[2]
7 ------------------------------PLL:DRP12[7]
PLL:PLL_IN_DLY_MX_SEL[4]
8 ------------------------------PLL:DRP12[8]
PLL:PLL_CLKOUT4_DT[4]
9 ------------------------------PLL:DRP12[9]
PLL:PLL_CLKOUT4_LT[0]
10 ------------------------------PLL:DRP12[10]
PLL:PLL_CLKFBOUT_DT[0]
11 ------------------------------PLL:DRP12[11]
PLL:PLL_CLKOUT5_DT[0]
12 ------------------------------PLL:DRP12[12]
PLL:PLL_IN_DLY_SET[5]
13 ------------------------------PLL:DRP12[13]
PLL:PLL_CLKFBMX[1]
14 ------------------------------PLL:DRP12[14]
~PLL:PLL_EN_TCLK1
15 ------------------------------PLL:DRP12[15]
~PLL:PLL_EN_TCLK3
16 ------------------------------PLL:DRP13[0]
PLL:PLL_IN_DLY_SET[7]
17 ------------------------------PLL:DRP13[1]
~PLL:PLL_EN_TCLK2
18 ------------------------------PLL:DRP13[2]
PLL:PLL_IN_DLY_SET[2]
19 ------------------------------PLL:DRP13[3]
PLL:PLL_IN_DLY_SET[4]
20 ------------------------------PLL:DRP13[4]
PLL:PLL_DIVCLK_EDGE
21 ------------------------------PLL:DRP13[5]
PLL:PLL_IN_DLY_SET[0]
22 ------------------------------PLL:DRP13[6]
PLL:PLL_DIVCLK_LT[2]
23 ------------------------------PLL:DRP13[7]
PLL:PLL_DIVCLK_LT[5]
24 ------------------------------PLL:DRP13[8]
25 ------------------------------PLL:DRP13[9]
PLL:PLL_DIVCLK_LT[0]
26 ------------------------------PLL:DRP13[10]
PLL:PLL_DIVCLK_HT[2]
27 ------------------------------PLL:DRP13[11]
PLL:PLL_DIVCLK_HT[1]
28 ------------------------------PLL:DRP13[12]
29 ------------------------------PLL:DRP13[13]
PLL:PLL_DIVCLK_HT[4]
30 ------------------------------PLL:DRP13[14]
PLL:PLL_CLKFBOUT2_HT[3]
31 ------------------------------PLL:DRP13[15]
PLL:PLL_DIVCLK_HT[5]
32 ------------------------------PLL:DRP14[0]
PLL:PLL_CLKFBOUT2_HT[5]
33 ------------------------------PLL:DRP14[1]
PLL:PLL_CLKFBOUT2_DT[5]
34 ------------------------------PLL:DRP14[2]
PLL:PLL_CLKFBOUT2_DT[0]
35 ------------------------------PLL:DRP14[3]
PLL:PLL_CLKFBOUT2_DT[4]
36 ------------------------------PLL:DRP14[4]
PLL:PLL_CLKFBOUT2_HT[0]
37 ------------------------------PLL:DRP14[5]
PLL:PLL_CLKFBOUT2_LT[3]
38 ------------------------------PLL:DRP14[6]
PLL:PLL_CLKFBOUT2_DT[1]
39 ------------------------------PLL:DRP14[7]
PLL:PLL_CP_RES[1]
40 ------------------------------PLL:DRP14[8]
PLL:PLL_CP_RES[0]
41 ------------------------------PLL:DRP14[9]
PLL:PLL_CP_REPL[0]
42 ------------------------------PLL:DRP14[10]
PLL:PLL_CP_REPL[3]
43 ------------------------------PLL:DRP14[11]
PLL:PLL_CP_REPL[1]
44 ------------------------------PLL:DRP14[12]
PLL:PLL_UNLOCK_CNT[0]
45 ------------------------------PLL:DRP14[13]
PLL:PLL_CP_REPL[2]
46 ------------------------------PLL:DRP14[14]
PLL:PLL_UNLOCK_CNT[2]
47 ------------------------------PLL:DRP14[15]
PLL:PLL_UNLOCK_CNT[1]
48 ------------------------------PLL:DRP15[0]
PLL:PLL_LOCK_REF_DLY[4]
49 ------------------------------PLL:DRP15[1]
PLL:PLL_LOCK_FB_DLY[2]
50 ------------------------------PLL:DRP15[2]
PLL:PLL_EN_CNTRL[79]
51 ------------------------------PLL:DRP15[3]
PLL:PLL_LOCK_REF_DLY[3]
52 ------------------------------PLL:DRP15[4]
PLL:PLL_CLKFBOUT2_LT[2]
53 ------------------------------PLL:DRP15[5]
PLL:PLL_CLKFBOUT2_LT[5]
54 ------------------------------PLL:DRP15[6]
~PLL:PLL_CLKFBOUT2_EDGE
55 ------------------------------PLL:DRP15[7]
PLL:PLL_INTFB[0]
56 ------------------------------PLL:DRP15[8]
~PLL:PLL_EN_DLY
57 ------------------------------PLL:DRP15[9]
PLL:PLL_IN_DLY_MX_SEL[1]
58 ------------------------------PLL:DRP15[10]
PLL:PLL_IN_DLY_SET[6]
59 ------------------------------PLL:DRP15[11]
PLL:PLL_IN_DLY_MX_SEL[3]
60 ------------------------------PLL:DRP15[12]
PLL:PLL_IN_DLY_SET[3]
61 ------------------------------PLL:DRP15[13]
PLL:PLL_IN_DLY_SET[8]
62 ------------------------------PLL:DRP15[14]
PLL:PLL_DIVCLK_NOCOUNT
63 ------------------------------PLL:DRP15[15]
PLL:PLL_IN_DLY_SET[1]
CMT_PLL bittile 13
RowColumn
0123456789101112131415161718192021222324252627282930
0 ------------------------------PLL:DRP16[0]
PLL:PLL_DIVCLK_EN
1 ------------------------------PLL:DRP16[1]
PLL:PLL_DIVCLK_LT[4]
2 ------------------------------PLL:DRP16[2]
3 ------------------------------PLL:DRP16[3]
PLL:PLL_DIVCLK_LT[3]
4 ------------------------------PLL:DRP16[4]
5 ------------------------------PLL:DRP16[5]
PLL:PLL_DIVCLK_HT[0]
6 ------------------------------PLL:DRP16[6]
7 ------------------------------PLL:DRP16[7]
PLL:PLL_DIVCLK_LT[1]
8 ------------------------------PLL:DRP16[8]
PLL:PLL_DIVCLK_HT[3]
9 ------------------------------PLL:DRP16[9]
~PLL:PLL_CP_BIAS_TRIP_SHIFT
10 ------------------------------PLL:DRP16[10]
PLL:PLL_LOCK_SAT_HIGH[0]
11 ------------------------------PLL:DRP16[11]
PLL:PLL_LFHF[0]
12 ------------------------------PLL:DRP16[12]
PLL:PLL_LOCK_SAT_HIGH[6]
13 ------------------------------PLL:DRP16[13]
PLL:PLL_LOCK_CNT[7]
14 ------------------------------PLL:DRP16[14]
PLL:PLL_LOCK_SAT_HIGH[3]
15 ------------------------------PLL:DRP16[15]
PLL:PLL_LOCK_SAT_HIGH[5]
16 ------------------------------PLL:DRP17[0]
PLL:PLL_LOCK_CNT[2]
17 ------------------------------PLL:DRP17[1]
PLL:PLL_LOCK_CNT[3]
18 ------------------------------PLL:DRP17[2]
PLL:PLL_UNLOCK_CNT[9]
19 ------------------------------PLL:DRP17[3]
PLL:PLL_UNLOCK_CNT[8]
20 ------------------------------PLL:DRP17[4]
PLL:INV.MANPULF
21 ------------------------------PLL:DRP17[5]
PLL:PLL_LOCK_SAT_HIGH[7]
22 ------------------------------PLL:DRP17[6]
PLL:INV.MANPDLF
23 ------------------------------PLL:DRP17[7]
~PLL:PLL_VLFHIGH_DIS
24 ------------------------------PLL:DRP17[8]
PLL:PLL_CLAMP_REF_SEL[0]
25 ------------------------------PLL:DRP17[9]
PLL:PLL_LFHF[1]
26 ------------------------------PLL:DRP17[10]
~PLL:PLL_MAN_LF_EN
27 ------------------------------PLL:DRP17[11]
~PLL:PLL_CLAMP_BYPASS
28 ------------------------------PLL:DRP17[12]
PLL:PLL_CLAMP_REF_SEL[2]
29 ------------------------------PLL:DRP17[13]
PLL:PLL_CLAMP_REF_SEL[1]
30 ------------------------------PLL:DRP17[14]
PLL:PLL_PFD_CNTRL[0]
31 ------------------------------PLL:DRP17[15]
PLL:PLL_PFD_DLY[1]
32 ------------------------------PLL:DRP18[0]
PLL:PLL_PFD_DLY[0]
33 ------------------------------PLL:DRP18[1]
PLL:PLL_LOCK_SAT_HIGH[8]
34 ------------------------------PLL:DRP18[2]
PLL:PLL_LOCK_SAT_HIGH[9]
35 ------------------------------PLL:DRP18[3]
~PLL:PLL_TEST_IN_WINDOW
36 ------------------------------PLL:DRP18[4]
~PLL:PLL_CLK_LOST_DETECT
37 ------------------------------PLL:DRP18[5]
PLL:PLL_PFD_CNTRL[2]
38 ------------------------------PLL:DRP18[6]
PLL:PLL_LOCK_CNT[6]
39 ------------------------------PLL:DRP18[7]
PLL:PLL_RES[2]
40 ------------------------------PLL:DRP18[8]
PLL:PLL_RES[3]
41 ------------------------------PLL:DRP18[9]
PLL:PLL_CP[3]
42 ------------------------------PLL:DRP18[10]
PLL:PLL_CP[1]
43 ------------------------------PLL:DRP18[11]
PLL:PLL_CP[2]
44 ------------------------------PLL:DRP18[12]
~PLL:PLL_SEL_SLIPD
45 ------------------------------PLL:DRP18[13]
PLL:PLL_CP[0]
46 ------------------------------PLL:DRP18[14]
PLL:PLL_RES[1]
47 ------------------------------PLL:DRP18[15]
PLL:PLL_RES[0]
48 ------------------------------PLL:DRP19[0]
PLL:PLL_LOCK_FB_DLY[0]
49 ------------------------------PLL:DRP19[1]
PLL:PLL_LOCK_FB_DLY[4]
50 ------------------------------PLL:DRP19[2]
PLL:PLL_LOCK_FB_DLY[1]
51 ------------------------------PLL:DRP19[3]
PLL:PLL_LOCK_FB_DLY[3]
52 ------------------------------PLL:DRP19[4]
PLL:PLL_UNLOCK_CNT[3]
53 ------------------------------PLL:DRP19[5]
PLL:PLL_LOCK_REF_DLY[2]
54 ------------------------------PLL:DRP19[6]
PLL:PLL_LOCK_REF_DLY[1]
55 ------------------------------PLL:DRP19[7]
PLL:PLL_LOCK_REF_DLY[0]
56 ------------------------------PLL:DRP19[8]
PLL:PLL_UNLOCK_CNT[6]
57 ------------------------------PLL:DRP19[9]
PLL:PLL_LOCK_CNT[0]
58 ------------------------------PLL:DRP19[10]
PLL:PLL_LOCK_SAT_HIGH[2]
59 ------------------------------PLL:DRP19[11]
PLL:PLL_LOCK_SAT_HIGH[1]
60 ------------------------------PLL:DRP19[12]
PLL:PLL_LOCK_SAT_HIGH[4]
61 ------------------------------PLL:DRP19[13]
PLL:PLL_LOCK_CNT[1]
62 ------------------------------PLL:DRP19[14]
PLL:PLL_LOCK_CNT[5]
63 ------------------------------PLL:DRP19[15]
PLL:PLL_LOCK_CNT[4]
CMT_PLL bittile 14
RowColumn
0123456789101112131415161718192021222324252627282930
0 ------------------------------PLL:DRP1A[0]
PLL:PLL_LOCK_CNT[9]
1 ------------------------------PLL:DRP1A[1]
PLL:PLL_LOCK_CNT[8]
2 ------------------------------PLL:DRP1A[2]
PLL:PLL_PFD_CNTRL[1]
3 ------------------------------PLL:DRP1A[3]
PLL:PLL_PFD_CNTRL[3]
4 ------------------------------PLL:DRP1A[4]
PLL:PLL_EN_CNTRL[2]
5 ------------------------------PLL:DRP1A[5]
PLL:PLL_EN_CNTRL[74]
6 ------------------------------PLL:DRP1A[6]
PLL:PLL_EN_CNTRL[62]
7 ------------------------------PLL:DRP1A[7]
PLL:PLL_EN_CNTRL[43]
8 ------------------------------PLL:DRP1A[8]
PLL:PLL_EN
9 ------------------------------PLL:DRP1A[9]
PLL:PLL_EN_CNTRL[38]
10 ------------------------------PLL:DRP1A[10]
PLL:PLL_EN_CNTRL[35]
11 ------------------------------PLL:DRP1A[11]
PLL:PLL_EN_CNTRL[40]
12 ------------------------------PLL:DRP1A[12]
PLL:PLL_EN_CNTRL[39]
13 ------------------------------PLL:DRP1A[13]
PLL:PLL_EN_CNTRL[29]
14 ------------------------------PLL:DRP1A[14]
PLL:PLL_EN_CNTRL[42]
15 ------------------------------PLL:DRP1A[15]
PLL:PLL_EN_CNTRL[30]
16 ------------------------------PLL:DRP1B[0]
PLL:PLL_EN_CNTRL[18]
17 ------------------------------PLL:DRP1B[1]
PLL:PLL_EN_CNTRL[25]
18 ------------------------------PLL:DRP1B[2]
PLL:PLL_EN_CNTRL[41]
19 ------------------------------PLL:DRP1B[3]
PLL:PLL_EN_CNTRL[60]
20 ------------------------------PLL:DRP1B[4]
PLL:PLL_EN_CNTRL[19]
21 ------------------------------PLL:DRP1B[5]
PLL:PLL_EN_CNTRL[28]
22 ------------------------------PLL:DRP1B[6]
PLL:PLL_EN_CNTRL[1]
23 ------------------------------PLL:DRP1B[7]
PLL:PLL_EN_CNTRL[0]
24 ------------------------------PLL:DRP1B[8]
PLL:PLL_EN_CNTRL[5]
25 ------------------------------PLL:DRP1B[9]
PLL:PLL_EN_CNTRL[6]
26 ------------------------------PLL:DRP1B[10]
PLL:PLL_EN_CNTRL[7]
27 ------------------------------PLL:DRP1B[11]
PLL:PLL_EN_CNTRL[3]
28 ------------------------------PLL:DRP1B[12]
PLL:PLL_EN_CNTRL[4]
29 ------------------------------PLL:DRP1B[13]
PLL:PLL_EN_CNTRL[11]
30 ------------------------------PLL:DRP1B[14]
PLL:PLL_EN_CNTRL[64]
31 ------------------------------PLL:DRP1B[15]
PLL:PLL_EN_CNTRL[65]
32 -------------------------------
33 -------------------------------
34 -------------------------------
35 -------------------------------
36 -------------------------------
37 -------------------------------
38 -------------------------------
39 -------------------------------
40 -------------------------------
41 -------------------------------
42 -------------------------------
43 -------------------------------
44 -------------------------------
45 -------------------------------
46 -------------------------------
47 -------------------------------
48 ------------------------------PLL:DRP1C[0]
PLL:PLL_EN_CNTRL[21]
49 ------------------------------PLL:DRP1C[1]
PLL:PLL_EN_CNTRL[20]
50 ------------------------------PLL:DRP1C[2]
PLL:PLL_EN_CNTRL[22]
51 ------------------------------PLL:DRP1C[3]
PLL:PLL_EN_CNTRL[53]
52 ------------------------------PLL:DRP1C[4]
PLL:PLL_EN_CNTRL[44]
53 ------------------------------PLL:DRP1C[5]
PLL:PLL_EN_CNTRL[48]
54 ------------------------------PLL:DRP1C[6]
PLL:PLL_EN_CNTRL[8]
55 ------------------------------PLL:DRP1C[7]
PLL:PLL_EN_CNTRL[47]
56 ------------------------------PLL:DRP1C[8]
PLL:PLL_EN_CNTRL[12]
57 ------------------------------PLL:DRP1C[9]
PLL:PLL_EN_CNTRL[45]
58 ------------------------------PLL:DRP1C[10]
PLL:PLL_EN_CNTRL[56]
59 ------------------------------PLL:DRP1C[11]
PLL:PLL_EN_CNTRL[61]
60 ------------------------------PLL:DRP1C[12]
PLL:PLL_EN_CNTRL[52]
61 ------------------------------PLL:DRP1C[13]
PLL:PLL_EN_CNTRL[55]
62 ------------------------------PLL:DRP1C[14]
PLL:PLL_EN_CNTRL[13]
63 ------------------------------PLL:DRP1C[15]
PLL:PLL_EN_CNTRL[69]
CMT_PLL bittile 15
RowColumn
0123456789101112131415161718192021222324252627282930
0 ------------------------------PLL:DRP1D[0]
PLL:PLL_EN_CNTRL[14]
1 ------------------------------PLL:DRP1D[1]
PLL:PLL_EN_CNTRL[70]
2 ------------------------------PLL:DRP1D[2]
PLL:PLL_EN_CNTRL[54]
3 ------------------------------PLL:DRP1D[3]
PLL:PLL_EN_CNTRL[63]
4 ------------------------------PLL:DRP1D[4]
PLL:PLL_EN_CNTRL[26]
5 ------------------------------PLL:DRP1D[5]
PLL:PLL_EN_CNTRL[51]
6 ------------------------------PLL:DRP1D[6]
PLL:PLL_EN_CNTRL[27]
7 ------------------------------PLL:DRP1D[7]
PLL:PLL_EN_CNTRL[36]
8 ------------------------------PLL:DRP1D[8]
PLL:PLL_EN_CNTRL[37]
9 ------------------------------PLL:DRP1D[9]
PLL:PLL_EN_CNTRL[46]
10 ------------------------------PLL:DRP1D[10]
PLL:PLL_EN_CNTRL[58]
11 ------------------------------PLL:DRP1D[11]
PLL:PLL_EN_CNTRL[49]
12 ------------------------------PLL:DRP1D[12]
PLL:PLL_UNLOCK_CNT[5]
13 ------------------------------PLL:DRP1D[13]
PLL:PLL_EN_CNTRL[57]
14 ------------------------------PLL:DRP1D[14]
PLL:PLL_UNLOCK_CNT[4]
15 ------------------------------PLL:DRP1D[15]
PLL:PLL_UNLOCK_CNT[7]
16 ------------------------------PLL:DRP1E[0]
PLL:PLL_EN_CNTRL[80]
17 ------------------------------PLL:DRP1E[1]
PLL:INV.RST
18 ------------------------------PLL:DRP1E[2]
PLL:PLL_EN_CNTRL[81]
19 ------------------------------PLL:DRP1E[3]
PLL:PLL_EN_CNTRL[82]
20 ------------------------------PLL:DRP1E[4]
PLL:PLL_EN_CNTRL[83]
21 ------------------------------PLL:DRP1E[5]
PLL:INV.ENOUTSYNC
22 ------------------------------PLL:DRP1E[6]
~PLL:INV.REL
23 ------------------------------PLL:DRP1E[7]
PLL:PLL_EN_CNTRL[84]
24 ------------------------------PLL:DRP1E[8]
25 ------------------------------PLL:DRP1E[9]
26 ------------------------------PLL:DRP1E[10]
27 ------------------------------PLL:DRP1E[11]
28 ------------------------------PLL:DRP1E[12]
PLL:PLL_EN_CNTRL[59]
29 ------------------------------PLL:DRP1E[13]
30 ------------------------------PLL:DRP1E[14]
PLL:PLL_EN_CNTRL[17]
31 ------------------------------PLL:DRP1E[15]
PLL:PLL_EN_CNTRL[68]
32 ------------------------------PLL:DRP1F[0]
PLL:PLL_EN_CNTRL[16]
33 ------------------------------PLL:DRP1F[1]
PLL:PLL_EN_CNTRL[67]
34 ------------------------------PLL:DRP1F[2]
PLL:PLL_EN_CNTRL[15]
35 ------------------------------PLL:DRP1F[3]
PLL:PLL_EN_CNTRL[66]
36 ------------------------------PLL:DRP1F[4]
PLL:PLL_EN_CNTRL[72]
37 ------------------------------PLL:DRP1F[5]
PLL:PLL_EN_CNTRL[71]
38 ------------------------------PLL:DRP1F[6]
PLL:PLL_EN_CNTRL[31]
39 ------------------------------PLL:DRP1F[7]
PLL:PLL_EN_CNTRL[32]
40 ------------------------------PLL:DRP1F[8]
PLL:PLL_EN_CNTRL[73]
41 ------------------------------PLL:DRP1F[9]
PLL:PLL_EN_CNTRL[33]
42 ------------------------------PLL:DRP1F[10]
PLL:PLL_EN_CNTRL[10]
43 ------------------------------PLL:DRP1F[11]
PLL:PLL_EN_CNTRL[9]
44 ------------------------------PLL:DRP1F[12]
PLL:PLL_EN_CNTRL[24]
45 ------------------------------PLL:DRP1F[13]
PLL:PLL_EN_CNTRL[50]
46 ------------------------------PLL:DRP1F[14]
PLL:PLL_EN_CNTRL[34]
47 ------------------------------PLL:DRP1F[15]
PLL:PLL_EN_CNTRL[23]
CMT_PLL bittile 16
RowColumn
CMT_PLL bittile 17
RowColumn
CMT_PLL bittile 18
RowColumn
CMT_PLL bittile 19
RowColumn
CMT_PLL bittile 20
RowColumn
CMT_PLL bittile 21
RowColumn
CMT_PLL bittile 22
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 ----
5 ----
6 ----
7 ----
8 ----
9 ----
10 ----
11 ----
12 ----
13 ----
14 ----
15 ----
16 ----
17 ----
18 ----
19 ----
20 ----
21 ----
22 ----
23 ----
24 ---CMT:MUX.HCLK0[0]
25 ---CMT:MUX.HCLK0[2]
26 ---CMT:MUX.CASC0
27 ---CMT:MUX.HCLK0[1]
28 ---CMT:MUX.HCLK0[4]
29 ----
30 ---CMT:MUX.HCLK0[5]
31 ---CMT:MUX.HCLK0[3]
32 ---CMT:MUX.HCLK1[3]
33 ---CMT:MUX.HCLK1[5]
34 ----
35 ---CMT:MUX.HCLK1[4]
36 ---CMT:MUX.HCLK1[1]
37 ---CMT:MUX.CASC1
38 ---CMT:MUX.HCLK1[2]
39 ---CMT:MUX.HCLK1[0]
40 ---CMT:MUX.HCLK2[0]
41 ---CMT:MUX.HCLK2[2]
42 ---CMT:MUX.CASC2
43 ---CMT:MUX.HCLK2[1]
44 ---CMT:MUX.HCLK2[4]
45 ----
46 ---CMT:MUX.HCLK2[5]
47 ---CMT:MUX.HCLK2[3]
48 ---CMT:MUX.HCLK3[3]
49 ---CMT:MUX.HCLK3[5]
50 ----
51 ---CMT:MUX.HCLK3[4]
52 ---CMT:MUX.HCLK3[1]
53 ---CMT:MUX.CASC3
54 ---CMT:MUX.HCLK3[2]
55 ---CMT:MUX.HCLK3[0]
56 ---CMT:MUX.HCLK4[0]
57 ---CMT:MUX.HCLK4[2]
58 ---CMT:MUX.CASC4
59 ---CMT:MUX.HCLK4[1]
60 ---CMT:MUX.HCLK4[4]
61 ----
62 ---CMT:MUX.HCLK4[5]
63 ---CMT:MUX.HCLK4[3]
CMT_PLL bittile 23
RowColumn
0123
0 ---CMT:MUX.HCLK5[3]
1 ---CMT:MUX.HCLK5[5]
2 ----
3 ---CMT:MUX.HCLK5[4]
4 ---CMT:MUX.HCLK5[1]
5 ---CMT:MUX.CASC5
6 ---CMT:MUX.HCLK5[2]
7 ---CMT:MUX.HCLK5[0]
8 ---CMT:MUX.HCLK6[0]
9 ---CMT:MUX.HCLK6[2]
10 ---CMT:MUX.CASC6
11 ---CMT:MUX.HCLK6[1]
12 ---CMT:MUX.HCLK6[4]
13 ----
14 ---CMT:MUX.HCLK6[5]
15 ---CMT:MUX.HCLK6[3]
16 ---CMT:MUX.HCLK7[3]
17 ---CMT:MUX.HCLK7[5]
18 ----
19 ---CMT:MUX.HCLK7[4]
20 ---CMT:MUX.HCLK7[1]
21 ---CMT:MUX.CASC7
22 ---CMT:MUX.HCLK7[2]
23 ---CMT:MUX.HCLK7[0]
CMT_PLL bittile 24
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 ----
5 ----
6 ----
7 ----
8 ----
9 ----
10 ----
11 ----
12 ----
13 ----
14 ----
15 ----
16 ----
17 ----
18 ----
19 ----
20 ----
21 ----
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 ----
32 ----
33 ----
34 ----
35 ----
36 ----
37 ----
38 ----
39 ----
40 ---CMT:MUX.HCLK8[0]
41 ---CMT:MUX.HCLK8[2]
42 ---CMT:MUX.CASC8
43 ---CMT:MUX.HCLK8[1]
44 ---CMT:MUX.HCLK8[4]
45 ----
46 ---CMT:MUX.HCLK8[5]
47 ---CMT:MUX.HCLK8[3]
48 ---CMT:MUX.HCLK9[3]
49 ---CMT:MUX.HCLK9[5]
50 ----
51 ---CMT:MUX.HCLK9[4]
52 ---CMT:MUX.HCLK9[1]
53 ---CMT:MUX.CASC9
54 ---CMT:MUX.HCLK9[2]
55 ---CMT:MUX.HCLK9[0]
56 ---CMT:MUX.HCLK10[0]
57 ---CMT:MUX.HCLK10[2]
58 ---CMT:MUX.CASC10
59 ---CMT:MUX.HCLK10[1]
60 ---CMT:MUX.HCLK10[4]
61 ----
62 ---CMT:MUX.HCLK10[5]
63 ---CMT:MUX.HCLK10[3]
CMT_PLL bittile 25
RowColumn
0123
0 ---CMT:MUX.HCLK11[3]
1 ---CMT:MUX.HCLK11[5]
2 ----
3 ---CMT:MUX.HCLK11[4]
4 ---CMT:MUX.HCLK11[1]
5 ---CMT:MUX.CASC11
6 ---CMT:MUX.HCLK11[2]
7 ---CMT:MUX.HCLK11[0]
8 ---CMT:MUX.HCLK12[0]
9 ---CMT:MUX.HCLK12[2]
10 ---CMT:MUX.CASC12
11 ---CMT:MUX.HCLK12[1]
12 ---CMT:MUX.HCLK12[4]
13 ----
14 ---CMT:MUX.HCLK12[5]
15 ---CMT:MUX.HCLK12[3]
16 ---CMT:MUX.HCLK13[3]
17 ---CMT:MUX.HCLK13[5]
18 ----
19 ---CMT:MUX.HCLK13[4]
20 ---CMT:MUX.HCLK13[1]
21 ---CMT:MUX.CASC13
22 ---CMT:MUX.HCLK13[2]
23 ---CMT:MUX.HCLK13[0]
24 ---CMT:MUX.HCLK14[0]
25 ---CMT:MUX.HCLK14[2]
26 ---CMT:MUX.CASC14
27 ---CMT:MUX.HCLK14[1]
28 ---CMT:MUX.HCLK14[4]
29 ----
30 ---CMT:MUX.HCLK14[5]
31 ---CMT:MUX.HCLK14[3]
32 ---CMT:MUX.HCLK15[3]
33 ---CMT:MUX.HCLK15[5]
34 ----
35 ---CMT:MUX.HCLK15[4]
36 ---CMT:MUX.HCLK15[1]
37 ---CMT:MUX.CASC15
38 ---CMT:MUX.HCLK15[2]
39 ---CMT:MUX.HCLK15[0]
PLL:PLL_ADD_LEAKAGE[6, 30, 44][6, 30, 47]
PLL:PLL_AVDD_COMP_SET[5, 30, 51][5, 30, 56]
PLL:PLL_CLK0MX[9, 30, 3][9, 30, 30]
PLL:PLL_CLK1MX[9, 30, 21][9, 30, 18]
PLL:PLL_CLK2MX[9, 30, 48][9, 30, 49]
PLL:PLL_CLK3MX[10, 30, 15][10, 30, 12]
PLL:PLL_CLK4MX[10, 30, 43][10, 30, 41]
PLL:PLL_CLK5MX[11, 30, 7][11, 30, 6]
PLL:PLL_CLKFBMX[12, 30, 13][11, 30, 34]
PLL:PLL_CP_RES[12, 30, 39][12, 30, 40]
PLL:PLL_DVDD_COMP_SET[5, 30, 33][5, 30, 32]
PLL:PLL_EN_LEAKAGE[6, 30, 49][6, 30, 46]
PLL:PLL_INTFB[12, 30, 2][12, 30, 55]
PLL:PLL_LFHF[13, 30, 25][13, 30, 11]
PLL:PLL_PFD_DLY[13, 30, 31][13, 30, 32]
PLL:PLL_VDD_SEL[6, 30, 27][5, 30, 35]
Non-inverted[1][0]
PLL:DRP00[5, 30, 47][5, 30, 46][5, 30, 45][5, 30, 44][5, 30, 43][5, 30, 42][5, 30, 41][5, 30, 40][5, 30, 39][5, 30, 38][5, 30, 37][5, 30, 36][5, 30, 35][5, 30, 34][5, 30, 33][5, 30, 32]
PLL:DRP01[5, 30, 63][5, 30, 62][5, 30, 61][5, 30, 60][5, 30, 59][5, 30, 58][5, 30, 57][5, 30, 56][5, 30, 55][5, 30, 54][5, 30, 53][5, 30, 52][5, 30, 51][5, 30, 50][5, 30, 49][5, 30, 48]
PLL:DRP02[6, 30, 15][6, 30, 14][6, 30, 13][6, 30, 12][6, 30, 11][6, 30, 10][6, 30, 9][6, 30, 8][6, 30, 7][6, 30, 6][6, 30, 5][6, 30, 4][6, 30, 3][6, 30, 2][6, 30, 1][6, 30, 0]
PLL:DRP03[6, 30, 31][6, 30, 30][6, 30, 29][6, 30, 28][6, 30, 27][6, 30, 26][6, 30, 25][6, 30, 24][6, 30, 23][6, 30, 22][6, 30, 21][6, 30, 20][6, 30, 19][6, 30, 18][6, 30, 17][6, 30, 16]
PLL:DRP04[6, 30, 47][6, 30, 46][6, 30, 45][6, 30, 44][6, 30, 43][6, 30, 42][6, 30, 41][6, 30, 40][6, 30, 39][6, 30, 38][6, 30, 37][6, 30, 36][6, 30, 35][6, 30, 34][6, 30, 33][6, 30, 32]
PLL:DRP05[6, 30, 63][6, 30, 62][6, 30, 61][6, 30, 60][6, 30, 59][6, 30, 58][6, 30, 57][6, 30, 56][6, 30, 55][6, 30, 54][6, 30, 53][6, 30, 52][6, 30, 51][6, 30, 50][6, 30, 49][6, 30, 48]
PLL:DRP06[9, 30, 15][9, 30, 14][9, 30, 13][9, 30, 12][9, 30, 11][9, 30, 10][9, 30, 9][9, 30, 8][9, 30, 7][9, 30, 6][9, 30, 5][9, 30, 4][9, 30, 3][9, 30, 2][9, 30, 1][9, 30, 0]
PLL:DRP07[9, 30, 31][9, 30, 30][9, 30, 29][9, 30, 28][9, 30, 27][9, 30, 26][9, 30, 25][9, 30, 24][9, 30, 23][9, 30, 22][9, 30, 21][9, 30, 20][9, 30, 19][9, 30, 18][9, 30, 17][9, 30, 16]
PLL:DRP08[9, 30, 47][9, 30, 46][9, 30, 45][9, 30, 44][9, 30, 43][9, 30, 42][9, 30, 41][9, 30, 40][9, 30, 39][9, 30, 38][9, 30, 37][9, 30, 36][9, 30, 35][9, 30, 34][9, 30, 33][9, 30, 32]
PLL:DRP09[9, 30, 63][9, 30, 62][9, 30, 61][9, 30, 60][9, 30, 59][9, 30, 58][9, 30, 57][9, 30, 56][9, 30, 55][9, 30, 54][9, 30, 53][9, 30, 52][9, 30, 51][9, 30, 50][9, 30, 49][9, 30, 48]
PLL:DRP0A[10, 30, 15][10, 30, 14][10, 30, 13][10, 30, 12][10, 30, 11][10, 30, 10][10, 30, 9][10, 30, 8][10, 30, 7][10, 30, 6][10, 30, 5][10, 30, 4][10, 30, 3][10, 30, 2][10, 30, 1][10, 30, 0]
PLL:DRP0B[10, 30, 31][10, 30, 30][10, 30, 29][10, 30, 28][10, 30, 27][10, 30, 26][10, 30, 25][10, 30, 24][10, 30, 23][10, 30, 22][10, 30, 21][10, 30, 20][10, 30, 19][10, 30, 18][10, 30, 17][10, 30, 16]
PLL:DRP0C[10, 30, 47][10, 30, 46][10, 30, 45][10, 30, 44][10, 30, 43][10, 30, 42][10, 30, 41][10, 30, 40][10, 30, 39][10, 30, 38][10, 30, 37][10, 30, 36][10, 30, 35][10, 30, 34][10, 30, 33][10, 30, 32]
PLL:DRP0D[10, 30, 63][10, 30, 62][10, 30, 61][10, 30, 60][10, 30, 59][10, 30, 58][10, 30, 57][10, 30, 56][10, 30, 55][10, 30, 54][10, 30, 53][10, 30, 52][10, 30, 51][10, 30, 50][10, 30, 49][10, 30, 48]
PLL:DRP0E[11, 30, 15][11, 30, 14][11, 30, 13][11, 30, 12][11, 30, 11][11, 30, 10][11, 30, 9][11, 30, 8][11, 30, 7][11, 30, 6][11, 30, 5][11, 30, 4][11, 30, 3][11, 30, 2][11, 30, 1][11, 30, 0]
PLL:DRP0F[11, 30, 31][11, 30, 30][11, 30, 29][11, 30, 28][11, 30, 27][11, 30, 26][11, 30, 25][11, 30, 24][11, 30, 23][11, 30, 22][11, 30, 21][11, 30, 20][11, 30, 19][11, 30, 18][11, 30, 17][11, 30, 16]
PLL:DRP10[11, 30, 47][11, 30, 46][11, 30, 45][11, 30, 44][11, 30, 43][11, 30, 42][11, 30, 41][11, 30, 40][11, 30, 39][11, 30, 38][11, 30, 37][11, 30, 36][11, 30, 35][11, 30, 34][11, 30, 33][11, 30, 32]
PLL:DRP11[11, 30, 63][11, 30, 62][11, 30, 61][11, 30, 60][11, 30, 59][11, 30, 58][11, 30, 57][11, 30, 56][11, 30, 55][11, 30, 54][11, 30, 53][11, 30, 52][11, 30, 51][11, 30, 50][11, 30, 49][11, 30, 48]
PLL:DRP12[12, 30, 15][12, 30, 14][12, 30, 13][12, 30, 12][12, 30, 11][12, 30, 10][12, 30, 9][12, 30, 8][12, 30, 7][12, 30, 6][12, 30, 5][12, 30, 4][12, 30, 3][12, 30, 2][12, 30, 1][12, 30, 0]
PLL:DRP13[12, 30, 31][12, 30, 30][12, 30, 29][12, 30, 28][12, 30, 27][12, 30, 26][12, 30, 25][12, 30, 24][12, 30, 23][12, 30, 22][12, 30, 21][12, 30, 20][12, 30, 19][12, 30, 18][12, 30, 17][12, 30, 16]
PLL:DRP14[12, 30, 47][12, 30, 46][12, 30, 45][12, 30, 44][12, 30, 43][12, 30, 42][12, 30, 41][12, 30, 40][12, 30, 39][12, 30, 38][12, 30, 37][12, 30, 36][12, 30, 35][12, 30, 34][12, 30, 33][12, 30, 32]
PLL:DRP15[12, 30, 63][12, 30, 62][12, 30, 61][12, 30, 60][12, 30, 59][12, 30, 58][12, 30, 57][12, 30, 56][12, 30, 55][12, 30, 54][12, 30, 53][12, 30, 52][12, 30, 51][12, 30, 50][12, 30, 49][12, 30, 48]
PLL:DRP16[13, 30, 15][13, 30, 14][13, 30, 13][13, 30, 12][13, 30, 11][13, 30, 10][13, 30, 9][13, 30, 8][13, 30, 7][13, 30, 6][13, 30, 5][13, 30, 4][13, 30, 3][13, 30, 2][13, 30, 1][13, 30, 0]
PLL:DRP17[13, 30, 31][13, 30, 30][13, 30, 29][13, 30, 28][13, 30, 27][13, 30, 26][13, 30, 25][13, 30, 24][13, 30, 23][13, 30, 22][13, 30, 21][13, 30, 20][13, 30, 19][13, 30, 18][13, 30, 17][13, 30, 16]
PLL:DRP18[13, 30, 47][13, 30, 46][13, 30, 45][13, 30, 44][13, 30, 43][13, 30, 42][13, 30, 41][13, 30, 40][13, 30, 39][13, 30, 38][13, 30, 37][13, 30, 36][13, 30, 35][13, 30, 34][13, 30, 33][13, 30, 32]
PLL:DRP19[13, 30, 63][13, 30, 62][13, 30, 61][13, 30, 60][13, 30, 59][13, 30, 58][13, 30, 57][13, 30, 56][13, 30, 55][13, 30, 54][13, 30, 53][13, 30, 52][13, 30, 51][13, 30, 50][13, 30, 49][13, 30, 48]
PLL:DRP1A[14, 30, 15][14, 30, 14][14, 30, 13][14, 30, 12][14, 30, 11][14, 30, 10][14, 30, 9][14, 30, 8][14, 30, 7][14, 30, 6][14, 30, 5][14, 30, 4][14, 30, 3][14, 30, 2][14, 30, 1][14, 30, 0]
PLL:DRP1B[14, 30, 31][14, 30, 30][14, 30, 29][14, 30, 28][14, 30, 27][14, 30, 26][14, 30, 25][14, 30, 24][14, 30, 23][14, 30, 22][14, 30, 21][14, 30, 20][14, 30, 19][14, 30, 18][14, 30, 17][14, 30, 16]
PLL:DRP1C[14, 30, 63][14, 30, 62][14, 30, 61][14, 30, 60][14, 30, 59][14, 30, 58][14, 30, 57][14, 30, 56][14, 30, 55][14, 30, 54][14, 30, 53][14, 30, 52][14, 30, 51][14, 30, 50][14, 30, 49][14, 30, 48]
PLL:DRP1D[15, 30, 15][15, 30, 14][15, 30, 13][15, 30, 12][15, 30, 11][15, 30, 10][15, 30, 9][15, 30, 8][15, 30, 7][15, 30, 6][15, 30, 5][15, 30, 4][15, 30, 3][15, 30, 2][15, 30, 1][15, 30, 0]
PLL:DRP1E[15, 30, 31][15, 30, 30][15, 30, 29][15, 30, 28][15, 30, 27][15, 30, 26][15, 30, 25][15, 30, 24][15, 30, 23][15, 30, 22][15, 30, 21][15, 30, 20][15, 30, 19][15, 30, 18][15, 30, 17][15, 30, 16]
PLL:DRP1F[15, 30, 47][15, 30, 46][15, 30, 45][15, 30, 44][15, 30, 43][15, 30, 42][15, 30, 41][15, 30, 40][15, 30, 39][15, 30, 38][15, 30, 37][15, 30, 36][15, 30, 35][15, 30, 34][15, 30, 33][15, 30, 32]
Non-inverted[15][14][13][12][11][10][9][8][7][6][5][4][3][2][1][0]
PLL:INV.CLKINSEL[6, 30, 54]
PLL:INV.REL[15, 30, 22]
PLL:PLL_CLAMP_BYPASS[13, 30, 27]
PLL:PLL_CLKBURST_ENABLE[6, 30, 62]
PLL:PLL_CLKFBOUT2_EDGE[12, 30, 54]
PLL:PLL_CLK_LOST_DETECT[13, 30, 36]
PLL:PLL_CP_BIAS_TRIP_SHIFT[13, 30, 9]
PLL:PLL_DIRECT_PATH_CNTRL[11, 30, 17]
PLL:PLL_EN_DLY[12, 30, 56]
PLL:PLL_EN_TCLK0[12, 30, 5]
PLL:PLL_EN_TCLK1[12, 30, 14]
PLL:PLL_EN_TCLK2[12, 30, 17]
PLL:PLL_EN_TCLK3[12, 30, 15]
PLL:PLL_EN_VCO0[10, 30, 51]
PLL:PLL_EN_VCO1[9, 30, 32]
PLL:PLL_EN_VCO2[9, 30, 56]
PLL:PLL_EN_VCO3[9, 30, 58]
PLL:PLL_EN_VCO4[10, 30, 24]
PLL:PLL_EN_VCO5[10, 30, 20]
PLL:PLL_EN_VCO6[10, 30, 0]
PLL:PLL_EN_VCO7[9, 30, 59]
PLL:PLL_EN_VCO_DIV1[9, 30, 0]
PLL:PLL_MAN_LF_EN[13, 30, 26]
PLL:PLL_NBTI_EN[6, 30, 33]
PLL:PLL_PWRD_CFG[5, 30, 34]
PLL:PLL_REG_INPUT[6, 30, 1]
PLL:PLL_SEL_SLIPD[13, 30, 44]
PLL:PLL_TEST_IN_WINDOW[13, 30, 35]
PLL:PLL_VLFHIGH_DIS[13, 30, 23]
Inverted~[0]
PLL:MUX.CLKFBIN[6, 30, 30][6, 30, 28][6, 30, 26][6, 30, 31][6, 30, 29]
BUFIO2FB_BT000000
BUFIO2FB_BT100001
BUFIO2FB_BT200010
BUFIO2FB_BT300011
BUFIO2FB_BT400100
BUFIO2FB_BT500101
BUFIO2FB_BT600110
BUFIO2FB_BT700111
BUFIO2FB_LR001001
BUFIO2FB_LR101010
BUFIO2FB_LR201011
CKINT101100
BUFIO2FB_LR401101
BUFIO2FB_LR501110
BUFIO2FB_LR601111
CKINT010011
CLKFBOUT10100
CLKFBDCM10111
BUFIO2FB_LR311011
BUFIO2FB_LR711111
PLL:MUX.CLK_TO_DCM0[6, 30, 42][6, 30, 35][6, 30, 34]
CLKOUT0000
CLKOUT1001
CLKOUT2010
CLKOUT3011
CLKOUT4100
CLKOUT5101
NONE110
PLL:CLKINSEL_STATIC[6, 30, 52]
PLL:CLKIN_CLKFBIN_USED[6, 30, 50]
PLL:ENABLE[8, 22, 17]
PLL:INV.CLKBRST[9, 30, 29]
PLL:INV.ENOUTSYNC[15, 30, 21]
PLL:INV.MANPDLF[13, 30, 22]
PLL:INV.MANPULF[13, 30, 20]
PLL:INV.RST[15, 30, 17]
PLL:INV.SKEWRST[6, 30, 38]
PLL:INV.SKEWSTB[6, 30, 37]
PLL:PLL_CLKFBOUT2_NOCOUNT[12, 30, 3]
PLL:PLL_CLKFBOUT_EDGE[11, 30, 37]
PLL:PLL_CLKFBOUT_EN[11, 30, 35]
PLL:PLL_CLKFBOUT_NOCOUNT[11, 30, 28]
PLL:PLL_CLKOUT0_EDGE[9, 30, 2]
PLL:PLL_CLKOUT0_EN[9, 30, 31]
PLL:PLL_CLKOUT0_NOCOUNT[11, 30, 19]
PLL:PLL_CLKOUT1_EDGE[9, 30, 20]
PLL:PLL_CLKOUT1_EN[9, 30, 19]
PLL:PLL_CLKOUT1_NOCOUNT[9, 30, 12]
PLL:PLL_CLKOUT2_EDGE[9, 30, 51]
PLL:PLL_CLKOUT2_EN[9, 30, 46]
PLL:PLL_CLKOUT2_NOCOUNT[9, 30, 43]
PLL:PLL_CLKOUT3_EDGE[10, 30, 14]
PLL:PLL_CLKOUT3_EN[10, 30, 13]
PLL:PLL_CLKOUT3_NOCOUNT[10, 30, 7]
PLL:PLL_CLKOUT4_EDGE[10, 30, 42]
PLL:PLL_CLKOUT4_EN[10, 30, 40]
PLL:PLL_CLKOUT4_NOCOUNT[10, 30, 34]
PLL:PLL_CLKOUT5_EDGE[11, 30, 8]
PLL:PLL_CLKOUT5_EN[11, 30, 4]
PLL:PLL_CLKOUT5_NOCOUNT[11, 30, 1]
PLL:PLL_DIVCLK_EDGE[12, 30, 20]
PLL:PLL_DIVCLK_EN[13, 30, 0]
PLL:PLL_DIVCLK_NOCOUNT[12, 30, 62]
PLL:PLL_EN[14, 30, 8]
PLL:PLL_EN_VCO_DIV6[9, 30, 8]
Non-inverted[0]
PLL:MUX.CLK_TO_DCM1[6, 30, 41][6, 30, 40][6, 30, 39]
CLKOUT0000
CLKOUT1001
CLKOUT2010
CLKOUT3011
CLKOUT4100
CLKOUT5101
NONE110
CLKFBOUT111
PLL:MUX.TEST_CLK[6, 30, 32][6, 30, 45][6, 30, 43]
DCM1_CLKIN000
DCM1_CLKFB001
DCM0_CLKIN010
DCM0_CLKFB011
CLKIN1100
CLKFBIN110
PLL:MUX.CLKIN[6, 30, 48][6, 30, 55][6, 30, 36][6, 30, 51]
BUFIO2_BT0_40000
BUFIO2_BT1_50001
BUFIO2_BT2_60010
BUFIO2_BT3_70011
CKINT10100
BUFIO2_LR0_40101
BUFIO2_LR1_50110
BUFIO2_LR2_60111
CLK_FROM_DCM11000
CKINT01011
CLK_FROM_DCM01100
BUFIO2_LR3_71111
PLL:CLKINSEL_MODE[6, 30, 53]
STATIC0
DYNAMIC1
PLL:PLL_CLKFBOUT2_DT[12, 30, 33][12, 30, 35][11, 30, 62][12, 30, 1][12, 30, 38][12, 30, 34]
PLL:PLL_CLKFBOUT2_HT[12, 30, 32][11, 30, 58][12, 30, 30][11, 30, 61][11, 30, 60][12, 30, 36]
PLL:PLL_CLKFBOUT2_LT[12, 30, 53][12, 30, 0][12, 30, 37][12, 30, 52][11, 30, 59][11, 30, 63]
PLL:PLL_CLKFBOUT_DT[11, 30, 24][11, 30, 23][11, 30, 22][11, 30, 20][11, 30, 21][12, 30, 10]
PLL:PLL_CLKFBOUT_HT[11, 30, 42][11, 30, 43][11, 30, 41][11, 30, 40][11, 30, 39][11, 30, 38]
PLL:PLL_CLKFBOUT_LT[11, 30, 30][11, 30, 31][11, 30, 29][11, 30, 26][11, 30, 27][11, 30, 25]
PLL:PLL_CLKOUT0_DT[6, 30, 63][6, 30, 61][6, 30, 58][6, 30, 59][6, 30, 57][6, 30, 56]
PLL:PLL_CLKOUT0_HT[11, 30, 45][11, 30, 44][11, 30, 46][11, 30, 49][11, 30, 48][11, 30, 51]
PLL:PLL_CLKOUT0_LT[10, 30, 31][10, 30, 25][10, 30, 54][10, 30, 52][11, 30, 18][10, 30, 53]
PLL:PLL_CLKOUT1_DT[9, 30, 9][11, 30, 53][9, 30, 7][9, 30, 6][9, 30, 4][9, 30, 5]
PLL:PLL_CLKOUT1_HT[9, 30, 28][9, 30, 26][9, 30, 27][9, 30, 25][9, 30, 24][9, 30, 23]
PLL:PLL_CLKOUT1_LT[9, 30, 14][9, 30, 15][9, 30, 13][9, 30, 10][9, 30, 11][11, 30, 52]
PLL:PLL_CLKOUT2_DT[9, 30, 38][9, 30, 36][9, 30, 37][9, 30, 34][9, 30, 35][9, 30, 33]
PLL:PLL_CLKOUT2_HT[11, 30, 55][9, 30, 57][9, 30, 55][9, 30, 54][9, 30, 52][9, 30, 53]
PLL:PLL_CLKOUT2_LT[9, 30, 45][9, 30, 42][9, 30, 41][9, 30, 40][11, 30, 54][9, 30, 39]
PLL:PLL_CLKOUT3_DT[10, 30, 2][10, 30, 3][10, 30, 1][11, 30, 56][9, 30, 62][9, 30, 63]
PLL:PLL_CLKOUT3_HT[10, 30, 23][10, 30, 22][10, 30, 21][10, 30, 18][10, 30, 19][10, 30, 16]
PLL:PLL_CLKOUT3_LT[10, 30, 9][10, 30, 8][11, 30, 57][10, 30, 6][10, 30, 4][10, 30, 5]
PLL:PLL_CLKOUT4_DT[10, 30, 30][12, 30, 8][10, 30, 28][10, 30, 26][10, 30, 27][10, 30, 29]
PLL:PLL_CLKOUT4_HT[10, 30, 50][10, 30, 48][10, 30, 49][10, 30, 46][10, 30, 47][10, 30, 44]
PLL:PLL_CLKOUT4_LT[10, 30, 36][10, 30, 37][10, 30, 35][10, 30, 32][10, 30, 33][12, 30, 9]
PLL:PLL_CLKOUT5_DT[10, 30, 58][10, 30, 59][10, 30, 57][10, 30, 56][10, 30, 55][12, 30, 11]
PLL:PLL_CLKOUT5_HT[11, 30, 14][11, 30, 15][11, 30, 12][11, 30, 13][11, 30, 10][11, 30, 11]
PLL:PLL_CLKOUT5_LT[11, 30, 3][11, 30, 0][10, 30, 62][10, 30, 63][10, 30, 60][10, 30, 61]
PLL:PLL_DIVCLK_HT[12, 30, 31][12, 30, 29][13, 30, 8][12, 30, 26][12, 30, 27][13, 30, 5]
PLL:PLL_DIVCLK_LT[12, 30, 23][13, 30, 1][13, 30, 3][12, 30, 22][13, 30, 7][12, 30, 25]
Non-inverted[5][4][3][2][1][0]
PLL:PLL_CLAMP_REF_SEL[13, 30, 28][13, 30, 29][13, 30, 24]
PLL:PLL_CLKBURST_CNT[9, 30, 1][11, 30, 47][6, 30, 60]
PLL:PLL_CLKFBOUT_PM[11, 30, 32][11, 30, 33][11, 30, 36]
PLL:PLL_CLKOUT0_PM[9, 30, 60][9, 30, 61][11, 30, 50]
PLL:PLL_CLKOUT1_PM[9, 30, 16][9, 30, 17][9, 30, 22]
PLL:PLL_CLKOUT2_PM[9, 30, 47][9, 30, 44][9, 30, 50]
PLL:PLL_CLKOUT3_PM[10, 30, 10][10, 30, 11][10, 30, 17]
PLL:PLL_CLKOUT4_PM[10, 30, 39][10, 30, 38][10, 30, 45]
PLL:PLL_CLKOUT5_PM[11, 30, 5][11, 30, 2][11, 30, 9]
Non-inverted[2][1][0]
PLL:PLL_IN_DLY_MX_SEL[12, 30, 7][12, 30, 59][12, 30, 6][12, 30, 57][12, 30, 4]
PLL:PLL_LOCK_FB_DLY[13, 30, 49][13, 30, 51][12, 30, 49][13, 30, 50][13, 30, 48]
PLL:PLL_LOCK_REF_DLY[12, 30, 48][12, 30, 51][13, 30, 53][13, 30, 54][13, 30, 55]
Non-inverted[4][3][2][1][0]
PLL:PLL_IN_DLY_SET[12, 30, 61][12, 30, 16][12, 30, 58][12, 30, 12][12, 30, 19][12, 30, 60][12, 30, 18][12, 30, 63][12, 30, 21]
Non-inverted[8][7][6][5][4][3][2][1][0]
PLL:PLL_CP[13, 30, 41][13, 30, 43][13, 30, 42][13, 30, 45]
PLL:PLL_CP_REPL[12, 30, 42][12, 30, 45][12, 30, 43][12, 30, 41]
PLL:PLL_PFD_CNTRL[14, 30, 3][13, 30, 37][14, 30, 2][13, 30, 30]
PLL:PLL_RES[13, 30, 40][13, 30, 39][13, 30, 46][13, 30, 47]
Non-inverted[3][2][1][0]
PLL:PLL_LOCK_CNT[14, 30, 0][14, 30, 1][13, 30, 13][13, 30, 38][13, 30, 62][13, 30, 63][13, 30, 17][13, 30, 16][13, 30, 61][13, 30, 57]
PLL:PLL_LOCK_SAT_HIGH[13, 30, 34][13, 30, 33][13, 30, 21][13, 30, 12][13, 30, 15][13, 30, 60][13, 30, 14][13, 30, 58][13, 30, 59][13, 30, 10]
PLL:PLL_UNLOCK_CNT[13, 30, 18][13, 30, 19][15, 30, 15][13, 30, 56][15, 30, 12][15, 30, 14][13, 30, 52][12, 30, 46][12, 30, 47][12, 30, 44]
Non-inverted[9][8][7][6][5][4][3][2][1][0]
PLL:PLL_EN_CNTRL[15, 30, 23][15, 30, 20][15, 30, 19][15, 30, 18][15, 30, 16][12, 30, 50][5, 30, 59][5, 30, 58][5, 30, 57][5, 30, 55][14, 30, 5][15, 30, 40][15, 30, 36][15, 30, 37][15, 30, 1][14, 30, 63][15, 30, 31][15, 30, 33][15, 30, 35][14, 30, 31][14, 30, 30][15, 30, 3][14, 30, 6][14, 30, 59][14, 30, 19][15, 30, 28][15, 30, 10][15, 30, 13][14, 30, 58][14, 30, 61][15, 30, 2][14, 30, 51][14, 30, 60][15, 30, 5][15, 30, 45][15, 30, 11][14, 30, 53][14, 30, 55][15, 30, 9][14, 30, 57][14, 30, 52][14, 30, 7][14, 30, 14][14, 30, 18][14, 30, 11][14, 30, 12][14, 30, 9][15, 30, 8][15, 30, 7][14, 30, 10][15, 30, 46][15, 30, 41][15, 30, 39][15, 30, 38][14, 30, 15][14, 30, 13][14, 30, 21][15, 30, 6][15, 30, 4][14, 30, 17][15, 30, 44][15, 30, 47][14, 30, 50][14, 30, 48][14, 30, 49][14, 30, 20][14, 30, 16][15, 30, 30][15, 30, 32][15, 30, 34][15, 30, 0][14, 30, 62][14, 30, 56][14, 30, 29][15, 30, 42][15, 30, 43][14, 30, 54][14, 30, 26][14, 30, 25][14, 30, 24][14, 30, 28][14, 30, 27][14, 30, 4][14, 30, 22][14, 30, 23]
Non-inverted[84][83][82][81][80][79][78][77][76][75][74][73][72][71][70][69][68][67][66][65][64][63][62][61][60][59][58][57][56][55][54][53][52][51][50][49][48][47][46][45][44][43][42][41][40][39][38][37][36][35][34][33][32][31][30][29][28][27][26][25][24][23][22][21][20][19][18][17][16][15][14][13][12][11][10][9][8][7][6][5][4][3][2][1][0]
CMT:MUX.HCLK0[22, 3, 30][22, 3, 28][22, 3, 31][22, 3, 25][22, 3, 27][22, 3, 24]
CMT:MUX.HCLK1[22, 3, 33][22, 3, 35][22, 3, 32][22, 3, 38][22, 3, 36][22, 3, 39]
CMT:MUX.HCLK10[24, 3, 62][24, 3, 60][24, 3, 63][24, 3, 57][24, 3, 59][24, 3, 56]
CMT:MUX.HCLK11[25, 3, 1][25, 3, 3][25, 3, 0][25, 3, 6][25, 3, 4][25, 3, 7]
CMT:MUX.HCLK12[25, 3, 14][25, 3, 12][25, 3, 15][25, 3, 9][25, 3, 11][25, 3, 8]
CMT:MUX.HCLK13[25, 3, 17][25, 3, 19][25, 3, 16][25, 3, 22][25, 3, 20][25, 3, 23]
CMT:MUX.HCLK14[25, 3, 30][25, 3, 28][25, 3, 31][25, 3, 25][25, 3, 27][25, 3, 24]
CMT:MUX.HCLK15[25, 3, 33][25, 3, 35][25, 3, 32][25, 3, 38][25, 3, 36][25, 3, 39]
CMT:MUX.HCLK2[22, 3, 46][22, 3, 44][22, 3, 47][22, 3, 41][22, 3, 43][22, 3, 40]
CMT:MUX.HCLK3[22, 3, 49][22, 3, 51][22, 3, 48][22, 3, 54][22, 3, 52][22, 3, 55]
CMT:MUX.HCLK4[22, 3, 62][22, 3, 60][22, 3, 63][22, 3, 57][22, 3, 59][22, 3, 56]
CMT:MUX.HCLK5[23, 3, 1][23, 3, 3][23, 3, 0][23, 3, 6][23, 3, 4][23, 3, 7]
CMT:MUX.HCLK6[23, 3, 14][23, 3, 12][23, 3, 15][23, 3, 9][23, 3, 11][23, 3, 8]
CMT:MUX.HCLK7[23, 3, 17][23, 3, 19][23, 3, 16][23, 3, 22][23, 3, 20][23, 3, 23]
CMT:MUX.HCLK8[24, 3, 46][24, 3, 44][24, 3, 47][24, 3, 41][24, 3, 43][24, 3, 40]
CMT:MUX.HCLK9[24, 3, 49][24, 3, 51][24, 3, 48][24, 3, 54][24, 3, 52][24, 3, 55]
NONE000000
CKINT001001
PLL_CLKFBOUT001010
PLL_TEST_CLK_OUT001100
PLL_CLKOUT2010001
PLL_CLKOUT0010010
PLL_CLKOUT1010100
PLL_CLKOUT5100001
PLL_CLKOUT3100010
PLL_CLKOUT4100100
CMT:MUX.CASC0[22, 3, 26]
CMT:MUX.CASC1[22, 3, 37]
CMT:MUX.CASC10[24, 3, 58]
CMT:MUX.CASC11[25, 3, 5]
CMT:MUX.CASC12[25, 3, 10]
CMT:MUX.CASC13[25, 3, 21]
CMT:MUX.CASC14[25, 3, 26]
CMT:MUX.CASC15[25, 3, 37]
CMT:MUX.CASC2[22, 3, 42]
CMT:MUX.CASC3[22, 3, 53]
CMT:MUX.CASC4[22, 3, 58]
CMT:MUX.CASC5[23, 3, 5]
CMT:MUX.CASC6[23, 3, 10]
CMT:MUX.CASC7[23, 3, 21]
CMT:MUX.CASC8[24, 3, 42]
CMT:MUX.CASC9[24, 3, 53]
PASS0
HCLK1

Tables

NamePLL:PLL_LOCK_REF_DLYPLL:PLL_LOCK_FB_DLYPLL:PLL_LOCK_CNTPLL:PLL_LOCK_SAT_HIGHPLL:PLL_UNLOCK_CNT
197100010011
103129100010011
11312990010011
12312982510011
13312975010011
14312970010011
15312965010011
16312962510011
17312957510011
18312955010011
19312952510011
297100010011
20312950010011
21312947510011
22312945010011
23312942510011
24312940010011
25312940010011
26312937510011
27312935010011
28312935010011
29312932510011
31311100010011
30312932510011
31312930010011
32312930010011
33312930010011
34312927510011
35312927510011
36312927510011
37312925010011
38312925010011
39312925010011
41816100010011
40312925010011
41312925010011
42312925010011
43312925010011
44312925010011
45312925010011
46312925010011
47312925010011
48312925010011
49312925010011
52220100010011
50312925010011
51312925010011
52312925010011
53312925010011
54312925010011
55312925010011
56312925010011
57312925010011
58312925010011
59312925010011
62624100010011
60312925010011
61312925010011
62312925010011
63312925010011
64312925010011
73129100010011
83129100010011
93129100010011
NamePLL:PLL_CPPLL:PLL_CP_REPLPLL:PLL_RESPLL:PLL_LFHF
HIGH:122113
HIGH:101414143
HIGH:111515143
HIGH:12151513
HIGH:13151513
HIGH:14141463
HIGH:15141463
HIGH:161414103
HIGH:171414103
HIGH:181515103
HIGH:191515103
HIGH:255153
HIGH:201515103
HIGH:211515103
HIGH:221313123
HIGH:231313123
HIGH:241414123
HIGH:251414123
HIGH:261515123
HIGH:271515123
HIGH:281515123
HIGH:291515123
HIGH:366113
HIGH:301515123
HIGH:31141423
HIGH:32141423
HIGH:331515123
HIGH:341515123
HIGH:35131323
HIGH:36131323
HIGH:376643
HIGH:38121223
HIGH:39121223
HIGH:41414153
HIGH:40121223
HIGH:414483
HIGH:424483
HIGH:434483
HIGH:445543
HIGH:457723
HIGH:463383
HIGH:473383
HIGH:483383
HIGH:493383
HIGH:51414113
HIGH:503383
HIGH:513383
HIGH:523383
HIGH:533383
HIGH:543383
HIGH:553383
HIGH:563383
HIGH:573343
HIGH:583343
HIGH:593343
HIGH:61414133
HIGH:603343
HIGH:613343
HIGH:623343
HIGH:633343
HIGH:643343
HIGH:7151533
HIGH:8151553
HIGH:9151593
LOW:111133
LOW:101123
LOW:111143
LOW:121143
LOW:131143
LOW:141143
LOW:151143
LOW:161143
LOW:171143
LOW:181143
LOW:191143
LOW:211143
LOW:201143
LOW:211143
LOW:221183
LOW:231183
LOW:241183
LOW:251183
LOW:261183
LOW:271183
LOW:281183
LOW:291183
LOW:31113
LOW:301183
LOW:311183
LOW:321183
LOW:331183
LOW:341183
LOW:352243
LOW:362243
LOW:372243
LOW:382243
LOW:392243
LOW:41163
LOW:402243
LOW:412243
LOW:422243
LOW:432243
LOW:442283
LOW:452283
LOW:462283
LOW:472283
LOW:482283
LOW:492283
LOW:511103
LOW:502283
LOW:512283
LOW:522283
LOW:532283
LOW:542283
LOW:552283
LOW:562283
LOW:572283
LOW:582283
LOW:592283
LOW:611123
LOW:602283
LOW:612283
LOW:622283
LOW:632283
LOW:642283
LOW:711123
LOW:811123
LOW:91123