Digital Clock Managers

Todo

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DCM.V2

DCM.V2 bittile 0
Row	Column
	0	1	2	3
0	DCM:DLLS[0] DCM:FACTORY_JF2[0]	-	-	DCM:CLKIN_DIVIDE_BY_2 DCM:COM[16]
1	DCM:DLLS[1] DCM:FACTORY_JF2[1]	-	-	DCM:COM[17] DCM:DESKEW_ADJUST[0]
2	DCM:DLLS[2] DCM:FACTORY_JF2[2]	-	-	DCM:COM[18] DCM:DESKEW_ADJUST[1]
3	DCM:DLLS[3] DCM:FACTORY_JF2[3]	-	-	DCM:COM[19] DCM:DESKEW_ADJUST[2]
4	DCM:DLLS[4] DCM:FACTORY_JF2[4]	-	-	DCM:COM[20] DCM:DESKEW_ADJUST[3]
5	DCM:DLLS[5] DCM:FACTORY_JF2[5]	-	-	DCM:CLKIN_IOB DCM:COM[21]
6	DCM:DLLS[6] DCM:FACTORY_JF2[6]	-	-	DCM:CLKFB_IOB DCM:COM[22]
7	DCM:DLLS[7] DCM:FACTORY_JF2[7]	-	-	DCM:COM[23]
8	DCM:DLLS[8] DCM:FACTORY_JF1[0]	-	-	DCM:COM[24] DCM:VBG_SEL[0]
9	DCM:DLLS[9] DCM:FACTORY_JF1[1]	-	-	DCM:COM[25] DCM:VBG_SEL[1]
10	DCM:DLLS[10] DCM:FACTORY_JF1[2]	-	-	DCM:COM[26] DCM:VBG_SEL[2]
11	DCM:DLLS[11] DCM:FACTORY_JF1[3]	-	-	DCM:COM[27] DCM:VBG_PD[0]
12	DCM:DLLS[12] DCM:FACTORY_JF1[4]	-	-	DCM:COM[28] DCM:VBG_PD[1]
13	DCM:DLLS[13] DCM:FACTORY_JF1[5]	-	-	DCM:COIN_WINDOW[0] DCM:COM[29]
14	DCM:DLLS[14] DCM:FACTORY_JF1[6]	-	-	DCM:COIN_WINDOW[1] DCM:COM[30]
15	DCM:DLLS[15] DCM:FACTORY_JF1[7]	-	-	DCM:COM[31] DCM:NON_STOP
16	DCM:DFS_ENABLE DCM:DLLS[16]	-	-	DCM:CLKFX_DIVIDE[0] DCM:DFS[0]
17	DCM:DLLS[17] DCM:DLL_ENABLE	-	-	DCM:CLKFX_DIVIDE[1] DCM:DFS[1]
18	DCM:CLKFB DCM:DLLS[18]	-	-	DCM:CLKFX_DIVIDE[2] DCM:DFS[2]
19	DCM:DLLS[19] DCM:PS_ENABLE	-	-	DCM:CLKFX_DIVIDE[3] DCM:DFS[3]
20	DCM:DLLS[20] DCM:DSS_ENABLE	-	-	DCM:CLKFX_DIVIDE[4] DCM:DFS[4]
21	DCM:DLLS[21] DCM:PHASE_SHIFT_NEGATIVE	-	-	DCM:CLKFX_DIVIDE[5] DCM:DFS[5]
22	DCM:DLLS[22] DCM:PHASE_SHIFT[0]	-	-	DCM:CLKFX_DIVIDE[6] DCM:DFS[6]
23	DCM:DLLS[23] DCM:PHASE_SHIFT[1]	-	-	DCM:CLKFX_DIVIDE[7] DCM:DFS[7]
24	DCM:DLLS[24] DCM:PHASE_SHIFT[2]	-	-	DCM:CLKFX_DIVIDE[8] DCM:DFS[8]
25	DCM:DLLS[25] DCM:PHASE_SHIFT[3]	-	-	DCM:CLKFX_DIVIDE[9] DCM:DFS[9]
26	DCM:DLLS[26] DCM:PHASE_SHIFT[4]	-	-	DCM:CLKFX_DIVIDE[10] DCM:DFS[10]
27	DCM:DLLS[27] DCM:PHASE_SHIFT[5]	-	-	DCM:CLKFX_DIVIDE[11] DCM:DFS[11]
28	DCM:DLLS[28] DCM:PHASE_SHIFT[6]	-	-	DCM:CLKFX_MULTIPLY[0] DCM:DFS[12]
29	DCM:DLLS[29] DCM:PHASE_SHIFT[7]	-	-	DCM:CLKFX_MULTIPLY[1] DCM:DFS[13]
30	DCM:DLLS[30] DCM:DSS_MODE[0]	-	-	DCM:CLKFX_MULTIPLY[2] DCM:DFS[14]
31	DCM:DLLS[31] DCM:DSS_MODE[1]	-	-	DCM:CLKFX_MULTIPLY[3] DCM:DFS[15]
32	DCM:DLLC[0] DCM:DUTY_CYCLE_CORRECTION[0]	-	-	DCM:CLKFX_MULTIPLY[4] DCM:DFS[16]
33	DCM:DLLC[1] DCM:DUTY_CYCLE_CORRECTION[1]	-	-	DCM:CLKFX_MULTIPLY[5] DCM:DFS[17]
34	DCM:DLLC[2] DCM:DUTY_CYCLE_CORRECTION[2]	-	-	DCM:CLKFX_MULTIPLY[6] DCM:DFS[18]
35	DCM:DLLC[3] DCM:DUTY_CYCLE_CORRECTION[3]	-	-	DCM:CLKFX_MULTIPLY[7] DCM:DFS[19]
36	DCM:CLKDV_COUNT_MAX[0] DCM:DLLC[4]	-	-	DCM:CLKFX_MULTIPLY[8] DCM:DFS[20]
37	DCM:CLKDV_COUNT_MAX[1] DCM:DLLC[5]	-	-	DCM:CLKFX_MULTIPLY[9] DCM:DFS[21]
38	DCM:CLKDV_COUNT_MAX[2] DCM:DLLC[6]	-	-	DCM:CLKFX_MULTIPLY[10] DCM:DFS[22]
39	DCM:CLKDV_COUNT_MAX[3] DCM:DLLC[7]	-	-	DCM:CLKFX_MULTIPLY[11] DCM:DFS[23]
40	DCM:CLKDV_COUNT_FALL[0] DCM:DLLC[8]	-	-	DCM:DFS[24]
41	DCM:CLKDV_COUNT_FALL[1] DCM:DLLC[9]	-	-	DCM:DFS[25]
42	DCM:CLKDV_COUNT_FALL[2] DCM:DLLC[10]	-	-	DCM:DFS[26]
43	DCM:CLKDV_COUNT_FALL[3] DCM:DLLC[11]	-	-	DCM:DFS[27] DCM:DFS_FEEDBACK
44	DCM:CLKDV_COUNT_FALL_2[0] DCM:DLLC[12]	-	-	DCM:DFS[28] DCM:DFS_FREQUENCY_MODE
45	DCM:CLKDV_COUNT_FALL_2[1] DCM:DLLC[13]	-	-	DCM:DFS[29] DCM:SEL_PL_DLY[0]
46	DCM:CLKDV_COUNT_FALL_2[2] DCM:DLLC[14]	-	-	DCM:DFS[30] DCM:SEL_PL_DLY[1]
47	DCM:CLKDV_COUNT_FALL_2[3] DCM:DLLC[15]	-	-	DCM:DFS[31] DCM:PL_CENTERED
48	DCM:CLKDV_PHASE_RISE[0] DCM:DLLC[16]	-	-	DCM:MISC[0]
49	DCM:CLKDV_PHASE_RISE[1] DCM:DLLC[17]	-	-	DCM:CLK0 DCM:MISC[1]
50	DCM:CLKDV_PHASE_FALL[0] DCM:DLLC[18]	-	-	DCM:CLK90 DCM:MISC[2]
51	DCM:CLKDV_PHASE_FALL[1] DCM:DLLC[19]	-	-	DCM:CLK180 DCM:MISC[3]
52	DCM:CLKDV_MODE DCM:DLLC[20]	-	-	DCM:CLK270 DCM:MISC[4]
53	DCM:DLLC[21] DCM:TEST_OSC[0]	-	-	DCM:CLK2X DCM:MISC[5]
54	DCM:DLLC[22] DCM:TEST_OSC[1]	-	-	DCM:CLK2X180 DCM:MISC[6]
55	DCM:CLK_FEEDBACK DCM:DLLC[23]	-	-	DCM:CLKDV DCM:MISC[7]
56	DCM:DLLC[24] DCM:DLL_FREQUENCY_MODE	-	-	DCM:CLKFX180 DCM:MISC[8]
57	DCM:DLLC[25] DCM:PS_CENTERED	-	-	DCM:CLKFX DCM:MISC[9]
58	DCM:DLLC[26] DCM:PS_MODE	-	-	DCM:CONCUR DCM:MISC[10]
59	DCM:DLLC[27] DCM:STATUS7	-	-	DCM:MISC[11] DCM:STARTUP_WAIT
60	DCM:DLLC[28] DCM:STATUS1	-	-	DCM:MISC[12]
61	DCM:DLLC[29]	-	-	~DCM:INV.DSSEN DCM:MISC[13]
62	DCM:DLLC[30]	-	-	DCM:MISC[14]
63	DCM:DLLC[31]	-	-	~DCM:INV.PSEN DCM:MISC[15]
64	DCM:COM[0]	-	-	~DCM:INV.PSINCDEC DCM:MISC[16]
65	DCM:COM[1]	-	-	~DCM:INV.RST DCM:MISC[17]
66	DCM:COM[2]	-	-	~DCM:INV.CTLSEL0 DCM:MISC[18]
67	DCM:COM[3]	-	-	~DCM:INV.CTLSEL1 DCM:MISC[19]
68	DCM:COM[4]	-	-	~DCM:INV.CTLSEL2 DCM:MISC[20]
69	DCM:COM[5]	-	-	~DCM:INV.CTLOSC2 DCM:MISC[21]
70	DCM:COM[6]	-	-	~DCM:INV.CTLOSC1 DCM:MISC[22]
71	DCM:COM[7]	-	-	~DCM:INV.CTLGO DCM:MISC[23]
72	DCM:COM[8]	-	-	~DCM:INV.CTLMODE DCM:MISC[24]
73	DCM:COM[9]	-	-	~DCM:INV.FREEZEDLL DCM:MISC[25]
74	DCM:COM[10]	-	-	~DCM:INV.FREEZEDFS DCM:MISC[26]
75	DCM:COM[11]	-	-	~DCM:INV.STSADRS0 DCM:MISC[27]
76	DCM:COM[12]	-	-	~DCM:INV.STSADRS1 DCM:MISC[28]
77	DCM:COM[13]	-	-	~DCM:INV.STSADRS2 DCM:MISC[29]
78	DCM:COM[14]	-	-	~DCM:INV.STSADRS3 DCM:MISC[30]
79	DCM:COM[15]	-	-	DCM:MISC[31] DCM:TEST_ENABLE

DCM.V2 bittile 1
Row	Column
	0	1	2	3	4	5	6	7
0	-	-	-	-	-	-	-	-
1	-	-	-	-	-	-	-	-
2	-	-	-	-	-	-	-	-
3	-	-	-	-	-	-	-	-
4	-	-	-	-	-	-	-	-
5	-	-	-	-	-	-	-	-
6	-	-	-	-	-	-	-	DCM:EN_DUMMY_OSC[0]
7	-	-	-	-	-	-	-	DCM:EN_DUMMY_OSC[1]
8	-	-	-	-	-	-	-	-
9	-	-	-	-	-	-	DCM:EN_OSC_COARSE	DCM:EN_DUMMY_OSC_OR_NON_STOP
10	-	-	-	-	-	-	-	DCM:ZD2_BY1
11	-	-	-	-	-	-	-	DCM:EN_DUMMY_OSC[2]

DCM:FACTORY_JF1	[0, 0, 15]	[0, 0, 14]	[0, 0, 13]	[0, 0, 12]	[0, 0, 11]	[0, 0, 10]	[0, 0, 9]	[0, 0, 8]
DCM:FACTORY_JF2	[0, 0, 7]	[0, 0, 6]	[0, 0, 5]	[0, 0, 4]	[0, 0, 3]	[0, 0, 2]	[0, 0, 1]	[0, 0, 0]
DCM:PHASE_SHIFT	[0, 0, 29]	[0, 0, 28]	[0, 0, 27]	[0, 0, 26]	[0, 0, 25]	[0, 0, 24]	[0, 0, 23]	[0, 0, 22]
Non-inverted	[7]	[6]	[5]	[4]	[3]	[2]	[1]	[0]

DCM:COM	[0, 3, 15]	[0, 3, 14]	[0, 3, 13]	[0, 3, 12]	[0, 3, 11]	[0, 3, 10]	[0, 3, 9]	[0, 3, 8]	[0, 3, 7]	[0, 3, 6]	[0, 3, 5]	[0, 3, 4]	[0, 3, 3]	[0, 3, 2]	[0, 3, 1]	[0, 3, 0]	[0, 0, 79]	[0, 0, 78]	[0, 0, 77]	[0, 0, 76]	[0, 0, 75]	[0, 0, 74]	[0, 0, 73]	[0, 0, 72]	[0, 0, 71]	[0, 0, 70]	[0, 0, 69]	[0, 0, 68]	[0, 0, 67]	[0, 0, 66]	[0, 0, 65]	[0, 0, 64]
DCM:DFS	[0, 3, 47]	[0, 3, 46]	[0, 3, 45]	[0, 3, 44]	[0, 3, 43]	[0, 3, 42]	[0, 3, 41]	[0, 3, 40]	[0, 3, 39]	[0, 3, 38]	[0, 3, 37]	[0, 3, 36]	[0, 3, 35]	[0, 3, 34]	[0, 3, 33]	[0, 3, 32]	[0, 3, 31]	[0, 3, 30]	[0, 3, 29]	[0, 3, 28]	[0, 3, 27]	[0, 3, 26]	[0, 3, 25]	[0, 3, 24]	[0, 3, 23]	[0, 3, 22]	[0, 3, 21]	[0, 3, 20]	[0, 3, 19]	[0, 3, 18]	[0, 3, 17]	[0, 3, 16]
DCM:DLLC	[0, 0, 63]	[0, 0, 62]	[0, 0, 61]	[0, 0, 60]	[0, 0, 59]	[0, 0, 58]	[0, 0, 57]	[0, 0, 56]	[0, 0, 55]	[0, 0, 54]	[0, 0, 53]	[0, 0, 52]	[0, 0, 51]	[0, 0, 50]	[0, 0, 49]	[0, 0, 48]	[0, 0, 47]	[0, 0, 46]	[0, 0, 45]	[0, 0, 44]	[0, 0, 43]	[0, 0, 42]	[0, 0, 41]	[0, 0, 40]	[0, 0, 39]	[0, 0, 38]	[0, 0, 37]	[0, 0, 36]	[0, 0, 35]	[0, 0, 34]	[0, 0, 33]	[0, 0, 32]
DCM:DLLS	[0, 0, 31]	[0, 0, 30]	[0, 0, 29]	[0, 0, 28]	[0, 0, 27]	[0, 0, 26]	[0, 0, 25]	[0, 0, 24]	[0, 0, 23]	[0, 0, 22]	[0, 0, 21]	[0, 0, 20]	[0, 0, 19]	[0, 0, 18]	[0, 0, 17]	[0, 0, 16]	[0, 0, 15]	[0, 0, 14]	[0, 0, 13]	[0, 0, 12]	[0, 0, 11]	[0, 0, 10]	[0, 0, 9]	[0, 0, 8]	[0, 0, 7]	[0, 0, 6]	[0, 0, 5]	[0, 0, 4]	[0, 0, 3]	[0, 0, 2]	[0, 0, 1]	[0, 0, 0]
DCM:MISC	[0, 3, 79]	[0, 3, 78]	[0, 3, 77]	[0, 3, 76]	[0, 3, 75]	[0, 3, 74]	[0, 3, 73]	[0, 3, 72]	[0, 3, 71]	[0, 3, 70]	[0, 3, 69]	[0, 3, 68]	[0, 3, 67]	[0, 3, 66]	[0, 3, 65]	[0, 3, 64]	[0, 3, 63]	[0, 3, 62]	[0, 3, 61]	[0, 3, 60]	[0, 3, 59]	[0, 3, 58]	[0, 3, 57]	[0, 3, 56]	[0, 3, 55]	[0, 3, 54]	[0, 3, 53]	[0, 3, 52]	[0, 3, 51]	[0, 3, 50]	[0, 3, 49]	[0, 3, 48]
Non-inverted	[31]	[30]	[29]	[28]	[27]	[26]	[25]	[24]	[23]	[22]	[21]	[20]	[19]	[18]	[17]	[16]	[15]	[14]	[13]	[12]	[11]	[10]	[9]	[8]	[7]	[6]	[5]	[4]	[3]	[2]	[1]	[0]

DCM:CLK0	[0, 3, 49]
DCM:CLK180	[0, 3, 51]
DCM:CLK270	[0, 3, 52]
DCM:CLK2X	[0, 3, 53]
DCM:CLK2X180	[0, 3, 54]
DCM:CLK90	[0, 3, 50]
DCM:CLKDV	[0, 3, 55]
DCM:CLKFB	[0, 0, 18]
DCM:CLKFB_IOB	[0, 3, 6]
DCM:CLKFX	[0, 3, 57]
DCM:CLKFX180	[0, 3, 56]
DCM:CLKIN_DIVIDE_BY_2	[0, 3, 0]
DCM:CLKIN_IOB	[0, 3, 5]
DCM:CONCUR	[0, 3, 58]
DCM:DFS_ENABLE	[0, 0, 16]
DCM:DFS_FEEDBACK	[0, 3, 43]
DCM:DLL_ENABLE	[0, 0, 17]
DCM:DSS_ENABLE	[0, 0, 20]
DCM:EN_DUMMY_OSC_OR_NON_STOP	[1, 7, 9]
DCM:EN_OSC_COARSE	[1, 6, 9]
DCM:NON_STOP	[0, 3, 15]
DCM:PHASE_SHIFT_NEGATIVE	[0, 0, 21]
DCM:PL_CENTERED	[0, 3, 47]
DCM:PS_CENTERED	[0, 0, 57]
DCM:PS_ENABLE	[0, 0, 19]
DCM:STARTUP_WAIT	[0, 3, 59]
DCM:STATUS1	[0, 0, 60]
DCM:STATUS7	[0, 0, 59]
DCM:TEST_ENABLE	[0, 3, 79]
DCM:ZD2_BY1	[1, 7, 10]
Non-inverted	[0]

DCM:DSS_MODE	[0, 0, 31]	[0, 0, 30]
SPREAD_2	0	0
SPREAD_4	0	1
SPREAD_6	1	0
SPREAD_8	1	1

DCM:CLKDV_COUNT_FALL	[0, 0, 43]	[0, 0, 42]	[0, 0, 41]	[0, 0, 40]
DCM:CLKDV_COUNT_FALL_2	[0, 0, 47]	[0, 0, 46]	[0, 0, 45]	[0, 0, 44]
DCM:CLKDV_COUNT_MAX	[0, 0, 39]	[0, 0, 38]	[0, 0, 37]	[0, 0, 36]
DCM:DESKEW_ADJUST	[0, 3, 4]	[0, 3, 3]	[0, 3, 2]	[0, 3, 1]
DCM:DUTY_CYCLE_CORRECTION	[0, 0, 35]	[0, 0, 34]	[0, 0, 33]	[0, 0, 32]
Non-inverted	[3]	[2]	[1]	[0]

DCM:CLKDV_PHASE_FALL	[0, 0, 51]	[0, 0, 50]
DCM:CLKDV_PHASE_RISE	[0, 0, 49]	[0, 0, 48]
DCM:VBG_PD	[0, 3, 12]	[0, 3, 11]
Non-inverted	[1]	[0]

DCM:CLKDV_MODE	[0, 0, 52]
HALF	0
INT	1

DCM:TEST_OSC	[0, 0, 54]	[0, 0, 53]
90	0	0
180	0	1
270	1	0
360	1	1

DCM:CLK_FEEDBACK	[0, 0, 55]
1X	0
2X	1

DCM:DFS_FREQUENCY_MODE	[0, 3, 44]
DCM:DLL_FREQUENCY_MODE	[0, 0, 56]
LOW	0
HIGH	1

DCM:PS_MODE	[0, 0, 58]
CLKFB	0
CLKIN	1

DCM:EN_DUMMY_OSC	[1, 7, 11]	[1, 7, 7]	[1, 7, 6]
DCM:VBG_SEL	[0, 3, 10]	[0, 3, 9]	[0, 3, 8]
Non-inverted	[2]	[1]	[0]

DCM:COIN_WINDOW	[0, 3, 14]	[0, 3, 13]
DCM:SEL_PL_DLY	[0, 3, 46]	[0, 3, 45]
0	0	0
1	0	1
2	1	0
3	1	1

DCM:CLKFX_DIVIDE	[0, 3, 27]	[0, 3, 26]	[0, 3, 25]	[0, 3, 24]	[0, 3, 23]	[0, 3, 22]	[0, 3, 21]	[0, 3, 20]	[0, 3, 19]	[0, 3, 18]	[0, 3, 17]	[0, 3, 16]
DCM:CLKFX_MULTIPLY	[0, 3, 39]	[0, 3, 38]	[0, 3, 37]	[0, 3, 36]	[0, 3, 35]	[0, 3, 34]	[0, 3, 33]	[0, 3, 32]	[0, 3, 31]	[0, 3, 30]	[0, 3, 29]	[0, 3, 28]
Non-inverted	[11]	[10]	[9]	[8]	[7]	[6]	[5]	[4]	[3]	[2]	[1]	[0]

DCM:INV.CTLGO	[0, 3, 71]
DCM:INV.CTLMODE	[0, 3, 72]
DCM:INV.CTLOSC1	[0, 3, 70]
DCM:INV.CTLOSC2	[0, 3, 69]
DCM:INV.CTLSEL0	[0, 3, 66]
DCM:INV.CTLSEL1	[0, 3, 67]
DCM:INV.CTLSEL2	[0, 3, 68]
DCM:INV.DSSEN	[0, 3, 61]
DCM:INV.FREEZEDFS	[0, 3, 74]
DCM:INV.FREEZEDLL	[0, 3, 73]
DCM:INV.PSEN	[0, 3, 63]
DCM:INV.PSINCDEC	[0, 3, 64]
DCM:INV.RST	[0, 3, 65]
DCM:INV.STSADRS0	[0, 3, 75]
DCM:INV.STSADRS1	[0, 3, 76]
DCM:INV.STSADRS2	[0, 3, 77]
DCM:INV.STSADRS3	[0, 3, 78]
Inverted	~[0]

DCM.V2P

DCM.V2P bittile 0
Row	Column
	0	1	2	3
0	DCM:DLLS[0] DCM:FACTORY_JF2[0]	-	-	DCM:CLKIN_DIVIDE_BY_2 DCM:COM[16]
1	DCM:DLLS[1] DCM:FACTORY_JF2[1]	-	-	DCM:COM[17] DCM:DESKEW_ADJUST[0]
2	DCM:DLLS[2] DCM:FACTORY_JF2[2]	-	-	DCM:COM[18] DCM:DESKEW_ADJUST[1]
3	DCM:DLLS[3] DCM:FACTORY_JF2[3]	-	-	DCM:COM[19] DCM:DESKEW_ADJUST[2]
4	DCM:DLLS[4] DCM:FACTORY_JF2[4]	-	-	DCM:COM[20] DCM:DESKEW_ADJUST[3]
5	DCM:DLLS[5] DCM:FACTORY_JF2[5]	-	-	DCM:CLKIN_IOB DCM:COM[21]
6	DCM:DLLS[6] DCM:FACTORY_JF2[6]	-	-	DCM:CLKFB_IOB DCM:COM[22]
7	DCM:DLLS[7] DCM:FACTORY_JF2[7]	-	-	DCM:COM[23]
8	DCM:DLLS[8] DCM:FACTORY_JF1[0]	-	-	DCM:COM[24] DCM:VBG_SEL[0]
9	DCM:DLLS[9] DCM:FACTORY_JF1[1]	-	-	DCM:COM[25] DCM:VBG_SEL[1]
10	DCM:DLLS[10] DCM:FACTORY_JF1[2]	-	-	DCM:COM[26] DCM:VBG_SEL[2]
11	DCM:DLLS[11] DCM:FACTORY_JF1[3]	-	-	DCM:COM[27] DCM:VBG_PD[0]
12	DCM:DLLS[12] DCM:FACTORY_JF1[4]	-	-	DCM:COM[28] DCM:VBG_PD[1]
13	DCM:DLLS[13] DCM:FACTORY_JF1[5]	-	-	DCM:COIN_WINDOW[0] DCM:COM[29]
14	DCM:DLLS[14] DCM:FACTORY_JF1[6]	-	-	DCM:COIN_WINDOW[1] DCM:COM[30]
15	DCM:DLLS[15] DCM:FACTORY_JF1[7]	-	-	DCM:COM[31] DCM:NON_STOP
16	DCM:DFS_ENABLE DCM:DLLS[16]	-	-	DCM:CLKFX_DIVIDE[0] DCM:DFS[0]
17	DCM:DLLS[17] DCM:DLL_ENABLE	-	-	DCM:CLKFX_DIVIDE[1] DCM:DFS[1]
18	DCM:CLKFB DCM:DLLS[18]	-	-	DCM:CLKFX_DIVIDE[2] DCM:DFS[2]
19	DCM:DLLS[19] DCM:PS_ENABLE	-	-	DCM:CLKFX_DIVIDE[3] DCM:DFS[3]
20	DCM:DLLS[20] DCM:DSS_ENABLE	-	-	DCM:CLKFX_DIVIDE[4] DCM:DFS[4]
21	DCM:DLLS[21] DCM:PHASE_SHIFT_NEGATIVE	-	-	DCM:CLKFX_DIVIDE[5] DCM:DFS[5]
22	DCM:DLLS[22] DCM:PHASE_SHIFT[0]	-	-	DCM:CLKFX_DIVIDE[6] DCM:DFS[6]
23	DCM:DLLS[23] DCM:PHASE_SHIFT[1]	-	-	DCM:CLKFX_DIVIDE[7] DCM:DFS[7]
24	DCM:DLLS[24] DCM:PHASE_SHIFT[2]	-	-	DCM:CLKFX_DIVIDE[8] DCM:DFS[8]
25	DCM:DLLS[25] DCM:PHASE_SHIFT[3]	-	-	DCM:CLKFX_DIVIDE[9] DCM:DFS[9]
26	DCM:DLLS[26] DCM:PHASE_SHIFT[4]	-	-	DCM:CLKFX_DIVIDE[10] DCM:DFS[10]
27	DCM:DLLS[27] DCM:PHASE_SHIFT[5]	-	-	DCM:CLKFX_DIVIDE[11] DCM:DFS[11]
28	DCM:DLLS[28] DCM:PHASE_SHIFT[6]	-	-	DCM:CLKFX_MULTIPLY[0] DCM:DFS[12]
29	DCM:DLLS[29] DCM:PHASE_SHIFT[7]	-	-	DCM:CLKFX_MULTIPLY[1] DCM:DFS[13]
30	DCM:DLLS[30] DCM:DSS_MODE[0]	-	-	DCM:CLKFX_MULTIPLY[2] DCM:DFS[14]
31	DCM:DLLS[31] DCM:DSS_MODE[1]	-	-	DCM:CLKFX_MULTIPLY[3] DCM:DFS[15]
32	DCM:DLLC[0] DCM:DUTY_CYCLE_CORRECTION[0]	-	-	DCM:CLKFX_MULTIPLY[4] DCM:DFS[16]
33	DCM:DLLC[1] DCM:DUTY_CYCLE_CORRECTION[1]	-	-	DCM:CLKFX_MULTIPLY[5] DCM:DFS[17]
34	DCM:DLLC[2] DCM:DUTY_CYCLE_CORRECTION[2]	-	-	DCM:CLKFX_MULTIPLY[6] DCM:DFS[18]
35	DCM:DLLC[3] DCM:DUTY_CYCLE_CORRECTION[3]	-	-	DCM:CLKFX_MULTIPLY[7] DCM:DFS[19]
36	DCM:CLKDV_COUNT_MAX[0] DCM:DLLC[4]	-	-	DCM:CLKFX_MULTIPLY[8] DCM:DFS[20]
37	DCM:CLKDV_COUNT_MAX[1] DCM:DLLC[5]	-	-	DCM:CLKFX_MULTIPLY[9] DCM:DFS[21]
38	DCM:CLKDV_COUNT_MAX[2] DCM:DLLC[6]	-	-	DCM:CLKFX_MULTIPLY[10] DCM:DFS[22]
39	DCM:CLKDV_COUNT_MAX[3] DCM:DLLC[7]	-	-	DCM:CLKFX_MULTIPLY[11] DCM:DFS[23]
40	DCM:CLKDV_COUNT_FALL[0] DCM:DLLC[8]	-	-	DCM:DFS[24]
41	DCM:CLKDV_COUNT_FALL[1] DCM:DLLC[9]	-	-	DCM:DFS[25]
42	DCM:CLKDV_COUNT_FALL[2] DCM:DLLC[10]	-	-	DCM:DFS[26]
43	DCM:CLKDV_COUNT_FALL[3] DCM:DLLC[11]	-	-	DCM:DFS[27] DCM:DFS_FEEDBACK
44	DCM:CLKDV_COUNT_FALL_2[0] DCM:DLLC[12]	-	-	DCM:DFS[28] DCM:DFS_FREQUENCY_MODE
45	DCM:CLKDV_COUNT_FALL_2[1] DCM:DLLC[13]	-	-	DCM:DFS[29] DCM:SEL_PL_DLY[0]
46	DCM:CLKDV_COUNT_FALL_2[2] DCM:DLLC[14]	-	-	DCM:DFS[30] DCM:SEL_PL_DLY[1]
47	DCM:CLKDV_COUNT_FALL_2[3] DCM:DLLC[15]	-	-	DCM:DFS[31] DCM:PL_CENTERED
48	DCM:CLKDV_PHASE_RISE[0] DCM:DLLC[16]	-	-	DCM:MISC[0]
49	DCM:CLKDV_PHASE_RISE[1] DCM:DLLC[17]	-	-	DCM:CLK0 DCM:MISC[1]
50	DCM:CLKDV_PHASE_FALL[0] DCM:DLLC[18]	-	-	DCM:CLK90 DCM:MISC[2]
51	DCM:CLKDV_PHASE_FALL[1] DCM:DLLC[19]	-	-	DCM:CLK180 DCM:MISC[3]
52	DCM:CLKDV_MODE DCM:DLLC[20]	-	-	DCM:CLK270 DCM:MISC[4]
53	DCM:DLLC[21] DCM:TEST_OSC[0]	-	-	DCM:CLK2X DCM:MISC[5]
54	DCM:DLLC[22] DCM:TEST_OSC[1]	-	-	DCM:CLK2X180 DCM:MISC[6]
55	DCM:CLK_FEEDBACK DCM:DLLC[23]	-	-	DCM:CLKDV DCM:MISC[7]
56	DCM:DLLC[24] DCM:DLL_FREQUENCY_MODE	-	-	DCM:CLKFX180 DCM:MISC[8]
57	DCM:DLLC[25] DCM:PS_CENTERED	-	-	DCM:CLKFX DCM:MISC[9]
58	DCM:DLLC[26] DCM:PS_MODE	-	-	DCM:CONCUR DCM:MISC[10]
59	DCM:DLLC[27] DCM:STATUS7	-	-	DCM:MISC[11] DCM:STARTUP_WAIT
60	DCM:DLLC[28] DCM:STATUS1	-	-	~DCM:INV.STSADRS4 DCM:MISC[12]
61	DCM:DLLC[29]	-	-	~DCM:INV.DSSEN DCM:MISC[13]
62	DCM:DLLC[30]	-	-	DCM:MISC[14]
63	DCM:DLLC[31]	-	-	~DCM:INV.PSEN DCM:MISC[15]
64	DCM:COM[0]	-	-	~DCM:INV.PSINCDEC DCM:MISC[16]
65	DCM:COM[1]	-	-	~DCM:INV.RST DCM:MISC[17]
66	DCM:COM[2]	-	-	~DCM:INV.CTLSEL0 DCM:MISC[18]
67	DCM:COM[3]	-	-	~DCM:INV.CTLSEL1 DCM:MISC[19]
68	DCM:COM[4]	-	-	~DCM:INV.CTLSEL2 DCM:MISC[20]
69	DCM:COM[5]	-	-	~DCM:INV.CTLOSC2 DCM:MISC[21]
70	DCM:COM[6]	-	-	~DCM:INV.CTLOSC1 DCM:MISC[22]
71	DCM:COM[7]	-	-	~DCM:INV.CTLGO DCM:MISC[23]
72	DCM:COM[8]	-	-	~DCM:INV.CTLMODE DCM:MISC[24]
73	DCM:COM[9]	-	-	~DCM:INV.FREEZEDLL DCM:MISC[25]
74	DCM:COM[10]	-	-	~DCM:INV.FREEZEDFS DCM:MISC[26]
75	DCM:COM[11]	-	-	~DCM:INV.STSADRS0 DCM:MISC[27]
76	DCM:COM[12]	-	-	~DCM:INV.STSADRS1 DCM:MISC[28]
77	DCM:COM[13]	-	-	~DCM:INV.STSADRS2 DCM:MISC[29]
78	DCM:COM[14]	-	-	~DCM:INV.STSADRS3 DCM:MISC[30]
79	DCM:COM[15]	-	-	DCM:MISC[31] DCM:TEST_ENABLE

DCM.V2P bittile 1
Row	Column
	0	1	2	3	4	5	6	7
0	-	-	-	-	-	-	-	-
1	-	-	-	-	-	-	-	-
2	-	-	-	-	-	-	-	-
3	-	-	-	-	-	-	-	-
4	-	-	-	-	-	-	-	-
5	-	-	-	-	-	-	-	-
6	-	-	-	-	-	-	-	DCM:EN_DUMMY_OSC[0]
7	-	-	-	-	-	-	-	DCM:EN_DUMMY_OSC[1]
8	-	-	-	-	-	-	-	DCM:ZD1_BY1
9	-	-	-	-	-	-	DCM:EN_OSC_COARSE	DCM:EN_DUMMY_OSC_OR_NON_STOP
10	-	-	-	-	DCM:RESET_PS_SEL	-	-	DCM:ZD2_BY1
11	-	-	-	-	-	-	-	DCM:EN_DUMMY_OSC[2]

DCM:FACTORY_JF1	[0, 0, 15]	[0, 0, 14]	[0, 0, 13]	[0, 0, 12]	[0, 0, 11]	[0, 0, 10]	[0, 0, 9]	[0, 0, 8]
DCM:FACTORY_JF2	[0, 0, 7]	[0, 0, 6]	[0, 0, 5]	[0, 0, 4]	[0, 0, 3]	[0, 0, 2]	[0, 0, 1]	[0, 0, 0]
DCM:PHASE_SHIFT	[0, 0, 29]	[0, 0, 28]	[0, 0, 27]	[0, 0, 26]	[0, 0, 25]	[0, 0, 24]	[0, 0, 23]	[0, 0, 22]
Non-inverted	[7]	[6]	[5]	[4]	[3]	[2]	[1]	[0]

DCM:COM	[0, 3, 15]	[0, 3, 14]	[0, 3, 13]	[0, 3, 12]	[0, 3, 11]	[0, 3, 10]	[0, 3, 9]	[0, 3, 8]	[0, 3, 7]	[0, 3, 6]	[0, 3, 5]	[0, 3, 4]	[0, 3, 3]	[0, 3, 2]	[0, 3, 1]	[0, 3, 0]	[0, 0, 79]	[0, 0, 78]	[0, 0, 77]	[0, 0, 76]	[0, 0, 75]	[0, 0, 74]	[0, 0, 73]	[0, 0, 72]	[0, 0, 71]	[0, 0, 70]	[0, 0, 69]	[0, 0, 68]	[0, 0, 67]	[0, 0, 66]	[0, 0, 65]	[0, 0, 64]
DCM:DFS	[0, 3, 47]	[0, 3, 46]	[0, 3, 45]	[0, 3, 44]	[0, 3, 43]	[0, 3, 42]	[0, 3, 41]	[0, 3, 40]	[0, 3, 39]	[0, 3, 38]	[0, 3, 37]	[0, 3, 36]	[0, 3, 35]	[0, 3, 34]	[0, 3, 33]	[0, 3, 32]	[0, 3, 31]	[0, 3, 30]	[0, 3, 29]	[0, 3, 28]	[0, 3, 27]	[0, 3, 26]	[0, 3, 25]	[0, 3, 24]	[0, 3, 23]	[0, 3, 22]	[0, 3, 21]	[0, 3, 20]	[0, 3, 19]	[0, 3, 18]	[0, 3, 17]	[0, 3, 16]
DCM:DLLC	[0, 0, 63]	[0, 0, 62]	[0, 0, 61]	[0, 0, 60]	[0, 0, 59]	[0, 0, 58]	[0, 0, 57]	[0, 0, 56]	[0, 0, 55]	[0, 0, 54]	[0, 0, 53]	[0, 0, 52]	[0, 0, 51]	[0, 0, 50]	[0, 0, 49]	[0, 0, 48]	[0, 0, 47]	[0, 0, 46]	[0, 0, 45]	[0, 0, 44]	[0, 0, 43]	[0, 0, 42]	[0, 0, 41]	[0, 0, 40]	[0, 0, 39]	[0, 0, 38]	[0, 0, 37]	[0, 0, 36]	[0, 0, 35]	[0, 0, 34]	[0, 0, 33]	[0, 0, 32]
DCM:DLLS	[0, 0, 31]	[0, 0, 30]	[0, 0, 29]	[0, 0, 28]	[0, 0, 27]	[0, 0, 26]	[0, 0, 25]	[0, 0, 24]	[0, 0, 23]	[0, 0, 22]	[0, 0, 21]	[0, 0, 20]	[0, 0, 19]	[0, 0, 18]	[0, 0, 17]	[0, 0, 16]	[0, 0, 15]	[0, 0, 14]	[0, 0, 13]	[0, 0, 12]	[0, 0, 11]	[0, 0, 10]	[0, 0, 9]	[0, 0, 8]	[0, 0, 7]	[0, 0, 6]	[0, 0, 5]	[0, 0, 4]	[0, 0, 3]	[0, 0, 2]	[0, 0, 1]	[0, 0, 0]
DCM:MISC	[0, 3, 79]	[0, 3, 78]	[0, 3, 77]	[0, 3, 76]	[0, 3, 75]	[0, 3, 74]	[0, 3, 73]	[0, 3, 72]	[0, 3, 71]	[0, 3, 70]	[0, 3, 69]	[0, 3, 68]	[0, 3, 67]	[0, 3, 66]	[0, 3, 65]	[0, 3, 64]	[0, 3, 63]	[0, 3, 62]	[0, 3, 61]	[0, 3, 60]	[0, 3, 59]	[0, 3, 58]	[0, 3, 57]	[0, 3, 56]	[0, 3, 55]	[0, 3, 54]	[0, 3, 53]	[0, 3, 52]	[0, 3, 51]	[0, 3, 50]	[0, 3, 49]	[0, 3, 48]
Non-inverted	[31]	[30]	[29]	[28]	[27]	[26]	[25]	[24]	[23]	[22]	[21]	[20]	[19]	[18]	[17]	[16]	[15]	[14]	[13]	[12]	[11]	[10]	[9]	[8]	[7]	[6]	[5]	[4]	[3]	[2]	[1]	[0]

DCM:CLK0	[0, 3, 49]
DCM:CLK180	[0, 3, 51]
DCM:CLK270	[0, 3, 52]
DCM:CLK2X	[0, 3, 53]
DCM:CLK2X180	[0, 3, 54]
DCM:CLK90	[0, 3, 50]
DCM:CLKDV	[0, 3, 55]
DCM:CLKFB	[0, 0, 18]
DCM:CLKFB_IOB	[0, 3, 6]
DCM:CLKFX	[0, 3, 57]
DCM:CLKFX180	[0, 3, 56]
DCM:CLKIN_DIVIDE_BY_2	[0, 3, 0]
DCM:CLKIN_IOB	[0, 3, 5]
DCM:CONCUR	[0, 3, 58]
DCM:DFS_ENABLE	[0, 0, 16]
DCM:DFS_FEEDBACK	[0, 3, 43]
DCM:DLL_ENABLE	[0, 0, 17]
DCM:DSS_ENABLE	[0, 0, 20]
DCM:EN_DUMMY_OSC_OR_NON_STOP	[1, 7, 9]
DCM:EN_OSC_COARSE	[1, 6, 9]
DCM:NON_STOP	[0, 3, 15]
DCM:PHASE_SHIFT_NEGATIVE	[0, 0, 21]
DCM:PL_CENTERED	[0, 3, 47]
DCM:PS_CENTERED	[0, 0, 57]
DCM:PS_ENABLE	[0, 0, 19]
DCM:RESET_PS_SEL	[1, 4, 10]
DCM:STARTUP_WAIT	[0, 3, 59]
DCM:STATUS1	[0, 0, 60]
DCM:STATUS7	[0, 0, 59]
DCM:TEST_ENABLE	[0, 3, 79]
DCM:ZD1_BY1	[1, 7, 8]
DCM:ZD2_BY1	[1, 7, 10]
Non-inverted	[0]

DCM:DSS_MODE	[0, 0, 31]	[0, 0, 30]
SPREAD_2	0	0
SPREAD_4	0	1
SPREAD_6	1	0
SPREAD_8	1	1

DCM:CLKDV_COUNT_FALL	[0, 0, 43]	[0, 0, 42]	[0, 0, 41]	[0, 0, 40]
DCM:CLKDV_COUNT_FALL_2	[0, 0, 47]	[0, 0, 46]	[0, 0, 45]	[0, 0, 44]
DCM:CLKDV_COUNT_MAX	[0, 0, 39]	[0, 0, 38]	[0, 0, 37]	[0, 0, 36]
DCM:DESKEW_ADJUST	[0, 3, 4]	[0, 3, 3]	[0, 3, 2]	[0, 3, 1]
DCM:DUTY_CYCLE_CORRECTION	[0, 0, 35]	[0, 0, 34]	[0, 0, 33]	[0, 0, 32]
Non-inverted	[3]	[2]	[1]	[0]

DCM:CLKDV_PHASE_FALL	[0, 0, 51]	[0, 0, 50]
DCM:CLKDV_PHASE_RISE	[0, 0, 49]	[0, 0, 48]
DCM:VBG_PD	[0, 3, 12]	[0, 3, 11]
Non-inverted	[1]	[0]

DCM:CLKDV_MODE	[0, 0, 52]
HALF	0
INT	1

DCM:TEST_OSC	[0, 0, 54]	[0, 0, 53]
90	0	0
180	0	1
270	1	0
360	1	1

DCM:CLK_FEEDBACK	[0, 0, 55]
1X	0
2X	1

DCM:DFS_FREQUENCY_MODE	[0, 3, 44]
DCM:DLL_FREQUENCY_MODE	[0, 0, 56]
LOW	0
HIGH	1

DCM:PS_MODE	[0, 0, 58]
CLKFB	0
CLKIN	1

DCM:EN_DUMMY_OSC	[1, 7, 11]	[1, 7, 7]	[1, 7, 6]
DCM:VBG_SEL	[0, 3, 10]	[0, 3, 9]	[0, 3, 8]
Non-inverted	[2]	[1]	[0]

DCM:COIN_WINDOW	[0, 3, 14]	[0, 3, 13]
DCM:SEL_PL_DLY	[0, 3, 46]	[0, 3, 45]
0	0	0
1	0	1
2	1	0
3	1	1

DCM:CLKFX_DIVIDE	[0, 3, 27]	[0, 3, 26]	[0, 3, 25]	[0, 3, 24]	[0, 3, 23]	[0, 3, 22]	[0, 3, 21]	[0, 3, 20]	[0, 3, 19]	[0, 3, 18]	[0, 3, 17]	[0, 3, 16]
DCM:CLKFX_MULTIPLY	[0, 3, 39]	[0, 3, 38]	[0, 3, 37]	[0, 3, 36]	[0, 3, 35]	[0, 3, 34]	[0, 3, 33]	[0, 3, 32]	[0, 3, 31]	[0, 3, 30]	[0, 3, 29]	[0, 3, 28]
Non-inverted	[11]	[10]	[9]	[8]	[7]	[6]	[5]	[4]	[3]	[2]	[1]	[0]

DCM:INV.CTLGO	[0, 3, 71]
DCM:INV.CTLMODE	[0, 3, 72]
DCM:INV.CTLOSC1	[0, 3, 70]
DCM:INV.CTLOSC2	[0, 3, 69]
DCM:INV.CTLSEL0	[0, 3, 66]
DCM:INV.CTLSEL1	[0, 3, 67]
DCM:INV.CTLSEL2	[0, 3, 68]
DCM:INV.DSSEN	[0, 3, 61]
DCM:INV.FREEZEDFS	[0, 3, 74]
DCM:INV.FREEZEDLL	[0, 3, 73]
DCM:INV.PSEN	[0, 3, 63]
DCM:INV.PSINCDEC	[0, 3, 64]
DCM:INV.RST	[0, 3, 65]
DCM:INV.STSADRS0	[0, 3, 75]
DCM:INV.STSADRS1	[0, 3, 76]
DCM:INV.STSADRS2	[0, 3, 77]
DCM:INV.STSADRS3	[0, 3, 78]
DCM:INV.STSADRS4	[0, 3, 60]
Inverted	~[0]

DESKEW_ADJUST

Device	DCM:DESKEW_ADJUST
	[3]	[2]	[1]	[0]
xc2v1000	1	0	1	1
xc2v1500	1	0	1	1
xc2v2000	1	0	1	1
xc2v250	1	0	1	1
xc2v3000	1	1	0	0
xc2v40	1	0	1	1
xc2v4000	1	1	0	0
xc2v500	1	0	1	1
xc2v6000	1	1	0	0
xc2v80	1	0	1	1
xc2v8000	1	1	0	1
xc2vp100	0	1	1	1
xc2vp2	0	1	1	0
xc2vp20	0	1	1	0
xc2vp30	0	1	1	1
xc2vp4	0	1	1	0
xc2vp40	0	1	1	1
xc2vp50	0	1	1	1
xc2vp7	0	1	1	0
xc2vp70	0	1	1	1
xc2vpx20	0	1	1	0
xc2vpx70	0	1	1	1
xq2v1000	1	0	1	1
xq2v3000	1	1	0	0
xq2v6000	1	1	0	0
xq2vp40	0	1	1	1
xq2vp70	0	1	1	1
xqr2v1000	1	0	1	1
xqr2v3000	1	1	0	0
xqr2v6000	1	1	0	0