Multi-gigabit transceivers — Virtex 2 Pro X

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document

Bitstream

GIGABIT10.B

GIGABIT10.B bittile 0
RowColumn
0123
0 ----
1 ----
2 ----
3 ---GT10:CRC_FORMAT[0]
4 ---GT10:CRC_FORMAT[1]
5 ----
6 ----
7 ----
8 ----
9 ----
10 ----
11 ----
12 ----
13 ---GT10:CRC_START_OF_PKT[0]
14 ---GT10:CRC_START_OF_PKT[1]
15 ---GT10:CRC_START_OF_PKT[2]
16 ---GT10:CRC_START_OF_PKT[3]
17 ---GT10:CRC_START_OF_PKT[4]
18 ---GT10:CRC_START_OF_PKT[5]
19 ---GT10:CRC_START_OF_PKT[6]
20 ---GT10:CRC_START_OF_PKT[7]
21 ----
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 ----
32 ----
33 ----
34 ----
35 ----
36 ---GT10:TX_BUFFER_USE
37 ---GT10:TX_CRC_USE
38 ---GT10:TX_CRC_FORCE_VALUE[0]
39 ---GT10:TX_CRC_FORCE_VALUE[1]
40 ---GT10:TX_CRC_FORCE_VALUE[2]
41 ---GT10:TX_CRC_FORCE_VALUE[3]
42 ---GT10:TX_CRC_FORCE_VALUE[4]
43 ---GT10:TX_CRC_FORCE_VALUE[5]
44 ---GT10:TX_CRC_FORCE_VALUE[6]
45 ---GT10:TX_CRC_FORCE_VALUE[7]
46 ----
47 ----
48 ----
49 ----
50 ----
51 ----
52 ----
53 ----
54 ----
55 ----
56 ----
57 ----
58 ----
59 ----
60 ----
61 ----
62 ----
63 ----
64 ----
65 ----
66 ----
67 ----
68 ----
69 ----
70 ---GT10:CRC_END_OF_PKT[0]
71 ---GT10:CRC_END_OF_PKT[1]
72 ---GT10:CRC_END_OF_PKT[2]
73 ---GT10:CRC_END_OF_PKT[3]
74 ---GT10:ENABLE
75 ---GT10:CRC_END_OF_PKT[4]
76 ---GT10:CRC_END_OF_PKT[5]
77 ---GT10:CRC_END_OF_PKT[6]
GIGABIT10.B bittile 1
RowColumn
0123
0 ----
1 ---GT10:COMMA_10B_MASK[0]
2 ---GT10:COMMA_10B_MASK[1]
3 ---GT10:COMMA_10B_MASK[2]
4 ---GT10:COMMA_10B_MASK[3]
5 ---GT10:COMMA_10B_MASK[4]
6 ---GT10:COMMA_10B_MASK[5]
7 ---GT10:COMMA_10B_MASK[6]
8 ---GT10:COMMA_10B_MASK[7]
9 ---GT10:COMMA_10B_MASK[8]
10 ---GT10:COMMA_10B_MASK[9]
11 ---GT10:MCOMMA_10B_VALUE[0]
12 ---GT10:MCOMMA_10B_VALUE[1]
13 ---GT10:MCOMMA_10B_VALUE[2]
14 ---GT10:MCOMMA_10B_VALUE[3]
15 ---GT10:MCOMMA_10B_VALUE[4]
16 ---GT10:MCOMMA_10B_VALUE[5]
17 ---GT10:MCOMMA_10B_VALUE[6]
18 ---GT10:MCOMMA_10B_VALUE[7]
19 ---GT10:MCOMMA_10B_VALUE[8]
20 ---GT10:MCOMMA_10B_VALUE[9]
21 ----
22 ---GT10:MCOMMA_DETECT
23 ---GT10:PCOMMA_10B_VALUE[0]
24 ---GT10:PCOMMA_10B_VALUE[1]
25 ---GT10:PCOMMA_10B_VALUE[2]
26 ---GT10:PCOMMA_10B_VALUE[3]
27 ---GT10:PCOMMA_10B_VALUE[4]
28 ---GT10:PCOMMA_10B_VALUE[5]
29 ---GT10:PCOMMA_10B_VALUE[6]
30 ---GT10:PCOMMA_10B_VALUE[7]
31 ---GT10:PCOMMA_10B_VALUE[8]
32 ---GT10:PCOMMA_10B_VALUE[9]
33 ----
34 ---GT10:PCOMMA_DETECT
35 ----
36 ---GT10:CLK_COR_SEQ_1_4[0]
37 ---GT10:CLK_COR_SEQ_1_4[1]
38 ---GT10:CLK_COR_SEQ_1_4[2]
39 ---GT10:CLK_COR_SEQ_1_4[3]
40 ---GT10:CLK_COR_SEQ_1_4[4]
41 ---GT10:CLK_COR_SEQ_1_4[5]
42 ---GT10:CLK_COR_SEQ_1_4[6]
43 ---GT10:CLK_COR_SEQ_1_4[7]
44 ---GT10:CLK_COR_SEQ_1_4[8]
45 ---GT10:CLK_COR_SEQ_1_4[9]
46 ---GT10:CLK_COR_SEQ_1_4[10]
47 ---GT10:CLK_COR_SEQ_1_3[0]
48 ---GT10:CLK_COR_SEQ_1_3[1]
49 ---GT10:CLK_COR_SEQ_1_3[2]
50 ---GT10:CLK_COR_SEQ_1_3[3]
51 ---GT10:CLK_COR_SEQ_1_3[4]
52 ---GT10:CLK_COR_SEQ_1_3[5]
53 ---GT10:CLK_COR_SEQ_1_3[6]
54 ---GT10:CLK_COR_SEQ_1_3[7]
55 ---GT10:CLK_COR_SEQ_1_3[8]
56 ---GT10:CLK_COR_SEQ_1_3[9]
57 ---GT10:CLK_COR_SEQ_1_3[10]
58 ---GT10:CLK_COR_SEQ_1_2[0]
59 ---GT10:CLK_COR_SEQ_1_2[1]
60 ---GT10:CLK_COR_SEQ_1_2[2]
61 ---GT10:CLK_COR_SEQ_1_2[3]
62 ---GT10:CLK_COR_SEQ_1_2[4]
63 ---GT10:CLK_COR_SEQ_1_2[5]
64 ---GT10:CLK_COR_SEQ_1_2[6]
65 ---GT10:CLK_COR_SEQ_1_2[7]
66 ---GT10:CLK_COR_SEQ_1_2[8]
67 ---GT10:CLK_COR_SEQ_1_2[9]
68 ---GT10:CLK_COR_SEQ_1_2[10]
69 ---GT10:CLK_COR_SEQ_1_1[0]
70 ---GT10:CLK_COR_SEQ_1_1[1]
71 ---GT10:CLK_COR_SEQ_1_1[2]
72 ---GT10:CLK_COR_SEQ_1_1[3]
73 ---GT10:CLK_COR_SEQ_1_1[4]
74 ---GT10:CLK_COR_SEQ_1_1[5]
75 ---GT10:CLK_COR_SEQ_1_1[6]
76 ---GT10:CLK_COR_SEQ_1_1[7]
77 ---GT10:CLK_COR_SEQ_1_1[8]
78 ---GT10:CLK_COR_SEQ_1_1[9]
79 ---GT10:CLK_COR_SEQ_1_1[10]
GIGABIT10.B bittile 2
RowColumn
0123
0 ----
1 ----
2 ---GT10:CHAN_BOND_MODE[0]
3 ----
4 ---GT10:CHAN_BOND_MODE[1]
5 ----
6 ----
7 ----
8 ----
9 ----
10 ---GT10:CLK_CORRECT_USE
11 ---GT10:CLK_COR_INSERT_IDLE_FLAG
12 ---GT10:CLK_COR_KEEP_IDLE
13 ---GT10:CLK_COR_REPEAT_WAIT[0]
14 ---GT10:CLK_COR_REPEAT_WAIT[1]
15 ---GT10:CLK_COR_REPEAT_WAIT[2]
16 ---GT10:CLK_COR_REPEAT_WAIT[3]
17 ---GT10:CLK_COR_REPEAT_WAIT[4]
18 ----
19 ----
20 ----
21 ----
22 ----
23 ---GT10:CHAN_BOND_ONE_SHOT
24 ----
25 ---GT10:RX_BUFFER_USE
26 ----
27 ----
28 ----
29 ----
30 ---GT10:DEC_VALID_COMMA_ONLY
31 ---GT10:DEC_PCOMMA_DETECT
32 ---GT10:DEC_MCOMMA_DETECT
33 ----
34 ----
35 ---GT10:CLK_COR_SEQ_2_USE
36 ---GT10:CLK_COR_SEQ_2_4[0]
37 ---GT10:CLK_COR_SEQ_2_4[1]
38 ---GT10:CLK_COR_SEQ_2_4[2]
39 ---GT10:CLK_COR_SEQ_2_4[3]
40 ---GT10:CLK_COR_SEQ_2_4[4]
41 ---GT10:CLK_COR_SEQ_2_4[5]
42 ---GT10:CLK_COR_SEQ_2_4[6]
43 ---GT10:CLK_COR_SEQ_2_4[7]
44 ---GT10:CLK_COR_SEQ_2_4[8]
45 ---GT10:CLK_COR_SEQ_2_4[9]
46 ---GT10:CLK_COR_SEQ_2_4[10]
47 ---GT10:CLK_COR_SEQ_2_3[0]
48 ---GT10:CLK_COR_SEQ_2_3[1]
49 ---GT10:CLK_COR_SEQ_2_3[2]
50 ---GT10:CLK_COR_SEQ_2_3[3]
51 ---GT10:CLK_COR_SEQ_2_3[4]
52 ---GT10:CLK_COR_SEQ_2_3[5]
53 ---GT10:CLK_COR_SEQ_2_3[6]
54 ---GT10:CLK_COR_SEQ_2_3[7]
55 ---GT10:CLK_COR_SEQ_2_3[8]
56 ---GT10:CLK_COR_SEQ_2_3[9]
57 ---GT10:CLK_COR_SEQ_2_3[10]
58 ---GT10:CLK_COR_SEQ_2_2[0]
59 ---GT10:CLK_COR_SEQ_2_2[1]
60 ---GT10:CLK_COR_SEQ_2_2[2]
61 ---GT10:CLK_COR_SEQ_2_2[3]
62 ---GT10:CLK_COR_SEQ_2_2[4]
63 ---GT10:CLK_COR_SEQ_2_2[5]
64 ---GT10:CLK_COR_SEQ_2_2[6]
65 ---GT10:CLK_COR_SEQ_2_2[7]
66 ---GT10:CLK_COR_SEQ_2_2[8]
67 ---GT10:CLK_COR_SEQ_2_2[9]
68 ---GT10:CLK_COR_SEQ_2_2[10]
69 ---GT10:CLK_COR_SEQ_2_1[0]
70 ---GT10:CLK_COR_SEQ_2_1[1]
71 ---GT10:CLK_COR_SEQ_2_1[2]
72 ---GT10:CLK_COR_SEQ_2_1[3]
73 ---GT10:CLK_COR_SEQ_2_1[4]
74 ---GT10:CLK_COR_SEQ_2_1[5]
75 ---GT10:CLK_COR_SEQ_2_1[6]
76 ---GT10:CLK_COR_SEQ_2_1[7]
77 ---GT10:CLK_COR_SEQ_2_1[8]
78 ---GT10:CLK_COR_SEQ_2_1[9]
79 ---GT10:CLK_COR_SEQ_2_1[10]
GIGABIT10.B bittile 3
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 ----
5 ----
6 ----
7 ----
8 ----
9 ----
10 ----
11 ---GT10:TEST_MODE_1
12 ---GT10:TEST_MODE_2
13 ---GT10:TEST_MODE_3
14 ---GT10:TEST_MODE_4
15 ---GT10:TEST_MODE_5
16 ---GT10:TEST_MODE_6
17 ----
18 ----
19 ----
20 ----
21 ----
22 ---GT10:CLK_COR_SEQ_LEN[0]
23 ---GT10:CLK_COR_SEQ_LEN[1]
24 ---GT10:CLK_COR_SEQ_LEN[2]
25 ----
26 ---GT10:CHAN_BOND_SEQ_LEN[0]
27 ---GT10:CHAN_BOND_SEQ_LEN[1]
28 ---GT10:CHAN_BOND_SEQ_LEN[2]
29 ----
30 ----
31 ----
32 ----
33 ----
34 ----
35 ---GT10:RX_CRC_USE
36 ---GT10:CHAN_BOND_SEQ_1_4[0]
37 ---GT10:CHAN_BOND_SEQ_1_4[1]
38 ---GT10:CHAN_BOND_SEQ_1_4[2]
39 ---GT10:CHAN_BOND_SEQ_1_4[3]
40 ---GT10:CHAN_BOND_SEQ_1_4[4]
41 ---GT10:CHAN_BOND_SEQ_1_4[5]
42 ---GT10:CHAN_BOND_SEQ_1_4[6]
43 ---GT10:CHAN_BOND_SEQ_1_4[7]
44 ---GT10:CHAN_BOND_SEQ_1_4[8]
45 ---GT10:CHAN_BOND_SEQ_1_4[9]
46 ---GT10:CHAN_BOND_SEQ_1_4[10]
47 ---GT10:CHAN_BOND_SEQ_1_3[0]
48 ---GT10:CHAN_BOND_SEQ_1_3[1]
49 ---GT10:CHAN_BOND_SEQ_1_3[2]
50 ---GT10:CHAN_BOND_SEQ_1_3[3]
51 ---GT10:CHAN_BOND_SEQ_1_3[4]
52 ---GT10:CHAN_BOND_SEQ_1_3[5]
53 ---GT10:CHAN_BOND_SEQ_1_3[6]
54 ---GT10:CHAN_BOND_SEQ_1_3[7]
55 ---GT10:CHAN_BOND_SEQ_1_3[8]
56 ---GT10:CHAN_BOND_SEQ_1_3[9]
57 ---GT10:CHAN_BOND_SEQ_1_3[10]
58 ---GT10:CHAN_BOND_SEQ_1_2[0]
59 ---GT10:CHAN_BOND_SEQ_1_2[1]
60 ---GT10:CHAN_BOND_SEQ_1_2[2]
61 ---GT10:CHAN_BOND_SEQ_1_2[3]
62 ---GT10:CHAN_BOND_SEQ_1_2[4]
63 ---GT10:CHAN_BOND_SEQ_1_2[5]
64 ---GT10:CHAN_BOND_SEQ_1_2[6]
65 ---GT10:CHAN_BOND_SEQ_1_2[7]
66 ---GT10:CHAN_BOND_SEQ_1_2[8]
67 ---GT10:CHAN_BOND_SEQ_1_2[9]
68 ---GT10:CHAN_BOND_SEQ_1_2[10]
69 ---GT10:CHAN_BOND_SEQ_1_1[0]
70 ---GT10:CHAN_BOND_SEQ_1_1[1]
71 ---GT10:CHAN_BOND_SEQ_1_1[2]
72 ---GT10:CHAN_BOND_SEQ_1_1[3]
73 ---GT10:CHAN_BOND_SEQ_1_1[4]
74 ---GT10:CHAN_BOND_SEQ_1_1[5]
75 ---GT10:CHAN_BOND_SEQ_1_1[6]
76 ---GT10:CHAN_BOND_SEQ_1_1[7]
77 ---GT10:CHAN_BOND_SEQ_1_1[8]
78 ---GT10:CHAN_BOND_SEQ_1_1[9]
79 ---GT10:CHAN_BOND_SEQ_1_1[10]
GIGABIT10.B bittile 4
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 ----
5 ----
6 ----
7 ----
8 ---GT10:RX_LOS_THRESHOLD[0]
9 ---GT10:RX_LOS_THRESHOLD[1]
10 ---GT10:RX_LOS_THRESHOLD[2]
11 ---GT10:RX_LOS_THRESHOLD[3]
12 ---GT10:RX_LOS_THRESHOLD[4]
13 ---GT10:RX_LOS_THRESHOLD[5]
14 ---GT10:RX_LOS_THRESHOLD[6]
15 ---GT10:RX_LOS_THRESHOLD[7]
16 ---GT10:RX_LOS_INVALID_INCR[0]
17 ---GT10:RX_LOS_INVALID_INCR[1]
18 ---GT10:RX_LOS_INVALID_INCR[2]
19 ---GT10:RX_LOS_INVALID_INCR[3]
20 ---GT10:RX_LOS_INVALID_INCR[4]
21 ---GT10:RX_LOS_INVALID_INCR[5]
22 ---GT10:RX_LOS_INVALID_INCR[6]
23 ---GT10:RX_LOSS_OF_SYNC_FSM
24 ---GT10:CHAN_BOND_LIMIT[0]
25 ---GT10:CHAN_BOND_LIMIT[1]
26 ---GT10:CHAN_BOND_LIMIT[2]
27 ---GT10:CHAN_BOND_LIMIT[3]
28 ---GT10:CHAN_BOND_LIMIT[4]
29 ----
30 ---GT10:RX_LOS_INVALID_INCR[7]
31 ----
32 ----
33 ----
34 ----
35 ---GT10:CHAN_BOND_SEQ_2_USE
36 ---GT10:CHAN_BOND_SEQ_2_4[0]
37 ---GT10:CHAN_BOND_SEQ_2_4[1]
38 ---GT10:CHAN_BOND_SEQ_2_4[2]
39 ---GT10:CHAN_BOND_SEQ_2_4[3]
40 ---GT10:CHAN_BOND_SEQ_2_4[4]
41 ---GT10:CHAN_BOND_SEQ_2_4[5]
42 ---GT10:CHAN_BOND_SEQ_2_4[6]
43 ---GT10:CHAN_BOND_SEQ_2_4[7]
44 ---GT10:CHAN_BOND_SEQ_2_4[8]
45 ---GT10:CHAN_BOND_SEQ_2_4[9]
46 ---GT10:CHAN_BOND_SEQ_2_4[10]
47 ---GT10:CHAN_BOND_SEQ_2_3[0]
48 ---GT10:CHAN_BOND_SEQ_2_3[1]
49 ---GT10:CHAN_BOND_SEQ_2_3[2]
50 ---GT10:CHAN_BOND_SEQ_2_3[3]
51 ---GT10:CHAN_BOND_SEQ_2_3[4]
52 ---GT10:CHAN_BOND_SEQ_2_3[5]
53 ---GT10:CHAN_BOND_SEQ_2_3[6]
54 ---GT10:CHAN_BOND_SEQ_2_3[7]
55 ---GT10:CHAN_BOND_SEQ_2_3[8]
56 ---GT10:CHAN_BOND_SEQ_2_3[9]
57 ---GT10:CHAN_BOND_SEQ_2_3[10]
58 ---GT10:CHAN_BOND_SEQ_2_2[0]
59 ---GT10:CHAN_BOND_SEQ_2_2[1]
60 ---GT10:CHAN_BOND_SEQ_2_2[2]
61 ---GT10:CHAN_BOND_SEQ_2_2[3]
62 ---GT10:CHAN_BOND_SEQ_2_2[4]
63 ---GT10:CHAN_BOND_SEQ_2_2[5]
64 ---GT10:CHAN_BOND_SEQ_2_2[6]
65 ---GT10:CHAN_BOND_SEQ_2_2[7]
66 ---GT10:CHAN_BOND_SEQ_2_2[8]
67 ---GT10:CHAN_BOND_SEQ_2_2[9]
68 ---GT10:CHAN_BOND_SEQ_2_2[10]
69 ---GT10:CHAN_BOND_SEQ_2_1[0]
70 ---GT10:CHAN_BOND_SEQ_2_1[1]
71 ---GT10:CHAN_BOND_SEQ_2_1[2]
72 ---GT10:CHAN_BOND_SEQ_2_1[3]
73 ---GT10:CHAN_BOND_SEQ_2_1[4]
74 ---GT10:CHAN_BOND_SEQ_2_1[5]
75 ---GT10:CHAN_BOND_SEQ_2_1[6]
76 ---GT10:CHAN_BOND_SEQ_2_1[7]
77 ---GT10:CHAN_BOND_SEQ_2_1[8]
78 ---GT10:CHAN_BOND_SEQ_2_1[9]
79 ---GT10:CHAN_BOND_SEQ_2_1[10]
GIGABIT10.B bittile 5
RowColumn
0123
0 ---GT10:ALIGN_COMMA_WORD[0]
1 ---GT10:ALIGN_COMMA_WORD[1]
2 ----
3 ---GT10:CHAN_BOND_SEQ_1_MASK[0]
4 ---GT10:CHAN_BOND_SEQ_1_MASK[1]
5 ---GT10:CHAN_BOND_SEQ_1_MASK[2]
6 ---GT10:CHAN_BOND_SEQ_1_MASK[3]
7 ----
8 ---GT10:CHAN_BOND_SEQ_2_MASK[0]
9 ---GT10:CHAN_BOND_SEQ_2_MASK[1]
10 ---GT10:CHAN_BOND_SEQ_2_MASK[2]
11 ---GT10:CHAN_BOND_SEQ_2_MASK[3]
12 ----
13 ---GT10:CLK_COR_ADJ_MAX[0]
14 ---GT10:CLK_COR_ADJ_MAX[1]
15 ---GT10:CLK_COR_ADJ_MAX[2]
16 ---GT10:CLK_COR_ADJ_MAX[3]
17 ---GT10:CLK_COR_ADJ_MAX[4]
18 ----
19 ---GT10:CLK_COR_MIN_LAT[0]
20 ---GT10:CLK_COR_MIN_LAT[1]
21 ---GT10:CLK_COR_MIN_LAT[2]
22 ---GT10:CLK_COR_MIN_LAT[3]
23 ---GT10:CLK_COR_MIN_LAT[4]
24 ---GT10:CLK_COR_MIN_LAT[5]
25 ---GT10:CLK_COR_MAX_LAT[0]
26 ---GT10:CLK_COR_MAX_LAT[1]
27 ---GT10:CLK_COR_MAX_LAT[2]
28 ---GT10:CLK_COR_MAX_LAT[3]
29 ---GT10:CLK_COR_MAX_LAT[4]
30 ---GT10:CLK_COR_MAX_LAT[5]
31 ----
32 ---GT10:CLK_COR_8B10B_DE
33 ---GT10:CHAN_BOND_64B66B_SV
34 ----
35 ----
36 ----
37 ----
38 ----
39 ----
40 ----
41 ----
42 ----
43 ----
44 ----
45 ----
46 ----
47 ----
48 ----
49 ----
50 ---GT10:PMA_PWR_CNTRL[0]
51 ---GT10:PMA_PWR_CNTRL[1]
52 ---GT10:PMA_PWR_CNTRL[2]
53 ---GT10:PMA_PWR_CNTRL[3]
54 ---GT10:PMA_PWR_CNTRL[4]
55 ---GT10:PMA_PWR_CNTRL[5]
56 ---GT10:PMA_PWR_CNTRL[6]
57 ---GT10:PMA_PWR_CNTRL[7]
GIGABIT10.B bittile 6
RowColumn
0123
0 ----
1 ----
2 ---GT10:CLK_COR_SEQ_1_MASK[0]
3 ----
4 ---GT10:CLK_COR_SEQ_1_MASK[1]
5 ---GT10:CLK_COR_SEQ_1_MASK[2]
6 ---GT10:CLK_COR_SEQ_1_MASK[3]
7 ----
8 ---GT10:CLK_COR_SEQ_2_MASK[0]
9 ---GT10:CLK_COR_SEQ_2_MASK[1]
10 ---GT10:CLK_COR_SEQ_2_MASK[2]
11 ---GT10:CLK_COR_SEQ_2_MASK[3]
12 ----
13 ---GT10:CLK_COR_SEQ_DROP
14 ----
15 ----
16 ----
17 ----
18 ----
19 ----
20 ----
21 ----
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 ----
32 ----
33 ----
34 ----
35 ----
36 ----
37 ----
38 ----
39 ----
40 ---GT10:PMA_SPEED[0]
41 ---GT10:PMA_SPEED[1]
42 ---GT10:PMA_SPEED[2]
43 ---GT10:PMA_SPEED[3]
44 ---GT10:PMA_SPEED[4]
45 ---GT10:PMA_SPEED[5]
46 ---GT10:PMA_SPEED[6]
47 ---GT10:PMA_SPEED[7]
48 ---GT10:PMA_SPEED[8]
49 ---GT10:PMA_SPEED[9]
50 ---GT10:PMA_SPEED[10]
51 ---GT10:PMA_SPEED[11]
52 ---GT10:PMA_SPEED[12]
53 ---GT10:PMA_SPEED[13]
54 ---GT10:PMA_SPEED[14]
55 ---GT10:PMA_SPEED[15]
56 ---GT10:PMA_SPEED[16]
57 ---GT10:PMA_SPEED[17]
58 ---GT10:PMA_SPEED[18]
59 ---GT10:PMA_SPEED[19]
60 ---GT10:PMA_SPEED[20]
61 ---GT10:PMA_SPEED[21]
62 ---GT10:PMA_SPEED[22]
63 ---GT10:PMA_SPEED[23]
64 ---GT10:PMA_SPEED[24]
65 ---GT10:PMA_SPEED[25]
66 ---GT10:PMA_SPEED[26]
67 ---GT10:PMA_SPEED[27]
68 ---GT10:PMA_SPEED[28]
69 ---GT10:PMA_SPEED[29]
70 ---GT10:PMA_SPEED[30]
71 ---GT10:PMA_SPEED[31]
72 ---GT10:PMA_SPEED[32]
73 ---GT10:PMA_SPEED[33]
74 ---GT10:PMA_SPEED[34]
75 ---GT10:PMA_SPEED[35]
76 ---GT10:PMA_SPEED[36]
77 ---GT10:PMA_SPEED[37]
78 ---GT10:PMA_SPEED[38]
79 ---GT10:PMA_SPEED[39]
GIGABIT10.B bittile 7
RowColumn
0123
0 ---GT10:PMA_SPEED[40]
1 ---GT10:PMA_SPEED[41]
2 ---GT10:PMA_SPEED[42]
3 ----
4 ---GT10:PMA_SPEED[44]
5 ---GT10:PMA_SPEED[45]
6 ---GT10:PMA_SPEED[46]
7 ---GT10:PMA_SPEED[47]
8 ---GT10:PMA_SPEED[48]
9 ---GT10:PMA_SPEED[49]
10 ---GT10:PMA_SPEED[50]
11 ---GT10:PMA_SPEED[51]
12 ---GT10:PMA_SPEED[52]
13 ---GT10:PMA_SPEED[53]
14 ---GT10:PMA_SPEED[54]
15 ---GT10:PMA_SPEED[55]
16 ---GT10:PMA_SPEED[56]
17 ---GT10:PMA_SPEED[57]
18 ---GT10:PMA_SPEED[58]
19 ---GT10:PMA_SPEED[59]
20 ---GT10:PMA_SPEED[60]
21 ---GT10:PMA_SPEED[61]
22 ---GT10:PMA_SPEED[62]
23 ---GT10:PMA_SPEED[63]
24 ---GT10:PMA_SPEED[64]
25 ---GT10:PMA_SPEED[65]
26 ---GT10:PMA_SPEED[66]
27 ---GT10:PMA_SPEED[67]
28 ---GT10:PMA_SPEED[68]
29 ---GT10:PMA_SPEED[69]
30 ---GT10:PMA_SPEED[70]
31 ---GT10:PMA_SPEED[71]
32 ---GT10:PMA_SPEED[72]
33 ---GT10:PMA_SPEED[73]
34 ---GT10:PMA_SPEED[74]
35 ---GT10:PMA_SPEED[75]
36 ---GT10:PMA_SPEED[76]
37 ---GT10:PMA_SPEED[77]
38 ---GT10:PMA_SPEED[78]
39 ---GT10:PMA_SPEED[79]
40 ---GT10:PMA_SPEED[80]
41 ---GT10:PMA_SPEED[81]
42 ---GT10:PMA_SPEED[82]
43 ---GT10:PMA_SPEED[83]
44 ---GT10:PMA_SPEED[84]
45 ---GT10:PMA_SPEED[85]
46 ---GT10:PMA_SPEED[86]
47 ---GT10:PMA_SPEED[87]
48 ---GT10:PMA_SPEED[88]
49 ---GT10:PMA_SPEED[89]
50 ---GT10:PMA_SPEED[90]
51 ---GT10:PMA_SPEED[91]
52 ---GT10:PMA_SPEED[92]
53 ---GT10:PMA_SPEED[93]
54 ---GT10:PMA_SPEED[94]
55 ---GT10:PMA_SPEED[95]
56 ---GT10:PMA_SPEED[96]
57 ---GT10:PMA_SPEED[97]
58 ---GT10:PMA_SPEED[98]
59 ---GT10:PMA_SPEED[99]
60 ---GT10:PMA_SPEED[100]
61 ---GT10:PMA_SPEED[101]
62 ---GT10:PMA_SPEED[102]
63 ---GT10:PMA_SPEED[103]
64 ---GT10:PMA_SPEED[104]
65 ---GT10:PMA_SPEED[105]
66 ---GT10:PMA_SPEED[106]
67 ---GT10:PMA_SPEED[107]
68 ---GT10:PMA_SPEED[108]
69 ---GT10:PMA_SPEED[109]
70 ---GT10:PMA_SPEED[110]
71 ---GT10:PMA_SPEED[111]
72 ---GT10:PMA_SPEED[112]
73 ---GT10:PMA_SPEED[113]
74 ---GT10:PMA_SPEED[114]
75 ---GT10:PMA_SPEED[115]
76 ---GT10:PMA_SPEED[116]
77 ---GT10:PMA_SPEED[117]
78 ---GT10:PMA_SPEED[118]
79 ---GT10:PMA_SPEED[119]
GIGABIT10.B bittile 8
RowColumn
0123
0 ----
1 ----
2 ---GT10:PMA_SPEED[43]
3 ----
4 ----
5 ----
6 ----
7 ----
8 ----
9 ----
10 ----
11 ----
12 ----
13 ----
14 ----
15 ---GT10:SH_CNT_MAX[0]
16 ---GT10:SH_CNT_MAX[1]
17 ---GT10:SH_CNT_MAX[2]
18 ---GT10:SH_CNT_MAX[3]
19 ---GT10:SH_CNT_MAX[4]
20 ---GT10:SH_CNT_MAX[5]
21 ---GT10:SH_CNT_MAX[6]
22 ---GT10:SH_CNT_MAX[7]
23 ---GT10:SH_INVALID_CNT_MAX[0]
24 ---GT10:SH_INVALID_CNT_MAX[1]
25 ---GT10:SH_INVALID_CNT_MAX[2]
26 ---GT10:SH_INVALID_CNT_MAX[3]
27 ---GT10:SH_INVALID_CNT_MAX[4]
28 ---GT10:SH_INVALID_CNT_MAX[5]
29 ---GT10:SH_INVALID_CNT_MAX[6]
30 ---GT10:SH_INVALID_CNT_MAX[7]
GT10:CRC_FORMAT[0, 3, 4][0, 3, 3]
USER_MODE00
ETHERNET01
FIBRE_CHAN10
INFINIBAND11
GT10:CRC_START_OF_PKT[0, 3, 20][0, 3, 19][0, 3, 18][0, 3, 17][0, 3, 16][0, 3, 15][0, 3, 14][0, 3, 13]
K28_000011100
K28_100111100
K28_201011100
K28_301111100
K28_410011100
K28_510111100
K28_611011100
K23_711110111
K27_711111011
K28_711111100
K29_711111101
K30_711111110
GT10:CHAN_BOND_64B66B_SV[5, 3, 33]
GT10:CHAN_BOND_ONE_SHOT[2, 3, 23]
GT10:CHAN_BOND_SEQ_2_USE[4, 3, 35]
GT10:CLK_CORRECT_USE[2, 3, 10]
GT10:CLK_COR_8B10B_DE[5, 3, 32]
GT10:CLK_COR_INSERT_IDLE_FLAG[2, 3, 11]
GT10:CLK_COR_KEEP_IDLE[2, 3, 12]
GT10:CLK_COR_SEQ_2_USE[2, 3, 35]
GT10:CLK_COR_SEQ_DROP[6, 3, 13]
GT10:DEC_MCOMMA_DETECT[2, 3, 32]
GT10:DEC_PCOMMA_DETECT[2, 3, 31]
GT10:DEC_VALID_COMMA_ONLY[2, 3, 30]
GT10:ENABLE[0, 3, 74]
GT10:MCOMMA_DETECT[1, 3, 22]
GT10:PCOMMA_DETECT[1, 3, 34]
GT10:RX_BUFFER_USE[2, 3, 25]
GT10:RX_CRC_USE[3, 3, 35]
GT10:RX_LOSS_OF_SYNC_FSM[4, 3, 23]
GT10:TEST_MODE_1[3, 3, 11]
GT10:TEST_MODE_2[3, 3, 12]
GT10:TEST_MODE_3[3, 3, 13]
GT10:TEST_MODE_4[3, 3, 14]
GT10:TEST_MODE_5[3, 3, 15]
GT10:TEST_MODE_6[3, 3, 16]
GT10:TX_BUFFER_USE[0, 3, 36]
GT10:TX_CRC_USE[0, 3, 37]
Non-inverted[0]
GT10:PMA_PWR_CNTRL[5, 3, 57][5, 3, 56][5, 3, 55][5, 3, 54][5, 3, 53][5, 3, 52][5, 3, 51][5, 3, 50]
GT10:SH_CNT_MAX[8, 3, 22][8, 3, 21][8, 3, 20][8, 3, 19][8, 3, 18][8, 3, 17][8, 3, 16][8, 3, 15]
GT10:SH_INVALID_CNT_MAX[8, 3, 30][8, 3, 29][8, 3, 28][8, 3, 27][8, 3, 26][8, 3, 25][8, 3, 24][8, 3, 23]
GT10:TX_CRC_FORCE_VALUE[0, 3, 45][0, 3, 44][0, 3, 43][0, 3, 42][0, 3, 41][0, 3, 40][0, 3, 39][0, 3, 38]
Non-inverted[7][6][5][4][3][2][1][0]
GT10:CRC_END_OF_PKT[0, 3, 77][0, 3, 76][0, 3, 75][0, 3, 73][0, 3, 72][0, 3, 71][0, 3, 70]
K28_00001100
K28_10011100
K28_20101100
K28_30111100
K28_41001100
K28_51011100
K28_61101100
K23_71110111
K27_71111011
K28_71111100
K29_71111101
K30_71111110
GT10:COMMA_10B_MASK[1, 3, 10][1, 3, 9][1, 3, 8][1, 3, 7][1, 3, 6][1, 3, 5][1, 3, 4][1, 3, 3][1, 3, 2][1, 3, 1]
GT10:MCOMMA_10B_VALUE[1, 3, 20][1, 3, 19][1, 3, 18][1, 3, 17][1, 3, 16][1, 3, 15][1, 3, 14][1, 3, 13][1, 3, 12][1, 3, 11]
GT10:PCOMMA_10B_VALUE[1, 3, 32][1, 3, 31][1, 3, 30][1, 3, 29][1, 3, 28][1, 3, 27][1, 3, 26][1, 3, 25][1, 3, 24][1, 3, 23]
Non-inverted[9][8][7][6][5][4][3][2][1][0]
GT10:CHAN_BOND_SEQ_1_1[3, 3, 79][3, 3, 78][3, 3, 77][3, 3, 76][3, 3, 75][3, 3, 74][3, 3, 73][3, 3, 72][3, 3, 71][3, 3, 70][3, 3, 69]
GT10:CHAN_BOND_SEQ_1_2[3, 3, 68][3, 3, 67][3, 3, 66][3, 3, 65][3, 3, 64][3, 3, 63][3, 3, 62][3, 3, 61][3, 3, 60][3, 3, 59][3, 3, 58]
GT10:CHAN_BOND_SEQ_1_3[3, 3, 57][3, 3, 56][3, 3, 55][3, 3, 54][3, 3, 53][3, 3, 52][3, 3, 51][3, 3, 50][3, 3, 49][3, 3, 48][3, 3, 47]
GT10:CHAN_BOND_SEQ_1_4[3, 3, 46][3, 3, 45][3, 3, 44][3, 3, 43][3, 3, 42][3, 3, 41][3, 3, 40][3, 3, 39][3, 3, 38][3, 3, 37][3, 3, 36]
GT10:CHAN_BOND_SEQ_2_1[4, 3, 79][4, 3, 78][4, 3, 77][4, 3, 76][4, 3, 75][4, 3, 74][4, 3, 73][4, 3, 72][4, 3, 71][4, 3, 70][4, 3, 69]
GT10:CHAN_BOND_SEQ_2_2[4, 3, 68][4, 3, 67][4, 3, 66][4, 3, 65][4, 3, 64][4, 3, 63][4, 3, 62][4, 3, 61][4, 3, 60][4, 3, 59][4, 3, 58]
GT10:CHAN_BOND_SEQ_2_3[4, 3, 57][4, 3, 56][4, 3, 55][4, 3, 54][4, 3, 53][4, 3, 52][4, 3, 51][4, 3, 50][4, 3, 49][4, 3, 48][4, 3, 47]
GT10:CHAN_BOND_SEQ_2_4[4, 3, 46][4, 3, 45][4, 3, 44][4, 3, 43][4, 3, 42][4, 3, 41][4, 3, 40][4, 3, 39][4, 3, 38][4, 3, 37][4, 3, 36]
GT10:CLK_COR_SEQ_1_1[1, 3, 79][1, 3, 78][1, 3, 77][1, 3, 76][1, 3, 75][1, 3, 74][1, 3, 73][1, 3, 72][1, 3, 71][1, 3, 70][1, 3, 69]
GT10:CLK_COR_SEQ_1_2[1, 3, 68][1, 3, 67][1, 3, 66][1, 3, 65][1, 3, 64][1, 3, 63][1, 3, 62][1, 3, 61][1, 3, 60][1, 3, 59][1, 3, 58]
GT10:CLK_COR_SEQ_1_3[1, 3, 57][1, 3, 56][1, 3, 55][1, 3, 54][1, 3, 53][1, 3, 52][1, 3, 51][1, 3, 50][1, 3, 49][1, 3, 48][1, 3, 47]
GT10:CLK_COR_SEQ_1_4[1, 3, 46][1, 3, 45][1, 3, 44][1, 3, 43][1, 3, 42][1, 3, 41][1, 3, 40][1, 3, 39][1, 3, 38][1, 3, 37][1, 3, 36]
GT10:CLK_COR_SEQ_2_1[2, 3, 79][2, 3, 78][2, 3, 77][2, 3, 76][2, 3, 75][2, 3, 74][2, 3, 73][2, 3, 72][2, 3, 71][2, 3, 70][2, 3, 69]
GT10:CLK_COR_SEQ_2_2[2, 3, 68][2, 3, 67][2, 3, 66][2, 3, 65][2, 3, 64][2, 3, 63][2, 3, 62][2, 3, 61][2, 3, 60][2, 3, 59][2, 3, 58]
GT10:CLK_COR_SEQ_2_3[2, 3, 57][2, 3, 56][2, 3, 55][2, 3, 54][2, 3, 53][2, 3, 52][2, 3, 51][2, 3, 50][2, 3, 49][2, 3, 48][2, 3, 47]
GT10:CLK_COR_SEQ_2_4[2, 3, 46][2, 3, 45][2, 3, 44][2, 3, 43][2, 3, 42][2, 3, 41][2, 3, 40][2, 3, 39][2, 3, 38][2, 3, 37][2, 3, 36]
Non-inverted[10][9][8][7][6][5][4][3][2][1][0]
GT10:CHAN_BOND_MODE[2, 3, 4][2, 3, 2]
NONE00
MASTER01
SLAVE_1_HOP10
SLAVE_2_HOPS11
GT10:CHAN_BOND_LIMIT[4, 3, 28][4, 3, 27][4, 3, 26][4, 3, 25][4, 3, 24]
GT10:CLK_COR_ADJ_MAX[5, 3, 17][5, 3, 16][5, 3, 15][5, 3, 14][5, 3, 13]
GT10:CLK_COR_REPEAT_WAIT[2, 3, 17][2, 3, 16][2, 3, 15][2, 3, 14][2, 3, 13]
Non-inverted[4][3][2][1][0]
GT10:CHAN_BOND_SEQ_LEN[3, 3, 28][3, 3, 27][3, 3, 26]
GT10:CLK_COR_SEQ_LEN[3, 3, 24][3, 3, 23][3, 3, 22]
1000
2001
3010
4011
8111
GT10:RX_LOS_THRESHOLD[4, 3, 15][4, 3, 14][4, 3, 13][4, 3, 12][4, 3, 11][4, 3, 10][4, 3, 9][4, 3, 8]
400000001
800000010
1600000100
3200001000
6400010000
12800100000
25601000000
51210000000
GT10:RX_LOS_INVALID_INCR[4, 3, 30][4, 3, 22][4, 3, 21][4, 3, 20][4, 3, 19][4, 3, 18][4, 3, 17][4, 3, 16]
100000001
200000010
400000100
800001000
1600010000
3200100000
6401000000
12810000000
GT10:ALIGN_COMMA_WORD[5, 3, 1][5, 3, 0]
100
201
410
GT10:CHAN_BOND_SEQ_1_MASK[5, 3, 6][5, 3, 5][5, 3, 4][5, 3, 3]
GT10:CHAN_BOND_SEQ_2_MASK[5, 3, 11][5, 3, 10][5, 3, 9][5, 3, 8]
GT10:CLK_COR_SEQ_1_MASK[6, 3, 6][6, 3, 5][6, 3, 4][6, 3, 2]
GT10:CLK_COR_SEQ_2_MASK[6, 3, 11][6, 3, 10][6, 3, 9][6, 3, 8]
Non-inverted[3][2][1][0]
GT10:CLK_COR_MAX_LAT[5, 3, 30][5, 3, 29][5, 3, 28][5, 3, 27][5, 3, 26][5, 3, 25]
GT10:CLK_COR_MIN_LAT[5, 3, 24][5, 3, 23][5, 3, 22][5, 3, 21][5, 3, 20][5, 3, 19]
Non-inverted[5][4][3][2][1][0]
GT10:PMA_SPEED[7, 3, 79][7, 3, 78][7, 3, 77][7, 3, 76][7, 3, 75][7, 3, 74][7, 3, 73][7, 3, 72][7, 3, 71][7, 3, 70][7, 3, 69][7, 3, 68][7, 3, 67][7, 3, 66][7, 3, 65][7, 3, 64][7, 3, 63][7, 3, 62][7, 3, 61][7, 3, 60][7, 3, 59][7, 3, 58][7, 3, 57][7, 3, 56][7, 3, 55][7, 3, 54][7, 3, 53][7, 3, 52][7, 3, 51][7, 3, 50][7, 3, 49][7, 3, 48][7, 3, 47][7, 3, 46][7, 3, 45][7, 3, 44][7, 3, 43][7, 3, 42][7, 3, 41][7, 3, 40][7, 3, 39][7, 3, 38][7, 3, 37][7, 3, 36][7, 3, 35][7, 3, 34][7, 3, 33][7, 3, 32][7, 3, 31][7, 3, 30][7, 3, 29][7, 3, 28][7, 3, 27][7, 3, 26][7, 3, 25][7, 3, 24][7, 3, 23][7, 3, 22][7, 3, 21][7, 3, 20][7, 3, 19][7, 3, 18][7, 3, 17][7, 3, 16][7, 3, 15][7, 3, 14][7, 3, 13][7, 3, 12][7, 3, 11][7, 3, 10][7, 3, 9][7, 3, 8][7, 3, 7][7, 3, 6][7, 3, 5][7, 3, 4][8, 3, 2][7, 3, 2][7, 3, 1][7, 3, 0][6, 3, 79][6, 3, 78][6, 3, 77][6, 3, 76][6, 3, 75][6, 3, 74][6, 3, 73][6, 3, 72][6, 3, 71][6, 3, 70][6, 3, 69][6, 3, 68][6, 3, 67][6, 3, 66][6, 3, 65][6, 3, 64][6, 3, 63][6, 3, 62][6, 3, 61][6, 3, 60][6, 3, 59][6, 3, 58][6, 3, 57][6, 3, 56][6, 3, 55][6, 3, 54][6, 3, 53][6, 3, 52][6, 3, 51][6, 3, 50][6, 3, 49][6, 3, 48][6, 3, 47][6, 3, 46][6, 3, 45][6, 3, 44][6, 3, 43][6, 3, 42][6, 3, 41][6, 3, 40]
Non-inverted[119][118][117][116][115][114][113][112][111][110][109][108][107][106][105][104][103][102][101][100][99][98][97][96][95][94][93][92][91][90][89][88][87][86][85][84][83][82][81][80][79][78][77][76][75][74][73][72][71][70][69][68][67][66][65][64][63][62][61][60][59][58][57][56][55][54][53][52][51][50][49][48][47][46][45][44][43][42][41][40][39][38][37][36][35][34][33][32][31][30][29][28][27][26][25][24][23][22][21][20][19][18][17][16][15][14][13][12][11][10][9][8][7][6][5][4][3][2][1][0]

GIGABIT10.T

GIGABIT10.T bittile 0
RowColumn
0
0 -
1 -
2 -
3 GT10:CRC_FORMAT[0]
4 GT10:CRC_FORMAT[1]
5 -
6 -
7 -
8 -
9 -
10 -
11 -
12 -
13 GT10:CRC_START_OF_PKT[0]
14 GT10:CRC_START_OF_PKT[1]
15 GT10:CRC_START_OF_PKT[2]
16 GT10:CRC_START_OF_PKT[3]
17 GT10:CRC_START_OF_PKT[4]
18 GT10:CRC_START_OF_PKT[5]
19 GT10:CRC_START_OF_PKT[6]
20 GT10:CRC_START_OF_PKT[7]
21 -
22 -
23 -
24 -
25 -
26 -
27 -
28 -
29 -
30 -
31 -
32 -
33 -
34 -
35 -
36 GT10:TX_BUFFER_USE
37 GT10:TX_CRC_USE
38 GT10:TX_CRC_FORCE_VALUE[0]
39 GT10:TX_CRC_FORCE_VALUE[1]
40 GT10:TX_CRC_FORCE_VALUE[2]
41 GT10:TX_CRC_FORCE_VALUE[3]
42 GT10:TX_CRC_FORCE_VALUE[4]
43 GT10:TX_CRC_FORCE_VALUE[5]
44 GT10:TX_CRC_FORCE_VALUE[6]
45 GT10:TX_CRC_FORCE_VALUE[7]
46 -
47 -
48 -
49 -
50 -
51 -
52 -
53 -
54 -
55 -
56 -
57 -
58 -
59 -
60 -
61 -
62 -
63 -
64 -
65 -
66 -
67 -
68 -
69 -
70 GT10:CRC_END_OF_PKT[0]
71 GT10:CRC_END_OF_PKT[1]
72 GT10:CRC_END_OF_PKT[2]
73 GT10:CRC_END_OF_PKT[3]
74 GT10:ENABLE
75 GT10:CRC_END_OF_PKT[4]
76 GT10:CRC_END_OF_PKT[5]
77 GT10:CRC_END_OF_PKT[6]
GIGABIT10.T bittile 1
RowColumn
0
0 -
1 GT10:COMMA_10B_MASK[0]
2 GT10:COMMA_10B_MASK[1]
3 GT10:COMMA_10B_MASK[2]
4 GT10:COMMA_10B_MASK[3]
5 GT10:COMMA_10B_MASK[4]
6 GT10:COMMA_10B_MASK[5]
7 GT10:COMMA_10B_MASK[6]
8 GT10:COMMA_10B_MASK[7]
9 GT10:COMMA_10B_MASK[8]
10 GT10:COMMA_10B_MASK[9]
11 GT10:MCOMMA_10B_VALUE[0]
12 GT10:MCOMMA_10B_VALUE[1]
13 GT10:MCOMMA_10B_VALUE[2]
14 GT10:MCOMMA_10B_VALUE[3]
15 GT10:MCOMMA_10B_VALUE[4]
16 GT10:MCOMMA_10B_VALUE[5]
17 GT10:MCOMMA_10B_VALUE[6]
18 GT10:MCOMMA_10B_VALUE[7]
19 GT10:MCOMMA_10B_VALUE[8]
20 GT10:MCOMMA_10B_VALUE[9]
21 -
22 GT10:MCOMMA_DETECT
23 GT10:PCOMMA_10B_VALUE[0]
24 GT10:PCOMMA_10B_VALUE[1]
25 GT10:PCOMMA_10B_VALUE[2]
26 GT10:PCOMMA_10B_VALUE[3]
27 GT10:PCOMMA_10B_VALUE[4]
28 GT10:PCOMMA_10B_VALUE[5]
29 GT10:PCOMMA_10B_VALUE[6]
30 GT10:PCOMMA_10B_VALUE[7]
31 GT10:PCOMMA_10B_VALUE[8]
32 GT10:PCOMMA_10B_VALUE[9]
33 -
34 GT10:PCOMMA_DETECT
35 -
36 GT10:CLK_COR_SEQ_1_4[0]
37 GT10:CLK_COR_SEQ_1_4[1]
38 GT10:CLK_COR_SEQ_1_4[2]
39 GT10:CLK_COR_SEQ_1_4[3]
40 GT10:CLK_COR_SEQ_1_4[4]
41 GT10:CLK_COR_SEQ_1_4[5]
42 GT10:CLK_COR_SEQ_1_4[6]
43 GT10:CLK_COR_SEQ_1_4[7]
44 GT10:CLK_COR_SEQ_1_4[8]
45 GT10:CLK_COR_SEQ_1_4[9]
46 GT10:CLK_COR_SEQ_1_4[10]
47 GT10:CLK_COR_SEQ_1_3[0]
48 GT10:CLK_COR_SEQ_1_3[1]
49 GT10:CLK_COR_SEQ_1_3[2]
50 GT10:CLK_COR_SEQ_1_3[3]
51 GT10:CLK_COR_SEQ_1_3[4]
52 GT10:CLK_COR_SEQ_1_3[5]
53 GT10:CLK_COR_SEQ_1_3[6]
54 GT10:CLK_COR_SEQ_1_3[7]
55 GT10:CLK_COR_SEQ_1_3[8]
56 GT10:CLK_COR_SEQ_1_3[9]
57 GT10:CLK_COR_SEQ_1_3[10]
58 GT10:CLK_COR_SEQ_1_2[0]
59 GT10:CLK_COR_SEQ_1_2[1]
60 GT10:CLK_COR_SEQ_1_2[2]
61 GT10:CLK_COR_SEQ_1_2[3]
62 GT10:CLK_COR_SEQ_1_2[4]
63 GT10:CLK_COR_SEQ_1_2[5]
64 GT10:CLK_COR_SEQ_1_2[6]
65 GT10:CLK_COR_SEQ_1_2[7]
66 GT10:CLK_COR_SEQ_1_2[8]
67 GT10:CLK_COR_SEQ_1_2[9]
68 GT10:CLK_COR_SEQ_1_2[10]
69 GT10:CLK_COR_SEQ_1_1[0]
70 GT10:CLK_COR_SEQ_1_1[1]
71 GT10:CLK_COR_SEQ_1_1[2]
72 GT10:CLK_COR_SEQ_1_1[3]
73 GT10:CLK_COR_SEQ_1_1[4]
74 GT10:CLK_COR_SEQ_1_1[5]
75 GT10:CLK_COR_SEQ_1_1[6]
76 GT10:CLK_COR_SEQ_1_1[7]
77 GT10:CLK_COR_SEQ_1_1[8]
78 GT10:CLK_COR_SEQ_1_1[9]
79 GT10:CLK_COR_SEQ_1_1[10]
GIGABIT10.T bittile 2
RowColumn
0
0 -
1 -
2 GT10:CHAN_BOND_MODE[0]
3 -
4 GT10:CHAN_BOND_MODE[1]
5 -
6 -
7 -
8 -
9 -
10 GT10:CLK_CORRECT_USE
11 GT10:CLK_COR_INSERT_IDLE_FLAG
12 GT10:CLK_COR_KEEP_IDLE
13 GT10:CLK_COR_REPEAT_WAIT[0]
14 GT10:CLK_COR_REPEAT_WAIT[1]
15 GT10:CLK_COR_REPEAT_WAIT[2]
16 GT10:CLK_COR_REPEAT_WAIT[3]
17 GT10:CLK_COR_REPEAT_WAIT[4]
18 -
19 -
20 -
21 -
22 -
23 GT10:CHAN_BOND_ONE_SHOT
24 -
25 GT10:RX_BUFFER_USE
26 -
27 -
28 -
29 -
30 GT10:DEC_VALID_COMMA_ONLY
31 GT10:DEC_PCOMMA_DETECT
32 GT10:DEC_MCOMMA_DETECT
33 -
34 -
35 GT10:CLK_COR_SEQ_2_USE
36 GT10:CLK_COR_SEQ_2_4[0]
37 GT10:CLK_COR_SEQ_2_4[1]
38 GT10:CLK_COR_SEQ_2_4[2]
39 GT10:CLK_COR_SEQ_2_4[3]
40 GT10:CLK_COR_SEQ_2_4[4]
41 GT10:CLK_COR_SEQ_2_4[5]
42 GT10:CLK_COR_SEQ_2_4[6]
43 GT10:CLK_COR_SEQ_2_4[7]
44 GT10:CLK_COR_SEQ_2_4[8]
45 GT10:CLK_COR_SEQ_2_4[9]
46 GT10:CLK_COR_SEQ_2_4[10]
47 GT10:CLK_COR_SEQ_2_3[0]
48 GT10:CLK_COR_SEQ_2_3[1]
49 GT10:CLK_COR_SEQ_2_3[2]
50 GT10:CLK_COR_SEQ_2_3[3]
51 GT10:CLK_COR_SEQ_2_3[4]
52 GT10:CLK_COR_SEQ_2_3[5]
53 GT10:CLK_COR_SEQ_2_3[6]
54 GT10:CLK_COR_SEQ_2_3[7]
55 GT10:CLK_COR_SEQ_2_3[8]
56 GT10:CLK_COR_SEQ_2_3[9]
57 GT10:CLK_COR_SEQ_2_3[10]
58 GT10:CLK_COR_SEQ_2_2[0]
59 GT10:CLK_COR_SEQ_2_2[1]
60 GT10:CLK_COR_SEQ_2_2[2]
61 GT10:CLK_COR_SEQ_2_2[3]
62 GT10:CLK_COR_SEQ_2_2[4]
63 GT10:CLK_COR_SEQ_2_2[5]
64 GT10:CLK_COR_SEQ_2_2[6]
65 GT10:CLK_COR_SEQ_2_2[7]
66 GT10:CLK_COR_SEQ_2_2[8]
67 GT10:CLK_COR_SEQ_2_2[9]
68 GT10:CLK_COR_SEQ_2_2[10]
69 GT10:CLK_COR_SEQ_2_1[0]
70 GT10:CLK_COR_SEQ_2_1[1]
71 GT10:CLK_COR_SEQ_2_1[2]
72 GT10:CLK_COR_SEQ_2_1[3]
73 GT10:CLK_COR_SEQ_2_1[4]
74 GT10:CLK_COR_SEQ_2_1[5]
75 GT10:CLK_COR_SEQ_2_1[6]
76 GT10:CLK_COR_SEQ_2_1[7]
77 GT10:CLK_COR_SEQ_2_1[8]
78 GT10:CLK_COR_SEQ_2_1[9]
79 GT10:CLK_COR_SEQ_2_1[10]
GIGABIT10.T bittile 3
RowColumn
0
0 -
1 -
2 -
3 -
4 -
5 -
6 -
7 -
8 -
9 -
10 -
11 GT10:TEST_MODE_1
12 GT10:TEST_MODE_2
13 GT10:TEST_MODE_3
14 GT10:TEST_MODE_4
15 GT10:TEST_MODE_5
16 GT10:TEST_MODE_6
17 -
18 -
19 -
20 -
21 -
22 GT10:CLK_COR_SEQ_LEN[0]
23 GT10:CLK_COR_SEQ_LEN[1]
24 GT10:CLK_COR_SEQ_LEN[2]
25 -
26 GT10:CHAN_BOND_SEQ_LEN[0]
27 GT10:CHAN_BOND_SEQ_LEN[1]
28 GT10:CHAN_BOND_SEQ_LEN[2]
29 -
30 -
31 -
32 -
33 -
34 -
35 GT10:RX_CRC_USE
36 GT10:CHAN_BOND_SEQ_1_4[0]
37 GT10:CHAN_BOND_SEQ_1_4[1]
38 GT10:CHAN_BOND_SEQ_1_4[2]
39 GT10:CHAN_BOND_SEQ_1_4[3]
40 GT10:CHAN_BOND_SEQ_1_4[4]
41 GT10:CHAN_BOND_SEQ_1_4[5]
42 GT10:CHAN_BOND_SEQ_1_4[6]
43 GT10:CHAN_BOND_SEQ_1_4[7]
44 GT10:CHAN_BOND_SEQ_1_4[8]
45 GT10:CHAN_BOND_SEQ_1_4[9]
46 GT10:CHAN_BOND_SEQ_1_4[10]
47 GT10:CHAN_BOND_SEQ_1_3[0]
48 GT10:CHAN_BOND_SEQ_1_3[1]
49 GT10:CHAN_BOND_SEQ_1_3[2]
50 GT10:CHAN_BOND_SEQ_1_3[3]
51 GT10:CHAN_BOND_SEQ_1_3[4]
52 GT10:CHAN_BOND_SEQ_1_3[5]
53 GT10:CHAN_BOND_SEQ_1_3[6]
54 GT10:CHAN_BOND_SEQ_1_3[7]
55 GT10:CHAN_BOND_SEQ_1_3[8]
56 GT10:CHAN_BOND_SEQ_1_3[9]
57 GT10:CHAN_BOND_SEQ_1_3[10]
58 GT10:CHAN_BOND_SEQ_1_2[0]
59 GT10:CHAN_BOND_SEQ_1_2[1]
60 GT10:CHAN_BOND_SEQ_1_2[2]
61 GT10:CHAN_BOND_SEQ_1_2[3]
62 GT10:CHAN_BOND_SEQ_1_2[4]
63 GT10:CHAN_BOND_SEQ_1_2[5]
64 GT10:CHAN_BOND_SEQ_1_2[6]
65 GT10:CHAN_BOND_SEQ_1_2[7]
66 GT10:CHAN_BOND_SEQ_1_2[8]
67 GT10:CHAN_BOND_SEQ_1_2[9]
68 GT10:CHAN_BOND_SEQ_1_2[10]
69 GT10:CHAN_BOND_SEQ_1_1[0]
70 GT10:CHAN_BOND_SEQ_1_1[1]
71 GT10:CHAN_BOND_SEQ_1_1[2]
72 GT10:CHAN_BOND_SEQ_1_1[3]
73 GT10:CHAN_BOND_SEQ_1_1[4]
74 GT10:CHAN_BOND_SEQ_1_1[5]
75 GT10:CHAN_BOND_SEQ_1_1[6]
76 GT10:CHAN_BOND_SEQ_1_1[7]
77 GT10:CHAN_BOND_SEQ_1_1[8]
78 GT10:CHAN_BOND_SEQ_1_1[9]
79 GT10:CHAN_BOND_SEQ_1_1[10]
GIGABIT10.T bittile 4
RowColumn
0
0 -
1 -
2 -
3 -
4 -
5 -
6 -
7 -
8 GT10:RX_LOS_THRESHOLD[0]
9 GT10:RX_LOS_THRESHOLD[1]
10 GT10:RX_LOS_THRESHOLD[2]
11 GT10:RX_LOS_THRESHOLD[3]
12 GT10:RX_LOS_THRESHOLD[4]
13 GT10:RX_LOS_THRESHOLD[5]
14 GT10:RX_LOS_THRESHOLD[6]
15 GT10:RX_LOS_THRESHOLD[7]
16 GT10:RX_LOS_INVALID_INCR[0]
17 GT10:RX_LOS_INVALID_INCR[1]
18 GT10:RX_LOS_INVALID_INCR[2]
19 GT10:RX_LOS_INVALID_INCR[3]
20 GT10:RX_LOS_INVALID_INCR[4]
21 GT10:RX_LOS_INVALID_INCR[5]
22 GT10:RX_LOS_INVALID_INCR[6]
23 GT10:RX_LOSS_OF_SYNC_FSM
24 GT10:CHAN_BOND_LIMIT[0]
25 GT10:CHAN_BOND_LIMIT[1]
26 GT10:CHAN_BOND_LIMIT[2]
27 GT10:CHAN_BOND_LIMIT[3]
28 GT10:CHAN_BOND_LIMIT[4]
29 -
30 GT10:RX_LOS_INVALID_INCR[7]
31 -
32 -
33 -
34 -
35 GT10:CHAN_BOND_SEQ_2_USE
36 GT10:CHAN_BOND_SEQ_2_4[0]
37 GT10:CHAN_BOND_SEQ_2_4[1]
38 GT10:CHAN_BOND_SEQ_2_4[2]
39 GT10:CHAN_BOND_SEQ_2_4[3]
40 GT10:CHAN_BOND_SEQ_2_4[4]
41 GT10:CHAN_BOND_SEQ_2_4[5]
42 GT10:CHAN_BOND_SEQ_2_4[6]
43 GT10:CHAN_BOND_SEQ_2_4[7]
44 GT10:CHAN_BOND_SEQ_2_4[8]
45 GT10:CHAN_BOND_SEQ_2_4[9]
46 GT10:CHAN_BOND_SEQ_2_4[10]
47 GT10:CHAN_BOND_SEQ_2_3[0]
48 GT10:CHAN_BOND_SEQ_2_3[1]
49 GT10:CHAN_BOND_SEQ_2_3[2]
50 GT10:CHAN_BOND_SEQ_2_3[3]
51 GT10:CHAN_BOND_SEQ_2_3[4]
52 GT10:CHAN_BOND_SEQ_2_3[5]
53 GT10:CHAN_BOND_SEQ_2_3[6]
54 GT10:CHAN_BOND_SEQ_2_3[7]
55 GT10:CHAN_BOND_SEQ_2_3[8]
56 GT10:CHAN_BOND_SEQ_2_3[9]
57 GT10:CHAN_BOND_SEQ_2_3[10]
58 GT10:CHAN_BOND_SEQ_2_2[0]
59 GT10:CHAN_BOND_SEQ_2_2[1]
60 GT10:CHAN_BOND_SEQ_2_2[2]
61 GT10:CHAN_BOND_SEQ_2_2[3]
62 GT10:CHAN_BOND_SEQ_2_2[4]
63 GT10:CHAN_BOND_SEQ_2_2[5]
64 GT10:CHAN_BOND_SEQ_2_2[6]
65 GT10:CHAN_BOND_SEQ_2_2[7]
66 GT10:CHAN_BOND_SEQ_2_2[8]
67 GT10:CHAN_BOND_SEQ_2_2[9]
68 GT10:CHAN_BOND_SEQ_2_2[10]
69 GT10:CHAN_BOND_SEQ_2_1[0]
70 GT10:CHAN_BOND_SEQ_2_1[1]
71 GT10:CHAN_BOND_SEQ_2_1[2]
72 GT10:CHAN_BOND_SEQ_2_1[3]
73 GT10:CHAN_BOND_SEQ_2_1[4]
74 GT10:CHAN_BOND_SEQ_2_1[5]
75 GT10:CHAN_BOND_SEQ_2_1[6]
76 GT10:CHAN_BOND_SEQ_2_1[7]
77 GT10:CHAN_BOND_SEQ_2_1[8]
78 GT10:CHAN_BOND_SEQ_2_1[9]
79 GT10:CHAN_BOND_SEQ_2_1[10]
GIGABIT10.T bittile 5
RowColumn
0
0 GT10:ALIGN_COMMA_WORD[0]
1 GT10:ALIGN_COMMA_WORD[1]
2 -
3 GT10:CHAN_BOND_SEQ_1_MASK[0]
4 GT10:CHAN_BOND_SEQ_1_MASK[1]
5 GT10:CHAN_BOND_SEQ_1_MASK[2]
6 GT10:CHAN_BOND_SEQ_1_MASK[3]
7 -
8 GT10:CHAN_BOND_SEQ_2_MASK[0]
9 GT10:CHAN_BOND_SEQ_2_MASK[1]
10 GT10:CHAN_BOND_SEQ_2_MASK[2]
11 GT10:CHAN_BOND_SEQ_2_MASK[3]
12 -
13 GT10:CLK_COR_ADJ_MAX[0]
14 GT10:CLK_COR_ADJ_MAX[1]
15 GT10:CLK_COR_ADJ_MAX[2]
16 GT10:CLK_COR_ADJ_MAX[3]
17 GT10:CLK_COR_ADJ_MAX[4]
18 -
19 GT10:CLK_COR_MIN_LAT[0]
20 GT10:CLK_COR_MIN_LAT[1]
21 GT10:CLK_COR_MIN_LAT[2]
22 GT10:CLK_COR_MIN_LAT[3]
23 GT10:CLK_COR_MIN_LAT[4]
24 GT10:CLK_COR_MIN_LAT[5]
25 GT10:CLK_COR_MAX_LAT[0]
26 GT10:CLK_COR_MAX_LAT[1]
27 GT10:CLK_COR_MAX_LAT[2]
28 GT10:CLK_COR_MAX_LAT[3]
29 GT10:CLK_COR_MAX_LAT[4]
30 GT10:CLK_COR_MAX_LAT[5]
31 -
32 GT10:CLK_COR_8B10B_DE
33 GT10:CHAN_BOND_64B66B_SV
34 -
35 -
36 -
37 -
38 -
39 -
40 -
41 -
42 -
43 -
44 -
45 -
46 -
47 -
48 -
49 -
50 GT10:PMA_PWR_CNTRL[0]
51 GT10:PMA_PWR_CNTRL[1]
52 GT10:PMA_PWR_CNTRL[2]
53 GT10:PMA_PWR_CNTRL[3]
54 GT10:PMA_PWR_CNTRL[4]
55 GT10:PMA_PWR_CNTRL[5]
56 GT10:PMA_PWR_CNTRL[6]
57 GT10:PMA_PWR_CNTRL[7]
GIGABIT10.T bittile 6
RowColumn
0
0 -
1 -
2 GT10:CLK_COR_SEQ_1_MASK[0]
3 -
4 GT10:CLK_COR_SEQ_1_MASK[1]
5 GT10:CLK_COR_SEQ_1_MASK[2]
6 GT10:CLK_COR_SEQ_1_MASK[3]
7 -
8 GT10:CLK_COR_SEQ_2_MASK[0]
9 GT10:CLK_COR_SEQ_2_MASK[1]
10 GT10:CLK_COR_SEQ_2_MASK[2]
11 GT10:CLK_COR_SEQ_2_MASK[3]
12 -
13 GT10:CLK_COR_SEQ_DROP
14 -
15 -
16 -
17 -
18 -
19 -
20 -
21 -
22 -
23 -
24 -
25 -
26 -
27 -
28 -
29 -
30 -
31 -
32 -
33 -
34 -
35 -
36 -
37 -
38 -
39 -
40 GT10:PMA_SPEED[0]
41 GT10:PMA_SPEED[1]
42 GT10:PMA_SPEED[2]
43 GT10:PMA_SPEED[3]
44 GT10:PMA_SPEED[4]
45 GT10:PMA_SPEED[5]
46 GT10:PMA_SPEED[6]
47 GT10:PMA_SPEED[7]
48 GT10:PMA_SPEED[8]
49 GT10:PMA_SPEED[9]
50 GT10:PMA_SPEED[10]
51 GT10:PMA_SPEED[11]
52 GT10:PMA_SPEED[12]
53 GT10:PMA_SPEED[13]
54 GT10:PMA_SPEED[14]
55 GT10:PMA_SPEED[15]
56 GT10:PMA_SPEED[16]
57 GT10:PMA_SPEED[17]
58 GT10:PMA_SPEED[18]
59 GT10:PMA_SPEED[19]
60 GT10:PMA_SPEED[20]
61 GT10:PMA_SPEED[21]
62 GT10:PMA_SPEED[22]
63 GT10:PMA_SPEED[23]
64 GT10:PMA_SPEED[24]
65 GT10:PMA_SPEED[25]
66 GT10:PMA_SPEED[26]
67 GT10:PMA_SPEED[27]
68 GT10:PMA_SPEED[28]
69 GT10:PMA_SPEED[29]
70 GT10:PMA_SPEED[30]
71 GT10:PMA_SPEED[31]
72 GT10:PMA_SPEED[32]
73 GT10:PMA_SPEED[33]
74 GT10:PMA_SPEED[34]
75 GT10:PMA_SPEED[35]
76 GT10:PMA_SPEED[36]
77 GT10:PMA_SPEED[37]
78 GT10:PMA_SPEED[38]
79 GT10:PMA_SPEED[39]
GIGABIT10.T bittile 7
RowColumn
0
0 GT10:PMA_SPEED[40]
1 GT10:PMA_SPEED[41]
2 GT10:PMA_SPEED[42]
3 -
4 GT10:PMA_SPEED[44]
5 GT10:PMA_SPEED[45]
6 GT10:PMA_SPEED[46]
7 GT10:PMA_SPEED[47]
8 GT10:PMA_SPEED[48]
9 GT10:PMA_SPEED[49]
10 GT10:PMA_SPEED[50]
11 GT10:PMA_SPEED[51]
12 GT10:PMA_SPEED[52]
13 GT10:PMA_SPEED[53]
14 GT10:PMA_SPEED[54]
15 GT10:PMA_SPEED[55]
16 GT10:PMA_SPEED[56]
17 GT10:PMA_SPEED[57]
18 GT10:PMA_SPEED[58]
19 GT10:PMA_SPEED[59]
20 GT10:PMA_SPEED[60]
21 GT10:PMA_SPEED[61]
22 GT10:PMA_SPEED[62]
23 GT10:PMA_SPEED[63]
24 GT10:PMA_SPEED[64]
25 GT10:PMA_SPEED[65]
26 GT10:PMA_SPEED[66]
27 GT10:PMA_SPEED[67]
28 GT10:PMA_SPEED[68]
29 GT10:PMA_SPEED[69]
30 GT10:PMA_SPEED[70]
31 GT10:PMA_SPEED[71]
32 GT10:PMA_SPEED[72]
33 GT10:PMA_SPEED[73]
34 GT10:PMA_SPEED[74]
35 GT10:PMA_SPEED[75]
36 GT10:PMA_SPEED[76]
37 GT10:PMA_SPEED[77]
38 GT10:PMA_SPEED[78]
39 GT10:PMA_SPEED[79]
40 GT10:PMA_SPEED[80]
41 GT10:PMA_SPEED[81]
42 GT10:PMA_SPEED[82]
43 GT10:PMA_SPEED[83]
44 GT10:PMA_SPEED[84]
45 GT10:PMA_SPEED[85]
46 GT10:PMA_SPEED[86]
47 GT10:PMA_SPEED[87]
48 GT10:PMA_SPEED[88]
49 GT10:PMA_SPEED[89]
50 GT10:PMA_SPEED[90]
51 GT10:PMA_SPEED[91]
52 GT10:PMA_SPEED[92]
53 GT10:PMA_SPEED[93]
54 GT10:PMA_SPEED[94]
55 GT10:PMA_SPEED[95]
56 GT10:PMA_SPEED[96]
57 GT10:PMA_SPEED[97]
58 GT10:PMA_SPEED[98]
59 GT10:PMA_SPEED[99]
60 GT10:PMA_SPEED[100]
61 GT10:PMA_SPEED[101]
62 GT10:PMA_SPEED[102]
63 GT10:PMA_SPEED[103]
64 GT10:PMA_SPEED[104]
65 GT10:PMA_SPEED[105]
66 GT10:PMA_SPEED[106]
67 GT10:PMA_SPEED[107]
68 GT10:PMA_SPEED[108]
69 GT10:PMA_SPEED[109]
70 GT10:PMA_SPEED[110]
71 GT10:PMA_SPEED[111]
72 GT10:PMA_SPEED[112]
73 GT10:PMA_SPEED[113]
74 GT10:PMA_SPEED[114]
75 GT10:PMA_SPEED[115]
76 GT10:PMA_SPEED[116]
77 GT10:PMA_SPEED[117]
78 GT10:PMA_SPEED[118]
79 GT10:PMA_SPEED[119]
GIGABIT10.T bittile 8
RowColumn
0
0 -
1 -
2 GT10:PMA_SPEED[43]
3 -
4 -
5 -
6 -
7 -
8 -
9 -
10 -
11 -
12 -
13 -
14 -
15 GT10:SH_CNT_MAX[0]
16 GT10:SH_CNT_MAX[1]
17 GT10:SH_CNT_MAX[2]
18 GT10:SH_CNT_MAX[3]
19 GT10:SH_CNT_MAX[4]
20 GT10:SH_CNT_MAX[5]
21 GT10:SH_CNT_MAX[6]
22 GT10:SH_CNT_MAX[7]
23 GT10:SH_INVALID_CNT_MAX[0]
24 GT10:SH_INVALID_CNT_MAX[1]
25 GT10:SH_INVALID_CNT_MAX[2]
26 GT10:SH_INVALID_CNT_MAX[3]
27 GT10:SH_INVALID_CNT_MAX[4]
28 GT10:SH_INVALID_CNT_MAX[5]
29 GT10:SH_INVALID_CNT_MAX[6]
30 GT10:SH_INVALID_CNT_MAX[7]
GT10:CRC_FORMAT[0, 0, 4][0, 0, 3]
USER_MODE00
ETHERNET01
FIBRE_CHAN10
INFINIBAND11
GT10:CRC_START_OF_PKT[0, 0, 20][0, 0, 19][0, 0, 18][0, 0, 17][0, 0, 16][0, 0, 15][0, 0, 14][0, 0, 13]
K28_000011100
K28_100111100
K28_201011100
K28_301111100
K28_410011100
K28_510111100
K28_611011100
K23_711110111
K27_711111011
K28_711111100
K29_711111101
K30_711111110
GT10:CHAN_BOND_64B66B_SV[5, 0, 33]
GT10:CHAN_BOND_ONE_SHOT[2, 0, 23]
GT10:CHAN_BOND_SEQ_2_USE[4, 0, 35]
GT10:CLK_CORRECT_USE[2, 0, 10]
GT10:CLK_COR_8B10B_DE[5, 0, 32]
GT10:CLK_COR_INSERT_IDLE_FLAG[2, 0, 11]
GT10:CLK_COR_KEEP_IDLE[2, 0, 12]
GT10:CLK_COR_SEQ_2_USE[2, 0, 35]
GT10:CLK_COR_SEQ_DROP[6, 0, 13]
GT10:DEC_MCOMMA_DETECT[2, 0, 32]
GT10:DEC_PCOMMA_DETECT[2, 0, 31]
GT10:DEC_VALID_COMMA_ONLY[2, 0, 30]
GT10:ENABLE[0, 0, 74]
GT10:MCOMMA_DETECT[1, 0, 22]
GT10:PCOMMA_DETECT[1, 0, 34]
GT10:RX_BUFFER_USE[2, 0, 25]
GT10:RX_CRC_USE[3, 0, 35]
GT10:RX_LOSS_OF_SYNC_FSM[4, 0, 23]
GT10:TEST_MODE_1[3, 0, 11]
GT10:TEST_MODE_2[3, 0, 12]
GT10:TEST_MODE_3[3, 0, 13]
GT10:TEST_MODE_4[3, 0, 14]
GT10:TEST_MODE_5[3, 0, 15]
GT10:TEST_MODE_6[3, 0, 16]
GT10:TX_BUFFER_USE[0, 0, 36]
GT10:TX_CRC_USE[0, 0, 37]
Non-inverted[0]
GT10:PMA_PWR_CNTRL[5, 0, 57][5, 0, 56][5, 0, 55][5, 0, 54][5, 0, 53][5, 0, 52][5, 0, 51][5, 0, 50]
GT10:SH_CNT_MAX[8, 0, 22][8, 0, 21][8, 0, 20][8, 0, 19][8, 0, 18][8, 0, 17][8, 0, 16][8, 0, 15]
GT10:SH_INVALID_CNT_MAX[8, 0, 30][8, 0, 29][8, 0, 28][8, 0, 27][8, 0, 26][8, 0, 25][8, 0, 24][8, 0, 23]
GT10:TX_CRC_FORCE_VALUE[0, 0, 45][0, 0, 44][0, 0, 43][0, 0, 42][0, 0, 41][0, 0, 40][0, 0, 39][0, 0, 38]
Non-inverted[7][6][5][4][3][2][1][0]
GT10:CRC_END_OF_PKT[0, 0, 77][0, 0, 76][0, 0, 75][0, 0, 73][0, 0, 72][0, 0, 71][0, 0, 70]
K28_00001100
K28_10011100
K28_20101100
K28_30111100
K28_41001100
K28_51011100
K28_61101100
K23_71110111
K27_71111011
K28_71111100
K29_71111101
K30_71111110
GT10:COMMA_10B_MASK[1, 0, 10][1, 0, 9][1, 0, 8][1, 0, 7][1, 0, 6][1, 0, 5][1, 0, 4][1, 0, 3][1, 0, 2][1, 0, 1]
GT10:MCOMMA_10B_VALUE[1, 0, 20][1, 0, 19][1, 0, 18][1, 0, 17][1, 0, 16][1, 0, 15][1, 0, 14][1, 0, 13][1, 0, 12][1, 0, 11]
GT10:PCOMMA_10B_VALUE[1, 0, 32][1, 0, 31][1, 0, 30][1, 0, 29][1, 0, 28][1, 0, 27][1, 0, 26][1, 0, 25][1, 0, 24][1, 0, 23]
Non-inverted[9][8][7][6][5][4][3][2][1][0]
GT10:CHAN_BOND_SEQ_1_1[3, 0, 79][3, 0, 78][3, 0, 77][3, 0, 76][3, 0, 75][3, 0, 74][3, 0, 73][3, 0, 72][3, 0, 71][3, 0, 70][3, 0, 69]
GT10:CHAN_BOND_SEQ_1_2[3, 0, 68][3, 0, 67][3, 0, 66][3, 0, 65][3, 0, 64][3, 0, 63][3, 0, 62][3, 0, 61][3, 0, 60][3, 0, 59][3, 0, 58]
GT10:CHAN_BOND_SEQ_1_3[3, 0, 57][3, 0, 56][3, 0, 55][3, 0, 54][3, 0, 53][3, 0, 52][3, 0, 51][3, 0, 50][3, 0, 49][3, 0, 48][3, 0, 47]
GT10:CHAN_BOND_SEQ_1_4[3, 0, 46][3, 0, 45][3, 0, 44][3, 0, 43][3, 0, 42][3, 0, 41][3, 0, 40][3, 0, 39][3, 0, 38][3, 0, 37][3, 0, 36]
GT10:CHAN_BOND_SEQ_2_1[4, 0, 79][4, 0, 78][4, 0, 77][4, 0, 76][4, 0, 75][4, 0, 74][4, 0, 73][4, 0, 72][4, 0, 71][4, 0, 70][4, 0, 69]
GT10:CHAN_BOND_SEQ_2_2[4, 0, 68][4, 0, 67][4, 0, 66][4, 0, 65][4, 0, 64][4, 0, 63][4, 0, 62][4, 0, 61][4, 0, 60][4, 0, 59][4, 0, 58]
GT10:CHAN_BOND_SEQ_2_3[4, 0, 57][4, 0, 56][4, 0, 55][4, 0, 54][4, 0, 53][4, 0, 52][4, 0, 51][4, 0, 50][4, 0, 49][4, 0, 48][4, 0, 47]
GT10:CHAN_BOND_SEQ_2_4[4, 0, 46][4, 0, 45][4, 0, 44][4, 0, 43][4, 0, 42][4, 0, 41][4, 0, 40][4, 0, 39][4, 0, 38][4, 0, 37][4, 0, 36]
GT10:CLK_COR_SEQ_1_1[1, 0, 79][1, 0, 78][1, 0, 77][1, 0, 76][1, 0, 75][1, 0, 74][1, 0, 73][1, 0, 72][1, 0, 71][1, 0, 70][1, 0, 69]
GT10:CLK_COR_SEQ_1_2[1, 0, 68][1, 0, 67][1, 0, 66][1, 0, 65][1, 0, 64][1, 0, 63][1, 0, 62][1, 0, 61][1, 0, 60][1, 0, 59][1, 0, 58]
GT10:CLK_COR_SEQ_1_3[1, 0, 57][1, 0, 56][1, 0, 55][1, 0, 54][1, 0, 53][1, 0, 52][1, 0, 51][1, 0, 50][1, 0, 49][1, 0, 48][1, 0, 47]
GT10:CLK_COR_SEQ_1_4[1, 0, 46][1, 0, 45][1, 0, 44][1, 0, 43][1, 0, 42][1, 0, 41][1, 0, 40][1, 0, 39][1, 0, 38][1, 0, 37][1, 0, 36]
GT10:CLK_COR_SEQ_2_1[2, 0, 79][2, 0, 78][2, 0, 77][2, 0, 76][2, 0, 75][2, 0, 74][2, 0, 73][2, 0, 72][2, 0, 71][2, 0, 70][2, 0, 69]
GT10:CLK_COR_SEQ_2_2[2, 0, 68][2, 0, 67][2, 0, 66][2, 0, 65][2, 0, 64][2, 0, 63][2, 0, 62][2, 0, 61][2, 0, 60][2, 0, 59][2, 0, 58]
GT10:CLK_COR_SEQ_2_3[2, 0, 57][2, 0, 56][2, 0, 55][2, 0, 54][2, 0, 53][2, 0, 52][2, 0, 51][2, 0, 50][2, 0, 49][2, 0, 48][2, 0, 47]
GT10:CLK_COR_SEQ_2_4[2, 0, 46][2, 0, 45][2, 0, 44][2, 0, 43][2, 0, 42][2, 0, 41][2, 0, 40][2, 0, 39][2, 0, 38][2, 0, 37][2, 0, 36]
Non-inverted[10][9][8][7][6][5][4][3][2][1][0]
GT10:CHAN_BOND_MODE[2, 0, 4][2, 0, 2]
NONE00
MASTER01
SLAVE_1_HOP10
SLAVE_2_HOPS11
GT10:CHAN_BOND_LIMIT[4, 0, 28][4, 0, 27][4, 0, 26][4, 0, 25][4, 0, 24]
GT10:CLK_COR_ADJ_MAX[5, 0, 17][5, 0, 16][5, 0, 15][5, 0, 14][5, 0, 13]
GT10:CLK_COR_REPEAT_WAIT[2, 0, 17][2, 0, 16][2, 0, 15][2, 0, 14][2, 0, 13]
Non-inverted[4][3][2][1][0]
GT10:CHAN_BOND_SEQ_LEN[3, 0, 28][3, 0, 27][3, 0, 26]
GT10:CLK_COR_SEQ_LEN[3, 0, 24][3, 0, 23][3, 0, 22]
1000
2001
3010
4011
8111
GT10:RX_LOS_THRESHOLD[4, 0, 15][4, 0, 14][4, 0, 13][4, 0, 12][4, 0, 11][4, 0, 10][4, 0, 9][4, 0, 8]
400000001
800000010
1600000100
3200001000
6400010000
12800100000
25601000000
51210000000
GT10:RX_LOS_INVALID_INCR[4, 0, 30][4, 0, 22][4, 0, 21][4, 0, 20][4, 0, 19][4, 0, 18][4, 0, 17][4, 0, 16]
100000001
200000010
400000100
800001000
1600010000
3200100000
6401000000
12810000000
GT10:ALIGN_COMMA_WORD[5, 0, 1][5, 0, 0]
100
201
410
GT10:CHAN_BOND_SEQ_1_MASK[5, 0, 6][5, 0, 5][5, 0, 4][5, 0, 3]
GT10:CHAN_BOND_SEQ_2_MASK[5, 0, 11][5, 0, 10][5, 0, 9][5, 0, 8]
GT10:CLK_COR_SEQ_1_MASK[6, 0, 6][6, 0, 5][6, 0, 4][6, 0, 2]
GT10:CLK_COR_SEQ_2_MASK[6, 0, 11][6, 0, 10][6, 0, 9][6, 0, 8]
Non-inverted[3][2][1][0]
GT10:CLK_COR_MAX_LAT[5, 0, 30][5, 0, 29][5, 0, 28][5, 0, 27][5, 0, 26][5, 0, 25]
GT10:CLK_COR_MIN_LAT[5, 0, 24][5, 0, 23][5, 0, 22][5, 0, 21][5, 0, 20][5, 0, 19]
Non-inverted[5][4][3][2][1][0]
GT10:PMA_SPEED[7, 0, 79][7, 0, 78][7, 0, 77][7, 0, 76][7, 0, 75][7, 0, 74][7, 0, 73][7, 0, 72][7, 0, 71][7, 0, 70][7, 0, 69][7, 0, 68][7, 0, 67][7, 0, 66][7, 0, 65][7, 0, 64][7, 0, 63][7, 0, 62][7, 0, 61][7, 0, 60][7, 0, 59][7, 0, 58][7, 0, 57][7, 0, 56][7, 0, 55][7, 0, 54][7, 0, 53][7, 0, 52][7, 0, 51][7, 0, 50][7, 0, 49][7, 0, 48][7, 0, 47][7, 0, 46][7, 0, 45][7, 0, 44][7, 0, 43][7, 0, 42][7, 0, 41][7, 0, 40][7, 0, 39][7, 0, 38][7, 0, 37][7, 0, 36][7, 0, 35][7, 0, 34][7, 0, 33][7, 0, 32][7, 0, 31][7, 0, 30][7, 0, 29][7, 0, 28][7, 0, 27][7, 0, 26][7, 0, 25][7, 0, 24][7, 0, 23][7, 0, 22][7, 0, 21][7, 0, 20][7, 0, 19][7, 0, 18][7, 0, 17][7, 0, 16][7, 0, 15][7, 0, 14][7, 0, 13][7, 0, 12][7, 0, 11][7, 0, 10][7, 0, 9][7, 0, 8][7, 0, 7][7, 0, 6][7, 0, 5][7, 0, 4][8, 0, 2][7, 0, 2][7, 0, 1][7, 0, 0][6, 0, 79][6, 0, 78][6, 0, 77][6, 0, 76][6, 0, 75][6, 0, 74][6, 0, 73][6, 0, 72][6, 0, 71][6, 0, 70][6, 0, 69][6, 0, 68][6, 0, 67][6, 0, 66][6, 0, 65][6, 0, 64][6, 0, 63][6, 0, 62][6, 0, 61][6, 0, 60][6, 0, 59][6, 0, 58][6, 0, 57][6, 0, 56][6, 0, 55][6, 0, 54][6, 0, 53][6, 0, 52][6, 0, 51][6, 0, 50][6, 0, 49][6, 0, 48][6, 0, 47][6, 0, 46][6, 0, 45][6, 0, 44][6, 0, 43][6, 0, 42][6, 0, 41][6, 0, 40]
Non-inverted[119][118][117][116][115][114][113][112][111][110][109][108][107][106][105][104][103][102][101][100][99][98][97][96][95][94][93][92][91][90][89][88][87][86][85][84][83][82][81][80][79][78][77][76][75][74][73][72][71][70][69][68][67][66][65][64][63][62][61][60][59][58][57][56][55][54][53][52][51][50][49][48][47][46][45][44][43][42][41][40][39][38][37][36][35][34][33][32][31][30][29][28][27][26][25][24][23][22][21][20][19][18][17][16][15][14][13][12][11][10][9][8][7][6][5][4][3][2][1][0]

PMA_SPEED values

NameGT10:PMA_SPEED
[119][118][117][116][115][114][113][112][111][110][109][108][107][106][105][104][103][102][101][100][99][98][97][96][95][94][93][92][91][90][89][88][87][86][85][84][83][82][81][80][79][78][77][76][75][74][73][72][71][70][69][68][67][66][65][64][63][62][61][60][59][58][57][56][55][54][53][52][51][50][49][48][47][46][45][44][43][42][41][40][39][38][37][36][35][34][33][32][31][30][29][28][27][26][25][24][23][22][21][20][19][18][17][16][15][14][13][12][11][10][9][8][7][6][5][4][3][2][1][0]
0_32000000001111111111001101010100001100101000010101000001001101000000000010000010001100100100000101000011010100000001101000
0_64000000001111111111001101010100001100101000010101000001001101000000000010000010001100100100000101000011010100000001101000
10_32000000001111111111001101010101001100101000010101000001001101100000000010000010001100100100000010000011010100100001101000
10_64000000001111111111001101010101001100101000010101000001001101100000000010000010001100100100000010000011010100100001101000
11_32000000001111111111001101010101001100101000010101000001001101100100000010000010001100100100000010000011010100100101101000
11_64000000001111111111001101010101001100101000010101000001001101100100000010000010001100100100000010000011010100100101101000
12_40000000001111111111001101010100001100101000010101000001101110001000000010000010001100100100000101000011011010001001101000
12_80000000001111111111001101010100001100101000010101000001101110001000000010000010001100100100000101000011011010001001101000
13_40111111111111110000101101001100001100001000001111000001101110011000010010001010001100100100000001000011011010011001101000
13_80111111111111110000101101001100001100001000001111000001101110011000010010001010001100100100000001000011011010011001101000
14_40000000001111111111001101010100001100101000010101000001101110101000000010000010001100100100000010000011011010101001101000
14_80000000001111111111001101010100001100101000010101000001101110101000000010000010001100100100000010000011011010101001101000
15_32000000001111111111001101010101001100101000010101000001001100000000000010000010001100100100000101000011010000000001101000
15_64000000001111111111001101010101001100101000010101000001001100000000000010000010001100100100000101000011010000000001101000
16_32000000001111111111001101010101001100101000010101000001001100010000000010000010001100100100000101000011010000010001101000
16_64000000001111111111001101010101001100101000010101000001001100010000000010000010001100100100000101000011010000010001101000
17_32000000001111111111001101010101001100101000010101000001001100100000000010000010001100100100000001000011010000100001101000
17_64000000001111111111001101010101001100101000010101000001001100100000000010000010001100100100000001000011010000100001101000
18_40000000001111111111001101010100001100101000010001000001101110001000010010000010001100100100000101000011011010001000101000
18_80000000001111111111001101010100001100101000010001000001101110001000010010000010001100100100000101000011011010001000101000
19_40000000001111111111001101010100001100101000010001000001101110001000010010000010001100100100000101000011011010001000101000
19_80000000001111111111001101010100001100101000010001000001101110001000010010000010001100100100000101000011011010001000101000
1_32000000001111111111001101010100001100101000010101000001001101000100000010000010001100100100000101000011010100000101101000
1_64000000001111111111001101010100001100101000010101000001001101000100000010000010001100100100000101000011010100000101101000
20_40111111111111110000101101001100001100001000001111000001101110001000010010000010001100100100000001000011011010001000101000
20_80111111111111110000101101001100001100001000001111000001101110001000010010000010001100100100000001000011011010001000101000
21_40111111111111110000101101001100001100001000001111000001101110001000010010000010001100100100000001000011011010001000101000
21_80111111111111110000101101001100001100001000001111000001101110001000010010000010001100100100000001000011011010001000101000
22_40000000001111111111001101010100001100101000001101000001101110011000010010000010001100100100000001000011011010011000101000
22_80000000001111111111001101010100001100101000001101000001101110011000010010000010001100100100000001000011011010011000101000
23_10000000001111111111001101010100000000101100000001001100100010011000110000011010000000100100000001000001001010011000101000
23_20000000001111111111001101010100000000101100000001001100100110011000110000011010000000100100000001000001011010011000101000
23_40000000001111111111001101010100000000101100000001001100100110011000110000011010000000100100000001000001011010011000101000
24_10111111111111110000101101001101000000001100001111001100100010001000110000011010000000100100000001000001001010001000101000
24_20111111111111110000101101001101000000001100001111001100100110001000110000011010000000100100000001000001011010001000101000
24_40111111111111110000101101001101000000001100001111001100100110001000110000011010000000100100000001000001011010001000101000
25_10111111111111110000101101001101000000001100001111001100100010011000110000011010000000100100000001000001001010011000101000
25_20111111111111110000101101001101000000001100001111001100100110011000110000011010000000100100000001000001011010011000101000
25_40111111111111110000101101001101000000001100001111001100100110011000110000011010000000100100000001000001011010011000101000
26_10111111111111110000101101001101000000001100001111001100100010101000110000011010000000100100000001000001001010101000101000
26_20111111111111110000101101001101000000001100001111001100100110101000110000011010000000100100000001000001011010101000101000
26_40111111111111110000101101001101000000001100001111001100100110101000110000011010000000100100000001000001011010101000101000
27_10111111111111110000101101001101000000001100001111001100100010001000110000011010000000100100000001000001001010001000100000
27_20111111111111110000101101001101000000001100001111001100100110001000110000011010000000100100000001000001011010001000100000
27_40111111111111110000101101001101000000001100001111001100100110001000110000011010000000100100000001000001011010001000100000
28_10111111111111110000101101001101000000001100001111001100100010011000110000011010000000100100000001000001001010011000100000
28_20111111111111110000101101001101000000001100001111001100100110011000110000011010000000100100000001000001011010011000100000
28_40111111111111110000101101001101000000001100001111001100100110011000110000011010000000100100000001000001011010011000100000
29_10111111111111110000101101001101000000001100001111001100100010101000110000011010000000100100000001000001001010101000100000
29_20111111111111110000101101001101000000001100001111001100100110101000110000011010000000100100000001000001011010101000100000
29_40111111111111110000101101001101000000001100001111001100100110101000110000011010000000100100000001000001011010101000100000
2_32000000001111111111001101010100001100101000010101000001001101010000000010000010001100100100000110000011010100010001101000
2_64000000001111111111001101010100001100101000010101000001001101010000000010000010001100100100000110000011010100010001101000
30_16111111111111110000101101001101000000001100001111001100000100010000110000011010000000100100000001000001010000010000100000
30_32111111111111110000101101001101000000001100001111001100000100010000110000011010000000100100000001000001010000010000100000
30_8111111111111110000101101001101000000001100001111001100000000010000110000011010000000100100000001000001000000010000100000
31_16111111111111110000101101001101000000001100001111001100000100100000110000011010000000100100000001000001010000100000100000
31_32111111111111110000101101001101000000001100001111001100000100100000110000011010000000100100000001000001010000100000100000
31_8111111111111110000101101001101000000001100001111001100000000100000110000011010000000100100000001000001000000100000100000
3_32000000001111111111001101010100001100101000010101000001001101010100000010000010001100100100000110000011010100010101101000
3_64000000001111111111001101010100001100101000010101000001001101010100000010000010001100100100000110000011010100010101101000
4_32000000001111111111001101010100001100101000010101000001001101100000000010000010001100100100000010000011010100100001101000
4_64000000001111111111001101010100001100101000010101000001001101100000000010000010001100100100000010000011010100100001101000
5_32000000001111111111001101010100001100101000010101000001001101100100000010000010001100100100000010000011010100100101101000
5_64000000001111111111001101010100001100101000010101000001001101100100000010000010001100100100000010000011010100100101101000
6_32000000001111111111001101010101001100101000010101000001001101000000000010000010001100100100000101000011010100000001101000
6_64000000001111111111001101010101001100101000010101000001001101000000000010000010001100100100000101000011010100000001101000
7_32000000001111111111001101010101001100101000010101000001001101000100000010000010001100100100000101000011010100000101101000
7_64000000001111111111001101010101001100101000010101000001001101000100000010000010001100100100000101000011010100000101101000
8_32000000001111111111001101010101001100101000010101000001001101010000000010000010001100100100000101000011010100010001101000
8_64000000001111111111001101010101001100101000010101000001001101010000000010000010001100100100000101000011010100010001101000
9_32000000001111111111001101010101001100101000010101000001001101010100000010000010001100100100000101000011010100010101101000
9_64000000001111111111001101010101001100101000010101000001001101010100000010000010001100100100000101000011010100010101101000