Input / Output

Todo

document

I/O interface

Todo

document

IOI

IOI bittile 0
RowColumn
0123
0 ---~IOI0:INV.ICLK2
1 ---~IOI0:OFF1_SRVAL
2 ~IOI0:IFF1_SRVALIOI0:IFF_SR_ENABLE-~IOI0:INV.REV
3 IOI0:TSBYPASS_MUXIOI0:IFF_REV_ENABLE-IOI0:OMUX[2]
4 IOI0:I_DELAY_ENABLEIOI0:TFF_REV_ENABLEIOI0:OFF_REV_ENABLE~IOI0:INV.TCE
5 ~IOI0:TFF1_SRVALIOI0:TFF_SR_ENABLEIOI0:OFF_SR_ENABLEIOI0:OMUX[0]
6 IOI0:I_TSBYPASS_ENABLE--~IOI0:INV.ICE
7 IOI0:TMUX[0]--IOI0:OFF1_LATCH
8 IOI0:TMUX[2]--~IOI0:INV.ICLK1
9 IOI0:IFF_TSBYPASS_ENABLE~IOI0:IFF1_INIT-~IOI0:INV.OTCLK2
10 IOI0:OFF_SR_SYNC--IOI0:OMUX[1]
11 IOI0:IFF_DELAY_ENABLE--IOI0:INV.O1
12 IOI0:TFF_SR_SYNC--IOI0:OMUX[3]
13 IOI0:IFF_SR_SYNC~IOI0:IFF2_INITIOI0:READBACK_IIOI0:INV.O2
14 IOI0:TMUX[3]--IOI0:OFF2_LATCH
15 IOI0:TMUX[1]--IOI0:INV.T1
16 IOI0:IFF_LATCH---
17 IOI0:TFF2_LATCH~IOI0:TFF_INIT~IOI0:OFF_INITIOI0:INV.T2
18 IOI1:TFF1_LATCH--~IOI0:OFF2_SRVAL
19 ~IOI0:TFF2_SRVAL--~IOI0:INV.OTCLK1
20 ~IOI0:IFF2_SRVAL--~IOI1:INV.ICLK2
21 ~IOI1:IFF1_SRVALIOI1:IFF_SR_ENABLE-~IOI1:OFF1_SRVAL
22 ~IOI1:TFF1_SRVALIOI1:IFF_REV_ENABLE-~IOI1:INV.REV
23 IOI1:TSBYPASS_MUXIOI1:TFF_REV_ENABLEIOI1:OFF_REV_ENABLEIOI1:OMUX[2]
24 IOI1:I_DELAY_ENABLEIOI1:TFF_SR_ENABLEIOI1:OFF_SR_ENABLE~IOI1:INV.TCE
25 IOI1:TMUX[0]--IOI1:OMUX[0]
26 IOI1:I_TSBYPASS_ENABLE--~IOI1:INV.ICE
27 IOI1:TMUX[2]--IOI1:OFF1_LATCH
28 IOI1:OFF_SR_SYNC--~IOI1:INV.ICLK1
29 IOI1:IFF_TSBYPASS_ENABLE~IOI1:IFF1_INIT-~IOI1:INV.OTCLK2
30 IOI1:TFF_SR_SYNC--IOI1:OMUX[1]
31 IOI1:IFF_DELAY_ENABLE--IOI1:INV.O1
32 IOI1:IFF_SR_SYNC--IOI1:OMUX[3]
33 IOI1:TMUX[3]~IOI1:IFF2_INITIOI1:READBACK_IIOI1:INV.O2
34 IOI0:TFF1_LATCH--IOI1:OFF2_LATCH
35 IOI1:IFF_LATCH--IOI1:INV.T1
36 IOI1:TMUX[1]---
37 IOI1:TFF2_LATCH~IOI1:TFF_INIT~IOI1:OFF_INITIOI1:INV.T2
38 ~IOI1:TFF2_SRVAL--~IOI1:OFF2_SRVAL
39 ~IOI1:IFF2_SRVAL--~IOI1:INV.OTCLK1
40 ~IOI2:IFF1_SRVALIOI2:IFF_SR_ENABLE-~IOI2:INV.ICLK2
41 IOI2:TFF1_LATCHIOI2:IFF_REV_ENABLE-~IOI2:OFF1_SRVAL
42 ~IOI2:TFF1_SRVALIOI2:TFF_REV_ENABLEIOI2:OFF_REV_ENABLE~IOI2:INV.REV
43 IOI2:TSBYPASS_MUXIOI2:TFF_SR_ENABLEIOI2:OFF_SR_ENABLEIOI2:OMUX[2]
44 IOI2:I_DELAY_ENABLE--~IOI2:INV.TCE
45 IOI2:TMUX[0]--IOI2:OMUX[0]
46 IOI2:I_TSBYPASS_ENABLE--~IOI2:INV.ICE
47 IOI2:TMUX[2]--IOI2:OFF1_LATCH
48 IOI2:OFF_SR_SYNC--~IOI2:INV.ICLK1
49 IOI2:IFF_TSBYPASS_ENABLE~IOI2:IFF1_INIT-~IOI2:INV.OTCLK2
50 IOI2:TFF_SR_SYNC--IOI2:OMUX[1]
51 IOI2:IFF_DELAY_ENABLE--IOI2:INV.O1
52 IOI2:IFF_SR_SYNC--IOI2:OMUX[3]
53 IOI2:TMUX[3]~IOI2:IFF2_INITIOI2:READBACK_IIOI2:INV.O2
54 IOI2:IFF_LATCH--IOI2:OFF2_LATCH
55 IOI2:TMUX[1]~IOI2:TFF_INIT~IOI2:OFF_INITIOI2:INV.T1
56 IOI2:TFF2_LATCH---
57 ~IOI2:TFF2_SRVAL--IOI2:INV.T2
58 ~IOI2:IFF2_SRVAL--~IOI2:OFF2_SRVAL
59 ~IOI3:IFF1_SRVALIOI3:IFF_SR_ENABLE-~IOI2:INV.OTCLK1
60 ~IOI3:TFF1_SRVALIOI3:IFF_REV_ENABLE-~IOI3:INV.ICLK2
61 IOI3:TMUX[0]IOI3:TFF_REV_ENABLEIOI3:OFF_REV_ENABLE~IOI3:OFF1_SRVAL
62 IOI3:TFF1_LATCHIOI3:TFF_SR_ENABLEIOI3:OFF_SR_ENABLE~IOI3:INV.REV
63 IOI3:TSBYPASS_MUX--IOI3:OMUX[2]
64 IOI3:I_DELAY_ENABLE--~IOI3:INV.TCE
65 IOI3:TMUX[2]--IOI3:OMUX[0]
66 IOI3:I_TSBYPASS_ENABLE--~IOI3:INV.ICE
67 IOI3:OFF_SR_SYNC--IOI3:OFF1_LATCH
68 IOI3:TFF_SR_SYNC--~IOI3:INV.ICLK1
69 IOI3:IFF_TSBYPASS_ENABLE~IOI3:IFF1_INIT-~IOI3:INV.OTCLK2
70 IOI3:IFF_SR_SYNC--IOI3:OMUX[1]
71 IOI3:IFF_DELAY_ENABLE--IOI3:INV.O1
72 IOI3:TMUX[3]--IOI3:OMUX[3]
73 IOI3:IFF_LATCH~IOI3:IFF2_INITIOI3:READBACK_IIOI3:INV.O2
74 IOI3:TMUX[1]--IOI3:OFF2_LATCH
75 IOI3:TFF2_LATCH~IOI3:TFF_INIT~IOI3:OFF_INITIOI3:INV.T1
76 ~IOI3:TFF2_SRVAL---
77 ~IOI3:IFF2_SRVAL--IOI3:INV.T2
78 ---~IOI3:OFF2_SRVAL
79 ---~IOI3:INV.OTCLK1
IOI0:IFF1_INIT[0, 1, 9]
IOI0:IFF1_SRVAL[0, 0, 2]
IOI0:IFF2_INIT[0, 1, 13]
IOI0:IFF2_SRVAL[0, 0, 20]
IOI0:INV.ICE[0, 3, 6]
IOI0:INV.ICLK1[0, 3, 8]
IOI0:INV.ICLK2[0, 3, 0]
IOI0:INV.OTCLK1[0, 3, 19]
IOI0:INV.OTCLK2[0, 3, 9]
IOI0:INV.REV[0, 3, 2]
IOI0:INV.TCE[0, 3, 4]
IOI0:OFF1_SRVAL[0, 3, 1]
IOI0:OFF2_SRVAL[0, 3, 18]
IOI0:OFF_INIT[0, 2, 17]
IOI0:TFF1_SRVAL[0, 0, 5]
IOI0:TFF2_SRVAL[0, 0, 19]
IOI0:TFF_INIT[0, 1, 17]
IOI1:IFF1_INIT[0, 1, 29]
IOI1:IFF1_SRVAL[0, 0, 21]
IOI1:IFF2_INIT[0, 1, 33]
IOI1:IFF2_SRVAL[0, 0, 39]
IOI1:INV.ICE[0, 3, 26]
IOI1:INV.ICLK1[0, 3, 28]
IOI1:INV.ICLK2[0, 3, 20]
IOI1:INV.OTCLK1[0, 3, 39]
IOI1:INV.OTCLK2[0, 3, 29]
IOI1:INV.REV[0, 3, 22]
IOI1:INV.TCE[0, 3, 24]
IOI1:OFF1_SRVAL[0, 3, 21]
IOI1:OFF2_SRVAL[0, 3, 38]
IOI1:OFF_INIT[0, 2, 37]
IOI1:TFF1_SRVAL[0, 0, 22]
IOI1:TFF2_SRVAL[0, 0, 38]
IOI1:TFF_INIT[0, 1, 37]
IOI2:IFF1_INIT[0, 1, 49]
IOI2:IFF1_SRVAL[0, 0, 40]
IOI2:IFF2_INIT[0, 1, 53]
IOI2:IFF2_SRVAL[0, 0, 58]
IOI2:INV.ICE[0, 3, 46]
IOI2:INV.ICLK1[0, 3, 48]
IOI2:INV.ICLK2[0, 3, 40]
IOI2:INV.OTCLK1[0, 3, 59]
IOI2:INV.OTCLK2[0, 3, 49]
IOI2:INV.REV[0, 3, 42]
IOI2:INV.TCE[0, 3, 44]
IOI2:OFF1_SRVAL[0, 3, 41]
IOI2:OFF2_SRVAL[0, 3, 58]
IOI2:OFF_INIT[0, 2, 55]
IOI2:TFF1_SRVAL[0, 0, 42]
IOI2:TFF2_SRVAL[0, 0, 57]
IOI2:TFF_INIT[0, 1, 55]
IOI3:IFF1_INIT[0, 1, 69]
IOI3:IFF1_SRVAL[0, 0, 59]
IOI3:IFF2_INIT[0, 1, 73]
IOI3:IFF2_SRVAL[0, 0, 77]
IOI3:INV.ICE[0, 3, 66]
IOI3:INV.ICLK1[0, 3, 68]
IOI3:INV.ICLK2[0, 3, 60]
IOI3:INV.OTCLK1[0, 3, 79]
IOI3:INV.OTCLK2[0, 3, 69]
IOI3:INV.REV[0, 3, 62]
IOI3:INV.TCE[0, 3, 64]
IOI3:OFF1_SRVAL[0, 3, 61]
IOI3:OFF2_SRVAL[0, 3, 78]
IOI3:OFF_INIT[0, 2, 75]
IOI3:TFF1_SRVAL[0, 0, 60]
IOI3:TFF2_SRVAL[0, 0, 76]
IOI3:TFF_INIT[0, 1, 75]
Inverted~[0]
IOI0:TSBYPASS_MUX[0, 0, 3]
IOI1:TSBYPASS_MUX[0, 0, 23]
IOI2:TSBYPASS_MUX[0, 0, 43]
IOI3:TSBYPASS_MUX[0, 0, 63]
TMUX0
GND1
IOI0:IFF_DELAY_ENABLE[0, 0, 11]
IOI0:IFF_LATCH[0, 0, 16]
IOI0:IFF_REV_ENABLE[0, 1, 3]
IOI0:IFF_SR_ENABLE[0, 1, 2]
IOI0:IFF_SR_SYNC[0, 0, 13]
IOI0:IFF_TSBYPASS_ENABLE[0, 0, 9]
IOI0:INV.O1[0, 3, 11]
IOI0:INV.O2[0, 3, 13]
IOI0:INV.T1[0, 3, 15]
IOI0:INV.T2[0, 3, 17]
IOI0:I_DELAY_ENABLE[0, 0, 4]
IOI0:I_TSBYPASS_ENABLE[0, 0, 6]
IOI0:OFF1_LATCH[0, 3, 7]
IOI0:OFF2_LATCH[0, 3, 14]
IOI0:OFF_REV_ENABLE[0, 2, 4]
IOI0:OFF_SR_ENABLE[0, 2, 5]
IOI0:OFF_SR_SYNC[0, 0, 10]
IOI0:READBACK_I[0, 2, 13]
IOI0:TFF1_LATCH[0, 0, 34]
IOI0:TFF2_LATCH[0, 0, 17]
IOI0:TFF_REV_ENABLE[0, 1, 4]
IOI0:TFF_SR_ENABLE[0, 1, 5]
IOI0:TFF_SR_SYNC[0, 0, 12]
IOI1:IFF_DELAY_ENABLE[0, 0, 31]
IOI1:IFF_LATCH[0, 0, 35]
IOI1:IFF_REV_ENABLE[0, 1, 22]
IOI1:IFF_SR_ENABLE[0, 1, 21]
IOI1:IFF_SR_SYNC[0, 0, 32]
IOI1:IFF_TSBYPASS_ENABLE[0, 0, 29]
IOI1:INV.O1[0, 3, 31]
IOI1:INV.O2[0, 3, 33]
IOI1:INV.T1[0, 3, 35]
IOI1:INV.T2[0, 3, 37]
IOI1:I_DELAY_ENABLE[0, 0, 24]
IOI1:I_TSBYPASS_ENABLE[0, 0, 26]
IOI1:OFF1_LATCH[0, 3, 27]
IOI1:OFF2_LATCH[0, 3, 34]
IOI1:OFF_REV_ENABLE[0, 2, 23]
IOI1:OFF_SR_ENABLE[0, 2, 24]
IOI1:OFF_SR_SYNC[0, 0, 28]
IOI1:READBACK_I[0, 2, 33]
IOI1:TFF1_LATCH[0, 0, 18]
IOI1:TFF2_LATCH[0, 0, 37]
IOI1:TFF_REV_ENABLE[0, 1, 23]
IOI1:TFF_SR_ENABLE[0, 1, 24]
IOI1:TFF_SR_SYNC[0, 0, 30]
IOI2:IFF_DELAY_ENABLE[0, 0, 51]
IOI2:IFF_LATCH[0, 0, 54]
IOI2:IFF_REV_ENABLE[0, 1, 41]
IOI2:IFF_SR_ENABLE[0, 1, 40]
IOI2:IFF_SR_SYNC[0, 0, 52]
IOI2:IFF_TSBYPASS_ENABLE[0, 0, 49]
IOI2:INV.O1[0, 3, 51]
IOI2:INV.O2[0, 3, 53]
IOI2:INV.T1[0, 3, 55]
IOI2:INV.T2[0, 3, 57]
IOI2:I_DELAY_ENABLE[0, 0, 44]
IOI2:I_TSBYPASS_ENABLE[0, 0, 46]
IOI2:OFF1_LATCH[0, 3, 47]
IOI2:OFF2_LATCH[0, 3, 54]
IOI2:OFF_REV_ENABLE[0, 2, 42]
IOI2:OFF_SR_ENABLE[0, 2, 43]
IOI2:OFF_SR_SYNC[0, 0, 48]
IOI2:READBACK_I[0, 2, 53]
IOI2:TFF1_LATCH[0, 0, 41]
IOI2:TFF2_LATCH[0, 0, 56]
IOI2:TFF_REV_ENABLE[0, 1, 42]
IOI2:TFF_SR_ENABLE[0, 1, 43]
IOI2:TFF_SR_SYNC[0, 0, 50]
IOI3:IFF_DELAY_ENABLE[0, 0, 71]
IOI3:IFF_LATCH[0, 0, 73]
IOI3:IFF_REV_ENABLE[0, 1, 60]
IOI3:IFF_SR_ENABLE[0, 1, 59]
IOI3:IFF_SR_SYNC[0, 0, 70]
IOI3:IFF_TSBYPASS_ENABLE[0, 0, 69]
IOI3:INV.O1[0, 3, 71]
IOI3:INV.O2[0, 3, 73]
IOI3:INV.T1[0, 3, 75]
IOI3:INV.T2[0, 3, 77]
IOI3:I_DELAY_ENABLE[0, 0, 64]
IOI3:I_TSBYPASS_ENABLE[0, 0, 66]
IOI3:OFF1_LATCH[0, 3, 67]
IOI3:OFF2_LATCH[0, 3, 74]
IOI3:OFF_REV_ENABLE[0, 2, 61]
IOI3:OFF_SR_ENABLE[0, 2, 62]
IOI3:OFF_SR_SYNC[0, 0, 67]
IOI3:READBACK_I[0, 2, 73]
IOI3:TFF1_LATCH[0, 0, 62]
IOI3:TFF2_LATCH[0, 0, 75]
IOI3:TFF_REV_ENABLE[0, 1, 61]
IOI3:TFF_SR_ENABLE[0, 1, 62]
IOI3:TFF_SR_SYNC[0, 0, 68]
Non-inverted[0]
IOI0:TMUX[0, 0, 14][0, 0, 8][0, 0, 15][0, 0, 7]
IOI1:TMUX[0, 0, 33][0, 0, 27][0, 0, 36][0, 0, 25]
IOI2:TMUX[0, 0, 53][0, 0, 47][0, 0, 55][0, 0, 45]
IOI3:TMUX[0, 0, 72][0, 0, 65][0, 0, 74][0, 0, 61]
NONE0000
T10001
T20010
TFF10100
TFF21000
TFFDDR1100
IOI0:OMUX[0, 3, 12][0, 3, 3][0, 3, 10][0, 3, 5]
IOI1:OMUX[0, 3, 32][0, 3, 23][0, 3, 30][0, 3, 25]
IOI2:OMUX[0, 3, 52][0, 3, 43][0, 3, 50][0, 3, 45]
IOI3:OMUX[0, 3, 72][0, 3, 63][0, 3, 70][0, 3, 65]
NONE0000
O10001
O20010
OFF10100
OFF21000
OFFDDR1100

IOI.CLK_B

IOI.CLK_B bittile 0
RowColumn
0123
0 ---~IOI0:INV.ICLK2
1 ---~IOI0:OFF1_SRVAL
2 ~IOI0:IFF1_SRVALIOI0:IFF_SR_ENABLE-~IOI0:INV.REV
3 IOI0:TSBYPASS_MUXIOI0:IFF_REV_ENABLE-IOI0:OMUX[2]
4 IOI0:I_DELAY_ENABLEIOI0:TFF_REV_ENABLEIOI0:OFF_REV_ENABLE~IOI0:INV.TCE
5 ~IOI0:TFF1_SRVALIOI0:TFF_SR_ENABLEIOI0:OFF_SR_ENABLEIOI0:OMUX[0]
6 IOI0:I_TSBYPASS_ENABLE--~IOI0:INV.ICE
7 IOI0:TMUX[0]--IOI0:OFF1_LATCH
8 IOI0:TMUX[2]--~IOI0:INV.ICLK1
9 IOI0:IFF_TSBYPASS_ENABLE~IOI0:IFF1_INIT-~IOI0:INV.OTCLK2
10 IOI0:OFF_SR_SYNC--IOI0:OMUX[1]
11 IOI0:IFF_DELAY_ENABLE--IOI0:INV.O1
12 IOI0:TFF_SR_SYNC--IOI0:OMUX[3]
13 IOI0:IFF_SR_SYNC~IOI0:IFF2_INITIOI0:READBACK_IIOI0:INV.O2
14 IOI0:TMUX[3]--IOI0:OFF2_LATCH
15 IOI0:TMUX[1]--IOI0:INV.T1
16 IOI0:IFF_LATCH---
17 IOI0:TFF2_LATCH~IOI0:TFF_INIT~IOI0:OFF_INITIOI0:INV.T2
18 IOI1:TFF1_LATCH--~IOI0:OFF2_SRVAL
19 ~IOI0:TFF2_SRVAL--~IOI0:INV.OTCLK1
20 ~IOI0:IFF2_SRVAL--~IOI1:INV.ICLK2
21 ~IOI1:IFF1_SRVALIOI1:IFF_SR_ENABLE-~IOI1:OFF1_SRVAL
22 ~IOI1:TFF1_SRVALIOI1:IFF_REV_ENABLE-~IOI1:INV.REV
23 IOI1:TSBYPASS_MUXIOI1:TFF_REV_ENABLEIOI1:OFF_REV_ENABLEIOI1:OMUX[2]
24 IOI1:I_DELAY_ENABLEIOI1:TFF_SR_ENABLEIOI1:OFF_SR_ENABLE~IOI1:INV.TCE
25 IOI1:TMUX[0]--IOI1:OMUX[0]
26 IOI1:I_TSBYPASS_ENABLE--~IOI1:INV.ICE
27 IOI1:TMUX[2]--IOI1:OFF1_LATCH
28 IOI1:OFF_SR_SYNC--~IOI1:INV.ICLK1
29 IOI1:IFF_TSBYPASS_ENABLE~IOI1:IFF1_INIT-~IOI1:INV.OTCLK2
30 IOI1:TFF_SR_SYNC--IOI1:OMUX[1]
31 IOI1:IFF_DELAY_ENABLE--IOI1:INV.O1
32 IOI1:IFF_SR_SYNC--IOI1:OMUX[3]
33 IOI1:TMUX[3]~IOI1:IFF2_INITIOI1:READBACK_IIOI1:INV.O2
34 IOI0:TFF1_LATCH--IOI1:OFF2_LATCH
35 IOI1:IFF_LATCH--IOI1:INV.T1
36 IOI1:TMUX[1]---
37 IOI1:TFF2_LATCH~IOI1:TFF_INIT~IOI1:OFF_INITIOI1:INV.T2
38 ~IOI1:TFF2_SRVAL--~IOI1:OFF2_SRVAL
39 ~IOI1:IFF2_SRVAL--~IOI1:INV.OTCLK1
IOI0:IFF1_INIT[0, 1, 9]
IOI0:IFF1_SRVAL[0, 0, 2]
IOI0:IFF2_INIT[0, 1, 13]
IOI0:IFF2_SRVAL[0, 0, 20]
IOI0:INV.ICE[0, 3, 6]
IOI0:INV.ICLK1[0, 3, 8]
IOI0:INV.ICLK2[0, 3, 0]
IOI0:INV.OTCLK1[0, 3, 19]
IOI0:INV.OTCLK2[0, 3, 9]
IOI0:INV.REV[0, 3, 2]
IOI0:INV.TCE[0, 3, 4]
IOI0:OFF1_SRVAL[0, 3, 1]
IOI0:OFF2_SRVAL[0, 3, 18]
IOI0:OFF_INIT[0, 2, 17]
IOI0:TFF1_SRVAL[0, 0, 5]
IOI0:TFF2_SRVAL[0, 0, 19]
IOI0:TFF_INIT[0, 1, 17]
IOI1:IFF1_INIT[0, 1, 29]
IOI1:IFF1_SRVAL[0, 0, 21]
IOI1:IFF2_INIT[0, 1, 33]
IOI1:IFF2_SRVAL[0, 0, 39]
IOI1:INV.ICE[0, 3, 26]
IOI1:INV.ICLK1[0, 3, 28]
IOI1:INV.ICLK2[0, 3, 20]
IOI1:INV.OTCLK1[0, 3, 39]
IOI1:INV.OTCLK2[0, 3, 29]
IOI1:INV.REV[0, 3, 22]
IOI1:INV.TCE[0, 3, 24]
IOI1:OFF1_SRVAL[0, 3, 21]
IOI1:OFF2_SRVAL[0, 3, 38]
IOI1:OFF_INIT[0, 2, 37]
IOI1:TFF1_SRVAL[0, 0, 22]
IOI1:TFF2_SRVAL[0, 0, 38]
IOI1:TFF_INIT[0, 1, 37]
Inverted~[0]
IOI0:TSBYPASS_MUX[0, 0, 3]
IOI1:TSBYPASS_MUX[0, 0, 23]
TMUX0
GND1
IOI0:IFF_DELAY_ENABLE[0, 0, 11]
IOI0:IFF_LATCH[0, 0, 16]
IOI0:IFF_REV_ENABLE[0, 1, 3]
IOI0:IFF_SR_ENABLE[0, 1, 2]
IOI0:IFF_SR_SYNC[0, 0, 13]
IOI0:IFF_TSBYPASS_ENABLE[0, 0, 9]
IOI0:INV.O1[0, 3, 11]
IOI0:INV.O2[0, 3, 13]
IOI0:INV.T1[0, 3, 15]
IOI0:INV.T2[0, 3, 17]
IOI0:I_DELAY_ENABLE[0, 0, 4]
IOI0:I_TSBYPASS_ENABLE[0, 0, 6]
IOI0:OFF1_LATCH[0, 3, 7]
IOI0:OFF2_LATCH[0, 3, 14]
IOI0:OFF_REV_ENABLE[0, 2, 4]
IOI0:OFF_SR_ENABLE[0, 2, 5]
IOI0:OFF_SR_SYNC[0, 0, 10]
IOI0:READBACK_I[0, 2, 13]
IOI0:TFF1_LATCH[0, 0, 34]
IOI0:TFF2_LATCH[0, 0, 17]
IOI0:TFF_REV_ENABLE[0, 1, 4]
IOI0:TFF_SR_ENABLE[0, 1, 5]
IOI0:TFF_SR_SYNC[0, 0, 12]
IOI1:IFF_DELAY_ENABLE[0, 0, 31]
IOI1:IFF_LATCH[0, 0, 35]
IOI1:IFF_REV_ENABLE[0, 1, 22]
IOI1:IFF_SR_ENABLE[0, 1, 21]
IOI1:IFF_SR_SYNC[0, 0, 32]
IOI1:IFF_TSBYPASS_ENABLE[0, 0, 29]
IOI1:INV.O1[0, 3, 31]
IOI1:INV.O2[0, 3, 33]
IOI1:INV.T1[0, 3, 35]
IOI1:INV.T2[0, 3, 37]
IOI1:I_DELAY_ENABLE[0, 0, 24]
IOI1:I_TSBYPASS_ENABLE[0, 0, 26]
IOI1:OFF1_LATCH[0, 3, 27]
IOI1:OFF2_LATCH[0, 3, 34]
IOI1:OFF_REV_ENABLE[0, 2, 23]
IOI1:OFF_SR_ENABLE[0, 2, 24]
IOI1:OFF_SR_SYNC[0, 0, 28]
IOI1:READBACK_I[0, 2, 33]
IOI1:TFF1_LATCH[0, 0, 18]
IOI1:TFF2_LATCH[0, 0, 37]
IOI1:TFF_REV_ENABLE[0, 1, 23]
IOI1:TFF_SR_ENABLE[0, 1, 24]
IOI1:TFF_SR_SYNC[0, 0, 30]
Non-inverted[0]
IOI0:TMUX[0, 0, 14][0, 0, 8][0, 0, 15][0, 0, 7]
IOI1:TMUX[0, 0, 33][0, 0, 27][0, 0, 36][0, 0, 25]
NONE0000
T10001
T20010
TFF10100
TFF21000
TFFDDR1100
IOI0:OMUX[0, 3, 12][0, 3, 3][0, 3, 10][0, 3, 5]
IOI1:OMUX[0, 3, 32][0, 3, 23][0, 3, 30][0, 3, 25]
NONE0000
O10001
O20010
OFF10100
OFF21000
OFFDDR1100

IOI.CLK_T

IOI.CLK_T bittile 0
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 ----
5 ----
6 ----
7 ----
8 ----
9 ----
10 ----
11 ----
12 ----
13 ----
14 ----
15 ----
16 ----
17 ----
18 ----
19 ----
20 ----
21 ----
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 ----
32 ----
33 ----
34 ----
35 ----
36 ----
37 ----
38 ----
39 ----
40 ~IOI2:IFF1_SRVALIOI2:IFF_SR_ENABLE-~IOI2:INV.ICLK2
41 IOI2:TFF1_LATCHIOI2:IFF_REV_ENABLE-~IOI2:OFF1_SRVAL
42 ~IOI2:TFF1_SRVALIOI2:TFF_REV_ENABLEIOI2:OFF_REV_ENABLE~IOI2:INV.REV
43 IOI2:TSBYPASS_MUXIOI2:TFF_SR_ENABLEIOI2:OFF_SR_ENABLEIOI2:OMUX[2]
44 IOI2:I_DELAY_ENABLE--~IOI2:INV.TCE
45 IOI2:TMUX[0]--IOI2:OMUX[0]
46 IOI2:I_TSBYPASS_ENABLE--~IOI2:INV.ICE
47 IOI2:TMUX[2]--IOI2:OFF1_LATCH
48 IOI2:OFF_SR_SYNC--~IOI2:INV.ICLK1
49 IOI2:IFF_TSBYPASS_ENABLE~IOI2:IFF1_INIT-~IOI2:INV.OTCLK2
50 IOI2:TFF_SR_SYNC--IOI2:OMUX[1]
51 IOI2:IFF_DELAY_ENABLE--IOI2:INV.O1
52 IOI2:IFF_SR_SYNC--IOI2:OMUX[3]
53 IOI2:TMUX[3]~IOI2:IFF2_INITIOI2:READBACK_IIOI2:INV.O2
54 IOI2:IFF_LATCH--IOI2:OFF2_LATCH
55 IOI2:TMUX[1]~IOI2:TFF_INIT~IOI2:OFF_INITIOI2:INV.T1
56 IOI2:TFF2_LATCH---
57 ~IOI2:TFF2_SRVAL--IOI2:INV.T2
58 ~IOI2:IFF2_SRVAL--~IOI2:OFF2_SRVAL
59 ~IOI3:IFF1_SRVALIOI3:IFF_SR_ENABLE-~IOI2:INV.OTCLK1
60 ~IOI3:TFF1_SRVALIOI3:IFF_REV_ENABLE-~IOI3:INV.ICLK2
61 IOI3:TMUX[0]IOI3:TFF_REV_ENABLEIOI3:OFF_REV_ENABLE~IOI3:OFF1_SRVAL
62 IOI3:TFF1_LATCHIOI3:TFF_SR_ENABLEIOI3:OFF_SR_ENABLE~IOI3:INV.REV
63 IOI3:TSBYPASS_MUX--IOI3:OMUX[2]
64 IOI3:I_DELAY_ENABLE--~IOI3:INV.TCE
65 IOI3:TMUX[2]--IOI3:OMUX[0]
66 IOI3:I_TSBYPASS_ENABLE--~IOI3:INV.ICE
67 IOI3:OFF_SR_SYNC--IOI3:OFF1_LATCH
68 IOI3:TFF_SR_SYNC--~IOI3:INV.ICLK1
69 IOI3:IFF_TSBYPASS_ENABLE~IOI3:IFF1_INIT-~IOI3:INV.OTCLK2
70 IOI3:IFF_SR_SYNC--IOI3:OMUX[1]
71 IOI3:IFF_DELAY_ENABLE--IOI3:INV.O1
72 IOI3:TMUX[3]--IOI3:OMUX[3]
73 IOI3:IFF_LATCH~IOI3:IFF2_INITIOI3:READBACK_IIOI3:INV.O2
74 IOI3:TMUX[1]--IOI3:OFF2_LATCH
75 IOI3:TFF2_LATCH~IOI3:TFF_INIT~IOI3:OFF_INITIOI3:INV.T1
76 ~IOI3:TFF2_SRVAL---
77 ~IOI3:IFF2_SRVAL--IOI3:INV.T2
78 ---~IOI3:OFF2_SRVAL
79 ---~IOI3:INV.OTCLK1
IOI2:IFF1_INIT[0, 1, 49]
IOI2:IFF1_SRVAL[0, 0, 40]
IOI2:IFF2_INIT[0, 1, 53]
IOI2:IFF2_SRVAL[0, 0, 58]
IOI2:INV.ICE[0, 3, 46]
IOI2:INV.ICLK1[0, 3, 48]
IOI2:INV.ICLK2[0, 3, 40]
IOI2:INV.OTCLK1[0, 3, 59]
IOI2:INV.OTCLK2[0, 3, 49]
IOI2:INV.REV[0, 3, 42]
IOI2:INV.TCE[0, 3, 44]
IOI2:OFF1_SRVAL[0, 3, 41]
IOI2:OFF2_SRVAL[0, 3, 58]
IOI2:OFF_INIT[0, 2, 55]
IOI2:TFF1_SRVAL[0, 0, 42]
IOI2:TFF2_SRVAL[0, 0, 57]
IOI2:TFF_INIT[0, 1, 55]
IOI3:IFF1_INIT[0, 1, 69]
IOI3:IFF1_SRVAL[0, 0, 59]
IOI3:IFF2_INIT[0, 1, 73]
IOI3:IFF2_SRVAL[0, 0, 77]
IOI3:INV.ICE[0, 3, 66]
IOI3:INV.ICLK1[0, 3, 68]
IOI3:INV.ICLK2[0, 3, 60]
IOI3:INV.OTCLK1[0, 3, 79]
IOI3:INV.OTCLK2[0, 3, 69]
IOI3:INV.REV[0, 3, 62]
IOI3:INV.TCE[0, 3, 64]
IOI3:OFF1_SRVAL[0, 3, 61]
IOI3:OFF2_SRVAL[0, 3, 78]
IOI3:OFF_INIT[0, 2, 75]
IOI3:TFF1_SRVAL[0, 0, 60]
IOI3:TFF2_SRVAL[0, 0, 76]
IOI3:TFF_INIT[0, 1, 75]
Inverted~[0]
IOI2:IFF_DELAY_ENABLE[0, 0, 51]
IOI2:IFF_LATCH[0, 0, 54]
IOI2:IFF_REV_ENABLE[0, 1, 41]
IOI2:IFF_SR_ENABLE[0, 1, 40]
IOI2:IFF_SR_SYNC[0, 0, 52]
IOI2:IFF_TSBYPASS_ENABLE[0, 0, 49]
IOI2:INV.O1[0, 3, 51]
IOI2:INV.O2[0, 3, 53]
IOI2:INV.T1[0, 3, 55]
IOI2:INV.T2[0, 3, 57]
IOI2:I_DELAY_ENABLE[0, 0, 44]
IOI2:I_TSBYPASS_ENABLE[0, 0, 46]
IOI2:OFF1_LATCH[0, 3, 47]
IOI2:OFF2_LATCH[0, 3, 54]
IOI2:OFF_REV_ENABLE[0, 2, 42]
IOI2:OFF_SR_ENABLE[0, 2, 43]
IOI2:OFF_SR_SYNC[0, 0, 48]
IOI2:READBACK_I[0, 2, 53]
IOI2:TFF1_LATCH[0, 0, 41]
IOI2:TFF2_LATCH[0, 0, 56]
IOI2:TFF_REV_ENABLE[0, 1, 42]
IOI2:TFF_SR_ENABLE[0, 1, 43]
IOI2:TFF_SR_SYNC[0, 0, 50]
IOI3:IFF_DELAY_ENABLE[0, 0, 71]
IOI3:IFF_LATCH[0, 0, 73]
IOI3:IFF_REV_ENABLE[0, 1, 60]
IOI3:IFF_SR_ENABLE[0, 1, 59]
IOI3:IFF_SR_SYNC[0, 0, 70]
IOI3:IFF_TSBYPASS_ENABLE[0, 0, 69]
IOI3:INV.O1[0, 3, 71]
IOI3:INV.O2[0, 3, 73]
IOI3:INV.T1[0, 3, 75]
IOI3:INV.T2[0, 3, 77]
IOI3:I_DELAY_ENABLE[0, 0, 64]
IOI3:I_TSBYPASS_ENABLE[0, 0, 66]
IOI3:OFF1_LATCH[0, 3, 67]
IOI3:OFF2_LATCH[0, 3, 74]
IOI3:OFF_REV_ENABLE[0, 2, 61]
IOI3:OFF_SR_ENABLE[0, 2, 62]
IOI3:OFF_SR_SYNC[0, 0, 67]
IOI3:READBACK_I[0, 2, 73]
IOI3:TFF1_LATCH[0, 0, 62]
IOI3:TFF2_LATCH[0, 0, 75]
IOI3:TFF_REV_ENABLE[0, 1, 61]
IOI3:TFF_SR_ENABLE[0, 1, 62]
IOI3:TFF_SR_SYNC[0, 0, 68]
Non-inverted[0]
IOI2:TSBYPASS_MUX[0, 0, 43]
IOI3:TSBYPASS_MUX[0, 0, 63]
TMUX0
GND1
IOI2:TMUX[0, 0, 53][0, 0, 47][0, 0, 55][0, 0, 45]
IOI3:TMUX[0, 0, 72][0, 0, 65][0, 0, 74][0, 0, 61]
NONE0000
T10001
T20010
TFF10100
TFF21000
TFFDDR1100
IOI2:OMUX[0, 3, 52][0, 3, 43][0, 3, 50][0, 3, 45]
IOI3:OMUX[0, 3, 72][0, 3, 63][0, 3, 70][0, 3, 65]
NONE0000
O10001
O20010
OFF10100
OFF21000
OFFDDR1100

I/O buffers — Virtex 2

Todo

document

NameIOSTD:V2:PDRIVEIOSTD:V2:NDRIVE
[4][3][2][1][0][4][3][2][1][0]
AGP0100101011
BLVDS_251111110001
GTL0000010011
GTLP0000001101
GTLP_DCI0000001101
GTL_DCI0000010011
HSTL_I1010000100
HSTL_II1111101001
HSTL_III1000001101
HSTL_III_181000001101
HSTL_III_DCI1000001101
HSTL_III_DCI_181000001101
HSTL_II_181111101001
HSTL_II_DCI1111101001
HSTL_II_DCI_181111101001
HSTL_IV1000010111
HSTL_IV_181000010111
HSTL_IV_DCI1000010111
HSTL_IV_DCI_181000010111
HSTL_I_181000000101
HSTL_I_DCI1010000100
HSTL_I_DCI_181000000101
LVCMOS15.121100000110
LVCMOS15.161111101000
LVCMOS15.20010000001
LVCMOS15.40100000010
LVCMOS15.60110000011
LVCMOS15.81000000100
LVCMOS18.121000000110
LVCMOS18.161011001000
LVCMOS18.20001100001
LVCMOS18.40011000010
LVCMOS18.60100000011
LVCMOS18.80101100100
LVCMOS25.120101100110
LVCMOS25.160111001000
LVCMOS25.20001000001
LVCMOS25.241010101100
LVCMOS25.40010000010
LVCMOS25.60010100011
LVCMOS25.80011100100
LVCMOS33.120100000110
LVCMOS33.160101101000
LVCMOS33.20001000001
LVCMOS33.241000001100
LVCMOS33.40001100010
LVCMOS33.60010000011
LVCMOS33.80011000100
LVPECL_331111110001
LVTTL.120011000110
LVTTL.160100001000
LVTTL.20000100001
LVTTL.240110001100
LVTTL.40001000010
LVTTL.60001100011
LVTTL.80010000100
OFF0000000000
PCI33_30100101011
PCI66_30100101011
PCIX0100101011
SSTL18_I0110000100
SSTL18_II1111101111
SSTL18_II_DCI0100000101
SSTL18_I_DCI0100000011
SSTL2_I0010100011
SSTL2_II0110101001
SSTL2_II_DCI0010000100
SSTL2_I_DCI0010000010
SSTL3_I0001100011
SSTL3_II0011000111
SSTL3_II_DCI0001100011
SSTL3_I_DCI0001000010
NameIOSTD:V2:SLEW
[3][2][1][0]
AGP1111
BLVDS_250011
GTL0011
GTLP0011
GTLP_DCI0011
GTL_DCI0011
HSLVDCI_151111
HSLVDCI_181111
HSLVDCI_251111
HSLVDCI_331111
HSTL_I0111
HSTL_II0100
HSTL_III0111
HSTL_III_180111
HSTL_III_DCI0111
HSTL_III_DCI_180111
HSTL_II_180111
HSTL_II_DCI0100
HSTL_II_DCI_180111
HSTL_IV0111
HSTL_IV_180111
HSTL_IV_DCI0111
HSTL_IV_DCI_180111
HSTL_I_180111
HSTL_I_DCI0111
HSTL_I_DCI_180111
LVCMOS15.FAST1111
LVCMOS15.SLOW0000
LVCMOS18.FAST1111
LVCMOS18.SLOW0000
LVCMOS25.FAST1111
LVCMOS25.SLOW0000
LVCMOS33.FAST1111
LVCMOS33.SLOW0000
LVDCI_151111
LVDCI_181111
LVDCI_251111
LVDCI_331111
LVDCI_DV2_151111
LVDCI_DV2_181111
LVDCI_DV2_251111
LVDCI_DV2_331111
LVPECL_331111
LVTTL.FAST1111
LVTTL.SLOW0000
PCI33_30000
PCI66_30011
PCIX0011
SSTL18_I0111
SSTL18_II0111
SSTL18_II_DCI0111
SSTL18_I_DCI0111
SSTL2_I1111
SSTL2_II0111
SSTL2_II_DCI0111
SSTL2_I_DCI1111
SSTL3_I1111
SSTL3_II1111
SSTL3_II_DCI1111
SSTL3_I_DCI1111
VR1111
NameIOSTD:V2:OUTPUT_MISC
[0]
AGP0
BLVDS_250
GTL1
GTLP1
GTLP_DCI1
GTL_DCI1
HSLVDCI_150
HSLVDCI_180
HSLVDCI_250
HSLVDCI_330
HSTL_I0
HSTL_II0
HSTL_III0
HSTL_III_180
HSTL_III_DCI0
HSTL_III_DCI_180
HSTL_II_180
HSTL_II_DCI0
HSTL_II_DCI_180
HSTL_IV0
HSTL_IV_180
HSTL_IV_DCI0
HSTL_IV_DCI_180
HSTL_I_180
HSTL_I_DCI0
HSTL_I_DCI_180
LVCMOS150
LVCMOS180
LVCMOS250
LVCMOS330
LVDCI_150
LVDCI_180
LVDCI_250
LVDCI_330
LVDCI_DV2_150
LVDCI_DV2_180
LVDCI_DV2_250
LVDCI_DV2_330
LVPECL_330
LVTTL0
PCI33_30
PCI66_30
PCIX0
SSTL18_I0
SSTL18_II0
SSTL18_II_DCI0
SSTL18_I_DCI0
SSTL2_I0
SSTL2_II0
SSTL2_II_DCI0
SSTL2_I_DCI0
SSTL3_I0
SSTL3_II0
SSTL3_II_DCI0
SSTL3_I_DCI0
NameIOSTD:V2:OUTPUT_DIFF
[5][4][3][2][1][0]
LDT_25100001
LVDSEXT_25011001
LVDSEXT_25_DCI011001
LVDSEXT_33011111
LVDSEXT_33_DCI011111
LVDS_25000001
LVDS_25_DCI000001
LVDS_33000111
LVDS_33_DCI000111
OFF000000
ULVDS_25100001

IOBS.V2.T.L2

IOBS.V2.T.L2 bittile 0
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB2:NDRIVE[1]--IOB2:SLEW[2]IOB2:IBUF_MODE[1]IOB2:NDRIVE[3]IOB2:DCI_MODE[2]IOB2:OUTPUT_ENABLE[0]~IOB1:NDRIVE[1]IOB1:SLEW[2]IOB1:PULL[2]~IOB1:NDRIVE[2]IOB1:DCI_MODE[2]IOB1:OUTPUT_ENABLE[0]--~IOB0:PDRIVE[1]IOB0:SLEW[0]IOB0:IBUF_MODE[2]~IOB0:NDRIVE[2]IOB1:OUTPUT_DIFF[2]IOB0:IBUF_MODE[0]
7 IOB2:PDRIVE[0]--IOB2:SLEW[0]IOB2:PULL[2]IOB2:PDRIVE[3]--IOB1:PDRIVE[0]IOB1:SLEW[0]IOB1:IBUF_MODE[1]IOB1:PDRIVE[3]IOB1:DCI_MODE[1]---~IOB0:NDRIVE[1]IOB0:SLEW[1]IOB0:IBUF_MODE[1]IOB0:PDRIVE[3]IOB0:DCI_MODE[2]IOB0:OUTPUT_ENABLE[0]
8 ~IOB2:PDRIVE[1]--IOB2:SLEW[3]IOB2:PULL[1]~IOB2:NDRIVE[2]IOB2:DCI_MODE[1]IOB2:IBUF_MODE[0]~IOB1:PDRIVE[1]IOB1:SLEW[3]IOB1:IBUF_MODE[2]~IOB1:PDRIVE[2]-IOB1:OUTPUT_ENABLE[1]--IOB0:PDRIVE[0]IOB1:OUTPUT_DIFF[5]IOB0:PULL[2]~IOB0:PDRIVE[2]-IOB0:OUTPUT_ENABLE[1]
9 IOB2:NDRIVE[0]--IOB3:OUTPUT_DIFF[5]IOB2:PULL[0]IOB2:NDRIVE[4]IOB3:OUTPUT_DIFF[3]---IOB1:PULL[1]IOB1:PDRIVE[4]IOB1:OUTPUT_DIFF[3]----IOB0:SLEW[3]IOB0:PULL[1]IOB0:PDRIVE[4]-IOB0:VREF
10 IOB2:OUTPUT_MISC--IOB2:SLEW[1]IOB2:IBUF_MODE[2]~IOB2:PDRIVE[2]IOB2:DCI_MODE[0]IOB2:OUTPUT_ENABLE[1]IOB1:OUTPUT_MISCIOB1:SLEW[1]IOB1:PULL[0]IOB1:NDRIVE[3]IOB1:DCI_MODE[0]IOB1:IBUF_MODE[0]--IOB0:NDRIVE[0]IOB0:SLEW[2]IOB0:PULL[0]IOB0:NDRIVE[3]IOB0:DCI_MODE[1]IOB0:DISABLE_GTS
11 ----IOB2:DCI_MODE[3]IOB2:PDRIVE[4]IOB3:OUTPUT_DIFF[1]IOB2:DISABLE_GTSIOB1:NDRIVE[0]IOB1:OUTPUT_DIFF[0]IOB1:DCI_MODE[3]IOB1:NDRIVE[4]IOB1:OUTPUT_DIFF[1]IOB1:DISABLE_GTS--IOB0:OUTPUT_MISC-IOB0:DCI_MODE[3]IOB0:NDRIVE[4]IOB0:DCI_MODE[0]IOB1:OUTPUT_DIFF[4]
IOBS.V2.T.L2 bittile 1
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB5:NDRIVE[1]--IOB5:SLEW[2]IOB5:IBUF_MODE[1]IOB5:NDRIVE[3]IOB5:DCI_MODE[2]IOB5:OUTPUT_ENABLE[0]~IOB4:NDRIVE[1]IOB4:SLEW[2]IOB4:PULL[2]~IOB4:NDRIVE[2]IOB4:DCI_MODE[2]IOB4:OUTPUT_ENABLE[0]--~IOB3:PDRIVE[1]IOB3:SLEW[0]IOB3:IBUF_MODE[2]~IOB3:NDRIVE[2]IOB3:OUTPUT_DIFF[2]IOB3:IBUF_MODE[0]
7 IOB5:PDRIVE[0]--IOB5:SLEW[0]IOB5:PULL[2]IOB5:PDRIVE[3]IOB5:VRIOB5:VREFIOB4:PDRIVE[0]IOB4:SLEW[0]IOB4:IBUF_MODE[1]IOB4:PDRIVE[3]IOB4:DCI_MODE[1]---~IOB3:NDRIVE[1]IOB3:SLEW[1]IOB3:IBUF_MODE[1]IOB3:PDRIVE[3]IOB3:DCI_MODE[2]IOB3:OUTPUT_ENABLE[0]
8 ~IOB5:PDRIVE[1]--IOB5:SLEW[3]IOB5:PULL[1]~IOB5:NDRIVE[2]IOB5:DCI_MODE[1]IOB5:IBUF_MODE[0]~IOB4:PDRIVE[1]IOB4:SLEW[3]IOB4:IBUF_MODE[2]~IOB4:PDRIVE[2]IOB4:VRIOB4:OUTPUT_ENABLE[1]--IOB3:PDRIVE[0]IOB3:OUTPUT_DIFF[0]IOB3:PULL[2]~IOB3:PDRIVE[2]-IOB3:OUTPUT_ENABLE[1]
9 IOB5:NDRIVE[0]--IOB5:OUTPUT_DIFF[0]IOB5:PULL[0]IOB5:NDRIVE[4]IOB5:OUTPUT_DIFF[3]---IOB4:PULL[1]IOB4:PDRIVE[4]IOB5:OUTPUT_DIFF[4]----IOB3:SLEW[3]IOB3:PULL[1]IOB3:PDRIVE[4]--
10 IOB5:OUTPUT_MISC--IOB5:SLEW[1]IOB5:IBUF_MODE[2]~IOB5:PDRIVE[2]IOB5:DCI_MODE[0]IOB5:OUTPUT_ENABLE[1]IOB4:OUTPUT_MISCIOB4:SLEW[1]IOB4:PULL[0]IOB4:NDRIVE[3]IOB4:DCI_MODE[0]IOB4:IBUF_MODE[0]--IOB3:NDRIVE[0]IOB3:SLEW[2]IOB3:PULL[0]IOB3:NDRIVE[3]IOB3:DCI_MODE[1]IOB3:DISABLE_GTS
11 ----IOB5:DCI_MODE[3]IOB5:PDRIVE[4]IOB5:OUTPUT_DIFF[1]IOB5:DISABLE_GTSIOB4:NDRIVE[0]IOB5:OUTPUT_DIFF[5]IOB4:DCI_MODE[3]IOB4:NDRIVE[4]IOB5:OUTPUT_DIFF[2]IOB4:DISABLE_GTS--IOB3:OUTPUT_MISC-IOB3:DCI_MODE[3]IOB3:NDRIVE[4]IOB3:DCI_MODE[0]IOB3:OUTPUT_DIFF[4]
IOB0:NDRIVE[0, 19, 11][0, 19, 10][0, 19, 6][0, 16, 7][0, 16, 10]
IOB0:PDRIVE[0, 19, 9][0, 19, 7][0, 19, 8][0, 16, 6][0, 16, 8]
IOB1:NDRIVE[0, 11, 11][0, 11, 10][0, 11, 6][0, 8, 6][0, 8, 11]
IOB1:PDRIVE[0, 11, 9][0, 11, 7][0, 11, 8][0, 8, 8][0, 8, 7]
IOB2:NDRIVE[0, 5, 9][0, 5, 6][0, 5, 8][0, 0, 6][0, 0, 9]
IOB2:PDRIVE[0, 5, 11][0, 5, 7][0, 5, 10][0, 0, 8][0, 0, 7]
IOB3:NDRIVE[1, 19, 11][1, 19, 10][1, 19, 6][1, 16, 7][1, 16, 10]
IOB3:PDRIVE[1, 19, 9][1, 19, 7][1, 19, 8][1, 16, 6][1, 16, 8]
IOB4:NDRIVE[1, 11, 11][1, 11, 10][1, 11, 6][1, 8, 6][1, 8, 11]
IOB4:PDRIVE[1, 11, 9][1, 11, 7][1, 11, 8][1, 8, 8][1, 8, 7]
IOB5:NDRIVE[1, 5, 9][1, 5, 6][1, 5, 8][1, 0, 6][1, 0, 9]
IOB5:PDRIVE[1, 5, 11][1, 5, 7][1, 5, 10][1, 0, 8][1, 0, 7]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:DISABLE_GTS[0, 21, 10]
IOB0:OUTPUT_MISC[0, 16, 11]
IOB0:VREF[0, 21, 9]
IOB1:DISABLE_GTS[0, 13, 11]
IOB1:OUTPUT_MISC[0, 8, 10]
IOB2:DISABLE_GTS[0, 7, 11]
IOB2:OUTPUT_MISC[0, 0, 10]
IOB3:DISABLE_GTS[1, 21, 10]
IOB3:OUTPUT_MISC[1, 16, 11]
IOB4:DISABLE_GTS[1, 13, 11]
IOB4:OUTPUT_MISC[1, 8, 10]
IOB4:VR[1, 12, 8]
IOB5:DISABLE_GTS[1, 7, 11]
IOB5:OUTPUT_MISC[1, 0, 10]
IOB5:VR[1, 6, 7]
IOB5:VREF[1, 7, 7]
Non-inverted[0]
IOB0:SLEW[0, 17, 9][0, 17, 10][0, 17, 7][0, 17, 6]
IOB1:SLEW[0, 9, 8][0, 9, 6][0, 9, 10][0, 9, 7]
IOB2:SLEW[0, 3, 8][0, 3, 6][0, 3, 10][0, 3, 7]
IOB3:SLEW[1, 17, 9][1, 17, 10][1, 17, 7][1, 17, 6]
IOB4:SLEW[1, 9, 8][1, 9, 6][1, 9, 10][1, 9, 7]
IOB5:SLEW[1, 3, 8][1, 3, 6][1, 3, 10][1, 3, 7]
Non-inverted[3][2][1][0]
IOB0:PULL[0, 18, 8][0, 18, 9][0, 18, 10]
IOB1:PULL[0, 10, 6][0, 10, 9][0, 10, 10]
IOB2:PULL[0, 4, 7][0, 4, 8][0, 4, 9]
IOB3:PULL[1, 18, 8][1, 18, 9][1, 18, 10]
IOB4:PULL[1, 10, 6][1, 10, 9][1, 10, 10]
IOB5:PULL[1, 4, 7][1, 4, 8][1, 4, 9]
PULLDOWN000
NONE001
PULLUP011
KEEPER101
IOB0:DCI_MODE[0, 18, 11][0, 20, 7][0, 20, 10][0, 20, 11]
IOB1:DCI_MODE[0, 10, 11][0, 12, 6][0, 12, 7][0, 12, 10]
IOB2:DCI_MODE[0, 4, 11][0, 6, 6][0, 6, 8][0, 6, 10]
IOB3:DCI_MODE[1, 18, 11][1, 20, 7][1, 20, 10][1, 20, 11]
IOB4:DCI_MODE[1, 10, 11][1, 12, 6][1, 12, 7][1, 12, 10]
IOB5:DCI_MODE[1, 4, 11][1, 6, 6][1, 6, 8][1, 6, 10]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:OUTPUT_ENABLE[0, 21, 8][0, 21, 7]
IOB1:OUTPUT_ENABLE[0, 13, 8][0, 13, 6]
IOB2:OUTPUT_ENABLE[0, 7, 10][0, 7, 6]
IOB3:OUTPUT_ENABLE[1, 21, 8][1, 21, 7]
IOB4:OUTPUT_ENABLE[1, 13, 8][1, 13, 6]
IOB5:OUTPUT_ENABLE[1, 7, 10][1, 7, 6]
Non-inverted[1][0]
IOB0:IBUF_MODE[0, 18, 6][0, 18, 7][0, 21, 6]
IOB1:IBUF_MODE[0, 10, 8][0, 10, 7][0, 13, 10]
IOB2:IBUF_MODE[0, 4, 10][0, 4, 6][0, 7, 8]
IOB3:IBUF_MODE[1, 18, 6][1, 18, 7][1, 21, 6]
IOB4:IBUF_MODE[1, 10, 8][1, 10, 7][1, 13, 10]
IOB5:IBUF_MODE[1, 4, 10][1, 4, 6][1, 7, 8]
NONE000
VREF011
DIFF101
CMOS111
IOB1:OUTPUT_DIFF[0, 17, 8][0, 21, 11][0, 12, 9][0, 20, 6][0, 12, 11][0, 9, 11]
IOB3:OUTPUT_DIFF[0, 3, 9][1, 21, 11][0, 6, 9][1, 20, 6][0, 6, 11][1, 17, 8]
IOB5:OUTPUT_DIFF[1, 9, 11][1, 12, 9][1, 6, 9][1, 12, 11][1, 6, 11][1, 3, 9]
Non-inverted[5][4][3][2][1][0]

IOBS.V2.T.R2

IOBS.V2.T.R2 bittile 0
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB2:NDRIVE[1]--IOB2:SLEW[2]IOB2:IBUF_MODE[1]IOB2:NDRIVE[3]IOB2:DCI_MODE[2]IOB2:OUTPUT_ENABLE[0]~IOB1:NDRIVE[1]IOB1:SLEW[2]IOB1:PULL[2]~IOB1:NDRIVE[2]IOB1:DCI_MODE[2]IOB1:OUTPUT_ENABLE[0]--~IOB0:PDRIVE[1]IOB0:SLEW[0]IOB0:IBUF_MODE[2]~IOB0:NDRIVE[2]IOB1:OUTPUT_DIFF[2]IOB0:IBUF_MODE[0]
7 IOB2:PDRIVE[0]--IOB2:SLEW[0]IOB2:PULL[2]IOB2:PDRIVE[3]--IOB1:PDRIVE[0]IOB1:SLEW[0]IOB1:IBUF_MODE[1]IOB1:PDRIVE[3]IOB1:DCI_MODE[1]---~IOB0:NDRIVE[1]IOB0:SLEW[1]IOB0:IBUF_MODE[1]IOB0:PDRIVE[3]IOB0:DCI_MODE[2]IOB0:OUTPUT_ENABLE[0]
8 ~IOB2:PDRIVE[1]--IOB2:SLEW[3]IOB2:PULL[1]~IOB2:NDRIVE[2]IOB2:DCI_MODE[1]IOB2:IBUF_MODE[0]~IOB1:PDRIVE[1]IOB1:SLEW[3]IOB1:IBUF_MODE[2]~IOB1:PDRIVE[2]IOB1:VRIOB1:OUTPUT_ENABLE[1]--IOB0:PDRIVE[0]IOB1:OUTPUT_DIFF[5]IOB0:PULL[2]~IOB0:PDRIVE[2]IOB0:VRIOB0:OUTPUT_ENABLE[1]
9 IOB2:NDRIVE[0]--IOB3:OUTPUT_DIFF[5]IOB2:PULL[0]IOB2:NDRIVE[4]IOB3:OUTPUT_DIFF[3]---IOB1:PULL[1]IOB1:PDRIVE[4]IOB1:OUTPUT_DIFF[3]----IOB0:SLEW[3]IOB0:PULL[1]IOB0:PDRIVE[4]-IOB0:VREF
10 IOB2:OUTPUT_MISC--IOB2:SLEW[1]IOB2:IBUF_MODE[2]~IOB2:PDRIVE[2]IOB2:DCI_MODE[0]IOB2:OUTPUT_ENABLE[1]IOB1:OUTPUT_MISCIOB1:SLEW[1]IOB1:PULL[0]IOB1:NDRIVE[3]IOB1:DCI_MODE[0]IOB1:IBUF_MODE[0]--IOB0:NDRIVE[0]IOB0:SLEW[2]IOB0:PULL[0]IOB0:NDRIVE[3]IOB0:DCI_MODE[1]IOB0:DISABLE_GTS
11 ----IOB2:DCI_MODE[3]IOB2:PDRIVE[4]IOB3:OUTPUT_DIFF[1]IOB2:DISABLE_GTSIOB1:NDRIVE[0]IOB1:OUTPUT_DIFF[0]IOB1:DCI_MODE[3]IOB1:NDRIVE[4]IOB1:OUTPUT_DIFF[1]IOB1:DISABLE_GTS--IOB0:OUTPUT_MISC-IOB0:DCI_MODE[3]IOB0:NDRIVE[4]IOB0:DCI_MODE[0]IOB1:OUTPUT_DIFF[4]
IOBS.V2.T.R2 bittile 1
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB5:NDRIVE[1]--IOB5:SLEW[2]IOB5:IBUF_MODE[1]IOB5:NDRIVE[3]IOB5:DCI_MODE[2]IOB5:OUTPUT_ENABLE[0]~IOB4:NDRIVE[1]IOB4:SLEW[2]IOB4:PULL[2]~IOB4:NDRIVE[2]IOB4:DCI_MODE[2]IOB4:OUTPUT_ENABLE[0]--~IOB3:PDRIVE[1]IOB3:SLEW[0]IOB3:IBUF_MODE[2]~IOB3:NDRIVE[2]IOB3:OUTPUT_DIFF[2]IOB3:IBUF_MODE[0]
7 IOB5:PDRIVE[0]--IOB5:SLEW[0]IOB5:PULL[2]IOB5:PDRIVE[3]-IOB5:VREFIOB4:PDRIVE[0]IOB4:SLEW[0]IOB4:IBUF_MODE[1]IOB4:PDRIVE[3]IOB4:DCI_MODE[1]---~IOB3:NDRIVE[1]IOB3:SLEW[1]IOB3:IBUF_MODE[1]IOB3:PDRIVE[3]IOB3:DCI_MODE[2]IOB3:OUTPUT_ENABLE[0]
8 ~IOB5:PDRIVE[1]--IOB5:SLEW[3]IOB5:PULL[1]~IOB5:NDRIVE[2]IOB5:DCI_MODE[1]IOB5:IBUF_MODE[0]~IOB4:PDRIVE[1]IOB4:SLEW[3]IOB4:IBUF_MODE[2]~IOB4:PDRIVE[2]-IOB4:OUTPUT_ENABLE[1]--IOB3:PDRIVE[0]IOB3:OUTPUT_DIFF[0]IOB3:PULL[2]~IOB3:PDRIVE[2]-IOB3:OUTPUT_ENABLE[1]
9 IOB5:NDRIVE[0]--IOB5:OUTPUT_DIFF[0]IOB5:PULL[0]IOB5:NDRIVE[4]IOB5:OUTPUT_DIFF[3]---IOB4:PULL[1]IOB4:PDRIVE[4]IOB5:OUTPUT_DIFF[4]----IOB3:SLEW[3]IOB3:PULL[1]IOB3:PDRIVE[4]--
10 IOB5:OUTPUT_MISC--IOB5:SLEW[1]IOB5:IBUF_MODE[2]~IOB5:PDRIVE[2]IOB5:DCI_MODE[0]IOB5:OUTPUT_ENABLE[1]IOB4:OUTPUT_MISCIOB4:SLEW[1]IOB4:PULL[0]IOB4:NDRIVE[3]IOB4:DCI_MODE[0]IOB4:IBUF_MODE[0]--IOB3:NDRIVE[0]IOB3:SLEW[2]IOB3:PULL[0]IOB3:NDRIVE[3]IOB3:DCI_MODE[1]IOB3:DISABLE_GTS
11 ----IOB5:DCI_MODE[3]IOB5:PDRIVE[4]IOB5:OUTPUT_DIFF[1]IOB5:DISABLE_GTSIOB4:NDRIVE[0]IOB5:OUTPUT_DIFF[5]IOB4:DCI_MODE[3]IOB4:NDRIVE[4]IOB5:OUTPUT_DIFF[2]IOB4:DISABLE_GTS--IOB3:OUTPUT_MISC-IOB3:DCI_MODE[3]IOB3:NDRIVE[4]IOB3:DCI_MODE[0]IOB3:OUTPUT_DIFF[4]
IOB0:NDRIVE[0, 19, 11][0, 19, 10][0, 19, 6][0, 16, 7][0, 16, 10]
IOB0:PDRIVE[0, 19, 9][0, 19, 7][0, 19, 8][0, 16, 6][0, 16, 8]
IOB1:NDRIVE[0, 11, 11][0, 11, 10][0, 11, 6][0, 8, 6][0, 8, 11]
IOB1:PDRIVE[0, 11, 9][0, 11, 7][0, 11, 8][0, 8, 8][0, 8, 7]
IOB2:NDRIVE[0, 5, 9][0, 5, 6][0, 5, 8][0, 0, 6][0, 0, 9]
IOB2:PDRIVE[0, 5, 11][0, 5, 7][0, 5, 10][0, 0, 8][0, 0, 7]
IOB3:NDRIVE[1, 19, 11][1, 19, 10][1, 19, 6][1, 16, 7][1, 16, 10]
IOB3:PDRIVE[1, 19, 9][1, 19, 7][1, 19, 8][1, 16, 6][1, 16, 8]
IOB4:NDRIVE[1, 11, 11][1, 11, 10][1, 11, 6][1, 8, 6][1, 8, 11]
IOB4:PDRIVE[1, 11, 9][1, 11, 7][1, 11, 8][1, 8, 8][1, 8, 7]
IOB5:NDRIVE[1, 5, 9][1, 5, 6][1, 5, 8][1, 0, 6][1, 0, 9]
IOB5:PDRIVE[1, 5, 11][1, 5, 7][1, 5, 10][1, 0, 8][1, 0, 7]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:DISABLE_GTS[0, 21, 10]
IOB0:OUTPUT_MISC[0, 16, 11]
IOB0:VR[0, 20, 8]
IOB0:VREF[0, 21, 9]
IOB1:DISABLE_GTS[0, 13, 11]
IOB1:OUTPUT_MISC[0, 8, 10]
IOB1:VR[0, 12, 8]
IOB2:DISABLE_GTS[0, 7, 11]
IOB2:OUTPUT_MISC[0, 0, 10]
IOB3:DISABLE_GTS[1, 21, 10]
IOB3:OUTPUT_MISC[1, 16, 11]
IOB4:DISABLE_GTS[1, 13, 11]
IOB4:OUTPUT_MISC[1, 8, 10]
IOB5:DISABLE_GTS[1, 7, 11]
IOB5:OUTPUT_MISC[1, 0, 10]
IOB5:VREF[1, 7, 7]
Non-inverted[0]
IOB0:SLEW[0, 17, 9][0, 17, 10][0, 17, 7][0, 17, 6]
IOB1:SLEW[0, 9, 8][0, 9, 6][0, 9, 10][0, 9, 7]
IOB2:SLEW[0, 3, 8][0, 3, 6][0, 3, 10][0, 3, 7]
IOB3:SLEW[1, 17, 9][1, 17, 10][1, 17, 7][1, 17, 6]
IOB4:SLEW[1, 9, 8][1, 9, 6][1, 9, 10][1, 9, 7]
IOB5:SLEW[1, 3, 8][1, 3, 6][1, 3, 10][1, 3, 7]
Non-inverted[3][2][1][0]
IOB0:PULL[0, 18, 8][0, 18, 9][0, 18, 10]
IOB1:PULL[0, 10, 6][0, 10, 9][0, 10, 10]
IOB2:PULL[0, 4, 7][0, 4, 8][0, 4, 9]
IOB3:PULL[1, 18, 8][1, 18, 9][1, 18, 10]
IOB4:PULL[1, 10, 6][1, 10, 9][1, 10, 10]
IOB5:PULL[1, 4, 7][1, 4, 8][1, 4, 9]
PULLDOWN000
NONE001
PULLUP011
KEEPER101
IOB0:DCI_MODE[0, 18, 11][0, 20, 7][0, 20, 10][0, 20, 11]
IOB1:DCI_MODE[0, 10, 11][0, 12, 6][0, 12, 7][0, 12, 10]
IOB2:DCI_MODE[0, 4, 11][0, 6, 6][0, 6, 8][0, 6, 10]
IOB3:DCI_MODE[1, 18, 11][1, 20, 7][1, 20, 10][1, 20, 11]
IOB4:DCI_MODE[1, 10, 11][1, 12, 6][1, 12, 7][1, 12, 10]
IOB5:DCI_MODE[1, 4, 11][1, 6, 6][1, 6, 8][1, 6, 10]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:OUTPUT_ENABLE[0, 21, 8][0, 21, 7]
IOB1:OUTPUT_ENABLE[0, 13, 8][0, 13, 6]
IOB2:OUTPUT_ENABLE[0, 7, 10][0, 7, 6]
IOB3:OUTPUT_ENABLE[1, 21, 8][1, 21, 7]
IOB4:OUTPUT_ENABLE[1, 13, 8][1, 13, 6]
IOB5:OUTPUT_ENABLE[1, 7, 10][1, 7, 6]
Non-inverted[1][0]
IOB0:IBUF_MODE[0, 18, 6][0, 18, 7][0, 21, 6]
IOB1:IBUF_MODE[0, 10, 8][0, 10, 7][0, 13, 10]
IOB2:IBUF_MODE[0, 4, 10][0, 4, 6][0, 7, 8]
IOB3:IBUF_MODE[1, 18, 6][1, 18, 7][1, 21, 6]
IOB4:IBUF_MODE[1, 10, 8][1, 10, 7][1, 13, 10]
IOB5:IBUF_MODE[1, 4, 10][1, 4, 6][1, 7, 8]
NONE000
VREF011
DIFF101
CMOS111
IOB1:OUTPUT_DIFF[0, 17, 8][0, 21, 11][0, 12, 9][0, 20, 6][0, 12, 11][0, 9, 11]
IOB3:OUTPUT_DIFF[0, 3, 9][1, 21, 11][0, 6, 9][1, 20, 6][0, 6, 11][1, 17, 8]
IOB5:OUTPUT_DIFF[1, 9, 11][1, 12, 9][1, 6, 9][1, 12, 11][1, 6, 11][1, 3, 9]
Non-inverted[5][4][3][2][1][0]

IOBS.V2.R.B2

IOBS.V2.R.B2 bittile 0
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 --IOB5:SLEW[2]IOB5:SLEW[3]
5 --IOB5:SLEW[0]IOB5:SLEW[1]
6 --IOB5:OUTPUT_DIFF[0]-
7 ---IOB5:OUTPUT_MISC
8 --IOB5:NDRIVE[0]IOB5:PDRIVE[0]
9 --~IOB5:NDRIVE[1]~IOB5:PDRIVE[1]
10 --~IOB5:NDRIVE[2]~IOB5:PDRIVE[2]
11 --IOB5:NDRIVE[3]IOB5:PDRIVE[3]
12 --IOB5:NDRIVE[4]IOB5:PDRIVE[4]
13 --IOB5:DCI_MODE[3]IOB5:PULL[0]
14 --IOB5:PULL[1]IOB5:PULL[2]
15 --IOB5:IBUF_MODE[1]IOB5:IBUF_MODE[2]
16 --IOB5:IBUF_MODE[0]IOB5:OUTPUT_ENABLE[1]
17 --IOB5:OUTPUT_ENABLE[0]-
18 --IOB5:DISABLE_GTS-
19 --IOB5:OUTPUT_DIFF[3]IOB5:OUTPUT_DIFF[1]
20 --IOB5:DCI_MODE[0]IOB5:DCI_MODE[1]
21 --IOB5:DCI_MODE[2]-
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 --IOB4:SLEW[2]IOB4:SLEW[3]
32 --IOB4:SLEW[0]IOB4:SLEW[1]
33 --IOB5:OUTPUT_DIFF[5]-
34 ---IOB4:OUTPUT_MISC
35 --IOB4:NDRIVE[0]IOB4:PDRIVE[0]
36 --~IOB4:NDRIVE[1]~IOB4:PDRIVE[1]
37 --~IOB4:NDRIVE[2]~IOB4:PDRIVE[2]
38 --IOB4:NDRIVE[3]IOB4:PDRIVE[3]
39 --IOB4:NDRIVE[4]IOB4:PDRIVE[4]
40 --IOB4:DCI_MODE[3]IOB4:PULL[0]
41 --IOB4:PULL[1]IOB4:PULL[2]
42 --IOB4:IBUF_MODE[1]IOB4:IBUF_MODE[2]
43 --IOB4:IBUF_MODE[0]IOB4:OUTPUT_ENABLE[1]
44 --IOB4:OUTPUT_ENABLE[0]-
45 --IOB4:DISABLE_GTS-
46 --IOB5:OUTPUT_DIFF[4]IOB5:OUTPUT_DIFF[2]
47 --IOB4:DCI_MODE[0]IOB4:DCI_MODE[1]
48 --IOB4:DCI_MODE[2]-
49 ----
50 ----
51 ----
52 ----
53 ----
54 ----
55 ----
56 ----
57 ----
58 --IOB3:SLEW[2]IOB3:SLEW[3]
59 --IOB3:SLEW[0]IOB3:SLEW[1]
60 --IOB3:OUTPUT_DIFF[0]-
61 ---IOB3:OUTPUT_MISC
62 --IOB3:NDRIVE[0]IOB3:PDRIVE[0]
63 --~IOB3:NDRIVE[1]~IOB3:PDRIVE[1]
64 --~IOB3:NDRIVE[2]~IOB3:PDRIVE[2]
65 --IOB3:NDRIVE[3]IOB3:PDRIVE[3]
66 --IOB3:NDRIVE[4]IOB3:PDRIVE[4]
67 --IOB3:DCI_MODE[3]IOB3:PULL[0]
68 --IOB3:PULL[1]IOB3:PULL[2]
69 --IOB3:IBUF_MODE[1]IOB3:IBUF_MODE[2]
70 --IOB3:IBUF_MODE[0]IOB3:OUTPUT_ENABLE[1]
71 --IOB3:OUTPUT_ENABLE[0]-
72 --IOB3:DISABLE_GTS-
73 --IOB3:OUTPUT_DIFF[3]IOB3:OUTPUT_DIFF[1]
74 --IOB3:DCI_MODE[0]IOB3:DCI_MODE[1]
75 --IOB3:DCI_MODE[2]IOB3:VR
IOBS.V2.R.B2 bittile 1
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 --IOB2:SLEW[2]IOB2:SLEW[3]
5 --IOB2:SLEW[0]IOB2:SLEW[1]
6 --IOB3:OUTPUT_DIFF[5]-
7 ---IOB2:OUTPUT_MISC
8 --IOB2:NDRIVE[0]IOB2:PDRIVE[0]
9 --~IOB2:NDRIVE[1]~IOB2:PDRIVE[1]
10 --~IOB2:NDRIVE[2]~IOB2:PDRIVE[2]
11 --IOB2:NDRIVE[3]IOB2:PDRIVE[3]
12 --IOB2:NDRIVE[4]IOB2:PDRIVE[4]
13 --IOB2:DCI_MODE[3]IOB2:PULL[0]
14 --IOB2:PULL[1]IOB2:PULL[2]
15 --IOB2:IBUF_MODE[1]IOB2:IBUF_MODE[2]
16 --IOB2:IBUF_MODE[0]IOB2:OUTPUT_ENABLE[1]
17 --IOB2:OUTPUT_ENABLE[0]-
18 --IOB2:DISABLE_GTS-
19 --IOB3:OUTPUT_DIFF[4]IOB3:OUTPUT_DIFF[2]
20 --IOB2:DCI_MODE[0]IOB2:DCI_MODE[1]
21 --IOB2:DCI_MODE[2]IOB2:VR
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 --IOB1:SLEW[2]IOB1:SLEW[3]
32 --IOB1:SLEW[0]IOB1:SLEW[1]
33 --IOB1:OUTPUT_DIFF[0]-
34 ---IOB1:OUTPUT_MISC
35 --IOB1:NDRIVE[0]IOB1:PDRIVE[0]
36 --~IOB1:NDRIVE[1]~IOB1:PDRIVE[1]
37 --~IOB1:NDRIVE[2]~IOB1:PDRIVE[2]
38 --IOB1:NDRIVE[3]IOB1:PDRIVE[3]
39 --IOB1:NDRIVE[4]IOB1:PDRIVE[4]
40 --IOB1:DCI_MODE[3]IOB1:PULL[0]
41 --IOB1:PULL[1]IOB1:PULL[2]
42 --IOB1:IBUF_MODE[1]IOB1:IBUF_MODE[2]
43 --IOB1:IBUF_MODE[0]IOB1:OUTPUT_ENABLE[1]
44 --IOB1:OUTPUT_ENABLE[0]-
45 --IOB1:DISABLE_GTS-
46 --IOB1:OUTPUT_DIFF[3]IOB1:OUTPUT_DIFF[1]
47 --IOB1:DCI_MODE[0]IOB1:DCI_MODE[1]
48 --IOB1:DCI_MODE[2]-
49 ----
50 ----
51 ----
52 ----
53 ----
54 ----
55 ----
56 ----
57 ----
58 --IOB0:SLEW[2]IOB0:SLEW[3]
59 --IOB0:SLEW[0]IOB0:SLEW[1]
60 --IOB1:OUTPUT_DIFF[5]-
61 ---IOB0:OUTPUT_MISC
62 --IOB0:NDRIVE[0]IOB0:PDRIVE[0]
63 --~IOB0:NDRIVE[1]~IOB0:PDRIVE[1]
64 --~IOB0:NDRIVE[2]~IOB0:PDRIVE[2]
65 --IOB0:NDRIVE[3]IOB0:PDRIVE[3]
66 --IOB0:NDRIVE[4]IOB0:PDRIVE[4]
67 --IOB0:DCI_MODE[3]IOB0:PULL[0]
68 --IOB0:PULL[1]IOB0:PULL[2]
69 --IOB0:IBUF_MODE[1]IOB0:IBUF_MODE[2]
70 --IOB0:IBUF_MODE[0]IOB0:OUTPUT_ENABLE[1]
71 --IOB0:OUTPUT_ENABLE[0]IOB0:VREF
72 --IOB0:DISABLE_GTS-
73 --IOB1:OUTPUT_DIFF[4]IOB1:OUTPUT_DIFF[2]
74 --IOB0:DCI_MODE[0]IOB0:DCI_MODE[1]
75 --IOB0:DCI_MODE[2]-
IOB0:SLEW[1, 3, 58][1, 2, 58][1, 3, 59][1, 2, 59]
IOB1:SLEW[1, 3, 31][1, 2, 31][1, 3, 32][1, 2, 32]
IOB2:SLEW[1, 3, 4][1, 2, 4][1, 3, 5][1, 2, 5]
IOB3:SLEW[0, 3, 58][0, 2, 58][0, 3, 59][0, 2, 59]
IOB4:SLEW[0, 3, 31][0, 2, 31][0, 3, 32][0, 2, 32]
IOB5:SLEW[0, 3, 4][0, 2, 4][0, 3, 5][0, 2, 5]
Non-inverted[3][2][1][0]
IOB1:OUTPUT_DIFF[1, 2, 60][1, 2, 73][1, 2, 46][1, 3, 73][1, 3, 46][1, 2, 33]
IOB3:OUTPUT_DIFF[1, 2, 6][1, 2, 19][0, 2, 73][1, 3, 19][0, 3, 73][0, 2, 60]
IOB5:OUTPUT_DIFF[0, 2, 33][0, 2, 46][0, 2, 19][0, 3, 46][0, 3, 19][0, 2, 6]
Non-inverted[5][4][3][2][1][0]
IOB0:NDRIVE[1, 2, 66][1, 2, 65][1, 2, 64][1, 2, 63][1, 2, 62]
IOB0:PDRIVE[1, 3, 66][1, 3, 65][1, 3, 64][1, 3, 63][1, 3, 62]
IOB1:NDRIVE[1, 2, 39][1, 2, 38][1, 2, 37][1, 2, 36][1, 2, 35]
IOB1:PDRIVE[1, 3, 39][1, 3, 38][1, 3, 37][1, 3, 36][1, 3, 35]
IOB2:NDRIVE[1, 2, 12][1, 2, 11][1, 2, 10][1, 2, 9][1, 2, 8]
IOB2:PDRIVE[1, 3, 12][1, 3, 11][1, 3, 10][1, 3, 9][1, 3, 8]
IOB3:NDRIVE[0, 2, 66][0, 2, 65][0, 2, 64][0, 2, 63][0, 2, 62]
IOB3:PDRIVE[0, 3, 66][0, 3, 65][0, 3, 64][0, 3, 63][0, 3, 62]
IOB4:NDRIVE[0, 2, 39][0, 2, 38][0, 2, 37][0, 2, 36][0, 2, 35]
IOB4:PDRIVE[0, 3, 39][0, 3, 38][0, 3, 37][0, 3, 36][0, 3, 35]
IOB5:NDRIVE[0, 2, 12][0, 2, 11][0, 2, 10][0, 2, 9][0, 2, 8]
IOB5:PDRIVE[0, 3, 12][0, 3, 11][0, 3, 10][0, 3, 9][0, 3, 8]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:IBUF_MODE[1, 3, 69][1, 2, 69][1, 2, 70]
IOB1:IBUF_MODE[1, 3, 42][1, 2, 42][1, 2, 43]
IOB2:IBUF_MODE[1, 3, 15][1, 2, 15][1, 2, 16]
IOB3:IBUF_MODE[0, 3, 69][0, 2, 69][0, 2, 70]
IOB4:IBUF_MODE[0, 3, 42][0, 2, 42][0, 2, 43]
IOB5:IBUF_MODE[0, 3, 15][0, 2, 15][0, 2, 16]
NONE000
VREF011
DIFF101
CMOS111
IOB0:OUTPUT_ENABLE[1, 3, 70][1, 2, 71]
IOB1:OUTPUT_ENABLE[1, 3, 43][1, 2, 44]
IOB2:OUTPUT_ENABLE[1, 3, 16][1, 2, 17]
IOB3:OUTPUT_ENABLE[0, 3, 70][0, 2, 71]
IOB4:OUTPUT_ENABLE[0, 3, 43][0, 2, 44]
IOB5:OUTPUT_ENABLE[0, 3, 16][0, 2, 17]
Non-inverted[1][0]
IOB0:DISABLE_GTS[1, 2, 72]
IOB0:OUTPUT_MISC[1, 3, 61]
IOB0:VREF[1, 3, 71]
IOB1:DISABLE_GTS[1, 2, 45]
IOB1:OUTPUT_MISC[1, 3, 34]
IOB2:DISABLE_GTS[1, 2, 18]
IOB2:OUTPUT_MISC[1, 3, 7]
IOB2:VR[1, 3, 21]
IOB3:DISABLE_GTS[0, 2, 72]
IOB3:OUTPUT_MISC[0, 3, 61]
IOB3:VR[0, 3, 75]
IOB4:DISABLE_GTS[0, 2, 45]
IOB4:OUTPUT_MISC[0, 3, 34]
IOB5:DISABLE_GTS[0, 2, 18]
IOB5:OUTPUT_MISC[0, 3, 7]
Non-inverted[0]
IOB0:DCI_MODE[1, 2, 67][1, 2, 75][1, 3, 74][1, 2, 74]
IOB1:DCI_MODE[1, 2, 40][1, 2, 48][1, 3, 47][1, 2, 47]
IOB2:DCI_MODE[1, 2, 13][1, 2, 21][1, 3, 20][1, 2, 20]
IOB3:DCI_MODE[0, 2, 67][0, 2, 75][0, 3, 74][0, 2, 74]
IOB4:DCI_MODE[0, 2, 40][0, 2, 48][0, 3, 47][0, 2, 47]
IOB5:DCI_MODE[0, 2, 13][0, 2, 21][0, 3, 20][0, 2, 20]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:PULL[1, 3, 68][1, 2, 68][1, 3, 67]
IOB1:PULL[1, 3, 41][1, 2, 41][1, 3, 40]
IOB2:PULL[1, 3, 14][1, 2, 14][1, 3, 13]
IOB3:PULL[0, 3, 68][0, 2, 68][0, 3, 67]
IOB4:PULL[0, 3, 41][0, 2, 41][0, 3, 40]
IOB5:PULL[0, 3, 14][0, 2, 14][0, 3, 13]
PULLDOWN000
NONE001
PULLUP011
KEEPER101

IOBS.V2.R.T2

IOBS.V2.R.T2 bittile 0
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 --IOB5:SLEW[2]IOB5:SLEW[3]
5 --IOB5:SLEW[0]IOB5:SLEW[1]
6 --IOB5:OUTPUT_DIFF[0]-
7 ---IOB5:OUTPUT_MISC
8 --IOB5:NDRIVE[0]IOB5:PDRIVE[0]
9 --~IOB5:NDRIVE[1]~IOB5:PDRIVE[1]
10 --~IOB5:NDRIVE[2]~IOB5:PDRIVE[2]
11 --IOB5:NDRIVE[3]IOB5:PDRIVE[3]
12 --IOB5:NDRIVE[4]IOB5:PDRIVE[4]
13 --IOB5:DCI_MODE[3]IOB5:PULL[0]
14 --IOB5:PULL[1]IOB5:PULL[2]
15 --IOB5:IBUF_MODE[1]IOB5:IBUF_MODE[2]
16 --IOB5:IBUF_MODE[0]IOB5:OUTPUT_ENABLE[1]
17 --IOB5:OUTPUT_ENABLE[0]IOB5:VREF
18 --IOB5:DISABLE_GTS-
19 --IOB5:OUTPUT_DIFF[3]IOB5:OUTPUT_DIFF[1]
20 --IOB5:DCI_MODE[0]IOB5:DCI_MODE[1]
21 --IOB5:DCI_MODE[2]-
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 --IOB4:SLEW[2]IOB4:SLEW[3]
32 --IOB4:SLEW[0]IOB4:SLEW[1]
33 --IOB5:OUTPUT_DIFF[5]-
34 ---IOB4:OUTPUT_MISC
35 --IOB4:NDRIVE[0]IOB4:PDRIVE[0]
36 --~IOB4:NDRIVE[1]~IOB4:PDRIVE[1]
37 --~IOB4:NDRIVE[2]~IOB4:PDRIVE[2]
38 --IOB4:NDRIVE[3]IOB4:PDRIVE[3]
39 --IOB4:NDRIVE[4]IOB4:PDRIVE[4]
40 --IOB4:DCI_MODE[3]IOB4:PULL[0]
41 --IOB4:PULL[1]IOB4:PULL[2]
42 --IOB4:IBUF_MODE[1]IOB4:IBUF_MODE[2]
43 --IOB4:IBUF_MODE[0]IOB4:OUTPUT_ENABLE[1]
44 --IOB4:OUTPUT_ENABLE[0]-
45 --IOB4:DISABLE_GTS-
46 --IOB5:OUTPUT_DIFF[4]IOB5:OUTPUT_DIFF[2]
47 --IOB4:DCI_MODE[0]IOB4:DCI_MODE[1]
48 --IOB4:DCI_MODE[2]-
49 ----
50 ----
51 ----
52 ----
53 ----
54 ----
55 ----
56 ----
57 ----
58 --IOB3:SLEW[2]IOB3:SLEW[3]
59 --IOB3:SLEW[0]IOB3:SLEW[1]
60 --IOB3:OUTPUT_DIFF[0]-
61 ---IOB3:OUTPUT_MISC
62 --IOB3:NDRIVE[0]IOB3:PDRIVE[0]
63 --~IOB3:NDRIVE[1]~IOB3:PDRIVE[1]
64 --~IOB3:NDRIVE[2]~IOB3:PDRIVE[2]
65 --IOB3:NDRIVE[3]IOB3:PDRIVE[3]
66 --IOB3:NDRIVE[4]IOB3:PDRIVE[4]
67 --IOB3:DCI_MODE[3]IOB3:PULL[0]
68 --IOB3:PULL[1]IOB3:PULL[2]
69 --IOB3:IBUF_MODE[1]IOB3:IBUF_MODE[2]
70 --IOB3:IBUF_MODE[0]IOB3:OUTPUT_ENABLE[1]
71 --IOB3:OUTPUT_ENABLE[0]-
72 --IOB3:DISABLE_GTS-
73 --IOB3:OUTPUT_DIFF[3]IOB3:OUTPUT_DIFF[1]
74 --IOB3:DCI_MODE[0]IOB3:DCI_MODE[1]
75 --IOB3:DCI_MODE[2]IOB3:VR
IOBS.V2.R.T2 bittile 1
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 --IOB2:SLEW[2]IOB2:SLEW[3]
5 --IOB2:SLEW[0]IOB2:SLEW[1]
6 --IOB3:OUTPUT_DIFF[5]-
7 ---IOB2:OUTPUT_MISC
8 --IOB2:NDRIVE[0]IOB2:PDRIVE[0]
9 --~IOB2:NDRIVE[1]~IOB2:PDRIVE[1]
10 --~IOB2:NDRIVE[2]~IOB2:PDRIVE[2]
11 --IOB2:NDRIVE[3]IOB2:PDRIVE[3]
12 --IOB2:NDRIVE[4]IOB2:PDRIVE[4]
13 --IOB2:DCI_MODE[3]IOB2:PULL[0]
14 --IOB2:PULL[1]IOB2:PULL[2]
15 --IOB2:IBUF_MODE[1]IOB2:IBUF_MODE[2]
16 --IOB2:IBUF_MODE[0]IOB2:OUTPUT_ENABLE[1]
17 --IOB2:OUTPUT_ENABLE[0]-
18 --IOB2:DISABLE_GTS-
19 --IOB3:OUTPUT_DIFF[4]IOB3:OUTPUT_DIFF[2]
20 --IOB2:DCI_MODE[0]IOB2:DCI_MODE[1]
21 --IOB2:DCI_MODE[2]IOB2:VR
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 --IOB1:SLEW[2]IOB1:SLEW[3]
32 --IOB1:SLEW[0]IOB1:SLEW[1]
33 --IOB1:OUTPUT_DIFF[0]-
34 ---IOB1:OUTPUT_MISC
35 --IOB1:NDRIVE[0]IOB1:PDRIVE[0]
36 --~IOB1:NDRIVE[1]~IOB1:PDRIVE[1]
37 --~IOB1:NDRIVE[2]~IOB1:PDRIVE[2]
38 --IOB1:NDRIVE[3]IOB1:PDRIVE[3]
39 --IOB1:NDRIVE[4]IOB1:PDRIVE[4]
40 --IOB1:DCI_MODE[3]IOB1:PULL[0]
41 --IOB1:PULL[1]IOB1:PULL[2]
42 --IOB1:IBUF_MODE[1]IOB1:IBUF_MODE[2]
43 --IOB1:IBUF_MODE[0]IOB1:OUTPUT_ENABLE[1]
44 --IOB1:OUTPUT_ENABLE[0]-
45 --IOB1:DISABLE_GTS-
46 --IOB1:OUTPUT_DIFF[3]IOB1:OUTPUT_DIFF[1]
47 --IOB1:DCI_MODE[0]IOB1:DCI_MODE[1]
48 --IOB1:DCI_MODE[2]-
49 ----
50 ----
51 ----
52 ----
53 ----
54 ----
55 ----
56 ----
57 ----
58 --IOB0:SLEW[2]IOB0:SLEW[3]
59 --IOB0:SLEW[0]IOB0:SLEW[1]
60 --IOB1:OUTPUT_DIFF[5]-
61 ---IOB0:OUTPUT_MISC
62 --IOB0:NDRIVE[0]IOB0:PDRIVE[0]
63 --~IOB0:NDRIVE[1]~IOB0:PDRIVE[1]
64 --~IOB0:NDRIVE[2]~IOB0:PDRIVE[2]
65 --IOB0:NDRIVE[3]IOB0:PDRIVE[3]
66 --IOB0:NDRIVE[4]IOB0:PDRIVE[4]
67 --IOB0:DCI_MODE[3]IOB0:PULL[0]
68 --IOB0:PULL[1]IOB0:PULL[2]
69 --IOB0:IBUF_MODE[1]IOB0:IBUF_MODE[2]
70 --IOB0:IBUF_MODE[0]IOB0:OUTPUT_ENABLE[1]
71 --IOB0:OUTPUT_ENABLE[0]-
72 --IOB0:DISABLE_GTS-
73 --IOB1:OUTPUT_DIFF[4]IOB1:OUTPUT_DIFF[2]
74 --IOB0:DCI_MODE[0]IOB0:DCI_MODE[1]
75 --IOB0:DCI_MODE[2]-
IOB0:SLEW[1, 3, 58][1, 2, 58][1, 3, 59][1, 2, 59]
IOB1:SLEW[1, 3, 31][1, 2, 31][1, 3, 32][1, 2, 32]
IOB2:SLEW[1, 3, 4][1, 2, 4][1, 3, 5][1, 2, 5]
IOB3:SLEW[0, 3, 58][0, 2, 58][0, 3, 59][0, 2, 59]
IOB4:SLEW[0, 3, 31][0, 2, 31][0, 3, 32][0, 2, 32]
IOB5:SLEW[0, 3, 4][0, 2, 4][0, 3, 5][0, 2, 5]
Non-inverted[3][2][1][0]
IOB1:OUTPUT_DIFF[1, 2, 60][1, 2, 73][1, 2, 46][1, 3, 73][1, 3, 46][1, 2, 33]
IOB3:OUTPUT_DIFF[1, 2, 6][1, 2, 19][0, 2, 73][1, 3, 19][0, 3, 73][0, 2, 60]
IOB5:OUTPUT_DIFF[0, 2, 33][0, 2, 46][0, 2, 19][0, 3, 46][0, 3, 19][0, 2, 6]
Non-inverted[5][4][3][2][1][0]
IOB0:NDRIVE[1, 2, 66][1, 2, 65][1, 2, 64][1, 2, 63][1, 2, 62]
IOB0:PDRIVE[1, 3, 66][1, 3, 65][1, 3, 64][1, 3, 63][1, 3, 62]
IOB1:NDRIVE[1, 2, 39][1, 2, 38][1, 2, 37][1, 2, 36][1, 2, 35]
IOB1:PDRIVE[1, 3, 39][1, 3, 38][1, 3, 37][1, 3, 36][1, 3, 35]
IOB2:NDRIVE[1, 2, 12][1, 2, 11][1, 2, 10][1, 2, 9][1, 2, 8]
IOB2:PDRIVE[1, 3, 12][1, 3, 11][1, 3, 10][1, 3, 9][1, 3, 8]
IOB3:NDRIVE[0, 2, 66][0, 2, 65][0, 2, 64][0, 2, 63][0, 2, 62]
IOB3:PDRIVE[0, 3, 66][0, 3, 65][0, 3, 64][0, 3, 63][0, 3, 62]
IOB4:NDRIVE[0, 2, 39][0, 2, 38][0, 2, 37][0, 2, 36][0, 2, 35]
IOB4:PDRIVE[0, 3, 39][0, 3, 38][0, 3, 37][0, 3, 36][0, 3, 35]
IOB5:NDRIVE[0, 2, 12][0, 2, 11][0, 2, 10][0, 2, 9][0, 2, 8]
IOB5:PDRIVE[0, 3, 12][0, 3, 11][0, 3, 10][0, 3, 9][0, 3, 8]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:IBUF_MODE[1, 3, 69][1, 2, 69][1, 2, 70]
IOB1:IBUF_MODE[1, 3, 42][1, 2, 42][1, 2, 43]
IOB2:IBUF_MODE[1, 3, 15][1, 2, 15][1, 2, 16]
IOB3:IBUF_MODE[0, 3, 69][0, 2, 69][0, 2, 70]
IOB4:IBUF_MODE[0, 3, 42][0, 2, 42][0, 2, 43]
IOB5:IBUF_MODE[0, 3, 15][0, 2, 15][0, 2, 16]
NONE000
VREF011
DIFF101
CMOS111
IOB0:OUTPUT_ENABLE[1, 3, 70][1, 2, 71]
IOB1:OUTPUT_ENABLE[1, 3, 43][1, 2, 44]
IOB2:OUTPUT_ENABLE[1, 3, 16][1, 2, 17]
IOB3:OUTPUT_ENABLE[0, 3, 70][0, 2, 71]
IOB4:OUTPUT_ENABLE[0, 3, 43][0, 2, 44]
IOB5:OUTPUT_ENABLE[0, 3, 16][0, 2, 17]
Non-inverted[1][0]
IOB0:DISABLE_GTS[1, 2, 72]
IOB0:OUTPUT_MISC[1, 3, 61]
IOB1:DISABLE_GTS[1, 2, 45]
IOB1:OUTPUT_MISC[1, 3, 34]
IOB2:DISABLE_GTS[1, 2, 18]
IOB2:OUTPUT_MISC[1, 3, 7]
IOB2:VR[1, 3, 21]
IOB3:DISABLE_GTS[0, 2, 72]
IOB3:OUTPUT_MISC[0, 3, 61]
IOB3:VR[0, 3, 75]
IOB4:DISABLE_GTS[0, 2, 45]
IOB4:OUTPUT_MISC[0, 3, 34]
IOB5:DISABLE_GTS[0, 2, 18]
IOB5:OUTPUT_MISC[0, 3, 7]
IOB5:VREF[0, 3, 17]
Non-inverted[0]
IOB0:DCI_MODE[1, 2, 67][1, 2, 75][1, 3, 74][1, 2, 74]
IOB1:DCI_MODE[1, 2, 40][1, 2, 48][1, 3, 47][1, 2, 47]
IOB2:DCI_MODE[1, 2, 13][1, 2, 21][1, 3, 20][1, 2, 20]
IOB3:DCI_MODE[0, 2, 67][0, 2, 75][0, 3, 74][0, 2, 74]
IOB4:DCI_MODE[0, 2, 40][0, 2, 48][0, 3, 47][0, 2, 47]
IOB5:DCI_MODE[0, 2, 13][0, 2, 21][0, 3, 20][0, 2, 20]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:PULL[1, 3, 68][1, 2, 68][1, 3, 67]
IOB1:PULL[1, 3, 41][1, 2, 41][1, 3, 40]
IOB2:PULL[1, 3, 14][1, 2, 14][1, 3, 13]
IOB3:PULL[0, 3, 68][0, 2, 68][0, 3, 67]
IOB4:PULL[0, 3, 41][0, 2, 41][0, 3, 40]
IOB5:PULL[0, 3, 14][0, 2, 14][0, 3, 13]
PULLDOWN000
NONE001
PULLUP011
KEEPER101

IOBS.V2.B.L2

IOBS.V2.B.L2 bittile 0
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB3:NDRIVE[1]--IOB3:SLEW[2]IOB3:IBUF_MODE[1]IOB3:NDRIVE[3]IOB3:DCI_MODE[2]IOB3:OUTPUT_ENABLE[0]~IOB4:NDRIVE[1]IOB4:SLEW[2]IOB4:PULL[2]~IOB4:NDRIVE[2]IOB4:DCI_MODE[2]IOB4:OUTPUT_ENABLE[0]--~IOB5:PDRIVE[1]IOB5:SLEW[0]IOB5:IBUF_MODE[2]~IOB5:NDRIVE[2]IOB5:OUTPUT_DIFF[2]IOB5:IBUF_MODE[0]
7 IOB3:PDRIVE[0]--IOB3:SLEW[0]IOB3:PULL[2]IOB3:PDRIVE[3]--IOB4:PDRIVE[0]IOB4:SLEW[0]IOB4:IBUF_MODE[1]IOB4:PDRIVE[3]IOB4:DCI_MODE[1]---~IOB5:NDRIVE[1]IOB5:SLEW[1]IOB5:IBUF_MODE[1]IOB5:PDRIVE[3]IOB5:DCI_MODE[2]IOB5:OUTPUT_ENABLE[0]
8 ~IOB3:PDRIVE[1]--IOB3:SLEW[3]IOB3:PULL[1]~IOB3:NDRIVE[2]IOB3:DCI_MODE[1]IOB3:IBUF_MODE[0]~IOB4:PDRIVE[1]IOB4:SLEW[3]IOB4:IBUF_MODE[2]~IOB4:PDRIVE[2]-IOB4:OUTPUT_ENABLE[1]--IOB5:PDRIVE[0]IOB5:OUTPUT_DIFF[0]IOB5:PULL[2]~IOB5:PDRIVE[2]-IOB5:OUTPUT_ENABLE[1]
9 IOB3:NDRIVE[0]--IOB3:OUTPUT_DIFF[0]IOB3:PULL[0]IOB3:NDRIVE[4]IOB3:OUTPUT_DIFF[3]---IOB4:PULL[1]IOB4:PDRIVE[4]IOB5:OUTPUT_DIFF[3]----IOB5:SLEW[3]IOB5:PULL[1]IOB5:PDRIVE[4]-IOB5:VREF
10 IOB3:OUTPUT_MISC--IOB3:SLEW[1]IOB3:IBUF_MODE[2]~IOB3:PDRIVE[2]IOB3:DCI_MODE[0]IOB3:OUTPUT_ENABLE[1]IOB4:OUTPUT_MISCIOB4:SLEW[1]IOB4:PULL[0]IOB4:NDRIVE[3]IOB4:DCI_MODE[0]IOB4:IBUF_MODE[0]--IOB5:NDRIVE[0]IOB5:SLEW[2]IOB5:PULL[0]IOB5:NDRIVE[3]IOB5:DCI_MODE[1]IOB5:DISABLE_GTS
11 ----IOB3:DCI_MODE[3]IOB3:PDRIVE[4]IOB3:OUTPUT_DIFF[1]IOB3:DISABLE_GTSIOB4:NDRIVE[0]IOB5:OUTPUT_DIFF[5]IOB4:DCI_MODE[3]IOB4:NDRIVE[4]IOB5:OUTPUT_DIFF[1]IOB4:DISABLE_GTS--IOB5:OUTPUT_MISC-IOB5:DCI_MODE[3]IOB5:NDRIVE[4]IOB5:DCI_MODE[0]IOB5:OUTPUT_DIFF[4]
IOBS.V2.B.L2 bittile 1
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB0:NDRIVE[1]--IOB0:SLEW[2]IOB0:IBUF_MODE[1]IOB0:NDRIVE[3]IOB0:DCI_MODE[2]IOB0:OUTPUT_ENABLE[0]~IOB1:NDRIVE[1]IOB1:SLEW[2]IOB1:PULL[2]~IOB1:NDRIVE[2]IOB1:DCI_MODE[2]IOB1:OUTPUT_ENABLE[0]--~IOB2:PDRIVE[1]IOB2:SLEW[0]IOB2:IBUF_MODE[2]~IOB2:NDRIVE[2]IOB3:OUTPUT_DIFF[2]IOB2:IBUF_MODE[0]
7 IOB0:PDRIVE[0]--IOB0:SLEW[0]IOB0:PULL[2]IOB0:PDRIVE[3]IOB0:VRIOB0:VREFIOB1:PDRIVE[0]IOB1:SLEW[0]IOB1:IBUF_MODE[1]IOB1:PDRIVE[3]IOB1:DCI_MODE[1]---~IOB2:NDRIVE[1]IOB2:SLEW[1]IOB2:IBUF_MODE[1]IOB2:PDRIVE[3]IOB2:DCI_MODE[2]IOB2:OUTPUT_ENABLE[0]
8 ~IOB0:PDRIVE[1]--IOB0:SLEW[3]IOB0:PULL[1]~IOB0:NDRIVE[2]IOB0:DCI_MODE[1]IOB0:IBUF_MODE[0]~IOB1:PDRIVE[1]IOB1:SLEW[3]IOB1:IBUF_MODE[2]~IOB1:PDRIVE[2]IOB1:VRIOB1:OUTPUT_ENABLE[1]--IOB2:PDRIVE[0]IOB3:OUTPUT_DIFF[5]IOB2:PULL[2]~IOB2:PDRIVE[2]-IOB2:OUTPUT_ENABLE[1]
9 IOB0:NDRIVE[0]--IOB1:OUTPUT_DIFF[5]IOB0:PULL[0]IOB0:NDRIVE[4]IOB1:OUTPUT_DIFF[3]---IOB1:PULL[1]IOB1:PDRIVE[4]IOB1:OUTPUT_DIFF[4]----IOB2:SLEW[3]IOB2:PULL[1]IOB2:PDRIVE[4]--
10 IOB0:OUTPUT_MISC--IOB0:SLEW[1]IOB0:IBUF_MODE[2]~IOB0:PDRIVE[2]IOB0:DCI_MODE[0]IOB0:OUTPUT_ENABLE[1]IOB1:OUTPUT_MISCIOB1:SLEW[1]IOB1:PULL[0]IOB1:NDRIVE[3]IOB1:DCI_MODE[0]IOB1:IBUF_MODE[0]--IOB2:NDRIVE[0]IOB2:SLEW[2]IOB2:PULL[0]IOB2:NDRIVE[3]IOB2:DCI_MODE[1]IOB2:DISABLE_GTS
11 ----IOB0:DCI_MODE[3]IOB0:PDRIVE[4]IOB1:OUTPUT_DIFF[1]IOB0:DISABLE_GTSIOB1:NDRIVE[0]IOB1:OUTPUT_DIFF[0]IOB1:DCI_MODE[3]IOB1:NDRIVE[4]IOB1:OUTPUT_DIFF[2]IOB1:DISABLE_GTS--IOB2:OUTPUT_MISC-IOB2:DCI_MODE[3]IOB2:NDRIVE[4]IOB2:DCI_MODE[0]IOB3:OUTPUT_DIFF[4]
IOB0:NDRIVE[1, 5, 9][1, 5, 6][1, 5, 8][1, 0, 6][1, 0, 9]
IOB0:PDRIVE[1, 5, 11][1, 5, 7][1, 5, 10][1, 0, 8][1, 0, 7]
IOB1:NDRIVE[1, 11, 11][1, 11, 10][1, 11, 6][1, 8, 6][1, 8, 11]
IOB1:PDRIVE[1, 11, 9][1, 11, 7][1, 11, 8][1, 8, 8][1, 8, 7]
IOB2:NDRIVE[1, 19, 11][1, 19, 10][1, 19, 6][1, 16, 7][1, 16, 10]
IOB2:PDRIVE[1, 19, 9][1, 19, 7][1, 19, 8][1, 16, 6][1, 16, 8]
IOB3:NDRIVE[0, 5, 9][0, 5, 6][0, 5, 8][0, 0, 6][0, 0, 9]
IOB3:PDRIVE[0, 5, 11][0, 5, 7][0, 5, 10][0, 0, 8][0, 0, 7]
IOB4:NDRIVE[0, 11, 11][0, 11, 10][0, 11, 6][0, 8, 6][0, 8, 11]
IOB4:PDRIVE[0, 11, 9][0, 11, 7][0, 11, 8][0, 8, 8][0, 8, 7]
IOB5:NDRIVE[0, 19, 11][0, 19, 10][0, 19, 6][0, 16, 7][0, 16, 10]
IOB5:PDRIVE[0, 19, 9][0, 19, 7][0, 19, 8][0, 16, 6][0, 16, 8]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:DISABLE_GTS[1, 7, 11]
IOB0:OUTPUT_MISC[1, 0, 10]
IOB0:VR[1, 6, 7]
IOB0:VREF[1, 7, 7]
IOB1:DISABLE_GTS[1, 13, 11]
IOB1:OUTPUT_MISC[1, 8, 10]
IOB1:VR[1, 12, 8]
IOB2:DISABLE_GTS[1, 21, 10]
IOB2:OUTPUT_MISC[1, 16, 11]
IOB3:DISABLE_GTS[0, 7, 11]
IOB3:OUTPUT_MISC[0, 0, 10]
IOB4:DISABLE_GTS[0, 13, 11]
IOB4:OUTPUT_MISC[0, 8, 10]
IOB5:DISABLE_GTS[0, 21, 10]
IOB5:OUTPUT_MISC[0, 16, 11]
IOB5:VREF[0, 21, 9]
Non-inverted[0]
IOB0:SLEW[1, 3, 8][1, 3, 6][1, 3, 10][1, 3, 7]
IOB1:SLEW[1, 9, 8][1, 9, 6][1, 9, 10][1, 9, 7]
IOB2:SLEW[1, 17, 9][1, 17, 10][1, 17, 7][1, 17, 6]
IOB3:SLEW[0, 3, 8][0, 3, 6][0, 3, 10][0, 3, 7]
IOB4:SLEW[0, 9, 8][0, 9, 6][0, 9, 10][0, 9, 7]
IOB5:SLEW[0, 17, 9][0, 17, 10][0, 17, 7][0, 17, 6]
Non-inverted[3][2][1][0]
IOB1:OUTPUT_DIFF[1, 3, 9][1, 12, 9][1, 6, 9][1, 12, 11][1, 6, 11][1, 9, 11]
IOB3:OUTPUT_DIFF[1, 17, 8][1, 21, 11][0, 6, 9][1, 20, 6][0, 6, 11][0, 3, 9]
IOB5:OUTPUT_DIFF[0, 9, 11][0, 21, 11][0, 12, 9][0, 20, 6][0, 12, 11][0, 17, 8]
Non-inverted[5][4][3][2][1][0]
IOB0:PULL[1, 4, 7][1, 4, 8][1, 4, 9]
IOB1:PULL[1, 10, 6][1, 10, 9][1, 10, 10]
IOB2:PULL[1, 18, 8][1, 18, 9][1, 18, 10]
IOB3:PULL[0, 4, 7][0, 4, 8][0, 4, 9]
IOB4:PULL[0, 10, 6][0, 10, 9][0, 10, 10]
IOB5:PULL[0, 18, 8][0, 18, 9][0, 18, 10]
PULLDOWN000
NONE001
PULLUP011
KEEPER101
IOB0:DCI_MODE[1, 4, 11][1, 6, 6][1, 6, 8][1, 6, 10]
IOB1:DCI_MODE[1, 10, 11][1, 12, 6][1, 12, 7][1, 12, 10]
IOB2:DCI_MODE[1, 18, 11][1, 20, 7][1, 20, 10][1, 20, 11]
IOB3:DCI_MODE[0, 4, 11][0, 6, 6][0, 6, 8][0, 6, 10]
IOB4:DCI_MODE[0, 10, 11][0, 12, 6][0, 12, 7][0, 12, 10]
IOB5:DCI_MODE[0, 18, 11][0, 20, 7][0, 20, 10][0, 20, 11]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:OUTPUT_ENABLE[1, 7, 10][1, 7, 6]
IOB1:OUTPUT_ENABLE[1, 13, 8][1, 13, 6]
IOB2:OUTPUT_ENABLE[1, 21, 8][1, 21, 7]
IOB3:OUTPUT_ENABLE[0, 7, 10][0, 7, 6]
IOB4:OUTPUT_ENABLE[0, 13, 8][0, 13, 6]
IOB5:OUTPUT_ENABLE[0, 21, 8][0, 21, 7]
Non-inverted[1][0]
IOB0:IBUF_MODE[1, 4, 10][1, 4, 6][1, 7, 8]
IOB1:IBUF_MODE[1, 10, 8][1, 10, 7][1, 13, 10]
IOB2:IBUF_MODE[1, 18, 6][1, 18, 7][1, 21, 6]
IOB3:IBUF_MODE[0, 4, 10][0, 4, 6][0, 7, 8]
IOB4:IBUF_MODE[0, 10, 8][0, 10, 7][0, 13, 10]
IOB5:IBUF_MODE[0, 18, 6][0, 18, 7][0, 21, 6]
NONE000
VREF011
DIFF101
CMOS111

IOBS.V2.B.R2

IOBS.V2.B.R2 bittile 0
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB3:NDRIVE[1]--IOB3:SLEW[2]IOB3:IBUF_MODE[1]IOB3:NDRIVE[3]IOB3:DCI_MODE[2]IOB3:OUTPUT_ENABLE[0]~IOB4:NDRIVE[1]IOB4:SLEW[2]IOB4:PULL[2]~IOB4:NDRIVE[2]IOB4:DCI_MODE[2]IOB4:OUTPUT_ENABLE[0]--~IOB5:PDRIVE[1]IOB5:SLEW[0]IOB5:IBUF_MODE[2]~IOB5:NDRIVE[2]IOB5:OUTPUT_DIFF[2]IOB5:IBUF_MODE[0]
7 IOB3:PDRIVE[0]--IOB3:SLEW[0]IOB3:PULL[2]IOB3:PDRIVE[3]--IOB4:PDRIVE[0]IOB4:SLEW[0]IOB4:IBUF_MODE[1]IOB4:PDRIVE[3]IOB4:DCI_MODE[1]---~IOB5:NDRIVE[1]IOB5:SLEW[1]IOB5:IBUF_MODE[1]IOB5:PDRIVE[3]IOB5:DCI_MODE[2]IOB5:OUTPUT_ENABLE[0]
8 ~IOB3:PDRIVE[1]--IOB3:SLEW[3]IOB3:PULL[1]~IOB3:NDRIVE[2]IOB3:DCI_MODE[1]IOB3:IBUF_MODE[0]~IOB4:PDRIVE[1]IOB4:SLEW[3]IOB4:IBUF_MODE[2]~IOB4:PDRIVE[2]IOB4:VRIOB4:OUTPUT_ENABLE[1]--IOB5:PDRIVE[0]IOB5:OUTPUT_DIFF[0]IOB5:PULL[2]~IOB5:PDRIVE[2]IOB5:VRIOB5:OUTPUT_ENABLE[1]
9 IOB3:NDRIVE[0]--IOB3:OUTPUT_DIFF[0]IOB3:PULL[0]IOB3:NDRIVE[4]IOB3:OUTPUT_DIFF[3]---IOB4:PULL[1]IOB4:PDRIVE[4]IOB5:OUTPUT_DIFF[3]----IOB5:SLEW[3]IOB5:PULL[1]IOB5:PDRIVE[4]-IOB5:VREF
10 IOB3:OUTPUT_MISC--IOB3:SLEW[1]IOB3:IBUF_MODE[2]~IOB3:PDRIVE[2]IOB3:DCI_MODE[0]IOB3:OUTPUT_ENABLE[1]IOB4:OUTPUT_MISCIOB4:SLEW[1]IOB4:PULL[0]IOB4:NDRIVE[3]IOB4:DCI_MODE[0]IOB4:IBUF_MODE[0]--IOB5:NDRIVE[0]IOB5:SLEW[2]IOB5:PULL[0]IOB5:NDRIVE[3]IOB5:DCI_MODE[1]IOB5:DISABLE_GTS
11 ----IOB3:DCI_MODE[3]IOB3:PDRIVE[4]IOB3:OUTPUT_DIFF[1]IOB3:DISABLE_GTSIOB4:NDRIVE[0]IOB5:OUTPUT_DIFF[5]IOB4:DCI_MODE[3]IOB4:NDRIVE[4]IOB5:OUTPUT_DIFF[1]IOB4:DISABLE_GTS--IOB5:OUTPUT_MISC-IOB5:DCI_MODE[3]IOB5:NDRIVE[4]IOB5:DCI_MODE[0]IOB5:OUTPUT_DIFF[4]
IOBS.V2.B.R2 bittile 1
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB0:NDRIVE[1]--IOB0:SLEW[2]IOB0:IBUF_MODE[1]IOB0:NDRIVE[3]IOB0:DCI_MODE[2]IOB0:OUTPUT_ENABLE[0]~IOB1:NDRIVE[1]IOB1:SLEW[2]IOB1:PULL[2]~IOB1:NDRIVE[2]IOB1:DCI_MODE[2]IOB1:OUTPUT_ENABLE[0]--~IOB2:PDRIVE[1]IOB2:SLEW[0]IOB2:IBUF_MODE[2]~IOB2:NDRIVE[2]IOB3:OUTPUT_DIFF[2]IOB2:IBUF_MODE[0]
7 IOB0:PDRIVE[0]--IOB0:SLEW[0]IOB0:PULL[2]IOB0:PDRIVE[3]-IOB0:VREFIOB1:PDRIVE[0]IOB1:SLEW[0]IOB1:IBUF_MODE[1]IOB1:PDRIVE[3]IOB1:DCI_MODE[1]---~IOB2:NDRIVE[1]IOB2:SLEW[1]IOB2:IBUF_MODE[1]IOB2:PDRIVE[3]IOB2:DCI_MODE[2]IOB2:OUTPUT_ENABLE[0]
8 ~IOB0:PDRIVE[1]--IOB0:SLEW[3]IOB0:PULL[1]~IOB0:NDRIVE[2]IOB0:DCI_MODE[1]IOB0:IBUF_MODE[0]~IOB1:PDRIVE[1]IOB1:SLEW[3]IOB1:IBUF_MODE[2]~IOB1:PDRIVE[2]-IOB1:OUTPUT_ENABLE[1]--IOB2:PDRIVE[0]IOB3:OUTPUT_DIFF[5]IOB2:PULL[2]~IOB2:PDRIVE[2]-IOB2:OUTPUT_ENABLE[1]
9 IOB0:NDRIVE[0]--IOB1:OUTPUT_DIFF[5]IOB0:PULL[0]IOB0:NDRIVE[4]IOB1:OUTPUT_DIFF[3]---IOB1:PULL[1]IOB1:PDRIVE[4]IOB1:OUTPUT_DIFF[4]----IOB2:SLEW[3]IOB2:PULL[1]IOB2:PDRIVE[4]--
10 IOB0:OUTPUT_MISC--IOB0:SLEW[1]IOB0:IBUF_MODE[2]~IOB0:PDRIVE[2]IOB0:DCI_MODE[0]IOB0:OUTPUT_ENABLE[1]IOB1:OUTPUT_MISCIOB1:SLEW[1]IOB1:PULL[0]IOB1:NDRIVE[3]IOB1:DCI_MODE[0]IOB1:IBUF_MODE[0]--IOB2:NDRIVE[0]IOB2:SLEW[2]IOB2:PULL[0]IOB2:NDRIVE[3]IOB2:DCI_MODE[1]IOB2:DISABLE_GTS
11 ----IOB0:DCI_MODE[3]IOB0:PDRIVE[4]IOB1:OUTPUT_DIFF[1]IOB0:DISABLE_GTSIOB1:NDRIVE[0]IOB1:OUTPUT_DIFF[0]IOB1:DCI_MODE[3]IOB1:NDRIVE[4]IOB1:OUTPUT_DIFF[2]IOB1:DISABLE_GTS--IOB2:OUTPUT_MISC-IOB2:DCI_MODE[3]IOB2:NDRIVE[4]IOB2:DCI_MODE[0]IOB3:OUTPUT_DIFF[4]
IOB0:NDRIVE[1, 5, 9][1, 5, 6][1, 5, 8][1, 0, 6][1, 0, 9]
IOB0:PDRIVE[1, 5, 11][1, 5, 7][1, 5, 10][1, 0, 8][1, 0, 7]
IOB1:NDRIVE[1, 11, 11][1, 11, 10][1, 11, 6][1, 8, 6][1, 8, 11]
IOB1:PDRIVE[1, 11, 9][1, 11, 7][1, 11, 8][1, 8, 8][1, 8, 7]
IOB2:NDRIVE[1, 19, 11][1, 19, 10][1, 19, 6][1, 16, 7][1, 16, 10]
IOB2:PDRIVE[1, 19, 9][1, 19, 7][1, 19, 8][1, 16, 6][1, 16, 8]
IOB3:NDRIVE[0, 5, 9][0, 5, 6][0, 5, 8][0, 0, 6][0, 0, 9]
IOB3:PDRIVE[0, 5, 11][0, 5, 7][0, 5, 10][0, 0, 8][0, 0, 7]
IOB4:NDRIVE[0, 11, 11][0, 11, 10][0, 11, 6][0, 8, 6][0, 8, 11]
IOB4:PDRIVE[0, 11, 9][0, 11, 7][0, 11, 8][0, 8, 8][0, 8, 7]
IOB5:NDRIVE[0, 19, 11][0, 19, 10][0, 19, 6][0, 16, 7][0, 16, 10]
IOB5:PDRIVE[0, 19, 9][0, 19, 7][0, 19, 8][0, 16, 6][0, 16, 8]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:DISABLE_GTS[1, 7, 11]
IOB0:OUTPUT_MISC[1, 0, 10]
IOB0:VREF[1, 7, 7]
IOB1:DISABLE_GTS[1, 13, 11]
IOB1:OUTPUT_MISC[1, 8, 10]
IOB2:DISABLE_GTS[1, 21, 10]
IOB2:OUTPUT_MISC[1, 16, 11]
IOB3:DISABLE_GTS[0, 7, 11]
IOB3:OUTPUT_MISC[0, 0, 10]
IOB4:DISABLE_GTS[0, 13, 11]
IOB4:OUTPUT_MISC[0, 8, 10]
IOB4:VR[0, 12, 8]
IOB5:DISABLE_GTS[0, 21, 10]
IOB5:OUTPUT_MISC[0, 16, 11]
IOB5:VR[0, 20, 8]
IOB5:VREF[0, 21, 9]
Non-inverted[0]
IOB0:SLEW[1, 3, 8][1, 3, 6][1, 3, 10][1, 3, 7]
IOB1:SLEW[1, 9, 8][1, 9, 6][1, 9, 10][1, 9, 7]
IOB2:SLEW[1, 17, 9][1, 17, 10][1, 17, 7][1, 17, 6]
IOB3:SLEW[0, 3, 8][0, 3, 6][0, 3, 10][0, 3, 7]
IOB4:SLEW[0, 9, 8][0, 9, 6][0, 9, 10][0, 9, 7]
IOB5:SLEW[0, 17, 9][0, 17, 10][0, 17, 7][0, 17, 6]
Non-inverted[3][2][1][0]
IOB1:OUTPUT_DIFF[1, 3, 9][1, 12, 9][1, 6, 9][1, 12, 11][1, 6, 11][1, 9, 11]
IOB3:OUTPUT_DIFF[1, 17, 8][1, 21, 11][0, 6, 9][1, 20, 6][0, 6, 11][0, 3, 9]
IOB5:OUTPUT_DIFF[0, 9, 11][0, 21, 11][0, 12, 9][0, 20, 6][0, 12, 11][0, 17, 8]
Non-inverted[5][4][3][2][1][0]
IOB0:PULL[1, 4, 7][1, 4, 8][1, 4, 9]
IOB1:PULL[1, 10, 6][1, 10, 9][1, 10, 10]
IOB2:PULL[1, 18, 8][1, 18, 9][1, 18, 10]
IOB3:PULL[0, 4, 7][0, 4, 8][0, 4, 9]
IOB4:PULL[0, 10, 6][0, 10, 9][0, 10, 10]
IOB5:PULL[0, 18, 8][0, 18, 9][0, 18, 10]
PULLDOWN000
NONE001
PULLUP011
KEEPER101
IOB0:DCI_MODE[1, 4, 11][1, 6, 6][1, 6, 8][1, 6, 10]
IOB1:DCI_MODE[1, 10, 11][1, 12, 6][1, 12, 7][1, 12, 10]
IOB2:DCI_MODE[1, 18, 11][1, 20, 7][1, 20, 10][1, 20, 11]
IOB3:DCI_MODE[0, 4, 11][0, 6, 6][0, 6, 8][0, 6, 10]
IOB4:DCI_MODE[0, 10, 11][0, 12, 6][0, 12, 7][0, 12, 10]
IOB5:DCI_MODE[0, 18, 11][0, 20, 7][0, 20, 10][0, 20, 11]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:OUTPUT_ENABLE[1, 7, 10][1, 7, 6]
IOB1:OUTPUT_ENABLE[1, 13, 8][1, 13, 6]
IOB2:OUTPUT_ENABLE[1, 21, 8][1, 21, 7]
IOB3:OUTPUT_ENABLE[0, 7, 10][0, 7, 6]
IOB4:OUTPUT_ENABLE[0, 13, 8][0, 13, 6]
IOB5:OUTPUT_ENABLE[0, 21, 8][0, 21, 7]
Non-inverted[1][0]
IOB0:IBUF_MODE[1, 4, 10][1, 4, 6][1, 7, 8]
IOB1:IBUF_MODE[1, 10, 8][1, 10, 7][1, 13, 10]
IOB2:IBUF_MODE[1, 18, 6][1, 18, 7][1, 21, 6]
IOB3:IBUF_MODE[0, 4, 10][0, 4, 6][0, 7, 8]
IOB4:IBUF_MODE[0, 10, 8][0, 10, 7][0, 13, 10]
IOB5:IBUF_MODE[0, 18, 6][0, 18, 7][0, 21, 6]
NONE000
VREF011
DIFF101
CMOS111

IOBS.V2.L.B2

IOBS.V2.L.B2 bittile 0
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 --IOB0:SLEW[2]IOB0:SLEW[3]
5 --IOB0:SLEW[0]IOB0:SLEW[1]
6 --IOB0:OUTPUT_DIFF[0]-
7 ---IOB0:OUTPUT_MISC
8 --IOB0:NDRIVE[0]IOB0:PDRIVE[0]
9 --~IOB0:NDRIVE[1]~IOB0:PDRIVE[1]
10 --~IOB0:NDRIVE[2]~IOB0:PDRIVE[2]
11 --IOB0:NDRIVE[3]IOB0:PDRIVE[3]
12 --IOB0:NDRIVE[4]IOB0:PDRIVE[4]
13 --IOB0:DCI_MODE[3]IOB0:PULL[0]
14 --IOB0:PULL[1]IOB0:PULL[2]
15 --IOB0:IBUF_MODE[1]IOB0:IBUF_MODE[2]
16 --IOB0:IBUF_MODE[0]IOB0:OUTPUT_ENABLE[1]
17 --IOB0:OUTPUT_ENABLE[0]-
18 --IOB0:DISABLE_GTS-
19 --IOB0:OUTPUT_DIFF[3]IOB0:OUTPUT_DIFF[1]
20 --IOB0:DCI_MODE[0]IOB0:DCI_MODE[1]
21 --IOB0:DCI_MODE[2]-
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 --IOB1:SLEW[2]IOB1:SLEW[3]
32 --IOB1:SLEW[0]IOB1:SLEW[1]
33 --IOB0:OUTPUT_DIFF[5]-
34 ---IOB1:OUTPUT_MISC
35 --IOB1:NDRIVE[0]IOB1:PDRIVE[0]
36 --~IOB1:NDRIVE[1]~IOB1:PDRIVE[1]
37 --~IOB1:NDRIVE[2]~IOB1:PDRIVE[2]
38 --IOB1:NDRIVE[3]IOB1:PDRIVE[3]
39 --IOB1:NDRIVE[4]IOB1:PDRIVE[4]
40 --IOB1:DCI_MODE[3]IOB1:PULL[0]
41 --IOB1:PULL[1]IOB1:PULL[2]
42 --IOB1:IBUF_MODE[1]IOB1:IBUF_MODE[2]
43 --IOB1:IBUF_MODE[0]IOB1:OUTPUT_ENABLE[1]
44 --IOB1:OUTPUT_ENABLE[0]-
45 --IOB1:DISABLE_GTS-
46 --IOB0:OUTPUT_DIFF[4]IOB0:OUTPUT_DIFF[2]
47 --IOB1:DCI_MODE[0]IOB1:DCI_MODE[1]
48 --IOB1:DCI_MODE[2]-
49 ----
50 ----
51 ----
52 ----
53 ----
54 ----
55 ----
56 ----
57 ----
58 --IOB2:SLEW[2]IOB2:SLEW[3]
59 --IOB2:SLEW[0]IOB2:SLEW[1]
60 --IOB2:OUTPUT_DIFF[0]-
61 ---IOB2:OUTPUT_MISC
62 --IOB2:NDRIVE[0]IOB2:PDRIVE[0]
63 --~IOB2:NDRIVE[1]~IOB2:PDRIVE[1]
64 --~IOB2:NDRIVE[2]~IOB2:PDRIVE[2]
65 --IOB2:NDRIVE[3]IOB2:PDRIVE[3]
66 --IOB2:NDRIVE[4]IOB2:PDRIVE[4]
67 --IOB2:DCI_MODE[3]IOB2:PULL[0]
68 --IOB2:PULL[1]IOB2:PULL[2]
69 --IOB2:IBUF_MODE[1]IOB2:IBUF_MODE[2]
70 --IOB2:IBUF_MODE[0]IOB2:OUTPUT_ENABLE[1]
71 --IOB2:OUTPUT_ENABLE[0]-
72 --IOB2:DISABLE_GTS-
73 --IOB2:OUTPUT_DIFF[3]IOB2:OUTPUT_DIFF[1]
74 --IOB2:DCI_MODE[0]IOB2:DCI_MODE[1]
75 --IOB2:DCI_MODE[2]IOB2:VR
IOBS.V2.L.B2 bittile 1
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 --IOB3:SLEW[2]IOB3:SLEW[3]
5 --IOB3:SLEW[0]IOB3:SLEW[1]
6 --IOB2:OUTPUT_DIFF[5]-
7 ---IOB3:OUTPUT_MISC
8 --IOB3:NDRIVE[0]IOB3:PDRIVE[0]
9 --~IOB3:NDRIVE[1]~IOB3:PDRIVE[1]
10 --~IOB3:NDRIVE[2]~IOB3:PDRIVE[2]
11 --IOB3:NDRIVE[3]IOB3:PDRIVE[3]
12 --IOB3:NDRIVE[4]IOB3:PDRIVE[4]
13 --IOB3:DCI_MODE[3]IOB3:PULL[0]
14 --IOB3:PULL[1]IOB3:PULL[2]
15 --IOB3:IBUF_MODE[1]IOB3:IBUF_MODE[2]
16 --IOB3:IBUF_MODE[0]IOB3:OUTPUT_ENABLE[1]
17 --IOB3:OUTPUT_ENABLE[0]-
18 --IOB3:DISABLE_GTS-
19 --IOB2:OUTPUT_DIFF[4]IOB2:OUTPUT_DIFF[2]
20 --IOB3:DCI_MODE[0]IOB3:DCI_MODE[1]
21 --IOB3:DCI_MODE[2]IOB3:VR
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 --IOB4:SLEW[2]IOB4:SLEW[3]
32 --IOB4:SLEW[0]IOB4:SLEW[1]
33 --IOB4:OUTPUT_DIFF[0]-
34 ---IOB4:OUTPUT_MISC
35 --IOB4:NDRIVE[0]IOB4:PDRIVE[0]
36 --~IOB4:NDRIVE[1]~IOB4:PDRIVE[1]
37 --~IOB4:NDRIVE[2]~IOB4:PDRIVE[2]
38 --IOB4:NDRIVE[3]IOB4:PDRIVE[3]
39 --IOB4:NDRIVE[4]IOB4:PDRIVE[4]
40 --IOB4:DCI_MODE[3]IOB4:PULL[0]
41 --IOB4:PULL[1]IOB4:PULL[2]
42 --IOB4:IBUF_MODE[1]IOB4:IBUF_MODE[2]
43 --IOB4:IBUF_MODE[0]IOB4:OUTPUT_ENABLE[1]
44 --IOB4:OUTPUT_ENABLE[0]-
45 --IOB4:DISABLE_GTS-
46 --IOB4:OUTPUT_DIFF[3]IOB4:OUTPUT_DIFF[1]
47 --IOB4:DCI_MODE[0]IOB4:DCI_MODE[1]
48 --IOB4:DCI_MODE[2]-
49 ----
50 ----
51 ----
52 ----
53 ----
54 ----
55 ----
56 ----
57 ----
58 --IOB5:SLEW[2]IOB5:SLEW[3]
59 --IOB5:SLEW[0]IOB5:SLEW[1]
60 --IOB4:OUTPUT_DIFF[5]-
61 ---IOB5:OUTPUT_MISC
62 --IOB5:NDRIVE[0]IOB5:PDRIVE[0]
63 --~IOB5:NDRIVE[1]~IOB5:PDRIVE[1]
64 --~IOB5:NDRIVE[2]~IOB5:PDRIVE[2]
65 --IOB5:NDRIVE[3]IOB5:PDRIVE[3]
66 --IOB5:NDRIVE[4]IOB5:PDRIVE[4]
67 --IOB5:DCI_MODE[3]IOB5:PULL[0]
68 --IOB5:PULL[1]IOB5:PULL[2]
69 --IOB5:IBUF_MODE[1]IOB5:IBUF_MODE[2]
70 --IOB5:IBUF_MODE[0]IOB5:OUTPUT_ENABLE[1]
71 --IOB5:OUTPUT_ENABLE[0]IOB5:VREF
72 --IOB5:DISABLE_GTS-
73 --IOB4:OUTPUT_DIFF[4]IOB4:OUTPUT_DIFF[2]
74 --IOB5:DCI_MODE[0]IOB5:DCI_MODE[1]
75 --IOB5:DCI_MODE[2]-
IOB0:SLEW[0, 3, 4][0, 2, 4][0, 3, 5][0, 2, 5]
IOB1:SLEW[0, 3, 31][0, 2, 31][0, 3, 32][0, 2, 32]
IOB2:SLEW[0, 3, 58][0, 2, 58][0, 3, 59][0, 2, 59]
IOB3:SLEW[1, 3, 4][1, 2, 4][1, 3, 5][1, 2, 5]
IOB4:SLEW[1, 3, 31][1, 2, 31][1, 3, 32][1, 2, 32]
IOB5:SLEW[1, 3, 58][1, 2, 58][1, 3, 59][1, 2, 59]
Non-inverted[3][2][1][0]
IOB0:OUTPUT_DIFF[0, 2, 33][0, 2, 46][0, 2, 19][0, 3, 46][0, 3, 19][0, 2, 6]
IOB2:OUTPUT_DIFF[1, 2, 6][1, 2, 19][0, 2, 73][1, 3, 19][0, 3, 73][0, 2, 60]
IOB4:OUTPUT_DIFF[1, 2, 60][1, 2, 73][1, 2, 46][1, 3, 73][1, 3, 46][1, 2, 33]
Non-inverted[5][4][3][2][1][0]
IOB0:NDRIVE[0, 2, 12][0, 2, 11][0, 2, 10][0, 2, 9][0, 2, 8]
IOB0:PDRIVE[0, 3, 12][0, 3, 11][0, 3, 10][0, 3, 9][0, 3, 8]
IOB1:NDRIVE[0, 2, 39][0, 2, 38][0, 2, 37][0, 2, 36][0, 2, 35]
IOB1:PDRIVE[0, 3, 39][0, 3, 38][0, 3, 37][0, 3, 36][0, 3, 35]
IOB2:NDRIVE[0, 2, 66][0, 2, 65][0, 2, 64][0, 2, 63][0, 2, 62]
IOB2:PDRIVE[0, 3, 66][0, 3, 65][0, 3, 64][0, 3, 63][0, 3, 62]
IOB3:NDRIVE[1, 2, 12][1, 2, 11][1, 2, 10][1, 2, 9][1, 2, 8]
IOB3:PDRIVE[1, 3, 12][1, 3, 11][1, 3, 10][1, 3, 9][1, 3, 8]
IOB4:NDRIVE[1, 2, 39][1, 2, 38][1, 2, 37][1, 2, 36][1, 2, 35]
IOB4:PDRIVE[1, 3, 39][1, 3, 38][1, 3, 37][1, 3, 36][1, 3, 35]
IOB5:NDRIVE[1, 2, 66][1, 2, 65][1, 2, 64][1, 2, 63][1, 2, 62]
IOB5:PDRIVE[1, 3, 66][1, 3, 65][1, 3, 64][1, 3, 63][1, 3, 62]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:IBUF_MODE[0, 3, 15][0, 2, 15][0, 2, 16]
IOB1:IBUF_MODE[0, 3, 42][0, 2, 42][0, 2, 43]
IOB2:IBUF_MODE[0, 3, 69][0, 2, 69][0, 2, 70]
IOB3:IBUF_MODE[1, 3, 15][1, 2, 15][1, 2, 16]
IOB4:IBUF_MODE[1, 3, 42][1, 2, 42][1, 2, 43]
IOB5:IBUF_MODE[1, 3, 69][1, 2, 69][1, 2, 70]
NONE000
VREF011
DIFF101
CMOS111
IOB0:OUTPUT_ENABLE[0, 3, 16][0, 2, 17]
IOB1:OUTPUT_ENABLE[0, 3, 43][0, 2, 44]
IOB2:OUTPUT_ENABLE[0, 3, 70][0, 2, 71]
IOB3:OUTPUT_ENABLE[1, 3, 16][1, 2, 17]
IOB4:OUTPUT_ENABLE[1, 3, 43][1, 2, 44]
IOB5:OUTPUT_ENABLE[1, 3, 70][1, 2, 71]
Non-inverted[1][0]
IOB0:DISABLE_GTS[0, 2, 18]
IOB0:OUTPUT_MISC[0, 3, 7]
IOB1:DISABLE_GTS[0, 2, 45]
IOB1:OUTPUT_MISC[0, 3, 34]
IOB2:DISABLE_GTS[0, 2, 72]
IOB2:OUTPUT_MISC[0, 3, 61]
IOB2:VR[0, 3, 75]
IOB3:DISABLE_GTS[1, 2, 18]
IOB3:OUTPUT_MISC[1, 3, 7]
IOB3:VR[1, 3, 21]
IOB4:DISABLE_GTS[1, 2, 45]
IOB4:OUTPUT_MISC[1, 3, 34]
IOB5:DISABLE_GTS[1, 2, 72]
IOB5:OUTPUT_MISC[1, 3, 61]
IOB5:VREF[1, 3, 71]
Non-inverted[0]
IOB0:DCI_MODE[0, 2, 13][0, 2, 21][0, 3, 20][0, 2, 20]
IOB1:DCI_MODE[0, 2, 40][0, 2, 48][0, 3, 47][0, 2, 47]
IOB2:DCI_MODE[0, 2, 67][0, 2, 75][0, 3, 74][0, 2, 74]
IOB3:DCI_MODE[1, 2, 13][1, 2, 21][1, 3, 20][1, 2, 20]
IOB4:DCI_MODE[1, 2, 40][1, 2, 48][1, 3, 47][1, 2, 47]
IOB5:DCI_MODE[1, 2, 67][1, 2, 75][1, 3, 74][1, 2, 74]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:PULL[0, 3, 14][0, 2, 14][0, 3, 13]
IOB1:PULL[0, 3, 41][0, 2, 41][0, 3, 40]
IOB2:PULL[0, 3, 68][0, 2, 68][0, 3, 67]
IOB3:PULL[1, 3, 14][1, 2, 14][1, 3, 13]
IOB4:PULL[1, 3, 41][1, 2, 41][1, 3, 40]
IOB5:PULL[1, 3, 68][1, 2, 68][1, 3, 67]
PULLDOWN000
NONE001
PULLUP011
KEEPER101

IOBS.V2.L.T2

IOBS.V2.L.T2 bittile 0
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 --IOB0:SLEW[2]IOB0:SLEW[3]
5 --IOB0:SLEW[0]IOB0:SLEW[1]
6 --IOB0:OUTPUT_DIFF[0]-
7 ---IOB0:OUTPUT_MISC
8 --IOB0:NDRIVE[0]IOB0:PDRIVE[0]
9 --~IOB0:NDRIVE[1]~IOB0:PDRIVE[1]
10 --~IOB0:NDRIVE[2]~IOB0:PDRIVE[2]
11 --IOB0:NDRIVE[3]IOB0:PDRIVE[3]
12 --IOB0:NDRIVE[4]IOB0:PDRIVE[4]
13 --IOB0:DCI_MODE[3]IOB0:PULL[0]
14 --IOB0:PULL[1]IOB0:PULL[2]
15 --IOB0:IBUF_MODE[1]IOB0:IBUF_MODE[2]
16 --IOB0:IBUF_MODE[0]IOB0:OUTPUT_ENABLE[1]
17 --IOB0:OUTPUT_ENABLE[0]IOB0:VREF
18 --IOB0:DISABLE_GTS-
19 --IOB0:OUTPUT_DIFF[3]IOB0:OUTPUT_DIFF[1]
20 --IOB0:DCI_MODE[0]IOB0:DCI_MODE[1]
21 --IOB0:DCI_MODE[2]-
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 --IOB1:SLEW[2]IOB1:SLEW[3]
32 --IOB1:SLEW[0]IOB1:SLEW[1]
33 --IOB0:OUTPUT_DIFF[5]-
34 ---IOB1:OUTPUT_MISC
35 --IOB1:NDRIVE[0]IOB1:PDRIVE[0]
36 --~IOB1:NDRIVE[1]~IOB1:PDRIVE[1]
37 --~IOB1:NDRIVE[2]~IOB1:PDRIVE[2]
38 --IOB1:NDRIVE[3]IOB1:PDRIVE[3]
39 --IOB1:NDRIVE[4]IOB1:PDRIVE[4]
40 --IOB1:DCI_MODE[3]IOB1:PULL[0]
41 --IOB1:PULL[1]IOB1:PULL[2]
42 --IOB1:IBUF_MODE[1]IOB1:IBUF_MODE[2]
43 --IOB1:IBUF_MODE[0]IOB1:OUTPUT_ENABLE[1]
44 --IOB1:OUTPUT_ENABLE[0]-
45 --IOB1:DISABLE_GTS-
46 --IOB0:OUTPUT_DIFF[4]IOB0:OUTPUT_DIFF[2]
47 --IOB1:DCI_MODE[0]IOB1:DCI_MODE[1]
48 --IOB1:DCI_MODE[2]-
49 ----
50 ----
51 ----
52 ----
53 ----
54 ----
55 ----
56 ----
57 ----
58 --IOB2:SLEW[2]IOB2:SLEW[3]
59 --IOB2:SLEW[0]IOB2:SLEW[1]
60 --IOB2:OUTPUT_DIFF[0]-
61 ---IOB2:OUTPUT_MISC
62 --IOB2:NDRIVE[0]IOB2:PDRIVE[0]
63 --~IOB2:NDRIVE[1]~IOB2:PDRIVE[1]
64 --~IOB2:NDRIVE[2]~IOB2:PDRIVE[2]
65 --IOB2:NDRIVE[3]IOB2:PDRIVE[3]
66 --IOB2:NDRIVE[4]IOB2:PDRIVE[4]
67 --IOB2:DCI_MODE[3]IOB2:PULL[0]
68 --IOB2:PULL[1]IOB2:PULL[2]
69 --IOB2:IBUF_MODE[1]IOB2:IBUF_MODE[2]
70 --IOB2:IBUF_MODE[0]IOB2:OUTPUT_ENABLE[1]
71 --IOB2:OUTPUT_ENABLE[0]-
72 --IOB2:DISABLE_GTS-
73 --IOB2:OUTPUT_DIFF[3]IOB2:OUTPUT_DIFF[1]
74 --IOB2:DCI_MODE[0]IOB2:DCI_MODE[1]
75 --IOB2:DCI_MODE[2]IOB2:VR
IOBS.V2.L.T2 bittile 1
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 --IOB3:SLEW[2]IOB3:SLEW[3]
5 --IOB3:SLEW[0]IOB3:SLEW[1]
6 --IOB2:OUTPUT_DIFF[5]-
7 ---IOB3:OUTPUT_MISC
8 --IOB3:NDRIVE[0]IOB3:PDRIVE[0]
9 --~IOB3:NDRIVE[1]~IOB3:PDRIVE[1]
10 --~IOB3:NDRIVE[2]~IOB3:PDRIVE[2]
11 --IOB3:NDRIVE[3]IOB3:PDRIVE[3]
12 --IOB3:NDRIVE[4]IOB3:PDRIVE[4]
13 --IOB3:DCI_MODE[3]IOB3:PULL[0]
14 --IOB3:PULL[1]IOB3:PULL[2]
15 --IOB3:IBUF_MODE[1]IOB3:IBUF_MODE[2]
16 --IOB3:IBUF_MODE[0]IOB3:OUTPUT_ENABLE[1]
17 --IOB3:OUTPUT_ENABLE[0]-
18 --IOB3:DISABLE_GTS-
19 --IOB2:OUTPUT_DIFF[4]IOB2:OUTPUT_DIFF[2]
20 --IOB3:DCI_MODE[0]IOB3:DCI_MODE[1]
21 --IOB3:DCI_MODE[2]IOB3:VR
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 --IOB4:SLEW[2]IOB4:SLEW[3]
32 --IOB4:SLEW[0]IOB4:SLEW[1]
33 --IOB4:OUTPUT_DIFF[0]-
34 ---IOB4:OUTPUT_MISC
35 --IOB4:NDRIVE[0]IOB4:PDRIVE[0]
36 --~IOB4:NDRIVE[1]~IOB4:PDRIVE[1]
37 --~IOB4:NDRIVE[2]~IOB4:PDRIVE[2]
38 --IOB4:NDRIVE[3]IOB4:PDRIVE[3]
39 --IOB4:NDRIVE[4]IOB4:PDRIVE[4]
40 --IOB4:DCI_MODE[3]IOB4:PULL[0]
41 --IOB4:PULL[1]IOB4:PULL[2]
42 --IOB4:IBUF_MODE[1]IOB4:IBUF_MODE[2]
43 --IOB4:IBUF_MODE[0]IOB4:OUTPUT_ENABLE[1]
44 --IOB4:OUTPUT_ENABLE[0]-
45 --IOB4:DISABLE_GTS-
46 --IOB4:OUTPUT_DIFF[3]IOB4:OUTPUT_DIFF[1]
47 --IOB4:DCI_MODE[0]IOB4:DCI_MODE[1]
48 --IOB4:DCI_MODE[2]-
49 ----
50 ----
51 ----
52 ----
53 ----
54 ----
55 ----
56 ----
57 ----
58 --IOB5:SLEW[2]IOB5:SLEW[3]
59 --IOB5:SLEW[0]IOB5:SLEW[1]
60 --IOB4:OUTPUT_DIFF[5]-
61 ---IOB5:OUTPUT_MISC
62 --IOB5:NDRIVE[0]IOB5:PDRIVE[0]
63 --~IOB5:NDRIVE[1]~IOB5:PDRIVE[1]
64 --~IOB5:NDRIVE[2]~IOB5:PDRIVE[2]
65 --IOB5:NDRIVE[3]IOB5:PDRIVE[3]
66 --IOB5:NDRIVE[4]IOB5:PDRIVE[4]
67 --IOB5:DCI_MODE[3]IOB5:PULL[0]
68 --IOB5:PULL[1]IOB5:PULL[2]
69 --IOB5:IBUF_MODE[1]IOB5:IBUF_MODE[2]
70 --IOB5:IBUF_MODE[0]IOB5:OUTPUT_ENABLE[1]
71 --IOB5:OUTPUT_ENABLE[0]-
72 --IOB5:DISABLE_GTS-
73 --IOB4:OUTPUT_DIFF[4]IOB4:OUTPUT_DIFF[2]
74 --IOB5:DCI_MODE[0]IOB5:DCI_MODE[1]
75 --IOB5:DCI_MODE[2]-
IOB0:SLEW[0, 3, 4][0, 2, 4][0, 3, 5][0, 2, 5]
IOB1:SLEW[0, 3, 31][0, 2, 31][0, 3, 32][0, 2, 32]
IOB2:SLEW[0, 3, 58][0, 2, 58][0, 3, 59][0, 2, 59]
IOB3:SLEW[1, 3, 4][1, 2, 4][1, 3, 5][1, 2, 5]
IOB4:SLEW[1, 3, 31][1, 2, 31][1, 3, 32][1, 2, 32]
IOB5:SLEW[1, 3, 58][1, 2, 58][1, 3, 59][1, 2, 59]
Non-inverted[3][2][1][0]
IOB0:OUTPUT_DIFF[0, 2, 33][0, 2, 46][0, 2, 19][0, 3, 46][0, 3, 19][0, 2, 6]
IOB2:OUTPUT_DIFF[1, 2, 6][1, 2, 19][0, 2, 73][1, 3, 19][0, 3, 73][0, 2, 60]
IOB4:OUTPUT_DIFF[1, 2, 60][1, 2, 73][1, 2, 46][1, 3, 73][1, 3, 46][1, 2, 33]
Non-inverted[5][4][3][2][1][0]
IOB0:NDRIVE[0, 2, 12][0, 2, 11][0, 2, 10][0, 2, 9][0, 2, 8]
IOB0:PDRIVE[0, 3, 12][0, 3, 11][0, 3, 10][0, 3, 9][0, 3, 8]
IOB1:NDRIVE[0, 2, 39][0, 2, 38][0, 2, 37][0, 2, 36][0, 2, 35]
IOB1:PDRIVE[0, 3, 39][0, 3, 38][0, 3, 37][0, 3, 36][0, 3, 35]
IOB2:NDRIVE[0, 2, 66][0, 2, 65][0, 2, 64][0, 2, 63][0, 2, 62]
IOB2:PDRIVE[0, 3, 66][0, 3, 65][0, 3, 64][0, 3, 63][0, 3, 62]
IOB3:NDRIVE[1, 2, 12][1, 2, 11][1, 2, 10][1, 2, 9][1, 2, 8]
IOB3:PDRIVE[1, 3, 12][1, 3, 11][1, 3, 10][1, 3, 9][1, 3, 8]
IOB4:NDRIVE[1, 2, 39][1, 2, 38][1, 2, 37][1, 2, 36][1, 2, 35]
IOB4:PDRIVE[1, 3, 39][1, 3, 38][1, 3, 37][1, 3, 36][1, 3, 35]
IOB5:NDRIVE[1, 2, 66][1, 2, 65][1, 2, 64][1, 2, 63][1, 2, 62]
IOB5:PDRIVE[1, 3, 66][1, 3, 65][1, 3, 64][1, 3, 63][1, 3, 62]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:IBUF_MODE[0, 3, 15][0, 2, 15][0, 2, 16]
IOB1:IBUF_MODE[0, 3, 42][0, 2, 42][0, 2, 43]
IOB2:IBUF_MODE[0, 3, 69][0, 2, 69][0, 2, 70]
IOB3:IBUF_MODE[1, 3, 15][1, 2, 15][1, 2, 16]
IOB4:IBUF_MODE[1, 3, 42][1, 2, 42][1, 2, 43]
IOB5:IBUF_MODE[1, 3, 69][1, 2, 69][1, 2, 70]
NONE000
VREF011
DIFF101
CMOS111
IOB0:OUTPUT_ENABLE[0, 3, 16][0, 2, 17]
IOB1:OUTPUT_ENABLE[0, 3, 43][0, 2, 44]
IOB2:OUTPUT_ENABLE[0, 3, 70][0, 2, 71]
IOB3:OUTPUT_ENABLE[1, 3, 16][1, 2, 17]
IOB4:OUTPUT_ENABLE[1, 3, 43][1, 2, 44]
IOB5:OUTPUT_ENABLE[1, 3, 70][1, 2, 71]
Non-inverted[1][0]
IOB0:DISABLE_GTS[0, 2, 18]
IOB0:OUTPUT_MISC[0, 3, 7]
IOB0:VREF[0, 3, 17]
IOB1:DISABLE_GTS[0, 2, 45]
IOB1:OUTPUT_MISC[0, 3, 34]
IOB2:DISABLE_GTS[0, 2, 72]
IOB2:OUTPUT_MISC[0, 3, 61]
IOB2:VR[0, 3, 75]
IOB3:DISABLE_GTS[1, 2, 18]
IOB3:OUTPUT_MISC[1, 3, 7]
IOB3:VR[1, 3, 21]
IOB4:DISABLE_GTS[1, 2, 45]
IOB4:OUTPUT_MISC[1, 3, 34]
IOB5:DISABLE_GTS[1, 2, 72]
IOB5:OUTPUT_MISC[1, 3, 61]
Non-inverted[0]
IOB0:DCI_MODE[0, 2, 13][0, 2, 21][0, 3, 20][0, 2, 20]
IOB1:DCI_MODE[0, 2, 40][0, 2, 48][0, 3, 47][0, 2, 47]
IOB2:DCI_MODE[0, 2, 67][0, 2, 75][0, 3, 74][0, 2, 74]
IOB3:DCI_MODE[1, 2, 13][1, 2, 21][1, 3, 20][1, 2, 20]
IOB4:DCI_MODE[1, 2, 40][1, 2, 48][1, 3, 47][1, 2, 47]
IOB5:DCI_MODE[1, 2, 67][1, 2, 75][1, 3, 74][1, 2, 74]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:PULL[0, 3, 14][0, 2, 14][0, 3, 13]
IOB1:PULL[0, 3, 41][0, 2, 41][0, 3, 40]
IOB2:PULL[0, 3, 68][0, 2, 68][0, 3, 67]
IOB3:PULL[1, 3, 14][1, 2, 14][1, 3, 13]
IOB4:PULL[1, 3, 41][1, 2, 41][1, 3, 40]
IOB5:PULL[1, 3, 68][1, 2, 68][1, 3, 67]
PULLDOWN000
NONE001
PULLUP011
KEEPER101

I/O buffers — Virtex 2 Pro

Todo

document

NameIOSTD:V2P:PDRIVEIOSTD:V2P:NDRIVE
[3][2][1][0][4][3][2][1][0]
BLVDS_25111110011
GTL000010011
GTLP000001101
GTLP_DCI000001101
GTL_DCI000010011
HSTL_I100000100
HSTL_II111101000
HSTL_III011001100
HSTL_III_18011001100
HSTL_III_DCI011001100
HSTL_III_DCI_18011001100
HSTL_II_18111101000
HSTL_II_DCI111101000
HSTL_II_DCI_18111101000
HSTL_IV011011000
HSTL_IV_18011011000
HSTL_IV_DCI011011000
HSTL_IV_DCI_18011011000
HSTL_I_18100000100
HSTL_I_DCI100000100
HSTL_I_DCI_18100000100
LVCMOS15.12100000110
LVCMOS15.16101001000
LVCMOS15.2001000001
LVCMOS15.4001100010
LVCMOS15.6010000011
LVCMOS15.8011000100
LVCMOS18.12011000110
LVCMOS18.16100001000
LVCMOS18.2001000001
LVCMOS18.4001100010
LVCMOS18.6010000011
LVCMOS18.8010000100
LVCMOS25.12010100110
LVCMOS25.16011101000
LVCMOS25.2000100001
LVCMOS25.24101001100
LVCMOS25.4001000010
LVCMOS25.6001100011
LVCMOS25.8010000100
LVCMOS33.12010000110
LVCMOS33.16010101000
LVCMOS33.2000100001
LVCMOS33.24100001100
LVCMOS33.4001000010
LVCMOS33.6001000011
LVCMOS33.8001100100
LVPECL_25110011110
LVTTL.12001100110
LVTTL.16010001000
LVTTL.2000100001
LVTTL.24010101100
LVTTL.4000100010
LVTTL.6001000011
LVTTL.8001000100
OFF000000000
PCI33_3010101110
PCI66_3010101110
PCIX011001100
SSTL18_I010000100
SSTL18_II111101110
SSTL18_II_DCI011000101
SSTL18_I_DCI010000011
SSTL2_I001100011
SSTL2_II011001001
SSTL2_II_DCI010000101
SSTL2_I_DCI001100010
NameIOSTD:V2P:SLEW
[4][3][2][1][0]
BLVDS_2501111
GTL00011
GTLP10011
GTLP_DCI11100
GTL_DCI01100
HSLVDCI_1511111
HSLVDCI_1811111
HSLVDCI_2511111
HSLVDCI_3311111
HSTL_I01111
HSTL_II01111
HSTL_III01111
HSTL_III_1801111
HSTL_III_DCI01111
HSTL_III_DCI_1801111
HSTL_II_1801111
HSTL_II_DCI01111
HSTL_II_DCI_1801111
HSTL_IV01111
HSTL_IV_1801111
HSTL_IV_DCI00000
HSTL_IV_DCI_1800000
HSTL_I_1801111
HSTL_I_DCI01111
HSTL_I_DCI_1801111
LVCMOS15.FAST11111
LVCMOS15.SLOW00000
LVCMOS18.FAST11111
LVCMOS18.SLOW00000
LVCMOS25.FAST11111
LVCMOS25.SLOW00000
LVCMOS33.FAST11111
LVCMOS33.SLOW00000
LVDCI_1511111
LVDCI_1811111
LVDCI_2511111
LVDCI_3311111
LVDCI_DV2_1511111
LVDCI_DV2_1811111
LVDCI_DV2_2511111
LVPECL_2501101
LVTTL.FAST11111
LVTTL.SLOW00000
PCI33_300000
PCI66_300000
PCIX01111
SSTL18_I01101
SSTL18_II01101
SSTL18_II_DCI11101
SSTL18_I_DCI11111
SSTL2_I11111
SSTL2_II11111
SSTL2_II_DCI11111
SSTL2_I_DCI11111
VR11111
NameIOSTD:V2P:OUTPUT_MISC
[1][0]
BLVDS_2500
GTL01
GTLP01
GTLP_DCI01
GTL_DCI11
HSLVDCI_1500
HSLVDCI_1800
HSLVDCI_2500
HSLVDCI_3300
HSTL_I00
HSTL_II00
HSTL_III10
HSTL_III_1810
HSTL_III_DCI10
HSTL_III_DCI_1810
HSTL_II_1800
HSTL_II_DCI10
HSTL_II_DCI_1810
HSTL_IV10
HSTL_IV_1810
HSTL_IV_DCI11
HSTL_IV_DCI_1811
HSTL_I_1800
HSTL_I_DCI00
HSTL_I_DCI_1800
LVCMOS1500
LVCMOS1800
LVCMOS2500
LVCMOS3300
LVDCI_1500
LVDCI_1800
LVDCI_2500
LVDCI_3300
LVDCI_DV2_1500
LVDCI_DV2_1800
LVDCI_DV2_2500
LVPECL_2500
LVTTL00
PCI33_300
PCI66_300
PCIX00
SSTL18_I00
SSTL18_II00
SSTL18_II_DCI00
SSTL18_I_DCI00
SSTL2_I00
SSTL2_II00
SSTL2_II_DCI01
SSTL2_I_DCI00
NameIOSTD:V2P:OUTPUT_DIFF
[3][2][1][0]
LDT_251010
LVDSEXT_250110
LVDSEXT_25_DCI0110
LVDS_250010
LVDS_25_DCI0010
OFF0000
TERM0001
ULVDS_251010

IOBS.V2P.T.L1

IOBS.V2P.T.L1 bittile 0
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB2:NDRIVE[1]--IOB2:SLEW[3]IOB2:IBUF_MODE[1]IOB2:NDRIVE[3]IOB2:DCI_MODE[2]IOB2:OUTPUT_ENABLE[0]~IOB1:NDRIVE[1]IOB1:SLEW[3]IOB1:PULL[2]~IOB1:NDRIVE[2]IOB1:DCI_MODE[2]IOB1:OUTPUT_ENABLE[0]--~IOB0:PDRIVE[0]IOB0:SLEW[1]IOB0:IBUF_MODE[2]~IOB0:NDRIVE[2]-IOB0:IBUF_MODE[1]
7 IOB2:SLEW[2]--IOB2:SLEW[1]IOB2:PULL[2]IOB2:PDRIVE[2]--IOB1:SLEW[2]IOB1:SLEW[0]IOB1:IBUF_MODE[1]IOB1:PDRIVE[2]IOB1:DCI_MODE[1]---~IOB0:NDRIVE[1]IOB0:SLEW[0]IOB0:IBUF_MODE[0]IOB0:PDRIVE[2]IOB0:DCI_MODE[2]IOB0:OUTPUT_ENABLE[0]
8 ~IOB2:PDRIVE[0]--IOB2:SLEW[4]IOB2:PULL[1]~IOB2:NDRIVE[2]IOB2:DCI_MODE[1]IOB2:IBUF_MODE[0]~IOB1:PDRIVE[0]IOB1:SLEW[4]IOB1:IBUF_MODE[2]~IOB1:PDRIVE[1]-IOB1:OUTPUT_ENABLE[1]--IOB0:SLEW[2]-IOB0:PULL[2]~IOB0:PDRIVE[1]-IOB0:OUTPUT_ENABLE[1]
9 IOB2:NDRIVE[0]--IOB2:OUTPUT_DIFF[1]IOB2:PULL[0]IOB2:NDRIVE[4]IOB2:OUTPUT_DIFF[2]-IOB1:OUTPUT_MISC[0]~IOB1:DCIUPDATEMODE_ASREQUIREDIOB1:PULL[1]IOB1:PDRIVE[3]IOB2:OUTPUT_DIFF[0]---IOB0:OUTPUT_MISC[0]IOB0:SLEW[4]IOB0:PULL[1]IOB0:PDRIVE[3]--
10 IOB2:OUTPUT_MISC[1]--IOB2:SLEW[0]IOB2:IBUF_MODE[2]~IOB2:PDRIVE[1]IOB2:DCI_MODE[0]IOB2:OUTPUT_ENABLE[1]IOB1:OUTPUT_MISC[1]IOB1:SLEW[1]IOB1:PULL[0]IOB1:NDRIVE[3]IOB1:DCI_MODE[0]IOB1:IBUF_MODE[0]--IOB0:NDRIVE[0]IOB0:SLEW[3]IOB0:PULL[0]IOB0:NDRIVE[3]IOB0:DCI_MODE[1]IOB0:DISABLE_GTS
11 IOB2:OUTPUT_MISC[0]--~IOB2:DCIUPDATEMODE_ASREQUIREDIOB2:DCI_MODE[3]IOB2:PDRIVE[3]-IOB2:DISABLE_GTSIOB1:NDRIVE[0]IOB2:OUTPUT_DIFF[3]IOB1:DCI_MODE[3]IOB1:NDRIVE[4]-IOB1:DISABLE_GTS--IOB0:OUTPUT_MISC[1]~IOB0:DCIUPDATEMODE_ASREQUIREDIOB0:DCI_MODE[3]IOB0:NDRIVE[4]IOB0:DCI_MODE[0]-
IOB0:PDRIVE[0, 19, 9][0, 19, 7][0, 19, 8][0, 16, 6]
IOB1:PDRIVE[0, 11, 9][0, 11, 7][0, 11, 8][0, 8, 8]
IOB2:PDRIVE[0, 5, 11][0, 5, 7][0, 5, 10][0, 0, 8]
Mixed inversion[3][2]~[1]~[0]
IOB0:NDRIVE[0, 19, 11][0, 19, 10][0, 19, 6][0, 16, 7][0, 16, 10]
IOB1:NDRIVE[0, 11, 11][0, 11, 10][0, 11, 6][0, 8, 6][0, 8, 11]
IOB2:NDRIVE[0, 5, 9][0, 5, 6][0, 5, 8][0, 0, 6][0, 0, 9]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:OUTPUT_ENABLE[0, 21, 8][0, 21, 7]
IOB0:OUTPUT_MISC[0, 16, 11][0, 16, 9]
IOB1:OUTPUT_ENABLE[0, 13, 8][0, 13, 6]
IOB1:OUTPUT_MISC[0, 8, 10][0, 8, 9]
IOB2:OUTPUT_ENABLE[0, 7, 10][0, 7, 6]
IOB2:OUTPUT_MISC[0, 0, 10][0, 0, 11]
Non-inverted[1][0]
IOB0:SLEW[0, 17, 9][0, 17, 10][0, 16, 8][0, 17, 6][0, 17, 7]
IOB1:SLEW[0, 9, 8][0, 9, 6][0, 8, 7][0, 9, 10][0, 9, 7]
IOB2:SLEW[0, 3, 8][0, 3, 6][0, 0, 7][0, 3, 7][0, 3, 10]
Non-inverted[4][3][2][1][0]
IOB0:DCIUPDATEMODE_ASREQUIRED[0, 17, 11]
IOB1:DCIUPDATEMODE_ASREQUIRED[0, 9, 9]
IOB2:DCIUPDATEMODE_ASREQUIRED[0, 3, 11]
Inverted~[0]
IOB0:PULL[0, 18, 8][0, 18, 9][0, 18, 10]
IOB1:PULL[0, 10, 6][0, 10, 9][0, 10, 10]
IOB2:PULL[0, 4, 7][0, 4, 8][0, 4, 9]
PULLDOWN000
NONE001
PULLUP011
KEEPER101
IOB0:DCI_MODE[0, 18, 11][0, 20, 7][0, 20, 10][0, 20, 11]
IOB1:DCI_MODE[0, 10, 11][0, 12, 6][0, 12, 7][0, 12, 10]
IOB2:DCI_MODE[0, 4, 11][0, 6, 6][0, 6, 8][0, 6, 10]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB1:IBUF_MODE[0, 10, 8][0, 10, 7][0, 13, 10]
IOB2:IBUF_MODE[0, 4, 10][0, 4, 6][0, 7, 8]
NONE000
VREF011
DIFF101
CMOS111
IOB0:DISABLE_GTS[0, 21, 10]
IOB1:DISABLE_GTS[0, 13, 11]
IOB2:DISABLE_GTS[0, 7, 11]
Non-inverted[0]
IOB2:OUTPUT_DIFF[0, 9, 11][0, 6, 9][0, 3, 9][0, 12, 9]
Non-inverted[3][2][1][0]
IOB0:IBUF_MODE[0, 18, 6][0, 21, 6][0, 18, 7]
NONE000
VREF011
CMOS111

IOBS.V2P.T.L1.ALT

IOBS.V2P.T.L1.ALT bittile 0
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB2:NDRIVE[1]--IOB2:SLEW[3]IOB2:IBUF_MODE[0]IOB2:NDRIVE[3]IOB2:DCI_MODE[2]IOB2:OUTPUT_ENABLE[0]~IOB1:NDRIVE[1]IOB1:SLEW[3]IOB1:PULL[2]~IOB1:NDRIVE[2]IOB1:DCI_MODE[2]IOB1:OUTPUT_ENABLE[0]--~IOB0:PDRIVE[0]IOB0:SLEW[1]IOB0:IBUF_MODE[2]~IOB0:NDRIVE[2]-IOB0:IBUF_MODE[0]
7 IOB2:SLEW[2]--IOB2:SLEW[1]IOB2:PULL[2]IOB2:PDRIVE[2]--IOB1:SLEW[2]IOB1:SLEW[0]IOB1:IBUF_MODE[1]IOB1:PDRIVE[2]IOB1:DCI_MODE[1]---~IOB0:NDRIVE[1]IOB0:SLEW[0]IOB0:IBUF_MODE[1]IOB0:PDRIVE[2]IOB0:DCI_MODE[2]IOB0:OUTPUT_ENABLE[0]
8 ~IOB2:PDRIVE[0]--IOB2:SLEW[4]IOB2:PULL[1]~IOB2:NDRIVE[2]IOB2:DCI_MODE[1]IOB2:IBUF_MODE[1]~IOB1:PDRIVE[0]IOB1:SLEW[4]IOB1:IBUF_MODE[2]~IOB1:PDRIVE[1]-IOB1:OUTPUT_ENABLE[1]--IOB0:SLEW[2]IOB1:OUTPUT_DIFF[3]IOB0:PULL[2]~IOB0:PDRIVE[1]-IOB0:OUTPUT_ENABLE[1]
9 IOB2:NDRIVE[0]---IOB2:PULL[0]IOB2:NDRIVE[4]--IOB1:OUTPUT_MISC[0]~IOB1:DCIUPDATEMODE_ASREQUIREDIOB1:PULL[1]IOB1:PDRIVE[3]IOB1:OUTPUT_DIFF[2]---IOB0:OUTPUT_MISC[0]IOB0:SLEW[4]IOB0:PULL[1]IOB0:PDRIVE[3]--
10 IOB2:OUTPUT_MISC[1]--IOB2:SLEW[0]IOB2:IBUF_MODE[2]~IOB2:PDRIVE[1]IOB2:DCI_MODE[0]IOB2:OUTPUT_ENABLE[1]IOB1:OUTPUT_MISC[1]IOB1:SLEW[1]IOB1:PULL[0]IOB1:NDRIVE[3]IOB1:DCI_MODE[0]IOB1:IBUF_MODE[0]--IOB0:NDRIVE[0]IOB0:SLEW[3]IOB0:PULL[0]IOB0:NDRIVE[3]IOB0:DCI_MODE[1]IOB0:DISABLE_GTS
11 IOB2:OUTPUT_MISC[0]--~IOB2:DCIUPDATEMODE_ASREQUIREDIOB2:DCI_MODE[3]IOB2:PDRIVE[3]-IOB2:DISABLE_GTSIOB1:NDRIVE[0]IOB1:OUTPUT_DIFF[1]IOB1:DCI_MODE[3]IOB1:NDRIVE[4]-IOB1:DISABLE_GTS--IOB0:OUTPUT_MISC[1]~IOB0:DCIUPDATEMODE_ASREQUIREDIOB0:DCI_MODE[3]IOB0:NDRIVE[4]IOB0:DCI_MODE[0]IOB1:OUTPUT_DIFF[0]
IOB0:PDRIVE[0, 19, 9][0, 19, 7][0, 19, 8][0, 16, 6]
IOB1:PDRIVE[0, 11, 9][0, 11, 7][0, 11, 8][0, 8, 8]
IOB2:PDRIVE[0, 5, 11][0, 5, 7][0, 5, 10][0, 0, 8]
Mixed inversion[3][2]~[1]~[0]
IOB0:NDRIVE[0, 19, 11][0, 19, 10][0, 19, 6][0, 16, 7][0, 16, 10]
IOB1:NDRIVE[0, 11, 11][0, 11, 10][0, 11, 6][0, 8, 6][0, 8, 11]
IOB2:NDRIVE[0, 5, 9][0, 5, 6][0, 5, 8][0, 0, 6][0, 0, 9]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:OUTPUT_ENABLE[0, 21, 8][0, 21, 7]
IOB0:OUTPUT_MISC[0, 16, 11][0, 16, 9]
IOB1:OUTPUT_ENABLE[0, 13, 8][0, 13, 6]
IOB1:OUTPUT_MISC[0, 8, 10][0, 8, 9]
IOB2:OUTPUT_ENABLE[0, 7, 10][0, 7, 6]
IOB2:OUTPUT_MISC[0, 0, 10][0, 0, 11]
Non-inverted[1][0]
IOB0:SLEW[0, 17, 9][0, 17, 10][0, 16, 8][0, 17, 6][0, 17, 7]
IOB1:SLEW[0, 9, 8][0, 9, 6][0, 8, 7][0, 9, 10][0, 9, 7]
IOB2:SLEW[0, 3, 8][0, 3, 6][0, 0, 7][0, 3, 7][0, 3, 10]
Non-inverted[4][3][2][1][0]
IOB0:DCIUPDATEMODE_ASREQUIRED[0, 17, 11]
IOB1:DCIUPDATEMODE_ASREQUIRED[0, 9, 9]
IOB2:DCIUPDATEMODE_ASREQUIRED[0, 3, 11]
Inverted~[0]
IOB2:IBUF_MODE[0, 4, 10][0, 7, 8][0, 4, 6]
NONE000
VREF011
CMOS111
IOB0:PULL[0, 18, 8][0, 18, 9][0, 18, 10]
IOB1:PULL[0, 10, 6][0, 10, 9][0, 10, 10]
IOB2:PULL[0, 4, 7][0, 4, 8][0, 4, 9]
PULLDOWN000
NONE001
PULLUP011
KEEPER101
IOB0:DCI_MODE[0, 18, 11][0, 20, 7][0, 20, 10][0, 20, 11]
IOB1:DCI_MODE[0, 10, 11][0, 12, 6][0, 12, 7][0, 12, 10]
IOB2:DCI_MODE[0, 4, 11][0, 6, 6][0, 6, 8][0, 6, 10]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:DISABLE_GTS[0, 21, 10]
IOB1:DISABLE_GTS[0, 13, 11]
IOB2:DISABLE_GTS[0, 7, 11]
Non-inverted[0]
IOB0:IBUF_MODE[0, 18, 6][0, 18, 7][0, 21, 6]
IOB1:IBUF_MODE[0, 10, 8][0, 10, 7][0, 13, 10]
NONE000
VREF011
DIFF101
CMOS111
IOB1:OUTPUT_DIFF[0, 17, 8][0, 12, 9][0, 9, 11][0, 21, 11]
Non-inverted[3][2][1][0]

IOBS.V2P.T.R1

IOBS.V2P.T.R1 bittile 0
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB2:NDRIVE[1]--IOB2:SLEW[3]IOB2:IBUF_MODE[0]IOB2:NDRIVE[3]IOB2:DCI_MODE[2]IOB2:OUTPUT_ENABLE[0]~IOB1:NDRIVE[1]IOB1:SLEW[3]IOB1:PULL[2]~IOB1:NDRIVE[2]IOB1:DCI_MODE[2]IOB1:OUTPUT_ENABLE[0]--~IOB0:PDRIVE[0]IOB0:SLEW[1]IOB0:IBUF_MODE[2]~IOB0:NDRIVE[2]-IOB0:IBUF_MODE[0]
7 IOB2:SLEW[2]--IOB2:SLEW[1]IOB2:PULL[2]IOB2:PDRIVE[2]--IOB1:SLEW[2]IOB1:SLEW[0]IOB1:IBUF_MODE[1]IOB1:PDRIVE[2]IOB1:DCI_MODE[1]---~IOB0:NDRIVE[1]IOB0:SLEW[0]IOB0:IBUF_MODE[1]IOB0:PDRIVE[2]IOB0:DCI_MODE[2]IOB0:OUTPUT_ENABLE[0]
8 ~IOB2:PDRIVE[0]--IOB2:SLEW[4]IOB2:PULL[1]~IOB2:NDRIVE[2]IOB2:DCI_MODE[1]IOB2:IBUF_MODE[1]~IOB1:PDRIVE[0]IOB1:SLEW[4]IOB1:IBUF_MODE[2]~IOB1:PDRIVE[1]-IOB1:OUTPUT_ENABLE[1]--IOB0:SLEW[2]IOB1:OUTPUT_DIFF[3]IOB0:PULL[2]~IOB0:PDRIVE[1]-IOB0:OUTPUT_ENABLE[1]
9 IOB2:NDRIVE[0]---IOB2:PULL[0]IOB2:NDRIVE[4]--IOB1:OUTPUT_MISC[0]~IOB1:DCIUPDATEMODE_ASREQUIREDIOB1:PULL[1]IOB1:PDRIVE[3]IOB1:OUTPUT_DIFF[2]---IOB0:OUTPUT_MISC[0]IOB0:SLEW[4]IOB0:PULL[1]IOB0:PDRIVE[3]--
10 IOB2:OUTPUT_MISC[1]--IOB2:SLEW[0]IOB2:IBUF_MODE[2]~IOB2:PDRIVE[1]IOB2:DCI_MODE[0]IOB2:OUTPUT_ENABLE[1]IOB1:OUTPUT_MISC[1]IOB1:SLEW[1]IOB1:PULL[0]IOB1:NDRIVE[3]IOB1:DCI_MODE[0]IOB1:IBUF_MODE[0]--IOB0:NDRIVE[0]IOB0:SLEW[3]IOB0:PULL[0]IOB0:NDRIVE[3]IOB0:DCI_MODE[1]IOB0:DISABLE_GTS
11 IOB2:OUTPUT_MISC[0]--~IOB2:DCIUPDATEMODE_ASREQUIREDIOB2:DCI_MODE[3]IOB2:PDRIVE[3]-IOB2:DISABLE_GTSIOB1:NDRIVE[0]IOB1:OUTPUT_DIFF[1]IOB1:DCI_MODE[3]IOB1:NDRIVE[4]-IOB1:DISABLE_GTS--IOB0:OUTPUT_MISC[1]~IOB0:DCIUPDATEMODE_ASREQUIREDIOB0:DCI_MODE[3]IOB0:NDRIVE[4]IOB0:DCI_MODE[0]IOB1:OUTPUT_DIFF[0]
IOB0:PDRIVE[0, 19, 9][0, 19, 7][0, 19, 8][0, 16, 6]
IOB1:PDRIVE[0, 11, 9][0, 11, 7][0, 11, 8][0, 8, 8]
IOB2:PDRIVE[0, 5, 11][0, 5, 7][0, 5, 10][0, 0, 8]
Mixed inversion[3][2]~[1]~[0]
IOB0:NDRIVE[0, 19, 11][0, 19, 10][0, 19, 6][0, 16, 7][0, 16, 10]
IOB1:NDRIVE[0, 11, 11][0, 11, 10][0, 11, 6][0, 8, 6][0, 8, 11]
IOB2:NDRIVE[0, 5, 9][0, 5, 6][0, 5, 8][0, 0, 6][0, 0, 9]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:OUTPUT_ENABLE[0, 21, 8][0, 21, 7]
IOB0:OUTPUT_MISC[0, 16, 11][0, 16, 9]
IOB1:OUTPUT_ENABLE[0, 13, 8][0, 13, 6]
IOB1:OUTPUT_MISC[0, 8, 10][0, 8, 9]
IOB2:OUTPUT_ENABLE[0, 7, 10][0, 7, 6]
IOB2:OUTPUT_MISC[0, 0, 10][0, 0, 11]
Non-inverted[1][0]
IOB0:SLEW[0, 17, 9][0, 17, 10][0, 16, 8][0, 17, 6][0, 17, 7]
IOB1:SLEW[0, 9, 8][0, 9, 6][0, 8, 7][0, 9, 10][0, 9, 7]
IOB2:SLEW[0, 3, 8][0, 3, 6][0, 0, 7][0, 3, 7][0, 3, 10]
Non-inverted[4][3][2][1][0]
IOB0:DCIUPDATEMODE_ASREQUIRED[0, 17, 11]
IOB1:DCIUPDATEMODE_ASREQUIRED[0, 9, 9]
IOB2:DCIUPDATEMODE_ASREQUIRED[0, 3, 11]
Inverted~[0]
IOB2:IBUF_MODE[0, 4, 10][0, 7, 8][0, 4, 6]
NONE000
VREF011
CMOS111
IOB0:PULL[0, 18, 8][0, 18, 9][0, 18, 10]
IOB1:PULL[0, 10, 6][0, 10, 9][0, 10, 10]
IOB2:PULL[0, 4, 7][0, 4, 8][0, 4, 9]
PULLDOWN000
NONE001
PULLUP011
KEEPER101
IOB0:DCI_MODE[0, 18, 11][0, 20, 7][0, 20, 10][0, 20, 11]
IOB1:DCI_MODE[0, 10, 11][0, 12, 6][0, 12, 7][0, 12, 10]
IOB2:DCI_MODE[0, 4, 11][0, 6, 6][0, 6, 8][0, 6, 10]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:DISABLE_GTS[0, 21, 10]
IOB1:DISABLE_GTS[0, 13, 11]
IOB2:DISABLE_GTS[0, 7, 11]
Non-inverted[0]
IOB0:IBUF_MODE[0, 18, 6][0, 18, 7][0, 21, 6]
IOB1:IBUF_MODE[0, 10, 8][0, 10, 7][0, 13, 10]
NONE000
VREF011
DIFF101
CMOS111
IOB1:OUTPUT_DIFF[0, 17, 8][0, 12, 9][0, 9, 11][0, 21, 11]
Non-inverted[3][2][1][0]

IOBS.V2P.T.R1.ALT

IOBS.V2P.T.R1.ALT bittile 0
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB2:NDRIVE[1]--IOB2:SLEW[3]IOB2:IBUF_MODE[1]IOB2:NDRIVE[3]IOB2:DCI_MODE[2]IOB2:OUTPUT_ENABLE[0]~IOB1:NDRIVE[1]IOB1:SLEW[3]IOB1:PULL[2]~IOB1:NDRIVE[2]IOB1:DCI_MODE[2]IOB1:OUTPUT_ENABLE[0]--~IOB0:PDRIVE[0]IOB0:SLEW[1]IOB0:IBUF_MODE[2]~IOB0:NDRIVE[2]-IOB0:IBUF_MODE[1]
7 IOB2:SLEW[2]--IOB2:SLEW[1]IOB2:PULL[2]IOB2:PDRIVE[2]--IOB1:SLEW[2]IOB1:SLEW[0]IOB1:IBUF_MODE[1]IOB1:PDRIVE[2]IOB1:DCI_MODE[1]---~IOB0:NDRIVE[1]IOB0:SLEW[0]IOB0:IBUF_MODE[0]IOB0:PDRIVE[2]IOB0:DCI_MODE[2]IOB0:OUTPUT_ENABLE[0]
8 ~IOB2:PDRIVE[0]--IOB2:SLEW[4]IOB2:PULL[1]~IOB2:NDRIVE[2]IOB2:DCI_MODE[1]IOB2:IBUF_MODE[0]~IOB1:PDRIVE[0]IOB1:SLEW[4]IOB1:IBUF_MODE[2]~IOB1:PDRIVE[1]-IOB1:OUTPUT_ENABLE[1]--IOB0:SLEW[2]-IOB0:PULL[2]~IOB0:PDRIVE[1]-IOB0:OUTPUT_ENABLE[1]
9 IOB2:NDRIVE[0]--IOB2:OUTPUT_DIFF[1]IOB2:PULL[0]IOB2:NDRIVE[4]IOB2:OUTPUT_DIFF[2]-IOB1:OUTPUT_MISC[0]~IOB1:DCIUPDATEMODE_ASREQUIREDIOB1:PULL[1]IOB1:PDRIVE[3]IOB2:OUTPUT_DIFF[0]---IOB0:OUTPUT_MISC[0]IOB0:SLEW[4]IOB0:PULL[1]IOB0:PDRIVE[3]--
10 IOB2:OUTPUT_MISC[1]--IOB2:SLEW[0]IOB2:IBUF_MODE[2]~IOB2:PDRIVE[1]IOB2:DCI_MODE[0]IOB2:OUTPUT_ENABLE[1]IOB1:OUTPUT_MISC[1]IOB1:SLEW[1]IOB1:PULL[0]IOB1:NDRIVE[3]IOB1:DCI_MODE[0]IOB1:IBUF_MODE[0]--IOB0:NDRIVE[0]IOB0:SLEW[3]IOB0:PULL[0]IOB0:NDRIVE[3]IOB0:DCI_MODE[1]IOB0:DISABLE_GTS
11 IOB2:OUTPUT_MISC[0]--~IOB2:DCIUPDATEMODE_ASREQUIREDIOB2:DCI_MODE[3]IOB2:PDRIVE[3]-IOB2:DISABLE_GTSIOB1:NDRIVE[0]IOB2:OUTPUT_DIFF[3]IOB1:DCI_MODE[3]IOB1:NDRIVE[4]-IOB1:DISABLE_GTS--IOB0:OUTPUT_MISC[1]~IOB0:DCIUPDATEMODE_ASREQUIREDIOB0:DCI_MODE[3]IOB0:NDRIVE[4]IOB0:DCI_MODE[0]-
IOB0:PDRIVE[0, 19, 9][0, 19, 7][0, 19, 8][0, 16, 6]
IOB1:PDRIVE[0, 11, 9][0, 11, 7][0, 11, 8][0, 8, 8]
IOB2:PDRIVE[0, 5, 11][0, 5, 7][0, 5, 10][0, 0, 8]
Mixed inversion[3][2]~[1]~[0]
IOB0:NDRIVE[0, 19, 11][0, 19, 10][0, 19, 6][0, 16, 7][0, 16, 10]
IOB1:NDRIVE[0, 11, 11][0, 11, 10][0, 11, 6][0, 8, 6][0, 8, 11]
IOB2:NDRIVE[0, 5, 9][0, 5, 6][0, 5, 8][0, 0, 6][0, 0, 9]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:OUTPUT_ENABLE[0, 21, 8][0, 21, 7]
IOB0:OUTPUT_MISC[0, 16, 11][0, 16, 9]
IOB1:OUTPUT_ENABLE[0, 13, 8][0, 13, 6]
IOB1:OUTPUT_MISC[0, 8, 10][0, 8, 9]
IOB2:OUTPUT_ENABLE[0, 7, 10][0, 7, 6]
IOB2:OUTPUT_MISC[0, 0, 10][0, 0, 11]
Non-inverted[1][0]
IOB0:SLEW[0, 17, 9][0, 17, 10][0, 16, 8][0, 17, 6][0, 17, 7]
IOB1:SLEW[0, 9, 8][0, 9, 6][0, 8, 7][0, 9, 10][0, 9, 7]
IOB2:SLEW[0, 3, 8][0, 3, 6][0, 0, 7][0, 3, 7][0, 3, 10]
Non-inverted[4][3][2][1][0]
IOB0:DCIUPDATEMODE_ASREQUIRED[0, 17, 11]
IOB1:DCIUPDATEMODE_ASREQUIRED[0, 9, 9]
IOB2:DCIUPDATEMODE_ASREQUIRED[0, 3, 11]
Inverted~[0]
IOB0:PULL[0, 18, 8][0, 18, 9][0, 18, 10]
IOB1:PULL[0, 10, 6][0, 10, 9][0, 10, 10]
IOB2:PULL[0, 4, 7][0, 4, 8][0, 4, 9]
PULLDOWN000
NONE001
PULLUP011
KEEPER101
IOB0:DCI_MODE[0, 18, 11][0, 20, 7][0, 20, 10][0, 20, 11]
IOB1:DCI_MODE[0, 10, 11][0, 12, 6][0, 12, 7][0, 12, 10]
IOB2:DCI_MODE[0, 4, 11][0, 6, 6][0, 6, 8][0, 6, 10]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB1:IBUF_MODE[0, 10, 8][0, 10, 7][0, 13, 10]
IOB2:IBUF_MODE[0, 4, 10][0, 4, 6][0, 7, 8]
NONE000
VREF011
DIFF101
CMOS111
IOB0:DISABLE_GTS[0, 21, 10]
IOB1:DISABLE_GTS[0, 13, 11]
IOB2:DISABLE_GTS[0, 7, 11]
Non-inverted[0]
IOB2:OUTPUT_DIFF[0, 9, 11][0, 6, 9][0, 3, 9][0, 12, 9]
Non-inverted[3][2][1][0]
IOB0:IBUF_MODE[0, 18, 6][0, 21, 6][0, 18, 7]
NONE000
VREF011
CMOS111

IOBS.V2P.T.L2

IOBS.V2P.T.L2 bittile 0
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB2:NDRIVE[1]--IOB2:SLEW[3]IOB2:IBUF_MODE[1]IOB2:NDRIVE[3]IOB2:DCI_MODE[2]IOB2:OUTPUT_ENABLE[0]~IOB1:NDRIVE[1]IOB1:SLEW[3]IOB1:PULL[2]~IOB1:NDRIVE[2]IOB1:DCI_MODE[2]IOB1:OUTPUT_ENABLE[0]--~IOB0:PDRIVE[0]IOB0:SLEW[1]IOB0:IBUF_MODE[2]~IOB0:NDRIVE[2]-IOB0:IBUF_MODE[0]
7 IOB2:SLEW[2]--IOB2:SLEW[1]IOB2:PULL[2]IOB2:PDRIVE[2]--IOB1:SLEW[2]IOB1:SLEW[0]IOB1:IBUF_MODE[1]IOB1:PDRIVE[2]IOB1:DCI_MODE[1]---~IOB0:NDRIVE[1]IOB0:SLEW[0]IOB0:IBUF_MODE[1]IOB0:PDRIVE[2]IOB0:DCI_MODE[2]IOB0:OUTPUT_ENABLE[0]
8 ~IOB2:PDRIVE[0]--IOB2:SLEW[4]IOB2:PULL[1]~IOB2:NDRIVE[2]IOB2:DCI_MODE[1]IOB2:IBUF_MODE[0]~IOB1:PDRIVE[0]IOB1:SLEW[4]IOB1:IBUF_MODE[2]~IOB1:PDRIVE[1]IOB1:VRIOB1:OUTPUT_ENABLE[1]--IOB0:SLEW[2]IOB1:OUTPUT_DIFF[3]IOB0:PULL[2]~IOB0:PDRIVE[1]IOB0:VRIOB0:OUTPUT_ENABLE[1]
9 IOB2:NDRIVE[0]--IOB3:OUTPUT_DIFF[3]IOB2:PULL[0]IOB2:NDRIVE[4]IOB3:OUTPUT_DIFF[0]-IOB1:OUTPUT_MISC[0]~IOB1:DCIUPDATEMODE_ASREQUIREDIOB1:PULL[1]IOB1:PDRIVE[3]IOB1:OUTPUT_DIFF[2]---IOB0:OUTPUT_MISC[0]IOB0:SLEW[4]IOB0:PULL[1]IOB0:PDRIVE[3]--
10 IOB2:OUTPUT_MISC[1]--IOB2:SLEW[0]IOB2:IBUF_MODE[2]~IOB2:PDRIVE[1]IOB2:DCI_MODE[0]IOB2:OUTPUT_ENABLE[1]IOB1:OUTPUT_MISC[1]IOB1:SLEW[1]IOB1:PULL[0]IOB1:NDRIVE[3]IOB1:DCI_MODE[0]IOB1:IBUF_MODE[0]--IOB0:NDRIVE[0]IOB0:SLEW[3]IOB0:PULL[0]IOB0:NDRIVE[3]IOB0:DCI_MODE[1]IOB0:DISABLE_GTS
11 IOB2:OUTPUT_MISC[0]--~IOB2:DCIUPDATEMODE_ASREQUIREDIOB2:DCI_MODE[3]IOB2:PDRIVE[3]-IOB2:DISABLE_GTSIOB1:NDRIVE[0]IOB1:OUTPUT_DIFF[1]IOB1:DCI_MODE[3]IOB1:NDRIVE[4]IOB1:BREFCLK_ENABLEIOB1:DISABLE_GTS--IOB0:OUTPUT_MISC[1]~IOB0:DCIUPDATEMODE_ASREQUIREDIOB0:DCI_MODE[3]IOB0:NDRIVE[4]IOB0:DCI_MODE[0]IOB1:OUTPUT_DIFF[0]
IOBS.V2P.T.L2 bittile 1
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB5:NDRIVE[1]--IOB5:SLEW[3]IOB5:IBUF_MODE[1]IOB5:NDRIVE[3]IOB5:DCI_MODE[2]IOB5:OUTPUT_ENABLE[0]~IOB4:NDRIVE[1]IOB4:SLEW[3]IOB4:PULL[2]~IOB4:NDRIVE[2]IOB4:DCI_MODE[2]IOB4:OUTPUT_ENABLE[0]--~IOB3:PDRIVE[0]IOB3:SLEW[1]IOB3:IBUF_MODE[2]~IOB3:NDRIVE[2]-IOB3:IBUF_MODE[0]
7 IOB5:SLEW[2]--IOB5:SLEW[1]IOB5:PULL[2]IOB5:PDRIVE[2]-IOB5:VREFIOB4:SLEW[2]IOB4:SLEW[0]IOB4:IBUF_MODE[1]IOB4:PDRIVE[2]IOB4:DCI_MODE[1]---~IOB3:NDRIVE[1]IOB3:SLEW[0]IOB3:IBUF_MODE[1]IOB3:PDRIVE[2]IOB3:DCI_MODE[2]IOB3:OUTPUT_ENABLE[0]
8 ~IOB5:PDRIVE[0]--IOB5:SLEW[4]IOB5:PULL[1]~IOB5:NDRIVE[2]IOB5:DCI_MODE[1]IOB5:IBUF_MODE[0]~IOB4:PDRIVE[0]IOB4:SLEW[4]IOB4:IBUF_MODE[2]~IOB4:PDRIVE[1]-IOB4:OUTPUT_ENABLE[1]--IOB3:SLEW[2]IOB3:OUTPUT_DIFF[1]IOB3:PULL[2]~IOB3:PDRIVE[1]-IOB3:OUTPUT_ENABLE[1]
9 IOB5:NDRIVE[0]--IOB5:OUTPUT_DIFF[1]IOB5:PULL[0]IOB5:NDRIVE[4]IOB5:OUTPUT_DIFF[2]-IOB4:OUTPUT_MISC[0]~IOB4:DCIUPDATEMODE_ASREQUIREDIOB4:PULL[1]IOB4:PDRIVE[3]IOB5:OUTPUT_DIFF[0]---IOB3:OUTPUT_MISC[0]IOB3:SLEW[4]IOB3:PULL[1]IOB3:PDRIVE[3]--
10 IOB5:OUTPUT_MISC[1]--IOB5:SLEW[0]IOB5:IBUF_MODE[2]~IOB5:PDRIVE[1]IOB5:DCI_MODE[0]IOB5:OUTPUT_ENABLE[1]IOB4:OUTPUT_MISC[1]IOB4:SLEW[1]IOB4:PULL[0]IOB4:NDRIVE[3]IOB4:DCI_MODE[0]IOB4:IBUF_MODE[0]--IOB3:NDRIVE[0]IOB3:SLEW[3]IOB3:PULL[0]IOB3:NDRIVE[3]IOB3:DCI_MODE[1]IOB3:DISABLE_GTS
11 IOB5:OUTPUT_MISC[0]--~IOB5:DCIUPDATEMODE_ASREQUIREDIOB5:DCI_MODE[3]IOB5:PDRIVE[3]-IOB5:DISABLE_GTSIOB4:NDRIVE[0]IOB5:OUTPUT_DIFF[3]IOB4:DCI_MODE[3]IOB4:NDRIVE[4]-IOB4:DISABLE_GTS--IOB3:OUTPUT_MISC[1]~IOB3:DCIUPDATEMODE_ASREQUIREDIOB3:DCI_MODE[3]IOB3:NDRIVE[4]IOB3:DCI_MODE[0]IOB3:OUTPUT_DIFF[2]
IOB0:PDRIVE[0, 19, 9][0, 19, 7][0, 19, 8][0, 16, 6]
IOB1:PDRIVE[0, 11, 9][0, 11, 7][0, 11, 8][0, 8, 8]
IOB2:PDRIVE[0, 5, 11][0, 5, 7][0, 5, 10][0, 0, 8]
IOB3:PDRIVE[1, 19, 9][1, 19, 7][1, 19, 8][1, 16, 6]
IOB4:PDRIVE[1, 11, 9][1, 11, 7][1, 11, 8][1, 8, 8]
IOB5:PDRIVE[1, 5, 11][1, 5, 7][1, 5, 10][1, 0, 8]
Mixed inversion[3][2]~[1]~[0]
IOB0:NDRIVE[0, 19, 11][0, 19, 10][0, 19, 6][0, 16, 7][0, 16, 10]
IOB1:NDRIVE[0, 11, 11][0, 11, 10][0, 11, 6][0, 8, 6][0, 8, 11]
IOB2:NDRIVE[0, 5, 9][0, 5, 6][0, 5, 8][0, 0, 6][0, 0, 9]
IOB3:NDRIVE[1, 19, 11][1, 19, 10][1, 19, 6][1, 16, 7][1, 16, 10]
IOB4:NDRIVE[1, 11, 11][1, 11, 10][1, 11, 6][1, 8, 6][1, 8, 11]
IOB5:NDRIVE[1, 5, 9][1, 5, 6][1, 5, 8][1, 0, 6][1, 0, 9]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:OUTPUT_ENABLE[0, 21, 8][0, 21, 7]
IOB0:OUTPUT_MISC[0, 16, 11][0, 16, 9]
IOB1:OUTPUT_ENABLE[0, 13, 8][0, 13, 6]
IOB1:OUTPUT_MISC[0, 8, 10][0, 8, 9]
IOB2:OUTPUT_ENABLE[0, 7, 10][0, 7, 6]
IOB2:OUTPUT_MISC[0, 0, 10][0, 0, 11]
IOB3:OUTPUT_ENABLE[1, 21, 8][1, 21, 7]
IOB3:OUTPUT_MISC[1, 16, 11][1, 16, 9]
IOB4:OUTPUT_ENABLE[1, 13, 8][1, 13, 6]
IOB4:OUTPUT_MISC[1, 8, 10][1, 8, 9]
IOB5:OUTPUT_ENABLE[1, 7, 10][1, 7, 6]
IOB5:OUTPUT_MISC[1, 0, 10][1, 0, 11]
Non-inverted[1][0]
IOB0:SLEW[0, 17, 9][0, 17, 10][0, 16, 8][0, 17, 6][0, 17, 7]
IOB1:SLEW[0, 9, 8][0, 9, 6][0, 8, 7][0, 9, 10][0, 9, 7]
IOB2:SLEW[0, 3, 8][0, 3, 6][0, 0, 7][0, 3, 7][0, 3, 10]
IOB3:SLEW[1, 17, 9][1, 17, 10][1, 16, 8][1, 17, 6][1, 17, 7]
IOB4:SLEW[1, 9, 8][1, 9, 6][1, 8, 7][1, 9, 10][1, 9, 7]
IOB5:SLEW[1, 3, 8][1, 3, 6][1, 0, 7][1, 3, 7][1, 3, 10]
Non-inverted[4][3][2][1][0]
IOB0:DCIUPDATEMODE_ASREQUIRED[0, 17, 11]
IOB1:DCIUPDATEMODE_ASREQUIRED[0, 9, 9]
IOB2:DCIUPDATEMODE_ASREQUIRED[0, 3, 11]
IOB3:DCIUPDATEMODE_ASREQUIRED[1, 17, 11]
IOB4:DCIUPDATEMODE_ASREQUIRED[1, 9, 9]
IOB5:DCIUPDATEMODE_ASREQUIRED[1, 3, 11]
Inverted~[0]
IOB0:PULL[0, 18, 8][0, 18, 9][0, 18, 10]
IOB1:PULL[0, 10, 6][0, 10, 9][0, 10, 10]
IOB2:PULL[0, 4, 7][0, 4, 8][0, 4, 9]
IOB3:PULL[1, 18, 8][1, 18, 9][1, 18, 10]
IOB4:PULL[1, 10, 6][1, 10, 9][1, 10, 10]
IOB5:PULL[1, 4, 7][1, 4, 8][1, 4, 9]
PULLDOWN000
NONE001
PULLUP011
KEEPER101
IOB1:OUTPUT_DIFF[0, 17, 8][0, 12, 9][0, 9, 11][0, 21, 11]
IOB3:OUTPUT_DIFF[0, 3, 9][1, 21, 11][1, 17, 8][0, 6, 9]
IOB5:OUTPUT_DIFF[1, 9, 11][1, 6, 9][1, 3, 9][1, 12, 9]
Non-inverted[3][2][1][0]
IOB0:DCI_MODE[0, 18, 11][0, 20, 7][0, 20, 10][0, 20, 11]
IOB1:DCI_MODE[0, 10, 11][0, 12, 6][0, 12, 7][0, 12, 10]
IOB2:DCI_MODE[0, 4, 11][0, 6, 6][0, 6, 8][0, 6, 10]
IOB3:DCI_MODE[1, 18, 11][1, 20, 7][1, 20, 10][1, 20, 11]
IOB4:DCI_MODE[1, 10, 11][1, 12, 6][1, 12, 7][1, 12, 10]
IOB5:DCI_MODE[1, 4, 11][1, 6, 6][1, 6, 8][1, 6, 10]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:IBUF_MODE[0, 18, 6][0, 18, 7][0, 21, 6]
IOB1:IBUF_MODE[0, 10, 8][0, 10, 7][0, 13, 10]
IOB2:IBUF_MODE[0, 4, 10][0, 4, 6][0, 7, 8]
IOB3:IBUF_MODE[1, 18, 6][1, 18, 7][1, 21, 6]
IOB4:IBUF_MODE[1, 10, 8][1, 10, 7][1, 13, 10]
IOB5:IBUF_MODE[1, 4, 10][1, 4, 6][1, 7, 8]
NONE000
VREF011
DIFF101
CMOS111
IOB0:DISABLE_GTS[0, 21, 10]
IOB0:VR[0, 20, 8]
IOB1:BREFCLK_ENABLE[0, 12, 11]
IOB1:DISABLE_GTS[0, 13, 11]
IOB1:VR[0, 12, 8]
IOB2:DISABLE_GTS[0, 7, 11]
IOB3:DISABLE_GTS[1, 21, 10]
IOB4:DISABLE_GTS[1, 13, 11]
IOB5:DISABLE_GTS[1, 7, 11]
IOB5:VREF[1, 7, 7]
Non-inverted[0]

IOBS.V2P.T.R2

IOBS.V2P.T.R2 bittile 0
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB2:NDRIVE[1]--IOB2:SLEW[3]IOB2:IBUF_MODE[1]IOB2:NDRIVE[3]IOB2:DCI_MODE[2]IOB2:OUTPUT_ENABLE[0]~IOB1:NDRIVE[1]IOB1:SLEW[3]IOB1:PULL[2]~IOB1:NDRIVE[2]IOB1:DCI_MODE[2]IOB1:OUTPUT_ENABLE[0]--~IOB0:PDRIVE[0]IOB0:SLEW[1]IOB0:IBUF_MODE[2]~IOB0:NDRIVE[2]-IOB0:IBUF_MODE[0]
7 IOB2:SLEW[2]--IOB2:SLEW[1]IOB2:PULL[2]IOB2:PDRIVE[2]--IOB1:SLEW[2]IOB1:SLEW[0]IOB1:IBUF_MODE[1]IOB1:PDRIVE[2]IOB1:DCI_MODE[1]---~IOB0:NDRIVE[1]IOB0:SLEW[0]IOB0:IBUF_MODE[1]IOB0:PDRIVE[2]IOB0:DCI_MODE[2]IOB0:OUTPUT_ENABLE[0]
8 ~IOB2:PDRIVE[0]--IOB2:SLEW[4]IOB2:PULL[1]~IOB2:NDRIVE[2]IOB2:DCI_MODE[1]IOB2:IBUF_MODE[0]~IOB1:PDRIVE[0]IOB1:SLEW[4]IOB1:IBUF_MODE[2]~IOB1:PDRIVE[1]-IOB1:OUTPUT_ENABLE[1]--IOB0:SLEW[2]IOB1:OUTPUT_DIFF[3]IOB0:PULL[2]~IOB0:PDRIVE[1]-IOB0:OUTPUT_ENABLE[1]
9 IOB2:NDRIVE[0]--IOB3:OUTPUT_DIFF[3]IOB2:PULL[0]IOB2:NDRIVE[4]IOB3:OUTPUT_DIFF[0]-IOB1:OUTPUT_MISC[0]~IOB1:DCIUPDATEMODE_ASREQUIREDIOB1:PULL[1]IOB1:PDRIVE[3]IOB1:OUTPUT_DIFF[2]---IOB0:OUTPUT_MISC[0]IOB0:SLEW[4]IOB0:PULL[1]IOB0:PDRIVE[3]-IOB0:VREF
10 IOB2:OUTPUT_MISC[1]--IOB2:SLEW[0]IOB2:IBUF_MODE[2]~IOB2:PDRIVE[1]IOB2:DCI_MODE[0]IOB2:OUTPUT_ENABLE[1]IOB1:OUTPUT_MISC[1]IOB1:SLEW[1]IOB1:PULL[0]IOB1:NDRIVE[3]IOB1:DCI_MODE[0]IOB1:IBUF_MODE[0]--IOB0:NDRIVE[0]IOB0:SLEW[3]IOB0:PULL[0]IOB0:NDRIVE[3]IOB0:DCI_MODE[1]IOB0:DISABLE_GTS
11 IOB2:OUTPUT_MISC[0]--~IOB2:DCIUPDATEMODE_ASREQUIREDIOB2:DCI_MODE[3]IOB2:PDRIVE[3]-IOB2:DISABLE_GTSIOB1:NDRIVE[0]IOB1:OUTPUT_DIFF[1]IOB1:DCI_MODE[3]IOB1:NDRIVE[4]-IOB1:DISABLE_GTS--IOB0:OUTPUT_MISC[1]~IOB0:DCIUPDATEMODE_ASREQUIREDIOB0:DCI_MODE[3]IOB0:NDRIVE[4]IOB0:DCI_MODE[0]IOB1:OUTPUT_DIFF[0]
IOBS.V2P.T.R2 bittile 1
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB5:NDRIVE[1]--IOB5:SLEW[3]IOB5:IBUF_MODE[1]IOB5:NDRIVE[3]IOB5:DCI_MODE[2]IOB5:OUTPUT_ENABLE[0]~IOB4:NDRIVE[1]IOB4:SLEW[3]IOB4:PULL[2]~IOB4:NDRIVE[2]IOB4:DCI_MODE[2]IOB4:OUTPUT_ENABLE[0]--~IOB3:PDRIVE[0]IOB3:SLEW[1]IOB3:IBUF_MODE[2]~IOB3:NDRIVE[2]-IOB3:IBUF_MODE[0]
7 IOB5:SLEW[2]--IOB5:SLEW[1]IOB5:PULL[2]IOB5:PDRIVE[2]IOB5:VR-IOB4:SLEW[2]IOB4:SLEW[0]IOB4:IBUF_MODE[1]IOB4:PDRIVE[2]IOB4:DCI_MODE[1]---~IOB3:NDRIVE[1]IOB3:SLEW[0]IOB3:IBUF_MODE[1]IOB3:PDRIVE[2]IOB3:DCI_MODE[2]IOB3:OUTPUT_ENABLE[0]
8 ~IOB5:PDRIVE[0]--IOB5:SLEW[4]IOB5:PULL[1]~IOB5:NDRIVE[2]IOB5:DCI_MODE[1]IOB5:IBUF_MODE[0]~IOB4:PDRIVE[0]IOB4:SLEW[4]IOB4:IBUF_MODE[2]~IOB4:PDRIVE[1]IOB4:VRIOB4:OUTPUT_ENABLE[1]--IOB3:SLEW[2]IOB3:OUTPUT_DIFF[1]IOB3:PULL[2]~IOB3:PDRIVE[1]-IOB3:OUTPUT_ENABLE[1]
9 IOB5:NDRIVE[0]--IOB5:OUTPUT_DIFF[1]IOB5:PULL[0]IOB5:NDRIVE[4]IOB5:OUTPUT_DIFF[2]-IOB4:OUTPUT_MISC[0]~IOB4:DCIUPDATEMODE_ASREQUIREDIOB4:PULL[1]IOB4:PDRIVE[3]IOB5:OUTPUT_DIFF[0]---IOB3:OUTPUT_MISC[0]IOB3:SLEW[4]IOB3:PULL[1]IOB3:PDRIVE[3]--
10 IOB5:OUTPUT_MISC[1]--IOB5:SLEW[0]IOB5:IBUF_MODE[2]~IOB5:PDRIVE[1]IOB5:DCI_MODE[0]IOB5:OUTPUT_ENABLE[1]IOB4:OUTPUT_MISC[1]IOB4:SLEW[1]IOB4:PULL[0]IOB4:NDRIVE[3]IOB4:DCI_MODE[0]IOB4:IBUF_MODE[0]--IOB3:NDRIVE[0]IOB3:SLEW[3]IOB3:PULL[0]IOB3:NDRIVE[3]IOB3:DCI_MODE[1]IOB3:DISABLE_GTS
11 IOB5:OUTPUT_MISC[0]--~IOB5:DCIUPDATEMODE_ASREQUIREDIOB5:DCI_MODE[3]IOB5:PDRIVE[3]IOB5:BREFCLK_ENABLEIOB5:DISABLE_GTSIOB4:NDRIVE[0]IOB5:OUTPUT_DIFF[3]IOB4:DCI_MODE[3]IOB4:NDRIVE[4]-IOB4:DISABLE_GTS--IOB3:OUTPUT_MISC[1]~IOB3:DCIUPDATEMODE_ASREQUIREDIOB3:DCI_MODE[3]IOB3:NDRIVE[4]IOB3:DCI_MODE[0]IOB3:OUTPUT_DIFF[2]
IOB0:PDRIVE[0, 19, 9][0, 19, 7][0, 19, 8][0, 16, 6]
IOB1:PDRIVE[0, 11, 9][0, 11, 7][0, 11, 8][0, 8, 8]
IOB2:PDRIVE[0, 5, 11][0, 5, 7][0, 5, 10][0, 0, 8]
IOB3:PDRIVE[1, 19, 9][1, 19, 7][1, 19, 8][1, 16, 6]
IOB4:PDRIVE[1, 11, 9][1, 11, 7][1, 11, 8][1, 8, 8]
IOB5:PDRIVE[1, 5, 11][1, 5, 7][1, 5, 10][1, 0, 8]
Mixed inversion[3][2]~[1]~[0]
IOB0:NDRIVE[0, 19, 11][0, 19, 10][0, 19, 6][0, 16, 7][0, 16, 10]
IOB1:NDRIVE[0, 11, 11][0, 11, 10][0, 11, 6][0, 8, 6][0, 8, 11]
IOB2:NDRIVE[0, 5, 9][0, 5, 6][0, 5, 8][0, 0, 6][0, 0, 9]
IOB3:NDRIVE[1, 19, 11][1, 19, 10][1, 19, 6][1, 16, 7][1, 16, 10]
IOB4:NDRIVE[1, 11, 11][1, 11, 10][1, 11, 6][1, 8, 6][1, 8, 11]
IOB5:NDRIVE[1, 5, 9][1, 5, 6][1, 5, 8][1, 0, 6][1, 0, 9]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:OUTPUT_ENABLE[0, 21, 8][0, 21, 7]
IOB0:OUTPUT_MISC[0, 16, 11][0, 16, 9]
IOB1:OUTPUT_ENABLE[0, 13, 8][0, 13, 6]
IOB1:OUTPUT_MISC[0, 8, 10][0, 8, 9]
IOB2:OUTPUT_ENABLE[0, 7, 10][0, 7, 6]
IOB2:OUTPUT_MISC[0, 0, 10][0, 0, 11]
IOB3:OUTPUT_ENABLE[1, 21, 8][1, 21, 7]
IOB3:OUTPUT_MISC[1, 16, 11][1, 16, 9]
IOB4:OUTPUT_ENABLE[1, 13, 8][1, 13, 6]
IOB4:OUTPUT_MISC[1, 8, 10][1, 8, 9]
IOB5:OUTPUT_ENABLE[1, 7, 10][1, 7, 6]
IOB5:OUTPUT_MISC[1, 0, 10][1, 0, 11]
Non-inverted[1][0]
IOB0:SLEW[0, 17, 9][0, 17, 10][0, 16, 8][0, 17, 6][0, 17, 7]
IOB1:SLEW[0, 9, 8][0, 9, 6][0, 8, 7][0, 9, 10][0, 9, 7]
IOB2:SLEW[0, 3, 8][0, 3, 6][0, 0, 7][0, 3, 7][0, 3, 10]
IOB3:SLEW[1, 17, 9][1, 17, 10][1, 16, 8][1, 17, 6][1, 17, 7]
IOB4:SLEW[1, 9, 8][1, 9, 6][1, 8, 7][1, 9, 10][1, 9, 7]
IOB5:SLEW[1, 3, 8][1, 3, 6][1, 0, 7][1, 3, 7][1, 3, 10]
Non-inverted[4][3][2][1][0]
IOB0:DCIUPDATEMODE_ASREQUIRED[0, 17, 11]
IOB1:DCIUPDATEMODE_ASREQUIRED[0, 9, 9]
IOB2:DCIUPDATEMODE_ASREQUIRED[0, 3, 11]
IOB3:DCIUPDATEMODE_ASREQUIRED[1, 17, 11]
IOB4:DCIUPDATEMODE_ASREQUIRED[1, 9, 9]
IOB5:DCIUPDATEMODE_ASREQUIRED[1, 3, 11]
Inverted~[0]
IOB0:PULL[0, 18, 8][0, 18, 9][0, 18, 10]
IOB1:PULL[0, 10, 6][0, 10, 9][0, 10, 10]
IOB2:PULL[0, 4, 7][0, 4, 8][0, 4, 9]
IOB3:PULL[1, 18, 8][1, 18, 9][1, 18, 10]
IOB4:PULL[1, 10, 6][1, 10, 9][1, 10, 10]
IOB5:PULL[1, 4, 7][1, 4, 8][1, 4, 9]
PULLDOWN000
NONE001
PULLUP011
KEEPER101
IOB1:OUTPUT_DIFF[0, 17, 8][0, 12, 9][0, 9, 11][0, 21, 11]
IOB3:OUTPUT_DIFF[0, 3, 9][1, 21, 11][1, 17, 8][0, 6, 9]
IOB5:OUTPUT_DIFF[1, 9, 11][1, 6, 9][1, 3, 9][1, 12, 9]
Non-inverted[3][2][1][0]
IOB0:DCI_MODE[0, 18, 11][0, 20, 7][0, 20, 10][0, 20, 11]
IOB1:DCI_MODE[0, 10, 11][0, 12, 6][0, 12, 7][0, 12, 10]
IOB2:DCI_MODE[0, 4, 11][0, 6, 6][0, 6, 8][0, 6, 10]
IOB3:DCI_MODE[1, 18, 11][1, 20, 7][1, 20, 10][1, 20, 11]
IOB4:DCI_MODE[1, 10, 11][1, 12, 6][1, 12, 7][1, 12, 10]
IOB5:DCI_MODE[1, 4, 11][1, 6, 6][1, 6, 8][1, 6, 10]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:IBUF_MODE[0, 18, 6][0, 18, 7][0, 21, 6]
IOB1:IBUF_MODE[0, 10, 8][0, 10, 7][0, 13, 10]
IOB2:IBUF_MODE[0, 4, 10][0, 4, 6][0, 7, 8]
IOB3:IBUF_MODE[1, 18, 6][1, 18, 7][1, 21, 6]
IOB4:IBUF_MODE[1, 10, 8][1, 10, 7][1, 13, 10]
IOB5:IBUF_MODE[1, 4, 10][1, 4, 6][1, 7, 8]
NONE000
VREF011
DIFF101
CMOS111
IOB0:DISABLE_GTS[0, 21, 10]
IOB0:VREF[0, 21, 9]
IOB1:DISABLE_GTS[0, 13, 11]
IOB2:DISABLE_GTS[0, 7, 11]
IOB3:DISABLE_GTS[1, 21, 10]
IOB4:DISABLE_GTS[1, 13, 11]
IOB4:VR[1, 12, 8]
IOB5:BREFCLK_ENABLE[1, 6, 11]
IOB5:DISABLE_GTS[1, 7, 11]
IOB5:VR[1, 6, 7]
Non-inverted[0]

IOBS.V2P.T.R2.CLK

IOBS.V2P.T.R2.CLK bittile 0
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB2:NDRIVE[1]--IOB2:SLEW[3]IOB2:IBUF_MODE[1]IOB2:NDRIVE[3]IOB2:DCI_MODE[2]IOB2:OUTPUT_ENABLE[0]~IOB1:NDRIVE[1]IOB1:SLEW[3]IOB1:PULL[2]~IOB1:NDRIVE[2]IOB1:DCI_MODE[2]IOB1:OUTPUT_ENABLE[0]--~IOB0:PDRIVE[0]IOB0:SLEW[1]IOB0:IBUF_MODE[2]~IOB0:NDRIVE[2]-IOB0:IBUF_MODE[0]
7 IOB2:SLEW[2]--IOB2:SLEW[1]IOB2:PULL[2]IOB2:PDRIVE[2]--IOB1:SLEW[2]IOB1:SLEW[0]IOB1:IBUF_MODE[1]IOB1:PDRIVE[2]IOB1:DCI_MODE[1]---~IOB0:NDRIVE[1]IOB0:SLEW[0]IOB0:IBUF_MODE[1]IOB0:PDRIVE[2]IOB0:DCI_MODE[2]IOB0:OUTPUT_ENABLE[0]
8 ~IOB2:PDRIVE[0]--IOB2:SLEW[4]IOB2:PULL[1]~IOB2:NDRIVE[2]IOB2:DCI_MODE[1]IOB2:IBUF_MODE[0]~IOB1:PDRIVE[0]IOB1:SLEW[4]IOB1:IBUF_MODE[2]~IOB1:PDRIVE[1]-IOB1:OUTPUT_ENABLE[1]--IOB0:SLEW[2]IOB1:OUTPUT_DIFF[3]IOB0:PULL[2]~IOB0:PDRIVE[1]-IOB0:OUTPUT_ENABLE[1]
9 IOB2:NDRIVE[0]--IOB3:OUTPUT_DIFF[3]IOB2:PULL[0]IOB2:NDRIVE[4]IOB3:OUTPUT_DIFF[0]-IOB1:OUTPUT_MISC[0]~IOB1:DCIUPDATEMODE_ASREQUIREDIOB1:PULL[1]IOB1:PDRIVE[3]IOB1:OUTPUT_DIFF[2]---IOB0:OUTPUT_MISC[0]IOB0:SLEW[4]IOB0:PULL[1]IOB0:PDRIVE[3]--
10 IOB2:OUTPUT_MISC[1]--IOB2:SLEW[0]IOB2:IBUF_MODE[2]~IOB2:PDRIVE[1]IOB2:DCI_MODE[0]IOB2:OUTPUT_ENABLE[1]IOB1:OUTPUT_MISC[1]IOB1:SLEW[1]IOB1:PULL[0]IOB1:NDRIVE[3]IOB1:DCI_MODE[0]IOB1:IBUF_MODE[0]--IOB0:NDRIVE[0]IOB0:SLEW[3]IOB0:PULL[0]IOB0:NDRIVE[3]IOB0:DCI_MODE[1]IOB0:DISABLE_GTS
11 IOB2:OUTPUT_MISC[0]--~IOB2:DCIUPDATEMODE_ASREQUIREDIOB2:DCI_MODE[3]IOB2:PDRIVE[3]-IOB2:DISABLE_GTSIOB1:NDRIVE[0]IOB1:OUTPUT_DIFF[1]IOB1:DCI_MODE[3]IOB1:NDRIVE[4]-IOB1:DISABLE_GTS--IOB0:OUTPUT_MISC[1]~IOB0:DCIUPDATEMODE_ASREQUIREDIOB0:DCI_MODE[3]IOB0:NDRIVE[4]IOB0:DCI_MODE[0]IOB1:OUTPUT_DIFF[0]
IOBS.V2P.T.R2.CLK bittile 1
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ----------------~IOB3:PDRIVE[0]IOB3:SLEW[1]IOB3:IBUF_MODE[2]~IOB3:NDRIVE[2]-IOB3:IBUF_MODE[0]
7 ----------------~IOB3:NDRIVE[1]IOB3:SLEW[0]IOB3:IBUF_MODE[1]IOB3:PDRIVE[2]IOB3:DCI_MODE[2]IOB3:OUTPUT_ENABLE[0]
8 -------BREFCLK_INT:ENABLE[1]--------IOB3:SLEW[2]IOB3:OUTPUT_DIFF[1]IOB3:PULL[2]~IOB3:PDRIVE[1]-IOB3:OUTPUT_ENABLE[1]
9 ----------------IOB3:OUTPUT_MISC[0]IOB3:SLEW[4]IOB3:PULL[1]IOB3:PDRIVE[3]--
10 ----BREFCLK_INT:ENABLE[0]-----------IOB3:NDRIVE[0]IOB3:SLEW[3]IOB3:PULL[0]IOB3:NDRIVE[3]IOB3:DCI_MODE[1]IOB3:DISABLE_GTS
11 ----------------IOB3:OUTPUT_MISC[1]~IOB3:DCIUPDATEMODE_ASREQUIREDIOB3:DCI_MODE[3]IOB3:NDRIVE[4]IOB3:DCI_MODE[0]IOB3:OUTPUT_DIFF[2]
IOB0:PDRIVE[0, 19, 9][0, 19, 7][0, 19, 8][0, 16, 6]
IOB1:PDRIVE[0, 11, 9][0, 11, 7][0, 11, 8][0, 8, 8]
IOB2:PDRIVE[0, 5, 11][0, 5, 7][0, 5, 10][0, 0, 8]
IOB3:PDRIVE[1, 19, 9][1, 19, 7][1, 19, 8][1, 16, 6]
Mixed inversion[3][2]~[1]~[0]
IOB0:NDRIVE[0, 19, 11][0, 19, 10][0, 19, 6][0, 16, 7][0, 16, 10]
IOB1:NDRIVE[0, 11, 11][0, 11, 10][0, 11, 6][0, 8, 6][0, 8, 11]
IOB2:NDRIVE[0, 5, 9][0, 5, 6][0, 5, 8][0, 0, 6][0, 0, 9]
IOB3:NDRIVE[1, 19, 11][1, 19, 10][1, 19, 6][1, 16, 7][1, 16, 10]
Mixed inversion[4][3]~[2]~[1][0]
BREFCLK_INT:ENABLE[1, 7, 8][1, 4, 10]
IOB0:OUTPUT_ENABLE[0, 21, 8][0, 21, 7]
IOB0:OUTPUT_MISC[0, 16, 11][0, 16, 9]
IOB1:OUTPUT_ENABLE[0, 13, 8][0, 13, 6]
IOB1:OUTPUT_MISC[0, 8, 10][0, 8, 9]
IOB2:OUTPUT_ENABLE[0, 7, 10][0, 7, 6]
IOB2:OUTPUT_MISC[0, 0, 10][0, 0, 11]
IOB3:OUTPUT_ENABLE[1, 21, 8][1, 21, 7]
IOB3:OUTPUT_MISC[1, 16, 11][1, 16, 9]
Non-inverted[1][0]
IOB0:SLEW[0, 17, 9][0, 17, 10][0, 16, 8][0, 17, 6][0, 17, 7]
IOB1:SLEW[0, 9, 8][0, 9, 6][0, 8, 7][0, 9, 10][0, 9, 7]
IOB2:SLEW[0, 3, 8][0, 3, 6][0, 0, 7][0, 3, 7][0, 3, 10]
IOB3:SLEW[1, 17, 9][1, 17, 10][1, 16, 8][1, 17, 6][1, 17, 7]
Non-inverted[4][3][2][1][0]
IOB0:DCIUPDATEMODE_ASREQUIRED[0, 17, 11]
IOB1:DCIUPDATEMODE_ASREQUIRED[0, 9, 9]
IOB2:DCIUPDATEMODE_ASREQUIRED[0, 3, 11]
IOB3:DCIUPDATEMODE_ASREQUIRED[1, 17, 11]
Inverted~[0]
IOB0:PULL[0, 18, 8][0, 18, 9][0, 18, 10]
IOB1:PULL[0, 10, 6][0, 10, 9][0, 10, 10]
IOB2:PULL[0, 4, 7][0, 4, 8][0, 4, 9]
IOB3:PULL[1, 18, 8][1, 18, 9][1, 18, 10]
PULLDOWN000
NONE001
PULLUP011
KEEPER101
IOB1:OUTPUT_DIFF[0, 17, 8][0, 12, 9][0, 9, 11][0, 21, 11]
IOB3:OUTPUT_DIFF[0, 3, 9][1, 21, 11][1, 17, 8][0, 6, 9]
Non-inverted[3][2][1][0]
IOB0:DCI_MODE[0, 18, 11][0, 20, 7][0, 20, 10][0, 20, 11]
IOB1:DCI_MODE[0, 10, 11][0, 12, 6][0, 12, 7][0, 12, 10]
IOB2:DCI_MODE[0, 4, 11][0, 6, 6][0, 6, 8][0, 6, 10]
IOB3:DCI_MODE[1, 18, 11][1, 20, 7][1, 20, 10][1, 20, 11]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:IBUF_MODE[0, 18, 6][0, 18, 7][0, 21, 6]
IOB1:IBUF_MODE[0, 10, 8][0, 10, 7][0, 13, 10]
IOB2:IBUF_MODE[0, 4, 10][0, 4, 6][0, 7, 8]
IOB3:IBUF_MODE[1, 18, 6][1, 18, 7][1, 21, 6]
NONE000
VREF011
DIFF101
CMOS111
IOB0:DISABLE_GTS[0, 21, 10]
IOB1:DISABLE_GTS[0, 13, 11]
IOB2:DISABLE_GTS[0, 7, 11]
IOB3:DISABLE_GTS[1, 21, 10]
Non-inverted[0]

IOBS.V2P.R.B2

IOBS.V2P.R.B2 bittile 0
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 --IOB5:SLEW[2]IOB5:SLEW[4]
5 --IOB5:SLEW[1]IOB5:SLEW[0]
6 --IOB5:OUTPUT_DIFF[1]~IOB5:DCIUPDATEMODE_ASREQUIRED
7 --IOB5:OUTPUT_MISC[0]IOB5:OUTPUT_MISC[1]
8 --IOB5:NDRIVE[0]IOB5:SLEW[3]
9 --~IOB5:NDRIVE[1]~IOB5:PDRIVE[0]
10 --~IOB5:NDRIVE[2]~IOB5:PDRIVE[1]
11 --IOB5:NDRIVE[3]IOB5:PDRIVE[2]
12 --IOB5:NDRIVE[4]IOB5:PDRIVE[3]
13 --IOB5:DCI_MODE[3]IOB5:PULL[0]
14 --IOB5:PULL[1]IOB5:PULL[2]
15 --IOB5:IBUF_MODE[1]IOB5:IBUF_MODE[2]
16 --IOB5:IBUF_MODE[0]IOB5:OUTPUT_ENABLE[1]
17 --IOB5:OUTPUT_ENABLE[0]-
18 --IOB5:DISABLE_GTS-
19 --IOB5:OUTPUT_DIFF[2]-
20 --IOB5:DCI_MODE[0]IOB5:DCI_MODE[1]
21 --IOB5:DCI_MODE[2]IOB5:VR
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 --IOB4:SLEW[2]IOB4:SLEW[4]
32 --IOB4:SLEW[1]IOB4:SLEW[0]
33 --IOB5:OUTPUT_DIFF[3]~IOB4:DCIUPDATEMODE_ASREQUIRED
34 --IOB4:OUTPUT_MISC[0]IOB4:OUTPUT_MISC[1]
35 --IOB4:NDRIVE[0]IOB4:SLEW[3]
36 --~IOB4:NDRIVE[1]~IOB4:PDRIVE[0]
37 --~IOB4:NDRIVE[2]~IOB4:PDRIVE[1]
38 --IOB4:NDRIVE[3]IOB4:PDRIVE[2]
39 --IOB4:NDRIVE[4]IOB4:PDRIVE[3]
40 --IOB4:DCI_MODE[3]IOB4:PULL[0]
41 --IOB4:PULL[1]IOB4:PULL[2]
42 --IOB4:IBUF_MODE[1]IOB4:IBUF_MODE[2]
43 --IOB4:IBUF_MODE[0]IOB4:OUTPUT_ENABLE[1]
44 --IOB4:OUTPUT_ENABLE[0]-
45 --IOB4:DISABLE_GTS-
46 --IOB5:OUTPUT_DIFF[0]-
47 --IOB4:DCI_MODE[0]IOB4:DCI_MODE[1]
48 --IOB4:DCI_MODE[2]IOB4:VR
49 ----
50 ----
51 ----
52 ----
53 ----
54 ----
55 ----
56 ----
57 ----
58 --IOB3:SLEW[2]IOB3:SLEW[4]
59 --IOB3:SLEW[1]IOB3:SLEW[0]
60 --IOB3:OUTPUT_DIFF[1]~IOB3:DCIUPDATEMODE_ASREQUIRED
61 --IOB3:OUTPUT_MISC[0]IOB3:OUTPUT_MISC[1]
62 --IOB3:NDRIVE[0]IOB3:SLEW[3]
63 --~IOB3:NDRIVE[1]~IOB3:PDRIVE[0]
64 --~IOB3:NDRIVE[2]~IOB3:PDRIVE[1]
65 --IOB3:NDRIVE[3]IOB3:PDRIVE[2]
66 --IOB3:NDRIVE[4]IOB3:PDRIVE[3]
67 --IOB3:DCI_MODE[3]IOB3:PULL[0]
68 --IOB3:PULL[1]IOB3:PULL[2]
69 --IOB3:IBUF_MODE[1]IOB3:IBUF_MODE[2]
70 --IOB3:IBUF_MODE[0]IOB3:OUTPUT_ENABLE[1]
71 --IOB3:OUTPUT_ENABLE[0]-
72 --IOB3:DISABLE_GTS-
73 --IOB3:OUTPUT_DIFF[2]-
74 --IOB3:DCI_MODE[0]IOB3:DCI_MODE[1]
75 --IOB3:DCI_MODE[2]-
IOBS.V2P.R.B2 bittile 1
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 --IOB2:SLEW[2]IOB2:SLEW[4]
5 --IOB2:SLEW[1]IOB2:SLEW[0]
6 --IOB3:OUTPUT_DIFF[3]~IOB2:DCIUPDATEMODE_ASREQUIRED
7 --IOB2:OUTPUT_MISC[0]IOB2:OUTPUT_MISC[1]
8 --IOB2:NDRIVE[0]IOB2:SLEW[3]
9 --~IOB2:NDRIVE[1]~IOB2:PDRIVE[0]
10 --~IOB2:NDRIVE[2]~IOB2:PDRIVE[1]
11 --IOB2:NDRIVE[3]IOB2:PDRIVE[2]
12 --IOB2:NDRIVE[4]IOB2:PDRIVE[3]
13 --IOB2:DCI_MODE[3]IOB2:PULL[0]
14 --IOB2:PULL[1]IOB2:PULL[2]
15 --IOB2:IBUF_MODE[1]IOB2:IBUF_MODE[2]
16 --IOB2:IBUF_MODE[0]IOB2:OUTPUT_ENABLE[1]
17 --IOB2:OUTPUT_ENABLE[0]-
18 --IOB2:DISABLE_GTS-
19 --IOB3:OUTPUT_DIFF[0]-
20 --IOB2:DCI_MODE[0]IOB2:DCI_MODE[1]
21 --IOB2:DCI_MODE[2]-
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 --IOB1:SLEW[2]IOB1:SLEW[4]
32 --IOB1:SLEW[1]IOB1:SLEW[0]
33 --IOB1:OUTPUT_DIFF[1]~IOB1:DCIUPDATEMODE_ASREQUIRED
34 --IOB1:OUTPUT_MISC[0]IOB1:OUTPUT_MISC[1]
35 --IOB1:NDRIVE[0]IOB1:SLEW[3]
36 --~IOB1:NDRIVE[1]~IOB1:PDRIVE[0]
37 --~IOB1:NDRIVE[2]~IOB1:PDRIVE[1]
38 --IOB1:NDRIVE[3]IOB1:PDRIVE[2]
39 --IOB1:NDRIVE[4]IOB1:PDRIVE[3]
40 --IOB1:DCI_MODE[3]IOB1:PULL[0]
41 --IOB1:PULL[1]IOB1:PULL[2]
42 --IOB1:IBUF_MODE[1]IOB1:IBUF_MODE[2]
43 --IOB1:IBUF_MODE[0]IOB1:OUTPUT_ENABLE[1]
44 --IOB1:OUTPUT_ENABLE[0]-
45 --IOB1:DISABLE_GTS-
46 --IOB1:OUTPUT_DIFF[2]-
47 --IOB1:DCI_MODE[0]IOB1:DCI_MODE[1]
48 --IOB1:DCI_MODE[2]-
49 ----
50 ----
51 ----
52 ----
53 ----
54 ----
55 ----
56 ----
57 ----
58 --IOB0:SLEW[2]IOB0:SLEW[4]
59 --IOB0:SLEW[1]IOB0:SLEW[0]
60 --IOB1:OUTPUT_DIFF[3]~IOB0:DCIUPDATEMODE_ASREQUIRED
61 --IOB0:OUTPUT_MISC[0]IOB0:OUTPUT_MISC[1]
62 --IOB0:NDRIVE[0]IOB0:SLEW[3]
63 --~IOB0:NDRIVE[1]~IOB0:PDRIVE[0]
64 --~IOB0:NDRIVE[2]~IOB0:PDRIVE[1]
65 --IOB0:NDRIVE[3]IOB0:PDRIVE[2]
66 --IOB0:NDRIVE[4]IOB0:PDRIVE[3]
67 --IOB0:DCI_MODE[3]IOB0:PULL[0]
68 --IOB0:PULL[1]IOB0:PULL[2]
69 --IOB0:IBUF_MODE[1]IOB0:IBUF_MODE[2]
70 --IOB0:IBUF_MODE[0]IOB0:OUTPUT_ENABLE[1]
71 --IOB0:OUTPUT_ENABLE[0]IOB0:VREF
72 --IOB0:DISABLE_GTS-
73 --IOB1:OUTPUT_DIFF[0]-
74 --IOB0:DCI_MODE[0]IOB0:DCI_MODE[1]
75 --IOB0:DCI_MODE[2]-
IOB0:OUTPUT_ENABLE[1, 3, 70][1, 2, 71]
IOB0:OUTPUT_MISC[1, 3, 61][1, 2, 61]
IOB1:OUTPUT_ENABLE[1, 3, 43][1, 2, 44]
IOB1:OUTPUT_MISC[1, 3, 34][1, 2, 34]
IOB2:OUTPUT_ENABLE[1, 3, 16][1, 2, 17]
IOB2:OUTPUT_MISC[1, 3, 7][1, 2, 7]
IOB3:OUTPUT_ENABLE[0, 3, 70][0, 2, 71]
IOB3:OUTPUT_MISC[0, 3, 61][0, 2, 61]
IOB4:OUTPUT_ENABLE[0, 3, 43][0, 2, 44]
IOB4:OUTPUT_MISC[0, 3, 34][0, 2, 34]
IOB5:OUTPUT_ENABLE[0, 3, 16][0, 2, 17]
IOB5:OUTPUT_MISC[0, 3, 7][0, 2, 7]
Non-inverted[1][0]
IOB0:NDRIVE[1, 2, 66][1, 2, 65][1, 2, 64][1, 2, 63][1, 2, 62]
IOB1:NDRIVE[1, 2, 39][1, 2, 38][1, 2, 37][1, 2, 36][1, 2, 35]
IOB2:NDRIVE[1, 2, 12][1, 2, 11][1, 2, 10][1, 2, 9][1, 2, 8]
IOB3:NDRIVE[0, 2, 66][0, 2, 65][0, 2, 64][0, 2, 63][0, 2, 62]
IOB4:NDRIVE[0, 2, 39][0, 2, 38][0, 2, 37][0, 2, 36][0, 2, 35]
IOB5:NDRIVE[0, 2, 12][0, 2, 11][0, 2, 10][0, 2, 9][0, 2, 8]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:IBUF_MODE[1, 3, 69][1, 2, 69][1, 2, 70]
IOB1:IBUF_MODE[1, 3, 42][1, 2, 42][1, 2, 43]
IOB2:IBUF_MODE[1, 3, 15][1, 2, 15][1, 2, 16]
IOB3:IBUF_MODE[0, 3, 69][0, 2, 69][0, 2, 70]
IOB4:IBUF_MODE[0, 3, 42][0, 2, 42][0, 2, 43]
IOB5:IBUF_MODE[0, 3, 15][0, 2, 15][0, 2, 16]
NONE000
VREF011
DIFF101
CMOS111
IOB0:DISABLE_GTS[1, 2, 72]
IOB0:VREF[1, 3, 71]
IOB1:DISABLE_GTS[1, 2, 45]
IOB2:DISABLE_GTS[1, 2, 18]
IOB3:DISABLE_GTS[0, 2, 72]
IOB4:DISABLE_GTS[0, 2, 45]
IOB4:VR[0, 3, 48]
IOB5:DISABLE_GTS[0, 2, 18]
IOB5:VR[0, 3, 21]
Non-inverted[0]
IOB0:DCI_MODE[1, 2, 67][1, 2, 75][1, 3, 74][1, 2, 74]
IOB1:DCI_MODE[1, 2, 40][1, 2, 48][1, 3, 47][1, 2, 47]
IOB2:DCI_MODE[1, 2, 13][1, 2, 21][1, 3, 20][1, 2, 20]
IOB3:DCI_MODE[0, 2, 67][0, 2, 75][0, 3, 74][0, 2, 74]
IOB4:DCI_MODE[0, 2, 40][0, 2, 48][0, 3, 47][0, 2, 47]
IOB5:DCI_MODE[0, 2, 13][0, 2, 21][0, 3, 20][0, 2, 20]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB1:OUTPUT_DIFF[1, 2, 60][1, 2, 46][1, 2, 33][1, 2, 73]
IOB3:OUTPUT_DIFF[1, 2, 6][0, 2, 73][0, 2, 60][1, 2, 19]
IOB5:OUTPUT_DIFF[0, 2, 33][0, 2, 19][0, 2, 6][0, 2, 46]
Non-inverted[3][2][1][0]
IOB0:SLEW[1, 3, 58][1, 3, 62][1, 2, 58][1, 2, 59][1, 3, 59]
IOB1:SLEW[1, 3, 31][1, 3, 35][1, 2, 31][1, 2, 32][1, 3, 32]
IOB2:SLEW[1, 3, 4][1, 3, 8][1, 2, 4][1, 2, 5][1, 3, 5]
IOB3:SLEW[0, 3, 58][0, 3, 62][0, 2, 58][0, 2, 59][0, 3, 59]
IOB4:SLEW[0, 3, 31][0, 3, 35][0, 2, 31][0, 2, 32][0, 3, 32]
IOB5:SLEW[0, 3, 4][0, 3, 8][0, 2, 4][0, 2, 5][0, 3, 5]
Non-inverted[4][3][2][1][0]
IOB0:DCIUPDATEMODE_ASREQUIRED[1, 3, 60]
IOB1:DCIUPDATEMODE_ASREQUIRED[1, 3, 33]
IOB2:DCIUPDATEMODE_ASREQUIRED[1, 3, 6]
IOB3:DCIUPDATEMODE_ASREQUIRED[0, 3, 60]
IOB4:DCIUPDATEMODE_ASREQUIRED[0, 3, 33]
IOB5:DCIUPDATEMODE_ASREQUIRED[0, 3, 6]
Inverted~[0]
IOB0:PDRIVE[1, 3, 66][1, 3, 65][1, 3, 64][1, 3, 63]
IOB1:PDRIVE[1, 3, 39][1, 3, 38][1, 3, 37][1, 3, 36]
IOB2:PDRIVE[1, 3, 12][1, 3, 11][1, 3, 10][1, 3, 9]
IOB3:PDRIVE[0, 3, 66][0, 3, 65][0, 3, 64][0, 3, 63]
IOB4:PDRIVE[0, 3, 39][0, 3, 38][0, 3, 37][0, 3, 36]
IOB5:PDRIVE[0, 3, 12][0, 3, 11][0, 3, 10][0, 3, 9]
Mixed inversion[3][2]~[1]~[0]
IOB0:PULL[1, 3, 68][1, 2, 68][1, 3, 67]
IOB1:PULL[1, 3, 41][1, 2, 41][1, 3, 40]
IOB2:PULL[1, 3, 14][1, 2, 14][1, 3, 13]
IOB3:PULL[0, 3, 68][0, 2, 68][0, 3, 67]
IOB4:PULL[0, 3, 41][0, 2, 41][0, 3, 40]
IOB5:PULL[0, 3, 14][0, 2, 14][0, 3, 13]
PULLDOWN000
NONE001
PULLUP011
KEEPER101

IOBS.V2P.R.T2

IOBS.V2P.R.T2 bittile 0
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 --IOB5:SLEW[2]IOB5:SLEW[4]
5 --IOB5:SLEW[1]IOB5:SLEW[0]
6 --IOB5:OUTPUT_DIFF[1]~IOB5:DCIUPDATEMODE_ASREQUIRED
7 --IOB5:OUTPUT_MISC[0]IOB5:OUTPUT_MISC[1]
8 --IOB5:NDRIVE[0]IOB5:SLEW[3]
9 --~IOB5:NDRIVE[1]~IOB5:PDRIVE[0]
10 --~IOB5:NDRIVE[2]~IOB5:PDRIVE[1]
11 --IOB5:NDRIVE[3]IOB5:PDRIVE[2]
12 --IOB5:NDRIVE[4]IOB5:PDRIVE[3]
13 --IOB5:DCI_MODE[3]IOB5:PULL[0]
14 --IOB5:PULL[1]IOB5:PULL[2]
15 --IOB5:IBUF_MODE[1]IOB5:IBUF_MODE[2]
16 --IOB5:IBUF_MODE[0]IOB5:OUTPUT_ENABLE[1]
17 --IOB5:OUTPUT_ENABLE[0]-
18 --IOB5:DISABLE_GTS-
19 --IOB5:OUTPUT_DIFF[2]-
20 --IOB5:DCI_MODE[0]IOB5:DCI_MODE[1]
21 --IOB5:DCI_MODE[2]-
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 --IOB4:SLEW[2]IOB4:SLEW[4]
32 --IOB4:SLEW[1]IOB4:SLEW[0]
33 --IOB5:OUTPUT_DIFF[3]~IOB4:DCIUPDATEMODE_ASREQUIRED
34 --IOB4:OUTPUT_MISC[0]IOB4:OUTPUT_MISC[1]
35 --IOB4:NDRIVE[0]IOB4:SLEW[3]
36 --~IOB4:NDRIVE[1]~IOB4:PDRIVE[0]
37 --~IOB4:NDRIVE[2]~IOB4:PDRIVE[1]
38 --IOB4:NDRIVE[3]IOB4:PDRIVE[2]
39 --IOB4:NDRIVE[4]IOB4:PDRIVE[3]
40 --IOB4:DCI_MODE[3]IOB4:PULL[0]
41 --IOB4:PULL[1]IOB4:PULL[2]
42 --IOB4:IBUF_MODE[1]IOB4:IBUF_MODE[2]
43 --IOB4:IBUF_MODE[0]IOB4:OUTPUT_ENABLE[1]
44 --IOB4:OUTPUT_ENABLE[0]-
45 --IOB4:DISABLE_GTS-
46 --IOB5:OUTPUT_DIFF[0]-
47 --IOB4:DCI_MODE[0]IOB4:DCI_MODE[1]
48 --IOB4:DCI_MODE[2]-
49 ----
50 ----
51 ----
52 ----
53 ----
54 ----
55 ----
56 ----
57 ----
58 --IOB3:SLEW[2]IOB3:SLEW[4]
59 --IOB3:SLEW[1]IOB3:SLEW[0]
60 --IOB3:OUTPUT_DIFF[1]~IOB3:DCIUPDATEMODE_ASREQUIRED
61 --IOB3:OUTPUT_MISC[0]IOB3:OUTPUT_MISC[1]
62 --IOB3:NDRIVE[0]IOB3:SLEW[3]
63 --~IOB3:NDRIVE[1]~IOB3:PDRIVE[0]
64 --~IOB3:NDRIVE[2]~IOB3:PDRIVE[1]
65 --IOB3:NDRIVE[3]IOB3:PDRIVE[2]
66 --IOB3:NDRIVE[4]IOB3:PDRIVE[3]
67 --IOB3:DCI_MODE[3]IOB3:PULL[0]
68 --IOB3:PULL[1]IOB3:PULL[2]
69 --IOB3:IBUF_MODE[1]IOB3:IBUF_MODE[2]
70 --IOB3:IBUF_MODE[0]IOB3:OUTPUT_ENABLE[1]
71 --IOB3:OUTPUT_ENABLE[0]-
72 --IOB3:DISABLE_GTS-
73 --IOB3:OUTPUT_DIFF[2]-
74 --IOB3:DCI_MODE[0]IOB3:DCI_MODE[1]
75 --IOB3:DCI_MODE[2]-
IOBS.V2P.R.T2 bittile 1
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 --IOB2:SLEW[2]IOB2:SLEW[4]
5 --IOB2:SLEW[1]IOB2:SLEW[0]
6 --IOB3:OUTPUT_DIFF[3]~IOB2:DCIUPDATEMODE_ASREQUIRED
7 --IOB2:OUTPUT_MISC[0]IOB2:OUTPUT_MISC[1]
8 --IOB2:NDRIVE[0]IOB2:SLEW[3]
9 --~IOB2:NDRIVE[1]~IOB2:PDRIVE[0]
10 --~IOB2:NDRIVE[2]~IOB2:PDRIVE[1]
11 --IOB2:NDRIVE[3]IOB2:PDRIVE[2]
12 --IOB2:NDRIVE[4]IOB2:PDRIVE[3]
13 --IOB2:DCI_MODE[3]IOB2:PULL[0]
14 --IOB2:PULL[1]IOB2:PULL[2]
15 --IOB2:IBUF_MODE[1]IOB2:IBUF_MODE[2]
16 --IOB2:IBUF_MODE[0]IOB2:OUTPUT_ENABLE[1]
17 --IOB2:OUTPUT_ENABLE[0]-
18 --IOB2:DISABLE_GTS-
19 --IOB3:OUTPUT_DIFF[0]-
20 --IOB2:DCI_MODE[0]IOB2:DCI_MODE[1]
21 --IOB2:DCI_MODE[2]-
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 --IOB1:SLEW[2]IOB1:SLEW[4]
32 --IOB1:SLEW[1]IOB1:SLEW[0]
33 --IOB1:OUTPUT_DIFF[1]~IOB1:DCIUPDATEMODE_ASREQUIRED
34 --IOB1:OUTPUT_MISC[0]IOB1:OUTPUT_MISC[1]
35 --IOB1:NDRIVE[0]IOB1:SLEW[3]
36 --~IOB1:NDRIVE[1]~IOB1:PDRIVE[0]
37 --~IOB1:NDRIVE[2]~IOB1:PDRIVE[1]
38 --IOB1:NDRIVE[3]IOB1:PDRIVE[2]
39 --IOB1:NDRIVE[4]IOB1:PDRIVE[3]
40 --IOB1:DCI_MODE[3]IOB1:PULL[0]
41 --IOB1:PULL[1]IOB1:PULL[2]
42 --IOB1:IBUF_MODE[1]IOB1:IBUF_MODE[2]
43 --IOB1:IBUF_MODE[0]IOB1:OUTPUT_ENABLE[1]
44 --IOB1:OUTPUT_ENABLE[0]-
45 --IOB1:DISABLE_GTS-
46 --IOB1:OUTPUT_DIFF[2]-
47 --IOB1:DCI_MODE[0]IOB1:DCI_MODE[1]
48 --IOB1:DCI_MODE[2]IOB1:VR
49 ----
50 ----
51 ----
52 ----
53 ----
54 ----
55 ----
56 ----
57 ----
58 --IOB0:SLEW[2]IOB0:SLEW[4]
59 --IOB0:SLEW[1]IOB0:SLEW[0]
60 --IOB1:OUTPUT_DIFF[3]~IOB0:DCIUPDATEMODE_ASREQUIRED
61 --IOB0:OUTPUT_MISC[0]IOB0:OUTPUT_MISC[1]
62 --IOB0:NDRIVE[0]IOB0:SLEW[3]
63 --~IOB0:NDRIVE[1]~IOB0:PDRIVE[0]
64 --~IOB0:NDRIVE[2]~IOB0:PDRIVE[1]
65 --IOB0:NDRIVE[3]IOB0:PDRIVE[2]
66 --IOB0:NDRIVE[4]IOB0:PDRIVE[3]
67 --IOB0:DCI_MODE[3]IOB0:PULL[0]
68 --IOB0:PULL[1]IOB0:PULL[2]
69 --IOB0:IBUF_MODE[1]IOB0:IBUF_MODE[2]
70 --IOB0:IBUF_MODE[0]IOB0:OUTPUT_ENABLE[1]
71 --IOB0:OUTPUT_ENABLE[0]IOB0:VREF
72 --IOB0:DISABLE_GTS-
73 --IOB1:OUTPUT_DIFF[0]-
74 --IOB0:DCI_MODE[0]IOB0:DCI_MODE[1]
75 --IOB0:DCI_MODE[2]IOB0:VR
IOB0:OUTPUT_ENABLE[1, 3, 70][1, 2, 71]
IOB0:OUTPUT_MISC[1, 3, 61][1, 2, 61]
IOB1:OUTPUT_ENABLE[1, 3, 43][1, 2, 44]
IOB1:OUTPUT_MISC[1, 3, 34][1, 2, 34]
IOB2:OUTPUT_ENABLE[1, 3, 16][1, 2, 17]
IOB2:OUTPUT_MISC[1, 3, 7][1, 2, 7]
IOB3:OUTPUT_ENABLE[0, 3, 70][0, 2, 71]
IOB3:OUTPUT_MISC[0, 3, 61][0, 2, 61]
IOB4:OUTPUT_ENABLE[0, 3, 43][0, 2, 44]
IOB4:OUTPUT_MISC[0, 3, 34][0, 2, 34]
IOB5:OUTPUT_ENABLE[0, 3, 16][0, 2, 17]
IOB5:OUTPUT_MISC[0, 3, 7][0, 2, 7]
Non-inverted[1][0]
IOB0:NDRIVE[1, 2, 66][1, 2, 65][1, 2, 64][1, 2, 63][1, 2, 62]
IOB1:NDRIVE[1, 2, 39][1, 2, 38][1, 2, 37][1, 2, 36][1, 2, 35]
IOB2:NDRIVE[1, 2, 12][1, 2, 11][1, 2, 10][1, 2, 9][1, 2, 8]
IOB3:NDRIVE[0, 2, 66][0, 2, 65][0, 2, 64][0, 2, 63][0, 2, 62]
IOB4:NDRIVE[0, 2, 39][0, 2, 38][0, 2, 37][0, 2, 36][0, 2, 35]
IOB5:NDRIVE[0, 2, 12][0, 2, 11][0, 2, 10][0, 2, 9][0, 2, 8]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:IBUF_MODE[1, 3, 69][1, 2, 69][1, 2, 70]
IOB1:IBUF_MODE[1, 3, 42][1, 2, 42][1, 2, 43]
IOB2:IBUF_MODE[1, 3, 15][1, 2, 15][1, 2, 16]
IOB3:IBUF_MODE[0, 3, 69][0, 2, 69][0, 2, 70]
IOB4:IBUF_MODE[0, 3, 42][0, 2, 42][0, 2, 43]
IOB5:IBUF_MODE[0, 3, 15][0, 2, 15][0, 2, 16]
NONE000
VREF011
DIFF101
CMOS111
IOB0:DISABLE_GTS[1, 2, 72]
IOB0:VR[1, 3, 75]
IOB0:VREF[1, 3, 71]
IOB1:DISABLE_GTS[1, 2, 45]
IOB1:VR[1, 3, 48]
IOB2:DISABLE_GTS[1, 2, 18]
IOB3:DISABLE_GTS[0, 2, 72]
IOB4:DISABLE_GTS[0, 2, 45]
IOB5:DISABLE_GTS[0, 2, 18]
Non-inverted[0]
IOB0:DCI_MODE[1, 2, 67][1, 2, 75][1, 3, 74][1, 2, 74]
IOB1:DCI_MODE[1, 2, 40][1, 2, 48][1, 3, 47][1, 2, 47]
IOB2:DCI_MODE[1, 2, 13][1, 2, 21][1, 3, 20][1, 2, 20]
IOB3:DCI_MODE[0, 2, 67][0, 2, 75][0, 3, 74][0, 2, 74]
IOB4:DCI_MODE[0, 2, 40][0, 2, 48][0, 3, 47][0, 2, 47]
IOB5:DCI_MODE[0, 2, 13][0, 2, 21][0, 3, 20][0, 2, 20]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB1:OUTPUT_DIFF[1, 2, 60][1, 2, 46][1, 2, 33][1, 2, 73]
IOB3:OUTPUT_DIFF[1, 2, 6][0, 2, 73][0, 2, 60][1, 2, 19]
IOB5:OUTPUT_DIFF[0, 2, 33][0, 2, 19][0, 2, 6][0, 2, 46]
Non-inverted[3][2][1][0]
IOB0:SLEW[1, 3, 58][1, 3, 62][1, 2, 58][1, 2, 59][1, 3, 59]
IOB1:SLEW[1, 3, 31][1, 3, 35][1, 2, 31][1, 2, 32][1, 3, 32]
IOB2:SLEW[1, 3, 4][1, 3, 8][1, 2, 4][1, 2, 5][1, 3, 5]
IOB3:SLEW[0, 3, 58][0, 3, 62][0, 2, 58][0, 2, 59][0, 3, 59]
IOB4:SLEW[0, 3, 31][0, 3, 35][0, 2, 31][0, 2, 32][0, 3, 32]
IOB5:SLEW[0, 3, 4][0, 3, 8][0, 2, 4][0, 2, 5][0, 3, 5]
Non-inverted[4][3][2][1][0]
IOB0:DCIUPDATEMODE_ASREQUIRED[1, 3, 60]
IOB1:DCIUPDATEMODE_ASREQUIRED[1, 3, 33]
IOB2:DCIUPDATEMODE_ASREQUIRED[1, 3, 6]
IOB3:DCIUPDATEMODE_ASREQUIRED[0, 3, 60]
IOB4:DCIUPDATEMODE_ASREQUIRED[0, 3, 33]
IOB5:DCIUPDATEMODE_ASREQUIRED[0, 3, 6]
Inverted~[0]
IOB0:PDRIVE[1, 3, 66][1, 3, 65][1, 3, 64][1, 3, 63]
IOB1:PDRIVE[1, 3, 39][1, 3, 38][1, 3, 37][1, 3, 36]
IOB2:PDRIVE[1, 3, 12][1, 3, 11][1, 3, 10][1, 3, 9]
IOB3:PDRIVE[0, 3, 66][0, 3, 65][0, 3, 64][0, 3, 63]
IOB4:PDRIVE[0, 3, 39][0, 3, 38][0, 3, 37][0, 3, 36]
IOB5:PDRIVE[0, 3, 12][0, 3, 11][0, 3, 10][0, 3, 9]
Mixed inversion[3][2]~[1]~[0]
IOB0:PULL[1, 3, 68][1, 2, 68][1, 3, 67]
IOB1:PULL[1, 3, 41][1, 2, 41][1, 3, 40]
IOB2:PULL[1, 3, 14][1, 2, 14][1, 3, 13]
IOB3:PULL[0, 3, 68][0, 2, 68][0, 3, 67]
IOB4:PULL[0, 3, 41][0, 2, 41][0, 3, 40]
IOB5:PULL[0, 3, 14][0, 2, 14][0, 3, 13]
PULLDOWN000
NONE001
PULLUP011
KEEPER101

IOBS.V2P.B.L1

IOBS.V2P.B.L1 bittile 0
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB0:NDRIVE[1]--IOB0:SLEW[3]IOB0:IBUF_MODE[1]IOB0:NDRIVE[3]IOB0:DCI_MODE[2]IOB0:OUTPUT_ENABLE[0]~IOB1:NDRIVE[1]IOB1:SLEW[3]IOB1:PULL[2]~IOB1:NDRIVE[2]IOB1:DCI_MODE[2]IOB1:OUTPUT_ENABLE[0]--~IOB2:PDRIVE[0]IOB2:SLEW[1]IOB2:IBUF_MODE[2]~IOB2:NDRIVE[2]-IOB2:IBUF_MODE[1]
7 IOB0:SLEW[2]--IOB0:SLEW[1]IOB0:PULL[2]IOB0:PDRIVE[2]IOB0:VR-IOB1:SLEW[2]IOB1:SLEW[0]IOB1:IBUF_MODE[1]IOB1:PDRIVE[2]IOB1:DCI_MODE[1]---~IOB2:NDRIVE[1]IOB2:SLEW[0]IOB2:IBUF_MODE[0]IOB2:PDRIVE[2]IOB2:DCI_MODE[2]IOB2:OUTPUT_ENABLE[0]
8 ~IOB0:PDRIVE[0]--IOB0:SLEW[4]IOB0:PULL[1]~IOB0:NDRIVE[2]IOB0:DCI_MODE[1]IOB0:IBUF_MODE[0]~IOB1:PDRIVE[0]IOB1:SLEW[4]IOB1:IBUF_MODE[2]~IOB1:PDRIVE[1]IOB1:VRIOB1:OUTPUT_ENABLE[1]--IOB2:SLEW[2]-IOB2:PULL[2]~IOB2:PDRIVE[1]-IOB2:OUTPUT_ENABLE[1]
9 IOB0:NDRIVE[0]--IOB1:OUTPUT_DIFF[3]IOB0:PULL[0]IOB0:NDRIVE[4]IOB1:OUTPUT_DIFF[0]-IOB1:OUTPUT_MISC[0]~IOB1:DCIUPDATEMODE_ASREQUIREDIOB1:PULL[1]IOB1:PDRIVE[3]IOB1:OUTPUT_DIFF[2]---IOB2:OUTPUT_MISC[0]IOB2:SLEW[4]IOB2:PULL[1]IOB2:PDRIVE[3]--
10 IOB0:OUTPUT_MISC[1]--IOB0:SLEW[0]IOB0:IBUF_MODE[2]~IOB0:PDRIVE[1]IOB0:DCI_MODE[0]IOB0:OUTPUT_ENABLE[1]IOB1:OUTPUT_MISC[1]IOB1:SLEW[1]IOB1:PULL[0]IOB1:NDRIVE[3]IOB1:DCI_MODE[0]IOB1:IBUF_MODE[0]--IOB2:NDRIVE[0]IOB2:SLEW[3]IOB2:PULL[0]IOB2:NDRIVE[3]IOB2:DCI_MODE[1]IOB2:DISABLE_GTS
11 IOB0:OUTPUT_MISC[0]--~IOB0:DCIUPDATEMODE_ASREQUIREDIOB0:DCI_MODE[3]IOB0:PDRIVE[3]-IOB0:DISABLE_GTSIOB1:NDRIVE[0]IOB1:OUTPUT_DIFF[1]IOB1:DCI_MODE[3]IOB1:NDRIVE[4]-IOB1:DISABLE_GTS--IOB2:OUTPUT_MISC[1]~IOB2:DCIUPDATEMODE_ASREQUIREDIOB2:DCI_MODE[3]IOB2:NDRIVE[4]IOB2:DCI_MODE[0]-
IOB0:PDRIVE[0, 5, 11][0, 5, 7][0, 5, 10][0, 0, 8]
IOB1:PDRIVE[0, 11, 9][0, 11, 7][0, 11, 8][0, 8, 8]
IOB2:PDRIVE[0, 19, 9][0, 19, 7][0, 19, 8][0, 16, 6]
Mixed inversion[3][2]~[1]~[0]
IOB0:NDRIVE[0, 5, 9][0, 5, 6][0, 5, 8][0, 0, 6][0, 0, 9]
IOB1:NDRIVE[0, 11, 11][0, 11, 10][0, 11, 6][0, 8, 6][0, 8, 11]
IOB2:NDRIVE[0, 19, 11][0, 19, 10][0, 19, 6][0, 16, 7][0, 16, 10]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:OUTPUT_ENABLE[0, 7, 10][0, 7, 6]
IOB0:OUTPUT_MISC[0, 0, 10][0, 0, 11]
IOB1:OUTPUT_ENABLE[0, 13, 8][0, 13, 6]
IOB1:OUTPUT_MISC[0, 8, 10][0, 8, 9]
IOB2:OUTPUT_ENABLE[0, 21, 8][0, 21, 7]
IOB2:OUTPUT_MISC[0, 16, 11][0, 16, 9]
Non-inverted[1][0]
IOB0:SLEW[0, 3, 8][0, 3, 6][0, 0, 7][0, 3, 7][0, 3, 10]
IOB1:SLEW[0, 9, 8][0, 9, 6][0, 8, 7][0, 9, 10][0, 9, 7]
IOB2:SLEW[0, 17, 9][0, 17, 10][0, 16, 8][0, 17, 6][0, 17, 7]
Non-inverted[4][3][2][1][0]
IOB0:DCIUPDATEMODE_ASREQUIRED[0, 3, 11]
IOB1:DCIUPDATEMODE_ASREQUIRED[0, 9, 9]
IOB2:DCIUPDATEMODE_ASREQUIRED[0, 17, 11]
Inverted~[0]
IOB0:PULL[0, 4, 7][0, 4, 8][0, 4, 9]
IOB1:PULL[0, 10, 6][0, 10, 9][0, 10, 10]
IOB2:PULL[0, 18, 8][0, 18, 9][0, 18, 10]
PULLDOWN000
NONE001
PULLUP011
KEEPER101
IOB0:DISABLE_GTS[0, 7, 11]
IOB0:VR[0, 6, 7]
IOB1:DISABLE_GTS[0, 13, 11]
IOB1:VR[0, 12, 8]
IOB2:DISABLE_GTS[0, 21, 10]
Non-inverted[0]
IOB1:OUTPUT_DIFF[0, 3, 9][0, 12, 9][0, 9, 11][0, 6, 9]
Non-inverted[3][2][1][0]
IOB0:DCI_MODE[0, 4, 11][0, 6, 6][0, 6, 8][0, 6, 10]
IOB1:DCI_MODE[0, 10, 11][0, 12, 6][0, 12, 7][0, 12, 10]
IOB2:DCI_MODE[0, 18, 11][0, 20, 7][0, 20, 10][0, 20, 11]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:IBUF_MODE[0, 4, 10][0, 4, 6][0, 7, 8]
IOB1:IBUF_MODE[0, 10, 8][0, 10, 7][0, 13, 10]
NONE000
VREF011
DIFF101
CMOS111
IOB2:IBUF_MODE[0, 18, 6][0, 21, 6][0, 18, 7]
NONE000
VREF011
CMOS111

IOBS.V2P.B.L1.ALT

IOBS.V2P.B.L1.ALT bittile 0
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB0:NDRIVE[1]--IOB0:SLEW[3]IOB0:IBUF_MODE[0]IOB0:NDRIVE[3]IOB0:DCI_MODE[2]IOB0:OUTPUT_ENABLE[0]~IOB1:NDRIVE[1]IOB1:SLEW[3]IOB1:PULL[2]~IOB1:NDRIVE[2]IOB1:DCI_MODE[2]IOB1:OUTPUT_ENABLE[0]--~IOB2:PDRIVE[0]IOB2:SLEW[1]IOB2:IBUF_MODE[2]~IOB2:NDRIVE[2]-IOB2:IBUF_MODE[0]
7 IOB0:SLEW[2]--IOB0:SLEW[1]IOB0:PULL[2]IOB0:PDRIVE[2]--IOB1:SLEW[2]IOB1:SLEW[0]IOB1:IBUF_MODE[1]IOB1:PDRIVE[2]IOB1:DCI_MODE[1]---~IOB2:NDRIVE[1]IOB2:SLEW[0]IOB2:IBUF_MODE[1]IOB2:PDRIVE[2]IOB2:DCI_MODE[2]IOB2:OUTPUT_ENABLE[0]
8 ~IOB0:PDRIVE[0]--IOB0:SLEW[4]IOB0:PULL[1]~IOB0:NDRIVE[2]IOB0:DCI_MODE[1]IOB0:IBUF_MODE[1]~IOB1:PDRIVE[0]IOB1:SLEW[4]IOB1:IBUF_MODE[2]~IOB1:PDRIVE[1]-IOB1:OUTPUT_ENABLE[1]--IOB2:SLEW[2]IOB2:OUTPUT_DIFF[1]IOB2:PULL[2]~IOB2:PDRIVE[1]-IOB2:OUTPUT_ENABLE[1]
9 IOB0:NDRIVE[0]---IOB0:PULL[0]IOB0:NDRIVE[4]--IOB1:OUTPUT_MISC[0]~IOB1:DCIUPDATEMODE_ASREQUIREDIOB1:PULL[1]IOB1:PDRIVE[3]IOB2:OUTPUT_DIFF[0]---IOB2:OUTPUT_MISC[0]IOB2:SLEW[4]IOB2:PULL[1]IOB2:PDRIVE[3]--
10 IOB0:OUTPUT_MISC[1]--IOB0:SLEW[0]IOB0:IBUF_MODE[2]~IOB0:PDRIVE[1]IOB0:DCI_MODE[0]IOB0:OUTPUT_ENABLE[1]IOB1:OUTPUT_MISC[1]IOB1:SLEW[1]IOB1:PULL[0]IOB1:NDRIVE[3]IOB1:DCI_MODE[0]IOB1:IBUF_MODE[0]--IOB2:NDRIVE[0]IOB2:SLEW[3]IOB2:PULL[0]IOB2:NDRIVE[3]IOB2:DCI_MODE[1]IOB2:DISABLE_GTS
11 IOB0:OUTPUT_MISC[0]--~IOB0:DCIUPDATEMODE_ASREQUIREDIOB0:DCI_MODE[3]IOB0:PDRIVE[3]-IOB0:DISABLE_GTSIOB1:NDRIVE[0]IOB2:OUTPUT_DIFF[3]IOB1:DCI_MODE[3]IOB1:NDRIVE[4]-IOB1:DISABLE_GTS--IOB2:OUTPUT_MISC[1]~IOB2:DCIUPDATEMODE_ASREQUIREDIOB2:DCI_MODE[3]IOB2:NDRIVE[4]IOB2:DCI_MODE[0]IOB2:OUTPUT_DIFF[2]
IOB0:PDRIVE[0, 5, 11][0, 5, 7][0, 5, 10][0, 0, 8]
IOB1:PDRIVE[0, 11, 9][0, 11, 7][0, 11, 8][0, 8, 8]
IOB2:PDRIVE[0, 19, 9][0, 19, 7][0, 19, 8][0, 16, 6]
Mixed inversion[3][2]~[1]~[0]
IOB0:NDRIVE[0, 5, 9][0, 5, 6][0, 5, 8][0, 0, 6][0, 0, 9]
IOB1:NDRIVE[0, 11, 11][0, 11, 10][0, 11, 6][0, 8, 6][0, 8, 11]
IOB2:NDRIVE[0, 19, 11][0, 19, 10][0, 19, 6][0, 16, 7][0, 16, 10]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:OUTPUT_ENABLE[0, 7, 10][0, 7, 6]
IOB0:OUTPUT_MISC[0, 0, 10][0, 0, 11]
IOB1:OUTPUT_ENABLE[0, 13, 8][0, 13, 6]
IOB1:OUTPUT_MISC[0, 8, 10][0, 8, 9]
IOB2:OUTPUT_ENABLE[0, 21, 8][0, 21, 7]
IOB2:OUTPUT_MISC[0, 16, 11][0, 16, 9]
Non-inverted[1][0]
IOB0:SLEW[0, 3, 8][0, 3, 6][0, 0, 7][0, 3, 7][0, 3, 10]
IOB1:SLEW[0, 9, 8][0, 9, 6][0, 8, 7][0, 9, 10][0, 9, 7]
IOB2:SLEW[0, 17, 9][0, 17, 10][0, 16, 8][0, 17, 6][0, 17, 7]
Non-inverted[4][3][2][1][0]
IOB0:DCIUPDATEMODE_ASREQUIRED[0, 3, 11]
IOB1:DCIUPDATEMODE_ASREQUIRED[0, 9, 9]
IOB2:DCIUPDATEMODE_ASREQUIRED[0, 17, 11]
Inverted~[0]
IOB0:IBUF_MODE[0, 4, 10][0, 7, 8][0, 4, 6]
NONE000
VREF011
CMOS111
IOB0:PULL[0, 4, 7][0, 4, 8][0, 4, 9]
IOB1:PULL[0, 10, 6][0, 10, 9][0, 10, 10]
IOB2:PULL[0, 18, 8][0, 18, 9][0, 18, 10]
PULLDOWN000
NONE001
PULLUP011
KEEPER101
IOB0:DCI_MODE[0, 4, 11][0, 6, 6][0, 6, 8][0, 6, 10]
IOB1:DCI_MODE[0, 10, 11][0, 12, 6][0, 12, 7][0, 12, 10]
IOB2:DCI_MODE[0, 18, 11][0, 20, 7][0, 20, 10][0, 20, 11]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:DISABLE_GTS[0, 7, 11]
IOB1:DISABLE_GTS[0, 13, 11]
IOB2:DISABLE_GTS[0, 21, 10]
Non-inverted[0]
IOB2:OUTPUT_DIFF[0, 9, 11][0, 21, 11][0, 17, 8][0, 12, 9]
Non-inverted[3][2][1][0]
IOB1:IBUF_MODE[0, 10, 8][0, 10, 7][0, 13, 10]
IOB2:IBUF_MODE[0, 18, 6][0, 18, 7][0, 21, 6]
NONE000
VREF011
DIFF101
CMOS111

IOBS.V2P.B.R1

IOBS.V2P.B.R1 bittile 0
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB0:NDRIVE[1]--IOB0:SLEW[3]IOB0:IBUF_MODE[0]IOB0:NDRIVE[3]IOB0:DCI_MODE[2]IOB0:OUTPUT_ENABLE[0]~IOB1:NDRIVE[1]IOB1:SLEW[3]IOB1:PULL[2]~IOB1:NDRIVE[2]IOB1:DCI_MODE[2]IOB1:OUTPUT_ENABLE[0]--~IOB2:PDRIVE[0]IOB2:SLEW[1]IOB2:IBUF_MODE[2]~IOB2:NDRIVE[2]-IOB2:IBUF_MODE[0]
7 IOB0:SLEW[2]--IOB0:SLEW[1]IOB0:PULL[2]IOB0:PDRIVE[2]--IOB1:SLEW[2]IOB1:SLEW[0]IOB1:IBUF_MODE[1]IOB1:PDRIVE[2]IOB1:DCI_MODE[1]---~IOB2:NDRIVE[1]IOB2:SLEW[0]IOB2:IBUF_MODE[1]IOB2:PDRIVE[2]IOB2:DCI_MODE[2]IOB2:OUTPUT_ENABLE[0]
8 ~IOB0:PDRIVE[0]--IOB0:SLEW[4]IOB0:PULL[1]~IOB0:NDRIVE[2]IOB0:DCI_MODE[1]IOB0:IBUF_MODE[1]~IOB1:PDRIVE[0]IOB1:SLEW[4]IOB1:IBUF_MODE[2]~IOB1:PDRIVE[1]IOB1:VRIOB1:OUTPUT_ENABLE[1]--IOB2:SLEW[2]IOB2:OUTPUT_DIFF[1]IOB2:PULL[2]~IOB2:PDRIVE[1]IOB2:VRIOB2:OUTPUT_ENABLE[1]
9 IOB0:NDRIVE[0]---IOB0:PULL[0]IOB0:NDRIVE[4]--IOB1:OUTPUT_MISC[0]~IOB1:DCIUPDATEMODE_ASREQUIREDIOB1:PULL[1]IOB1:PDRIVE[3]IOB2:OUTPUT_DIFF[0]---IOB2:OUTPUT_MISC[0]IOB2:SLEW[4]IOB2:PULL[1]IOB2:PDRIVE[3]--
10 IOB0:OUTPUT_MISC[1]--IOB0:SLEW[0]IOB0:IBUF_MODE[2]~IOB0:PDRIVE[1]IOB0:DCI_MODE[0]IOB0:OUTPUT_ENABLE[1]IOB1:OUTPUT_MISC[1]IOB1:SLEW[1]IOB1:PULL[0]IOB1:NDRIVE[3]IOB1:DCI_MODE[0]IOB1:IBUF_MODE[0]--IOB2:NDRIVE[0]IOB2:SLEW[3]IOB2:PULL[0]IOB2:NDRIVE[3]IOB2:DCI_MODE[1]IOB2:DISABLE_GTS
11 IOB0:OUTPUT_MISC[0]--~IOB0:DCIUPDATEMODE_ASREQUIREDIOB0:DCI_MODE[3]IOB0:PDRIVE[3]-IOB0:DISABLE_GTSIOB1:NDRIVE[0]IOB2:OUTPUT_DIFF[3]IOB1:DCI_MODE[3]IOB1:NDRIVE[4]-IOB1:DISABLE_GTS--IOB2:OUTPUT_MISC[1]~IOB2:DCIUPDATEMODE_ASREQUIREDIOB2:DCI_MODE[3]IOB2:NDRIVE[4]IOB2:DCI_MODE[0]IOB2:OUTPUT_DIFF[2]
IOB0:PDRIVE[0, 5, 11][0, 5, 7][0, 5, 10][0, 0, 8]
IOB1:PDRIVE[0, 11, 9][0, 11, 7][0, 11, 8][0, 8, 8]
IOB2:PDRIVE[0, 19, 9][0, 19, 7][0, 19, 8][0, 16, 6]
Mixed inversion[3][2]~[1]~[0]
IOB0:NDRIVE[0, 5, 9][0, 5, 6][0, 5, 8][0, 0, 6][0, 0, 9]
IOB1:NDRIVE[0, 11, 11][0, 11, 10][0, 11, 6][0, 8, 6][0, 8, 11]
IOB2:NDRIVE[0, 19, 11][0, 19, 10][0, 19, 6][0, 16, 7][0, 16, 10]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:OUTPUT_ENABLE[0, 7, 10][0, 7, 6]
IOB0:OUTPUT_MISC[0, 0, 10][0, 0, 11]
IOB1:OUTPUT_ENABLE[0, 13, 8][0, 13, 6]
IOB1:OUTPUT_MISC[0, 8, 10][0, 8, 9]
IOB2:OUTPUT_ENABLE[0, 21, 8][0, 21, 7]
IOB2:OUTPUT_MISC[0, 16, 11][0, 16, 9]
Non-inverted[1][0]
IOB0:SLEW[0, 3, 8][0, 3, 6][0, 0, 7][0, 3, 7][0, 3, 10]
IOB1:SLEW[0, 9, 8][0, 9, 6][0, 8, 7][0, 9, 10][0, 9, 7]
IOB2:SLEW[0, 17, 9][0, 17, 10][0, 16, 8][0, 17, 6][0, 17, 7]
Non-inverted[4][3][2][1][0]
IOB0:DCIUPDATEMODE_ASREQUIRED[0, 3, 11]
IOB1:DCIUPDATEMODE_ASREQUIRED[0, 9, 9]
IOB2:DCIUPDATEMODE_ASREQUIRED[0, 17, 11]
Inverted~[0]
IOB0:IBUF_MODE[0, 4, 10][0, 7, 8][0, 4, 6]
NONE000
VREF011
CMOS111
IOB0:PULL[0, 4, 7][0, 4, 8][0, 4, 9]
IOB1:PULL[0, 10, 6][0, 10, 9][0, 10, 10]
IOB2:PULL[0, 18, 8][0, 18, 9][0, 18, 10]
PULLDOWN000
NONE001
PULLUP011
KEEPER101
IOB0:DCI_MODE[0, 4, 11][0, 6, 6][0, 6, 8][0, 6, 10]
IOB1:DCI_MODE[0, 10, 11][0, 12, 6][0, 12, 7][0, 12, 10]
IOB2:DCI_MODE[0, 18, 11][0, 20, 7][0, 20, 10][0, 20, 11]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:DISABLE_GTS[0, 7, 11]
IOB1:DISABLE_GTS[0, 13, 11]
IOB1:VR[0, 12, 8]
IOB2:DISABLE_GTS[0, 21, 10]
IOB2:VR[0, 20, 8]
Non-inverted[0]
IOB2:OUTPUT_DIFF[0, 9, 11][0, 21, 11][0, 17, 8][0, 12, 9]
Non-inverted[3][2][1][0]
IOB1:IBUF_MODE[0, 10, 8][0, 10, 7][0, 13, 10]
IOB2:IBUF_MODE[0, 18, 6][0, 18, 7][0, 21, 6]
NONE000
VREF011
DIFF101
CMOS111

IOBS.V2P.B.R1.ALT

IOBS.V2P.B.R1.ALT bittile 0
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB0:NDRIVE[1]--IOB0:SLEW[3]IOB0:IBUF_MODE[1]IOB0:NDRIVE[3]IOB0:DCI_MODE[2]IOB0:OUTPUT_ENABLE[0]~IOB1:NDRIVE[1]IOB1:SLEW[3]IOB1:PULL[2]~IOB1:NDRIVE[2]IOB1:DCI_MODE[2]IOB1:OUTPUT_ENABLE[0]--~IOB2:PDRIVE[0]IOB2:SLEW[1]IOB2:IBUF_MODE[2]~IOB2:NDRIVE[2]-IOB2:IBUF_MODE[1]
7 IOB0:SLEW[2]--IOB0:SLEW[1]IOB0:PULL[2]IOB0:PDRIVE[2]--IOB1:SLEW[2]IOB1:SLEW[0]IOB1:IBUF_MODE[1]IOB1:PDRIVE[2]IOB1:DCI_MODE[1]---~IOB2:NDRIVE[1]IOB2:SLEW[0]IOB2:IBUF_MODE[0]IOB2:PDRIVE[2]IOB2:DCI_MODE[2]IOB2:OUTPUT_ENABLE[0]
8 ~IOB0:PDRIVE[0]--IOB0:SLEW[4]IOB0:PULL[1]~IOB0:NDRIVE[2]IOB0:DCI_MODE[1]IOB0:IBUF_MODE[0]~IOB1:PDRIVE[0]IOB1:SLEW[4]IOB1:IBUF_MODE[2]~IOB1:PDRIVE[1]-IOB1:OUTPUT_ENABLE[1]--IOB2:SLEW[2]-IOB2:PULL[2]~IOB2:PDRIVE[1]-IOB2:OUTPUT_ENABLE[1]
9 IOB0:NDRIVE[0]--IOB1:OUTPUT_DIFF[3]IOB0:PULL[0]IOB0:NDRIVE[4]IOB1:OUTPUT_DIFF[0]-IOB1:OUTPUT_MISC[0]~IOB1:DCIUPDATEMODE_ASREQUIREDIOB1:PULL[1]IOB1:PDRIVE[3]IOB1:OUTPUT_DIFF[2]---IOB2:OUTPUT_MISC[0]IOB2:SLEW[4]IOB2:PULL[1]IOB2:PDRIVE[3]--
10 IOB0:OUTPUT_MISC[1]--IOB0:SLEW[0]IOB0:IBUF_MODE[2]~IOB0:PDRIVE[1]IOB0:DCI_MODE[0]IOB0:OUTPUT_ENABLE[1]IOB1:OUTPUT_MISC[1]IOB1:SLEW[1]IOB1:PULL[0]IOB1:NDRIVE[3]IOB1:DCI_MODE[0]IOB1:IBUF_MODE[0]--IOB2:NDRIVE[0]IOB2:SLEW[3]IOB2:PULL[0]IOB2:NDRIVE[3]IOB2:DCI_MODE[1]IOB2:DISABLE_GTS
11 IOB0:OUTPUT_MISC[0]--~IOB0:DCIUPDATEMODE_ASREQUIREDIOB0:DCI_MODE[3]IOB0:PDRIVE[3]-IOB0:DISABLE_GTSIOB1:NDRIVE[0]IOB1:OUTPUT_DIFF[1]IOB1:DCI_MODE[3]IOB1:NDRIVE[4]-IOB1:DISABLE_GTS--IOB2:OUTPUT_MISC[1]~IOB2:DCIUPDATEMODE_ASREQUIREDIOB2:DCI_MODE[3]IOB2:NDRIVE[4]IOB2:DCI_MODE[0]-
IOB0:PDRIVE[0, 5, 11][0, 5, 7][0, 5, 10][0, 0, 8]
IOB1:PDRIVE[0, 11, 9][0, 11, 7][0, 11, 8][0, 8, 8]
IOB2:PDRIVE[0, 19, 9][0, 19, 7][0, 19, 8][0, 16, 6]
Mixed inversion[3][2]~[1]~[0]
IOB0:NDRIVE[0, 5, 9][0, 5, 6][0, 5, 8][0, 0, 6][0, 0, 9]
IOB1:NDRIVE[0, 11, 11][0, 11, 10][0, 11, 6][0, 8, 6][0, 8, 11]
IOB2:NDRIVE[0, 19, 11][0, 19, 10][0, 19, 6][0, 16, 7][0, 16, 10]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:OUTPUT_ENABLE[0, 7, 10][0, 7, 6]
IOB0:OUTPUT_MISC[0, 0, 10][0, 0, 11]
IOB1:OUTPUT_ENABLE[0, 13, 8][0, 13, 6]
IOB1:OUTPUT_MISC[0, 8, 10][0, 8, 9]
IOB2:OUTPUT_ENABLE[0, 21, 8][0, 21, 7]
IOB2:OUTPUT_MISC[0, 16, 11][0, 16, 9]
Non-inverted[1][0]
IOB0:SLEW[0, 3, 8][0, 3, 6][0, 0, 7][0, 3, 7][0, 3, 10]
IOB1:SLEW[0, 9, 8][0, 9, 6][0, 8, 7][0, 9, 10][0, 9, 7]
IOB2:SLEW[0, 17, 9][0, 17, 10][0, 16, 8][0, 17, 6][0, 17, 7]
Non-inverted[4][3][2][1][0]
IOB0:DCIUPDATEMODE_ASREQUIRED[0, 3, 11]
IOB1:DCIUPDATEMODE_ASREQUIRED[0, 9, 9]
IOB2:DCIUPDATEMODE_ASREQUIRED[0, 17, 11]
Inverted~[0]
IOB0:PULL[0, 4, 7][0, 4, 8][0, 4, 9]
IOB1:PULL[0, 10, 6][0, 10, 9][0, 10, 10]
IOB2:PULL[0, 18, 8][0, 18, 9][0, 18, 10]
PULLDOWN000
NONE001
PULLUP011
KEEPER101
IOB1:OUTPUT_DIFF[0, 3, 9][0, 12, 9][0, 9, 11][0, 6, 9]
Non-inverted[3][2][1][0]
IOB0:DCI_MODE[0, 4, 11][0, 6, 6][0, 6, 8][0, 6, 10]
IOB1:DCI_MODE[0, 10, 11][0, 12, 6][0, 12, 7][0, 12, 10]
IOB2:DCI_MODE[0, 18, 11][0, 20, 7][0, 20, 10][0, 20, 11]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:IBUF_MODE[0, 4, 10][0, 4, 6][0, 7, 8]
IOB1:IBUF_MODE[0, 10, 8][0, 10, 7][0, 13, 10]
NONE000
VREF011
DIFF101
CMOS111
IOB0:DISABLE_GTS[0, 7, 11]
IOB1:DISABLE_GTS[0, 13, 11]
IOB2:DISABLE_GTS[0, 21, 10]
Non-inverted[0]
IOB2:IBUF_MODE[0, 18, 6][0, 21, 6][0, 18, 7]
NONE000
VREF011
CMOS111

IOBS.V2P.B.L2

IOBS.V2P.B.L2 bittile 0
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB3:NDRIVE[1]--IOB3:SLEW[3]IOB3:IBUF_MODE[1]IOB3:NDRIVE[3]IOB3:DCI_MODE[2]IOB3:OUTPUT_ENABLE[0]~IOB4:NDRIVE[1]IOB4:SLEW[3]IOB4:PULL[2]~IOB4:NDRIVE[2]IOB4:DCI_MODE[2]IOB4:OUTPUT_ENABLE[0]--~IOB5:PDRIVE[0]IOB5:SLEW[1]IOB5:IBUF_MODE[2]~IOB5:NDRIVE[2]IOB5:BREFCLK_ENABLEIOB5:IBUF_MODE[0]
7 IOB3:SLEW[2]--IOB3:SLEW[1]IOB3:PULL[2]IOB3:PDRIVE[2]--IOB4:SLEW[2]IOB4:SLEW[0]IOB4:IBUF_MODE[1]IOB4:PDRIVE[2]IOB4:DCI_MODE[1]IOB4:VREF--~IOB5:NDRIVE[1]IOB5:SLEW[0]IOB5:IBUF_MODE[1]IOB5:PDRIVE[2]IOB5:DCI_MODE[2]IOB5:OUTPUT_ENABLE[0]
8 ~IOB3:PDRIVE[0]--IOB3:SLEW[4]IOB3:PULL[1]~IOB3:NDRIVE[2]IOB3:DCI_MODE[1]IOB3:IBUF_MODE[0]~IOB4:PDRIVE[0]IOB4:SLEW[4]IOB4:IBUF_MODE[2]~IOB4:PDRIVE[1]-IOB4:OUTPUT_ENABLE[1]--IOB5:SLEW[2]IOB5:OUTPUT_DIFF[1]IOB5:PULL[2]~IOB5:PDRIVE[1]-IOB5:OUTPUT_ENABLE[1]
9 IOB3:NDRIVE[0]--IOB3:OUTPUT_DIFF[1]IOB3:PULL[0]IOB3:NDRIVE[4]IOB3:OUTPUT_DIFF[2]-IOB4:OUTPUT_MISC[0]~IOB4:DCIUPDATEMODE_ASREQUIREDIOB4:PULL[1]IOB4:PDRIVE[3]IOB5:OUTPUT_DIFF[0]---IOB5:OUTPUT_MISC[0]IOB5:SLEW[4]IOB5:PULL[1]IOB5:PDRIVE[3]--
10 IOB3:OUTPUT_MISC[1]--IOB3:SLEW[0]IOB3:IBUF_MODE[2]~IOB3:PDRIVE[1]IOB3:DCI_MODE[0]IOB3:OUTPUT_ENABLE[1]IOB4:OUTPUT_MISC[1]IOB4:SLEW[1]IOB4:PULL[0]IOB4:NDRIVE[3]IOB4:DCI_MODE[0]IOB4:IBUF_MODE[0]--IOB5:NDRIVE[0]IOB5:SLEW[3]IOB5:PULL[0]IOB5:NDRIVE[3]IOB5:DCI_MODE[1]IOB5:DISABLE_GTS
11 IOB3:OUTPUT_MISC[0]--~IOB3:DCIUPDATEMODE_ASREQUIREDIOB3:DCI_MODE[3]IOB3:PDRIVE[3]-IOB3:DISABLE_GTSIOB4:NDRIVE[0]IOB5:OUTPUT_DIFF[3]IOB4:DCI_MODE[3]IOB4:NDRIVE[4]-IOB4:DISABLE_GTS--IOB5:OUTPUT_MISC[1]~IOB5:DCIUPDATEMODE_ASREQUIREDIOB5:DCI_MODE[3]IOB5:NDRIVE[4]IOB5:DCI_MODE[0]IOB5:OUTPUT_DIFF[2]
IOBS.V2P.B.L2 bittile 1
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB0:NDRIVE[1]--IOB0:SLEW[3]IOB0:IBUF_MODE[1]IOB0:NDRIVE[3]IOB0:DCI_MODE[2]IOB0:OUTPUT_ENABLE[0]~IOB1:NDRIVE[1]IOB1:SLEW[3]IOB1:PULL[2]~IOB1:NDRIVE[2]IOB1:DCI_MODE[2]IOB1:OUTPUT_ENABLE[0]--~IOB2:PDRIVE[0]IOB2:SLEW[1]IOB2:IBUF_MODE[2]~IOB2:NDRIVE[2]-IOB2:IBUF_MODE[0]
7 IOB0:SLEW[2]--IOB0:SLEW[1]IOB0:PULL[2]IOB0:PDRIVE[2]-IOB0:VREFIOB1:SLEW[2]IOB1:SLEW[0]IOB1:IBUF_MODE[1]IOB1:PDRIVE[2]IOB1:DCI_MODE[1]---~IOB2:NDRIVE[1]IOB2:SLEW[0]IOB2:IBUF_MODE[1]IOB2:PDRIVE[2]IOB2:DCI_MODE[2]IOB2:OUTPUT_ENABLE[0]
8 ~IOB0:PDRIVE[0]--IOB0:SLEW[4]IOB0:PULL[1]~IOB0:NDRIVE[2]IOB0:DCI_MODE[1]IOB0:IBUF_MODE[0]~IOB1:PDRIVE[0]IOB1:SLEW[4]IOB1:IBUF_MODE[2]~IOB1:PDRIVE[1]-IOB1:OUTPUT_ENABLE[1]--IOB2:SLEW[2]IOB3:OUTPUT_DIFF[3]IOB2:PULL[2]~IOB2:PDRIVE[1]-IOB2:OUTPUT_ENABLE[1]
9 IOB0:NDRIVE[0]--IOB1:OUTPUT_DIFF[3]IOB0:PULL[0]IOB0:NDRIVE[4]IOB1:OUTPUT_DIFF[0]-IOB1:OUTPUT_MISC[0]~IOB1:DCIUPDATEMODE_ASREQUIREDIOB1:PULL[1]IOB1:PDRIVE[3]IOB1:OUTPUT_DIFF[2]---IOB2:OUTPUT_MISC[0]IOB2:SLEW[4]IOB2:PULL[1]IOB2:PDRIVE[3]--
10 IOB0:OUTPUT_MISC[1]--IOB0:SLEW[0]IOB0:IBUF_MODE[2]~IOB0:PDRIVE[1]IOB0:DCI_MODE[0]IOB0:OUTPUT_ENABLE[1]IOB1:OUTPUT_MISC[1]IOB1:SLEW[1]IOB1:PULL[0]IOB1:NDRIVE[3]IOB1:DCI_MODE[0]IOB1:IBUF_MODE[0]--IOB2:NDRIVE[0]IOB2:SLEW[3]IOB2:PULL[0]IOB2:NDRIVE[3]IOB2:DCI_MODE[1]IOB2:DISABLE_GTS
11 IOB0:OUTPUT_MISC[0]--~IOB0:DCIUPDATEMODE_ASREQUIREDIOB0:DCI_MODE[3]IOB0:PDRIVE[3]-IOB0:DISABLE_GTSIOB1:NDRIVE[0]IOB1:OUTPUT_DIFF[1]IOB1:DCI_MODE[3]IOB1:NDRIVE[4]-IOB1:DISABLE_GTS--IOB2:OUTPUT_MISC[1]~IOB2:DCIUPDATEMODE_ASREQUIREDIOB2:DCI_MODE[3]IOB2:NDRIVE[4]IOB2:DCI_MODE[0]IOB3:OUTPUT_DIFF[0]
IOB0:PDRIVE[1, 5, 11][1, 5, 7][1, 5, 10][1, 0, 8]
IOB1:PDRIVE[1, 11, 9][1, 11, 7][1, 11, 8][1, 8, 8]
IOB2:PDRIVE[1, 19, 9][1, 19, 7][1, 19, 8][1, 16, 6]
IOB3:PDRIVE[0, 5, 11][0, 5, 7][0, 5, 10][0, 0, 8]
IOB4:PDRIVE[0, 11, 9][0, 11, 7][0, 11, 8][0, 8, 8]
IOB5:PDRIVE[0, 19, 9][0, 19, 7][0, 19, 8][0, 16, 6]
Mixed inversion[3][2]~[1]~[0]
IOB0:NDRIVE[1, 5, 9][1, 5, 6][1, 5, 8][1, 0, 6][1, 0, 9]
IOB1:NDRIVE[1, 11, 11][1, 11, 10][1, 11, 6][1, 8, 6][1, 8, 11]
IOB2:NDRIVE[1, 19, 11][1, 19, 10][1, 19, 6][1, 16, 7][1, 16, 10]
IOB3:NDRIVE[0, 5, 9][0, 5, 6][0, 5, 8][0, 0, 6][0, 0, 9]
IOB4:NDRIVE[0, 11, 11][0, 11, 10][0, 11, 6][0, 8, 6][0, 8, 11]
IOB5:NDRIVE[0, 19, 11][0, 19, 10][0, 19, 6][0, 16, 7][0, 16, 10]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:OUTPUT_ENABLE[1, 7, 10][1, 7, 6]
IOB0:OUTPUT_MISC[1, 0, 10][1, 0, 11]
IOB1:OUTPUT_ENABLE[1, 13, 8][1, 13, 6]
IOB1:OUTPUT_MISC[1, 8, 10][1, 8, 9]
IOB2:OUTPUT_ENABLE[1, 21, 8][1, 21, 7]
IOB2:OUTPUT_MISC[1, 16, 11][1, 16, 9]
IOB3:OUTPUT_ENABLE[0, 7, 10][0, 7, 6]
IOB3:OUTPUT_MISC[0, 0, 10][0, 0, 11]
IOB4:OUTPUT_ENABLE[0, 13, 8][0, 13, 6]
IOB4:OUTPUT_MISC[0, 8, 10][0, 8, 9]
IOB5:OUTPUT_ENABLE[0, 21, 8][0, 21, 7]
IOB5:OUTPUT_MISC[0, 16, 11][0, 16, 9]
Non-inverted[1][0]
IOB0:SLEW[1, 3, 8][1, 3, 6][1, 0, 7][1, 3, 7][1, 3, 10]
IOB1:SLEW[1, 9, 8][1, 9, 6][1, 8, 7][1, 9, 10][1, 9, 7]
IOB2:SLEW[1, 17, 9][1, 17, 10][1, 16, 8][1, 17, 6][1, 17, 7]
IOB3:SLEW[0, 3, 8][0, 3, 6][0, 0, 7][0, 3, 7][0, 3, 10]
IOB4:SLEW[0, 9, 8][0, 9, 6][0, 8, 7][0, 9, 10][0, 9, 7]
IOB5:SLEW[0, 17, 9][0, 17, 10][0, 16, 8][0, 17, 6][0, 17, 7]
Non-inverted[4][3][2][1][0]
IOB0:DCIUPDATEMODE_ASREQUIRED[1, 3, 11]
IOB1:DCIUPDATEMODE_ASREQUIRED[1, 9, 9]
IOB2:DCIUPDATEMODE_ASREQUIRED[1, 17, 11]
IOB3:DCIUPDATEMODE_ASREQUIRED[0, 3, 11]
IOB4:DCIUPDATEMODE_ASREQUIRED[0, 9, 9]
IOB5:DCIUPDATEMODE_ASREQUIRED[0, 17, 11]
Inverted~[0]
IOB0:PULL[1, 4, 7][1, 4, 8][1, 4, 9]
IOB1:PULL[1, 10, 6][1, 10, 9][1, 10, 10]
IOB2:PULL[1, 18, 8][1, 18, 9][1, 18, 10]
IOB3:PULL[0, 4, 7][0, 4, 8][0, 4, 9]
IOB4:PULL[0, 10, 6][0, 10, 9][0, 10, 10]
IOB5:PULL[0, 18, 8][0, 18, 9][0, 18, 10]
PULLDOWN000
NONE001
PULLUP011
KEEPER101
IOB0:DCI_MODE[1, 4, 11][1, 6, 6][1, 6, 8][1, 6, 10]
IOB1:DCI_MODE[1, 10, 11][1, 12, 6][1, 12, 7][1, 12, 10]
IOB2:DCI_MODE[1, 18, 11][1, 20, 7][1, 20, 10][1, 20, 11]
IOB3:DCI_MODE[0, 4, 11][0, 6, 6][0, 6, 8][0, 6, 10]
IOB4:DCI_MODE[0, 10, 11][0, 12, 6][0, 12, 7][0, 12, 10]
IOB5:DCI_MODE[0, 18, 11][0, 20, 7][0, 20, 10][0, 20, 11]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:IBUF_MODE[1, 4, 10][1, 4, 6][1, 7, 8]
IOB1:IBUF_MODE[1, 10, 8][1, 10, 7][1, 13, 10]
IOB2:IBUF_MODE[1, 18, 6][1, 18, 7][1, 21, 6]
IOB3:IBUF_MODE[0, 4, 10][0, 4, 6][0, 7, 8]
IOB4:IBUF_MODE[0, 10, 8][0, 10, 7][0, 13, 10]
IOB5:IBUF_MODE[0, 18, 6][0, 18, 7][0, 21, 6]
NONE000
VREF011
DIFF101
CMOS111
IOB0:DISABLE_GTS[1, 7, 11]
IOB0:VREF[1, 7, 7]
IOB1:DISABLE_GTS[1, 13, 11]
IOB2:DISABLE_GTS[1, 21, 10]
IOB3:DISABLE_GTS[0, 7, 11]
IOB4:DISABLE_GTS[0, 13, 11]
IOB4:VREF[0, 13, 7]
IOB5:BREFCLK_ENABLE[0, 20, 6]
IOB5:DISABLE_GTS[0, 21, 10]
Non-inverted[0]
IOB1:OUTPUT_DIFF[1, 3, 9][1, 12, 9][1, 9, 11][1, 6, 9]
IOB3:OUTPUT_DIFF[1, 17, 8][0, 6, 9][0, 3, 9][1, 21, 11]
IOB5:OUTPUT_DIFF[0, 9, 11][0, 21, 11][0, 17, 8][0, 12, 9]
Non-inverted[3][2][1][0]

IOBS.V2P.B.R2

IOBS.V2P.B.R2 bittile 0
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB3:NDRIVE[1]--IOB3:SLEW[3]IOB3:IBUF_MODE[1]IOB3:NDRIVE[3]IOB3:DCI_MODE[2]IOB3:OUTPUT_ENABLE[0]~IOB4:NDRIVE[1]IOB4:SLEW[3]IOB4:PULL[2]~IOB4:NDRIVE[2]IOB4:DCI_MODE[2]IOB4:OUTPUT_ENABLE[0]--~IOB5:PDRIVE[0]IOB5:SLEW[1]IOB5:IBUF_MODE[2]~IOB5:NDRIVE[2]-IOB5:IBUF_MODE[0]
7 IOB3:SLEW[2]--IOB3:SLEW[1]IOB3:PULL[2]IOB3:PDRIVE[2]--IOB4:SLEW[2]IOB4:SLEW[0]IOB4:IBUF_MODE[1]IOB4:PDRIVE[2]IOB4:DCI_MODE[1]---~IOB5:NDRIVE[1]IOB5:SLEW[0]IOB5:IBUF_MODE[1]IOB5:PDRIVE[2]IOB5:DCI_MODE[2]IOB5:OUTPUT_ENABLE[0]
8 ~IOB3:PDRIVE[0]--IOB3:SLEW[4]IOB3:PULL[1]~IOB3:NDRIVE[2]IOB3:DCI_MODE[1]IOB3:IBUF_MODE[0]~IOB4:PDRIVE[0]IOB4:SLEW[4]IOB4:IBUF_MODE[2]~IOB4:PDRIVE[1]-IOB4:OUTPUT_ENABLE[1]--IOB5:SLEW[2]IOB5:OUTPUT_DIFF[1]IOB5:PULL[2]~IOB5:PDRIVE[1]-IOB5:OUTPUT_ENABLE[1]
9 IOB3:NDRIVE[0]--IOB3:OUTPUT_DIFF[1]IOB3:PULL[0]IOB3:NDRIVE[4]IOB3:OUTPUT_DIFF[2]-IOB4:OUTPUT_MISC[0]~IOB4:DCIUPDATEMODE_ASREQUIREDIOB4:PULL[1]IOB4:PDRIVE[3]IOB5:OUTPUT_DIFF[0]---IOB5:OUTPUT_MISC[0]IOB5:SLEW[4]IOB5:PULL[1]IOB5:PDRIVE[3]-IOB5:VREF
10 IOB3:OUTPUT_MISC[1]--IOB3:SLEW[0]IOB3:IBUF_MODE[2]~IOB3:PDRIVE[1]IOB3:DCI_MODE[0]IOB3:OUTPUT_ENABLE[1]IOB4:OUTPUT_MISC[1]IOB4:SLEW[1]IOB4:PULL[0]IOB4:NDRIVE[3]IOB4:DCI_MODE[0]IOB4:IBUF_MODE[0]--IOB5:NDRIVE[0]IOB5:SLEW[3]IOB5:PULL[0]IOB5:NDRIVE[3]IOB5:DCI_MODE[1]IOB5:DISABLE_GTS
11 IOB3:OUTPUT_MISC[0]--~IOB3:DCIUPDATEMODE_ASREQUIREDIOB3:DCI_MODE[3]IOB3:PDRIVE[3]-IOB3:DISABLE_GTSIOB4:NDRIVE[0]IOB5:OUTPUT_DIFF[3]IOB4:DCI_MODE[3]IOB4:NDRIVE[4]-IOB4:DISABLE_GTS--IOB5:OUTPUT_MISC[1]~IOB5:DCIUPDATEMODE_ASREQUIREDIOB5:DCI_MODE[3]IOB5:NDRIVE[4]IOB5:DCI_MODE[0]IOB5:OUTPUT_DIFF[2]
IOBS.V2P.B.R2 bittile 1
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB0:NDRIVE[1]--IOB0:SLEW[3]IOB0:IBUF_MODE[1]IOB0:NDRIVE[3]IOB0:DCI_MODE[2]IOB0:OUTPUT_ENABLE[0]~IOB1:NDRIVE[1]IOB1:SLEW[3]IOB1:PULL[2]~IOB1:NDRIVE[2]IOB1:DCI_MODE[2]IOB1:OUTPUT_ENABLE[0]--~IOB2:PDRIVE[0]IOB2:SLEW[1]IOB2:IBUF_MODE[2]~IOB2:NDRIVE[2]-IOB2:IBUF_MODE[0]
7 IOB0:SLEW[2]--IOB0:SLEW[1]IOB0:PULL[2]IOB0:PDRIVE[2]--IOB1:SLEW[2]IOB1:SLEW[0]IOB1:IBUF_MODE[1]IOB1:PDRIVE[2]IOB1:DCI_MODE[1]IOB1:VREF--~IOB2:NDRIVE[1]IOB2:SLEW[0]IOB2:IBUF_MODE[1]IOB2:PDRIVE[2]IOB2:DCI_MODE[2]IOB2:OUTPUT_ENABLE[0]
8 ~IOB0:PDRIVE[0]--IOB0:SLEW[4]IOB0:PULL[1]~IOB0:NDRIVE[2]IOB0:DCI_MODE[1]IOB0:IBUF_MODE[0]~IOB1:PDRIVE[0]IOB1:SLEW[4]IOB1:IBUF_MODE[2]~IOB1:PDRIVE[1]-IOB1:OUTPUT_ENABLE[1]--IOB2:SLEW[2]IOB3:OUTPUT_DIFF[3]IOB2:PULL[2]~IOB2:PDRIVE[1]-IOB2:OUTPUT_ENABLE[1]
9 IOB0:NDRIVE[0]--IOB1:OUTPUT_DIFF[3]IOB0:PULL[0]IOB0:NDRIVE[4]IOB1:OUTPUT_DIFF[0]-IOB1:OUTPUT_MISC[0]~IOB1:DCIUPDATEMODE_ASREQUIREDIOB1:PULL[1]IOB1:PDRIVE[3]IOB1:OUTPUT_DIFF[2]---IOB2:OUTPUT_MISC[0]IOB2:SLEW[4]IOB2:PULL[1]IOB2:PDRIVE[3]--
10 IOB0:OUTPUT_MISC[1]--IOB0:SLEW[0]IOB0:IBUF_MODE[2]~IOB0:PDRIVE[1]IOB0:DCI_MODE[0]IOB0:OUTPUT_ENABLE[1]IOB1:OUTPUT_MISC[1]IOB1:SLEW[1]IOB1:PULL[0]IOB1:NDRIVE[3]IOB1:DCI_MODE[0]IOB1:IBUF_MODE[0]--IOB2:NDRIVE[0]IOB2:SLEW[3]IOB2:PULL[0]IOB2:NDRIVE[3]IOB2:DCI_MODE[1]IOB2:DISABLE_GTS
11 IOB0:OUTPUT_MISC[0]--~IOB0:DCIUPDATEMODE_ASREQUIREDIOB0:DCI_MODE[3]IOB0:PDRIVE[3]-IOB0:DISABLE_GTSIOB1:NDRIVE[0]IOB1:OUTPUT_DIFF[1]IOB1:DCI_MODE[3]IOB1:NDRIVE[4]IOB1:BREFCLK_ENABLEIOB1:DISABLE_GTS--IOB2:OUTPUT_MISC[1]~IOB2:DCIUPDATEMODE_ASREQUIREDIOB2:DCI_MODE[3]IOB2:NDRIVE[4]IOB2:DCI_MODE[0]IOB3:OUTPUT_DIFF[0]
IOB0:PDRIVE[1, 5, 11][1, 5, 7][1, 5, 10][1, 0, 8]
IOB1:PDRIVE[1, 11, 9][1, 11, 7][1, 11, 8][1, 8, 8]
IOB2:PDRIVE[1, 19, 9][1, 19, 7][1, 19, 8][1, 16, 6]
IOB3:PDRIVE[0, 5, 11][0, 5, 7][0, 5, 10][0, 0, 8]
IOB4:PDRIVE[0, 11, 9][0, 11, 7][0, 11, 8][0, 8, 8]
IOB5:PDRIVE[0, 19, 9][0, 19, 7][0, 19, 8][0, 16, 6]
Mixed inversion[3][2]~[1]~[0]
IOB0:NDRIVE[1, 5, 9][1, 5, 6][1, 5, 8][1, 0, 6][1, 0, 9]
IOB1:NDRIVE[1, 11, 11][1, 11, 10][1, 11, 6][1, 8, 6][1, 8, 11]
IOB2:NDRIVE[1, 19, 11][1, 19, 10][1, 19, 6][1, 16, 7][1, 16, 10]
IOB3:NDRIVE[0, 5, 9][0, 5, 6][0, 5, 8][0, 0, 6][0, 0, 9]
IOB4:NDRIVE[0, 11, 11][0, 11, 10][0, 11, 6][0, 8, 6][0, 8, 11]
IOB5:NDRIVE[0, 19, 11][0, 19, 10][0, 19, 6][0, 16, 7][0, 16, 10]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:OUTPUT_ENABLE[1, 7, 10][1, 7, 6]
IOB0:OUTPUT_MISC[1, 0, 10][1, 0, 11]
IOB1:OUTPUT_ENABLE[1, 13, 8][1, 13, 6]
IOB1:OUTPUT_MISC[1, 8, 10][1, 8, 9]
IOB2:OUTPUT_ENABLE[1, 21, 8][1, 21, 7]
IOB2:OUTPUT_MISC[1, 16, 11][1, 16, 9]
IOB3:OUTPUT_ENABLE[0, 7, 10][0, 7, 6]
IOB3:OUTPUT_MISC[0, 0, 10][0, 0, 11]
IOB4:OUTPUT_ENABLE[0, 13, 8][0, 13, 6]
IOB4:OUTPUT_MISC[0, 8, 10][0, 8, 9]
IOB5:OUTPUT_ENABLE[0, 21, 8][0, 21, 7]
IOB5:OUTPUT_MISC[0, 16, 11][0, 16, 9]
Non-inverted[1][0]
IOB0:SLEW[1, 3, 8][1, 3, 6][1, 0, 7][1, 3, 7][1, 3, 10]
IOB1:SLEW[1, 9, 8][1, 9, 6][1, 8, 7][1, 9, 10][1, 9, 7]
IOB2:SLEW[1, 17, 9][1, 17, 10][1, 16, 8][1, 17, 6][1, 17, 7]
IOB3:SLEW[0, 3, 8][0, 3, 6][0, 0, 7][0, 3, 7][0, 3, 10]
IOB4:SLEW[0, 9, 8][0, 9, 6][0, 8, 7][0, 9, 10][0, 9, 7]
IOB5:SLEW[0, 17, 9][0, 17, 10][0, 16, 8][0, 17, 6][0, 17, 7]
Non-inverted[4][3][2][1][0]
IOB0:DCIUPDATEMODE_ASREQUIRED[1, 3, 11]
IOB1:DCIUPDATEMODE_ASREQUIRED[1, 9, 9]
IOB2:DCIUPDATEMODE_ASREQUIRED[1, 17, 11]
IOB3:DCIUPDATEMODE_ASREQUIRED[0, 3, 11]
IOB4:DCIUPDATEMODE_ASREQUIRED[0, 9, 9]
IOB5:DCIUPDATEMODE_ASREQUIRED[0, 17, 11]
Inverted~[0]
IOB0:PULL[1, 4, 7][1, 4, 8][1, 4, 9]
IOB1:PULL[1, 10, 6][1, 10, 9][1, 10, 10]
IOB2:PULL[1, 18, 8][1, 18, 9][1, 18, 10]
IOB3:PULL[0, 4, 7][0, 4, 8][0, 4, 9]
IOB4:PULL[0, 10, 6][0, 10, 9][0, 10, 10]
IOB5:PULL[0, 18, 8][0, 18, 9][0, 18, 10]
PULLDOWN000
NONE001
PULLUP011
KEEPER101
IOB0:DCI_MODE[1, 4, 11][1, 6, 6][1, 6, 8][1, 6, 10]
IOB1:DCI_MODE[1, 10, 11][1, 12, 6][1, 12, 7][1, 12, 10]
IOB2:DCI_MODE[1, 18, 11][1, 20, 7][1, 20, 10][1, 20, 11]
IOB3:DCI_MODE[0, 4, 11][0, 6, 6][0, 6, 8][0, 6, 10]
IOB4:DCI_MODE[0, 10, 11][0, 12, 6][0, 12, 7][0, 12, 10]
IOB5:DCI_MODE[0, 18, 11][0, 20, 7][0, 20, 10][0, 20, 11]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:IBUF_MODE[1, 4, 10][1, 4, 6][1, 7, 8]
IOB1:IBUF_MODE[1, 10, 8][1, 10, 7][1, 13, 10]
IOB2:IBUF_MODE[1, 18, 6][1, 18, 7][1, 21, 6]
IOB3:IBUF_MODE[0, 4, 10][0, 4, 6][0, 7, 8]
IOB4:IBUF_MODE[0, 10, 8][0, 10, 7][0, 13, 10]
IOB5:IBUF_MODE[0, 18, 6][0, 18, 7][0, 21, 6]
NONE000
VREF011
DIFF101
CMOS111
IOB0:DISABLE_GTS[1, 7, 11]
IOB1:BREFCLK_ENABLE[1, 12, 11]
IOB1:DISABLE_GTS[1, 13, 11]
IOB1:VREF[1, 13, 7]
IOB2:DISABLE_GTS[1, 21, 10]
IOB3:DISABLE_GTS[0, 7, 11]
IOB4:DISABLE_GTS[0, 13, 11]
IOB5:DISABLE_GTS[0, 21, 10]
IOB5:VREF[0, 21, 9]
Non-inverted[0]
IOB1:OUTPUT_DIFF[1, 3, 9][1, 12, 9][1, 9, 11][1, 6, 9]
IOB3:OUTPUT_DIFF[1, 17, 8][0, 6, 9][0, 3, 9][1, 21, 11]
IOB5:OUTPUT_DIFF[0, 9, 11][0, 21, 11][0, 17, 8][0, 12, 9]
Non-inverted[3][2][1][0]

IOBS.V2P.B.R2.CLK

IOBS.V2P.B.R2.CLK bittile 0
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ~IOB1:NDRIVE[1]--IOB1:SLEW[3]IOB1:IBUF_MODE[1]IOB1:NDRIVE[3]IOB1:DCI_MODE[2]IOB1:OUTPUT_ENABLE[0]~IOB2:NDRIVE[1]IOB2:SLEW[3]IOB2:PULL[2]~IOB2:NDRIVE[2]IOB2:DCI_MODE[2]IOB2:OUTPUT_ENABLE[0]--~IOB3:PDRIVE[0]IOB3:SLEW[1]IOB3:IBUF_MODE[2]~IOB3:NDRIVE[2]-IOB3:IBUF_MODE[0]
7 IOB1:SLEW[2]--IOB1:SLEW[1]IOB1:PULL[2]IOB1:PDRIVE[2]--IOB2:SLEW[2]IOB2:SLEW[0]IOB2:IBUF_MODE[1]IOB2:PDRIVE[2]IOB2:DCI_MODE[1]---~IOB3:NDRIVE[1]IOB3:SLEW[0]IOB3:IBUF_MODE[1]IOB3:PDRIVE[2]IOB3:DCI_MODE[2]IOB3:OUTPUT_ENABLE[0]
8 ~IOB1:PDRIVE[0]--IOB1:SLEW[4]IOB1:PULL[1]~IOB1:NDRIVE[2]IOB1:DCI_MODE[1]IOB1:IBUF_MODE[0]~IOB2:PDRIVE[0]IOB2:SLEW[4]IOB2:IBUF_MODE[2]~IOB2:PDRIVE[1]-IOB2:OUTPUT_ENABLE[1]--IOB3:SLEW[2]IOB3:OUTPUT_DIFF[1]IOB3:PULL[2]~IOB3:PDRIVE[1]-IOB3:OUTPUT_ENABLE[1]
9 IOB1:NDRIVE[0]--IOB1:OUTPUT_DIFF[1]IOB1:PULL[0]IOB1:NDRIVE[4]IOB1:OUTPUT_DIFF[2]-IOB2:OUTPUT_MISC[0]~IOB2:DCIUPDATEMODE_ASREQUIREDIOB2:PULL[1]IOB2:PDRIVE[3]IOB3:OUTPUT_DIFF[0]---IOB3:OUTPUT_MISC[0]IOB3:SLEW[4]IOB3:PULL[1]IOB3:PDRIVE[3]--
10 IOB1:OUTPUT_MISC[1]--IOB1:SLEW[0]IOB1:IBUF_MODE[2]~IOB1:PDRIVE[1]IOB1:DCI_MODE[0]IOB1:OUTPUT_ENABLE[1]IOB2:OUTPUT_MISC[1]IOB2:SLEW[1]IOB2:PULL[0]IOB2:NDRIVE[3]IOB2:DCI_MODE[0]IOB2:IBUF_MODE[0]--IOB3:NDRIVE[0]IOB3:SLEW[3]IOB3:PULL[0]IOB3:NDRIVE[3]IOB3:DCI_MODE[1]IOB3:DISABLE_GTS
11 IOB1:OUTPUT_MISC[0]--~IOB1:DCIUPDATEMODE_ASREQUIREDIOB1:DCI_MODE[3]IOB1:PDRIVE[3]-IOB1:DISABLE_GTSIOB2:NDRIVE[0]IOB3:OUTPUT_DIFF[3]IOB2:DCI_MODE[3]IOB2:NDRIVE[4]-IOB2:DISABLE_GTS--IOB3:OUTPUT_MISC[1]~IOB3:DCIUPDATEMODE_ASREQUIREDIOB3:DCI_MODE[3]IOB3:NDRIVE[4]IOB3:DCI_MODE[0]IOB3:OUTPUT_DIFF[2]
IOBS.V2P.B.R2.CLK bittile 1
RowColumn
0123456789101112131415161718192021
0 ----------------------
1 ----------------------
2 ----------------------
3 ----------------------
4 ----------------------
5 ----------------------
6 ----------------~IOB0:PDRIVE[0]IOB0:SLEW[1]IOB0:IBUF_MODE[2]~IOB0:NDRIVE[2]-IOB0:IBUF_MODE[0]
7 ----------------~IOB0:NDRIVE[1]IOB0:SLEW[0]IOB0:IBUF_MODE[1]IOB0:PDRIVE[2]IOB0:DCI_MODE[2]IOB0:OUTPUT_ENABLE[0]
8 ----------BREFCLK_INT:ENABLE[0]-----IOB0:SLEW[2]IOB1:OUTPUT_DIFF[3]IOB0:PULL[2]~IOB0:PDRIVE[1]-IOB0:OUTPUT_ENABLE[1]
9 ----------------IOB0:OUTPUT_MISC[0]IOB0:SLEW[4]IOB0:PULL[1]IOB0:PDRIVE[3]--
10 -------------BREFCLK_INT:ENABLE[1]--IOB0:NDRIVE[0]IOB0:SLEW[3]IOB0:PULL[0]IOB0:NDRIVE[3]IOB0:DCI_MODE[1]IOB0:DISABLE_GTS
11 ----------------IOB0:OUTPUT_MISC[1]~IOB0:DCIUPDATEMODE_ASREQUIREDIOB0:DCI_MODE[3]IOB0:NDRIVE[4]IOB0:DCI_MODE[0]IOB1:OUTPUT_DIFF[0]
IOB0:PDRIVE[1, 19, 9][1, 19, 7][1, 19, 8][1, 16, 6]
IOB1:PDRIVE[0, 5, 11][0, 5, 7][0, 5, 10][0, 0, 8]
IOB2:PDRIVE[0, 11, 9][0, 11, 7][0, 11, 8][0, 8, 8]
IOB3:PDRIVE[0, 19, 9][0, 19, 7][0, 19, 8][0, 16, 6]
Mixed inversion[3][2]~[1]~[0]
IOB0:NDRIVE[1, 19, 11][1, 19, 10][1, 19, 6][1, 16, 7][1, 16, 10]
IOB1:NDRIVE[0, 5, 9][0, 5, 6][0, 5, 8][0, 0, 6][0, 0, 9]
IOB2:NDRIVE[0, 11, 11][0, 11, 10][0, 11, 6][0, 8, 6][0, 8, 11]
IOB3:NDRIVE[0, 19, 11][0, 19, 10][0, 19, 6][0, 16, 7][0, 16, 10]
Mixed inversion[4][3]~[2]~[1][0]
BREFCLK_INT:ENABLE[1, 13, 10][1, 10, 8]
IOB0:OUTPUT_ENABLE[1, 21, 8][1, 21, 7]
IOB0:OUTPUT_MISC[1, 16, 11][1, 16, 9]
IOB1:OUTPUT_ENABLE[0, 7, 10][0, 7, 6]
IOB1:OUTPUT_MISC[0, 0, 10][0, 0, 11]
IOB2:OUTPUT_ENABLE[0, 13, 8][0, 13, 6]
IOB2:OUTPUT_MISC[0, 8, 10][0, 8, 9]
IOB3:OUTPUT_ENABLE[0, 21, 8][0, 21, 7]
IOB3:OUTPUT_MISC[0, 16, 11][0, 16, 9]
Non-inverted[1][0]
IOB0:SLEW[1, 17, 9][1, 17, 10][1, 16, 8][1, 17, 6][1, 17, 7]
IOB1:SLEW[0, 3, 8][0, 3, 6][0, 0, 7][0, 3, 7][0, 3, 10]
IOB2:SLEW[0, 9, 8][0, 9, 6][0, 8, 7][0, 9, 10][0, 9, 7]
IOB3:SLEW[0, 17, 9][0, 17, 10][0, 16, 8][0, 17, 6][0, 17, 7]
Non-inverted[4][3][2][1][0]
IOB0:DCIUPDATEMODE_ASREQUIRED[1, 17, 11]
IOB1:DCIUPDATEMODE_ASREQUIRED[0, 3, 11]
IOB2:DCIUPDATEMODE_ASREQUIRED[0, 9, 9]
IOB3:DCIUPDATEMODE_ASREQUIRED[0, 17, 11]
Inverted~[0]
IOB0:PULL[1, 18, 8][1, 18, 9][1, 18, 10]
IOB1:PULL[0, 4, 7][0, 4, 8][0, 4, 9]
IOB2:PULL[0, 10, 6][0, 10, 9][0, 10, 10]
IOB3:PULL[0, 18, 8][0, 18, 9][0, 18, 10]
PULLDOWN000
NONE001
PULLUP011
KEEPER101
IOB0:DCI_MODE[1, 18, 11][1, 20, 7][1, 20, 10][1, 20, 11]
IOB1:DCI_MODE[0, 4, 11][0, 6, 6][0, 6, 8][0, 6, 10]
IOB2:DCI_MODE[0, 10, 11][0, 12, 6][0, 12, 7][0, 12, 10]
IOB3:DCI_MODE[0, 18, 11][0, 20, 7][0, 20, 10][0, 20, 11]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:IBUF_MODE[1, 18, 6][1, 18, 7][1, 21, 6]
IOB1:IBUF_MODE[0, 4, 10][0, 4, 6][0, 7, 8]
IOB2:IBUF_MODE[0, 10, 8][0, 10, 7][0, 13, 10]
IOB3:IBUF_MODE[0, 18, 6][0, 18, 7][0, 21, 6]
NONE000
VREF011
DIFF101
CMOS111
IOB0:DISABLE_GTS[1, 21, 10]
IOB1:DISABLE_GTS[0, 7, 11]
IOB2:DISABLE_GTS[0, 13, 11]
IOB3:DISABLE_GTS[0, 21, 10]
Non-inverted[0]
IOB1:OUTPUT_DIFF[1, 17, 8][0, 6, 9][0, 3, 9][1, 21, 11]
IOB3:OUTPUT_DIFF[0, 9, 11][0, 21, 11][0, 17, 8][0, 12, 9]
Non-inverted[3][2][1][0]

IOBS.V2P.L.B2

IOBS.V2P.L.B2 bittile 0
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 --IOB0:SLEW[2]IOB0:SLEW[4]
5 --IOB0:SLEW[1]IOB0:SLEW[0]
6 --IOB0:OUTPUT_DIFF[1]~IOB0:DCIUPDATEMODE_ASREQUIRED
7 --IOB0:OUTPUT_MISC[0]IOB0:OUTPUT_MISC[1]
8 --IOB0:NDRIVE[0]IOB0:SLEW[3]
9 --~IOB0:NDRIVE[1]~IOB0:PDRIVE[0]
10 --~IOB0:NDRIVE[2]~IOB0:PDRIVE[1]
11 --IOB0:NDRIVE[3]IOB0:PDRIVE[2]
12 --IOB0:NDRIVE[4]IOB0:PDRIVE[3]
13 --IOB0:DCI_MODE[3]IOB0:PULL[0]
14 --IOB0:PULL[1]IOB0:PULL[2]
15 --IOB0:IBUF_MODE[1]IOB0:IBUF_MODE[2]
16 --IOB0:IBUF_MODE[0]IOB0:OUTPUT_ENABLE[1]
17 --IOB0:OUTPUT_ENABLE[0]-
18 --IOB0:DISABLE_GTS-
19 --IOB0:OUTPUT_DIFF[2]-
20 --IOB0:DCI_MODE[0]IOB0:DCI_MODE[1]
21 --IOB0:DCI_MODE[2]IOB0:VR
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 --IOB1:SLEW[2]IOB1:SLEW[4]
32 --IOB1:SLEW[1]IOB1:SLEW[0]
33 --IOB0:OUTPUT_DIFF[3]~IOB1:DCIUPDATEMODE_ASREQUIRED
34 --IOB1:OUTPUT_MISC[0]IOB1:OUTPUT_MISC[1]
35 --IOB1:NDRIVE[0]IOB1:SLEW[3]
36 --~IOB1:NDRIVE[1]~IOB1:PDRIVE[0]
37 --~IOB1:NDRIVE[2]~IOB1:PDRIVE[1]
38 --IOB1:NDRIVE[3]IOB1:PDRIVE[2]
39 --IOB1:NDRIVE[4]IOB1:PDRIVE[3]
40 --IOB1:DCI_MODE[3]IOB1:PULL[0]
41 --IOB1:PULL[1]IOB1:PULL[2]
42 --IOB1:IBUF_MODE[1]IOB1:IBUF_MODE[2]
43 --IOB1:IBUF_MODE[0]IOB1:OUTPUT_ENABLE[1]
44 --IOB1:OUTPUT_ENABLE[0]-
45 --IOB1:DISABLE_GTS-
46 --IOB0:OUTPUT_DIFF[0]-
47 --IOB1:DCI_MODE[0]IOB1:DCI_MODE[1]
48 --IOB1:DCI_MODE[2]IOB1:VR
49 ----
50 ----
51 ----
52 ----
53 ----
54 ----
55 ----
56 ----
57 ----
58 --IOB2:SLEW[2]IOB2:SLEW[4]
59 --IOB2:SLEW[1]IOB2:SLEW[0]
60 --IOB2:OUTPUT_DIFF[1]~IOB2:DCIUPDATEMODE_ASREQUIRED
61 --IOB2:OUTPUT_MISC[0]IOB2:OUTPUT_MISC[1]
62 --IOB2:NDRIVE[0]IOB2:SLEW[3]
63 --~IOB2:NDRIVE[1]~IOB2:PDRIVE[0]
64 --~IOB2:NDRIVE[2]~IOB2:PDRIVE[1]
65 --IOB2:NDRIVE[3]IOB2:PDRIVE[2]
66 --IOB2:NDRIVE[4]IOB2:PDRIVE[3]
67 --IOB2:DCI_MODE[3]IOB2:PULL[0]
68 --IOB2:PULL[1]IOB2:PULL[2]
69 --IOB2:IBUF_MODE[1]IOB2:IBUF_MODE[2]
70 --IOB2:IBUF_MODE[0]IOB2:OUTPUT_ENABLE[1]
71 --IOB2:OUTPUT_ENABLE[0]-
72 --IOB2:DISABLE_GTS-
73 --IOB2:OUTPUT_DIFF[2]-
74 --IOB2:DCI_MODE[0]IOB2:DCI_MODE[1]
75 --IOB2:DCI_MODE[2]-
IOBS.V2P.L.B2 bittile 1
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 --IOB3:SLEW[2]IOB3:SLEW[4]
5 --IOB3:SLEW[1]IOB3:SLEW[0]
6 --IOB2:OUTPUT_DIFF[3]~IOB3:DCIUPDATEMODE_ASREQUIRED
7 --IOB3:OUTPUT_MISC[0]IOB3:OUTPUT_MISC[1]
8 --IOB3:NDRIVE[0]IOB3:SLEW[3]
9 --~IOB3:NDRIVE[1]~IOB3:PDRIVE[0]
10 --~IOB3:NDRIVE[2]~IOB3:PDRIVE[1]
11 --IOB3:NDRIVE[3]IOB3:PDRIVE[2]
12 --IOB3:NDRIVE[4]IOB3:PDRIVE[3]
13 --IOB3:DCI_MODE[3]IOB3:PULL[0]
14 --IOB3:PULL[1]IOB3:PULL[2]
15 --IOB3:IBUF_MODE[1]IOB3:IBUF_MODE[2]
16 --IOB3:IBUF_MODE[0]IOB3:OUTPUT_ENABLE[1]
17 --IOB3:OUTPUT_ENABLE[0]-
18 --IOB3:DISABLE_GTS-
19 --IOB2:OUTPUT_DIFF[0]-
20 --IOB3:DCI_MODE[0]IOB3:DCI_MODE[1]
21 --IOB3:DCI_MODE[2]-
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 --IOB4:SLEW[2]IOB4:SLEW[4]
32 --IOB4:SLEW[1]IOB4:SLEW[0]
33 --IOB4:OUTPUT_DIFF[1]~IOB4:DCIUPDATEMODE_ASREQUIRED
34 --IOB4:OUTPUT_MISC[0]IOB4:OUTPUT_MISC[1]
35 --IOB4:NDRIVE[0]IOB4:SLEW[3]
36 --~IOB4:NDRIVE[1]~IOB4:PDRIVE[0]
37 --~IOB4:NDRIVE[2]~IOB4:PDRIVE[1]
38 --IOB4:NDRIVE[3]IOB4:PDRIVE[2]
39 --IOB4:NDRIVE[4]IOB4:PDRIVE[3]
40 --IOB4:DCI_MODE[3]IOB4:PULL[0]
41 --IOB4:PULL[1]IOB4:PULL[2]
42 --IOB4:IBUF_MODE[1]IOB4:IBUF_MODE[2]
43 --IOB4:IBUF_MODE[0]IOB4:OUTPUT_ENABLE[1]
44 --IOB4:OUTPUT_ENABLE[0]-
45 --IOB4:DISABLE_GTS-
46 --IOB4:OUTPUT_DIFF[2]-
47 --IOB4:DCI_MODE[0]IOB4:DCI_MODE[1]
48 --IOB4:DCI_MODE[2]-
49 ----
50 ----
51 ----
52 ----
53 ----
54 ----
55 ----
56 ----
57 ----
58 --IOB5:SLEW[2]IOB5:SLEW[4]
59 --IOB5:SLEW[1]IOB5:SLEW[0]
60 --IOB4:OUTPUT_DIFF[3]~IOB5:DCIUPDATEMODE_ASREQUIRED
61 --IOB5:OUTPUT_MISC[0]IOB5:OUTPUT_MISC[1]
62 --IOB5:NDRIVE[0]IOB5:SLEW[3]
63 --~IOB5:NDRIVE[1]~IOB5:PDRIVE[0]
64 --~IOB5:NDRIVE[2]~IOB5:PDRIVE[1]
65 --IOB5:NDRIVE[3]IOB5:PDRIVE[2]
66 --IOB5:NDRIVE[4]IOB5:PDRIVE[3]
67 --IOB5:DCI_MODE[3]IOB5:PULL[0]
68 --IOB5:PULL[1]IOB5:PULL[2]
69 --IOB5:IBUF_MODE[1]IOB5:IBUF_MODE[2]
70 --IOB5:IBUF_MODE[0]IOB5:OUTPUT_ENABLE[1]
71 --IOB5:OUTPUT_ENABLE[0]IOB5:VREF
72 --IOB5:DISABLE_GTS-
73 --IOB4:OUTPUT_DIFF[0]-
74 --IOB5:DCI_MODE[0]IOB5:DCI_MODE[1]
75 --IOB5:DCI_MODE[2]-
IOB0:OUTPUT_ENABLE[0, 3, 16][0, 2, 17]
IOB0:OUTPUT_MISC[0, 3, 7][0, 2, 7]
IOB1:OUTPUT_ENABLE[0, 3, 43][0, 2, 44]
IOB1:OUTPUT_MISC[0, 3, 34][0, 2, 34]
IOB2:OUTPUT_ENABLE[0, 3, 70][0, 2, 71]
IOB2:OUTPUT_MISC[0, 3, 61][0, 2, 61]
IOB3:OUTPUT_ENABLE[1, 3, 16][1, 2, 17]
IOB3:OUTPUT_MISC[1, 3, 7][1, 2, 7]
IOB4:OUTPUT_ENABLE[1, 3, 43][1, 2, 44]
IOB4:OUTPUT_MISC[1, 3, 34][1, 2, 34]
IOB5:OUTPUT_ENABLE[1, 3, 70][1, 2, 71]
IOB5:OUTPUT_MISC[1, 3, 61][1, 2, 61]
Non-inverted[1][0]
IOB0:NDRIVE[0, 2, 12][0, 2, 11][0, 2, 10][0, 2, 9][0, 2, 8]
IOB1:NDRIVE[0, 2, 39][0, 2, 38][0, 2, 37][0, 2, 36][0, 2, 35]
IOB2:NDRIVE[0, 2, 66][0, 2, 65][0, 2, 64][0, 2, 63][0, 2, 62]
IOB3:NDRIVE[1, 2, 12][1, 2, 11][1, 2, 10][1, 2, 9][1, 2, 8]
IOB4:NDRIVE[1, 2, 39][1, 2, 38][1, 2, 37][1, 2, 36][1, 2, 35]
IOB5:NDRIVE[1, 2, 66][1, 2, 65][1, 2, 64][1, 2, 63][1, 2, 62]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:IBUF_MODE[0, 3, 15][0, 2, 15][0, 2, 16]
IOB1:IBUF_MODE[0, 3, 42][0, 2, 42][0, 2, 43]
IOB2:IBUF_MODE[0, 3, 69][0, 2, 69][0, 2, 70]
IOB3:IBUF_MODE[1, 3, 15][1, 2, 15][1, 2, 16]
IOB4:IBUF_MODE[1, 3, 42][1, 2, 42][1, 2, 43]
IOB5:IBUF_MODE[1, 3, 69][1, 2, 69][1, 2, 70]
NONE000
VREF011
DIFF101
CMOS111
IOB0:DISABLE_GTS[0, 2, 18]
IOB0:VR[0, 3, 21]
IOB1:DISABLE_GTS[0, 2, 45]
IOB1:VR[0, 3, 48]
IOB2:DISABLE_GTS[0, 2, 72]
IOB3:DISABLE_GTS[1, 2, 18]
IOB4:DISABLE_GTS[1, 2, 45]
IOB5:DISABLE_GTS[1, 2, 72]
IOB5:VREF[1, 3, 71]
Non-inverted[0]
IOB0:DCI_MODE[0, 2, 13][0, 2, 21][0, 3, 20][0, 2, 20]
IOB1:DCI_MODE[0, 2, 40][0, 2, 48][0, 3, 47][0, 2, 47]
IOB2:DCI_MODE[0, 2, 67][0, 2, 75][0, 3, 74][0, 2, 74]
IOB3:DCI_MODE[1, 2, 13][1, 2, 21][1, 3, 20][1, 2, 20]
IOB4:DCI_MODE[1, 2, 40][1, 2, 48][1, 3, 47][1, 2, 47]
IOB5:DCI_MODE[1, 2, 67][1, 2, 75][1, 3, 74][1, 2, 74]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:OUTPUT_DIFF[0, 2, 33][0, 2, 19][0, 2, 6][0, 2, 46]
IOB2:OUTPUT_DIFF[1, 2, 6][0, 2, 73][0, 2, 60][1, 2, 19]
IOB4:OUTPUT_DIFF[1, 2, 60][1, 2, 46][1, 2, 33][1, 2, 73]
Non-inverted[3][2][1][0]
IOB0:SLEW[0, 3, 4][0, 3, 8][0, 2, 4][0, 2, 5][0, 3, 5]
IOB1:SLEW[0, 3, 31][0, 3, 35][0, 2, 31][0, 2, 32][0, 3, 32]
IOB2:SLEW[0, 3, 58][0, 3, 62][0, 2, 58][0, 2, 59][0, 3, 59]
IOB3:SLEW[1, 3, 4][1, 3, 8][1, 2, 4][1, 2, 5][1, 3, 5]
IOB4:SLEW[1, 3, 31][1, 3, 35][1, 2, 31][1, 2, 32][1, 3, 32]
IOB5:SLEW[1, 3, 58][1, 3, 62][1, 2, 58][1, 2, 59][1, 3, 59]
Non-inverted[4][3][2][1][0]
IOB0:DCIUPDATEMODE_ASREQUIRED[0, 3, 6]
IOB1:DCIUPDATEMODE_ASREQUIRED[0, 3, 33]
IOB2:DCIUPDATEMODE_ASREQUIRED[0, 3, 60]
IOB3:DCIUPDATEMODE_ASREQUIRED[1, 3, 6]
IOB4:DCIUPDATEMODE_ASREQUIRED[1, 3, 33]
IOB5:DCIUPDATEMODE_ASREQUIRED[1, 3, 60]
Inverted~[0]
IOB0:PDRIVE[0, 3, 12][0, 3, 11][0, 3, 10][0, 3, 9]
IOB1:PDRIVE[0, 3, 39][0, 3, 38][0, 3, 37][0, 3, 36]
IOB2:PDRIVE[0, 3, 66][0, 3, 65][0, 3, 64][0, 3, 63]
IOB3:PDRIVE[1, 3, 12][1, 3, 11][1, 3, 10][1, 3, 9]
IOB4:PDRIVE[1, 3, 39][1, 3, 38][1, 3, 37][1, 3, 36]
IOB5:PDRIVE[1, 3, 66][1, 3, 65][1, 3, 64][1, 3, 63]
Mixed inversion[3][2]~[1]~[0]
IOB0:PULL[0, 3, 14][0, 2, 14][0, 3, 13]
IOB1:PULL[0, 3, 41][0, 2, 41][0, 3, 40]
IOB2:PULL[0, 3, 68][0, 2, 68][0, 3, 67]
IOB3:PULL[1, 3, 14][1, 2, 14][1, 3, 13]
IOB4:PULL[1, 3, 41][1, 2, 41][1, 3, 40]
IOB5:PULL[1, 3, 68][1, 2, 68][1, 3, 67]
PULLDOWN000
NONE001
PULLUP011
KEEPER101

IOBS.V2P.L.T2

IOBS.V2P.L.T2 bittile 0
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 --IOB0:SLEW[2]IOB0:SLEW[4]
5 --IOB0:SLEW[1]IOB0:SLEW[0]
6 --IOB0:OUTPUT_DIFF[1]~IOB0:DCIUPDATEMODE_ASREQUIRED
7 --IOB0:OUTPUT_MISC[0]IOB0:OUTPUT_MISC[1]
8 --IOB0:NDRIVE[0]IOB0:SLEW[3]
9 --~IOB0:NDRIVE[1]~IOB0:PDRIVE[0]
10 --~IOB0:NDRIVE[2]~IOB0:PDRIVE[1]
11 --IOB0:NDRIVE[3]IOB0:PDRIVE[2]
12 --IOB0:NDRIVE[4]IOB0:PDRIVE[3]
13 --IOB0:DCI_MODE[3]IOB0:PULL[0]
14 --IOB0:PULL[1]IOB0:PULL[2]
15 --IOB0:IBUF_MODE[1]IOB0:IBUF_MODE[2]
16 --IOB0:IBUF_MODE[0]IOB0:OUTPUT_ENABLE[1]
17 --IOB0:OUTPUT_ENABLE[0]-
18 --IOB0:DISABLE_GTS-
19 --IOB0:OUTPUT_DIFF[2]-
20 --IOB0:DCI_MODE[0]IOB0:DCI_MODE[1]
21 --IOB0:DCI_MODE[2]-
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 --IOB1:SLEW[2]IOB1:SLEW[4]
32 --IOB1:SLEW[1]IOB1:SLEW[0]
33 --IOB0:OUTPUT_DIFF[3]~IOB1:DCIUPDATEMODE_ASREQUIRED
34 --IOB1:OUTPUT_MISC[0]IOB1:OUTPUT_MISC[1]
35 --IOB1:NDRIVE[0]IOB1:SLEW[3]
36 --~IOB1:NDRIVE[1]~IOB1:PDRIVE[0]
37 --~IOB1:NDRIVE[2]~IOB1:PDRIVE[1]
38 --IOB1:NDRIVE[3]IOB1:PDRIVE[2]
39 --IOB1:NDRIVE[4]IOB1:PDRIVE[3]
40 --IOB1:DCI_MODE[3]IOB1:PULL[0]
41 --IOB1:PULL[1]IOB1:PULL[2]
42 --IOB1:IBUF_MODE[1]IOB1:IBUF_MODE[2]
43 --IOB1:IBUF_MODE[0]IOB1:OUTPUT_ENABLE[1]
44 --IOB1:OUTPUT_ENABLE[0]-
45 --IOB1:DISABLE_GTS-
46 --IOB0:OUTPUT_DIFF[0]-
47 --IOB1:DCI_MODE[0]IOB1:DCI_MODE[1]
48 --IOB1:DCI_MODE[2]-
49 ----
50 ----
51 ----
52 ----
53 ----
54 ----
55 ----
56 ----
57 ----
58 --IOB2:SLEW[2]IOB2:SLEW[4]
59 --IOB2:SLEW[1]IOB2:SLEW[0]
60 --IOB2:OUTPUT_DIFF[1]~IOB2:DCIUPDATEMODE_ASREQUIRED
61 --IOB2:OUTPUT_MISC[0]IOB2:OUTPUT_MISC[1]
62 --IOB2:NDRIVE[0]IOB2:SLEW[3]
63 --~IOB2:NDRIVE[1]~IOB2:PDRIVE[0]
64 --~IOB2:NDRIVE[2]~IOB2:PDRIVE[1]
65 --IOB2:NDRIVE[3]IOB2:PDRIVE[2]
66 --IOB2:NDRIVE[4]IOB2:PDRIVE[3]
67 --IOB2:DCI_MODE[3]IOB2:PULL[0]
68 --IOB2:PULL[1]IOB2:PULL[2]
69 --IOB2:IBUF_MODE[1]IOB2:IBUF_MODE[2]
70 --IOB2:IBUF_MODE[0]IOB2:OUTPUT_ENABLE[1]
71 --IOB2:OUTPUT_ENABLE[0]-
72 --IOB2:DISABLE_GTS-
73 --IOB2:OUTPUT_DIFF[2]-
74 --IOB2:DCI_MODE[0]IOB2:DCI_MODE[1]
75 --IOB2:DCI_MODE[2]-
IOBS.V2P.L.T2 bittile 1
RowColumn
0123
0 ----
1 ----
2 ----
3 ----
4 --IOB3:SLEW[2]IOB3:SLEW[4]
5 --IOB3:SLEW[1]IOB3:SLEW[0]
6 --IOB2:OUTPUT_DIFF[3]~IOB3:DCIUPDATEMODE_ASREQUIRED
7 --IOB3:OUTPUT_MISC[0]IOB3:OUTPUT_MISC[1]
8 --IOB3:NDRIVE[0]IOB3:SLEW[3]
9 --~IOB3:NDRIVE[1]~IOB3:PDRIVE[0]
10 --~IOB3:NDRIVE[2]~IOB3:PDRIVE[1]
11 --IOB3:NDRIVE[3]IOB3:PDRIVE[2]
12 --IOB3:NDRIVE[4]IOB3:PDRIVE[3]
13 --IOB3:DCI_MODE[3]IOB3:PULL[0]
14 --IOB3:PULL[1]IOB3:PULL[2]
15 --IOB3:IBUF_MODE[1]IOB3:IBUF_MODE[2]
16 --IOB3:IBUF_MODE[0]IOB3:OUTPUT_ENABLE[1]
17 --IOB3:OUTPUT_ENABLE[0]-
18 --IOB3:DISABLE_GTS-
19 --IOB2:OUTPUT_DIFF[0]-
20 --IOB3:DCI_MODE[0]IOB3:DCI_MODE[1]
21 --IOB3:DCI_MODE[2]-
22 ----
23 ----
24 ----
25 ----
26 ----
27 ----
28 ----
29 ----
30 ----
31 --IOB4:SLEW[2]IOB4:SLEW[4]
32 --IOB4:SLEW[1]IOB4:SLEW[0]
33 --IOB4:OUTPUT_DIFF[1]~IOB4:DCIUPDATEMODE_ASREQUIRED
34 --IOB4:OUTPUT_MISC[0]IOB4:OUTPUT_MISC[1]
35 --IOB4:NDRIVE[0]IOB4:SLEW[3]
36 --~IOB4:NDRIVE[1]~IOB4:PDRIVE[0]
37 --~IOB4:NDRIVE[2]~IOB4:PDRIVE[1]
38 --IOB4:NDRIVE[3]IOB4:PDRIVE[2]
39 --IOB4:NDRIVE[4]IOB4:PDRIVE[3]
40 --IOB4:DCI_MODE[3]IOB4:PULL[0]
41 --IOB4:PULL[1]IOB4:PULL[2]
42 --IOB4:IBUF_MODE[1]IOB4:IBUF_MODE[2]
43 --IOB4:IBUF_MODE[0]IOB4:OUTPUT_ENABLE[1]
44 --IOB4:OUTPUT_ENABLE[0]-
45 --IOB4:DISABLE_GTS-
46 --IOB4:OUTPUT_DIFF[2]-
47 --IOB4:DCI_MODE[0]IOB4:DCI_MODE[1]
48 --IOB4:DCI_MODE[2]IOB4:VR
49 ----
50 ----
51 ----
52 ----
53 ----
54 ----
55 ----
56 ----
57 ----
58 --IOB5:SLEW[2]IOB5:SLEW[4]
59 --IOB5:SLEW[1]IOB5:SLEW[0]
60 --IOB4:OUTPUT_DIFF[3]~IOB5:DCIUPDATEMODE_ASREQUIRED
61 --IOB5:OUTPUT_MISC[0]IOB5:OUTPUT_MISC[1]
62 --IOB5:NDRIVE[0]IOB5:SLEW[3]
63 --~IOB5:NDRIVE[1]~IOB5:PDRIVE[0]
64 --~IOB5:NDRIVE[2]~IOB5:PDRIVE[1]
65 --IOB5:NDRIVE[3]IOB5:PDRIVE[2]
66 --IOB5:NDRIVE[4]IOB5:PDRIVE[3]
67 --IOB5:DCI_MODE[3]IOB5:PULL[0]
68 --IOB5:PULL[1]IOB5:PULL[2]
69 --IOB5:IBUF_MODE[1]IOB5:IBUF_MODE[2]
70 --IOB5:IBUF_MODE[0]IOB5:OUTPUT_ENABLE[1]
71 --IOB5:OUTPUT_ENABLE[0]IOB5:VREF
72 --IOB5:DISABLE_GTS-
73 --IOB4:OUTPUT_DIFF[0]-
74 --IOB5:DCI_MODE[0]IOB5:DCI_MODE[1]
75 --IOB5:DCI_MODE[2]IOB5:VR
IOB0:OUTPUT_ENABLE[0, 3, 16][0, 2, 17]
IOB0:OUTPUT_MISC[0, 3, 7][0, 2, 7]
IOB1:OUTPUT_ENABLE[0, 3, 43][0, 2, 44]
IOB1:OUTPUT_MISC[0, 3, 34][0, 2, 34]
IOB2:OUTPUT_ENABLE[0, 3, 70][0, 2, 71]
IOB2:OUTPUT_MISC[0, 3, 61][0, 2, 61]
IOB3:OUTPUT_ENABLE[1, 3, 16][1, 2, 17]
IOB3:OUTPUT_MISC[1, 3, 7][1, 2, 7]
IOB4:OUTPUT_ENABLE[1, 3, 43][1, 2, 44]
IOB4:OUTPUT_MISC[1, 3, 34][1, 2, 34]
IOB5:OUTPUT_ENABLE[1, 3, 70][1, 2, 71]
IOB5:OUTPUT_MISC[1, 3, 61][1, 2, 61]
Non-inverted[1][0]
IOB0:NDRIVE[0, 2, 12][0, 2, 11][0, 2, 10][0, 2, 9][0, 2, 8]
IOB1:NDRIVE[0, 2, 39][0, 2, 38][0, 2, 37][0, 2, 36][0, 2, 35]
IOB2:NDRIVE[0, 2, 66][0, 2, 65][0, 2, 64][0, 2, 63][0, 2, 62]
IOB3:NDRIVE[1, 2, 12][1, 2, 11][1, 2, 10][1, 2, 9][1, 2, 8]
IOB4:NDRIVE[1, 2, 39][1, 2, 38][1, 2, 37][1, 2, 36][1, 2, 35]
IOB5:NDRIVE[1, 2, 66][1, 2, 65][1, 2, 64][1, 2, 63][1, 2, 62]
Mixed inversion[4][3]~[2]~[1][0]
IOB0:IBUF_MODE[0, 3, 15][0, 2, 15][0, 2, 16]
IOB1:IBUF_MODE[0, 3, 42][0, 2, 42][0, 2, 43]
IOB2:IBUF_MODE[0, 3, 69][0, 2, 69][0, 2, 70]
IOB3:IBUF_MODE[1, 3, 15][1, 2, 15][1, 2, 16]
IOB4:IBUF_MODE[1, 3, 42][1, 2, 42][1, 2, 43]
IOB5:IBUF_MODE[1, 3, 69][1, 2, 69][1, 2, 70]
NONE000
VREF011
DIFF101
CMOS111
IOB0:DISABLE_GTS[0, 2, 18]
IOB1:DISABLE_GTS[0, 2, 45]
IOB2:DISABLE_GTS[0, 2, 72]
IOB3:DISABLE_GTS[1, 2, 18]
IOB4:DISABLE_GTS[1, 2, 45]
IOB4:VR[1, 3, 48]
IOB5:DISABLE_GTS[1, 2, 72]
IOB5:VR[1, 3, 75]
IOB5:VREF[1, 3, 71]
Non-inverted[0]
IOB0:DCI_MODE[0, 2, 13][0, 2, 21][0, 3, 20][0, 2, 20]
IOB1:DCI_MODE[0, 2, 40][0, 2, 48][0, 3, 47][0, 2, 47]
IOB2:DCI_MODE[0, 2, 67][0, 2, 75][0, 3, 74][0, 2, 74]
IOB3:DCI_MODE[1, 2, 13][1, 2, 21][1, 3, 20][1, 2, 20]
IOB4:DCI_MODE[1, 2, 40][1, 2, 48][1, 3, 47][1, 2, 47]
IOB5:DCI_MODE[1, 2, 67][1, 2, 75][1, 3, 74][1, 2, 74]
NONE0000
OUTPUT0001
OUTPUT_HALF0010
TERM_SPLIT0100
TERM_VCC1011
IOB0:OUTPUT_DIFF[0, 2, 33][0, 2, 19][0, 2, 6][0, 2, 46]
IOB2:OUTPUT_DIFF[1, 2, 6][0, 2, 73][0, 2, 60][1, 2, 19]
IOB4:OUTPUT_DIFF[1, 2, 60][1, 2, 46][1, 2, 33][1, 2, 73]
Non-inverted[3][2][1][0]
IOB0:SLEW[0, 3, 4][0, 3, 8][0, 2, 4][0, 2, 5][0, 3, 5]
IOB1:SLEW[0, 3, 31][0, 3, 35][0, 2, 31][0, 2, 32][0, 3, 32]
IOB2:SLEW[0, 3, 58][0, 3, 62][0, 2, 58][0, 2, 59][0, 3, 59]
IOB3:SLEW[1, 3, 4][1, 3, 8][1, 2, 4][1, 2, 5][1, 3, 5]
IOB4:SLEW[1, 3, 31][1, 3, 35][1, 2, 31][1, 2, 32][1, 3, 32]
IOB5:SLEW[1, 3, 58][1, 3, 62][1, 2, 58][1, 2, 59][1, 3, 59]
Non-inverted[4][3][2][1][0]
IOB0:DCIUPDATEMODE_ASREQUIRED[0, 3, 6]
IOB1:DCIUPDATEMODE_ASREQUIRED[0, 3, 33]
IOB2:DCIUPDATEMODE_ASREQUIRED[0, 3, 60]
IOB3:DCIUPDATEMODE_ASREQUIRED[1, 3, 6]
IOB4:DCIUPDATEMODE_ASREQUIRED[1, 3, 33]
IOB5:DCIUPDATEMODE_ASREQUIRED[1, 3, 60]
Inverted~[0]
IOB0:PDRIVE[0, 3, 12][0, 3, 11][0, 3, 10][0, 3, 9]
IOB1:PDRIVE[0, 3, 39][0, 3, 38][0, 3, 37][0, 3, 36]
IOB2:PDRIVE[0, 3, 66][0, 3, 65][0, 3, 64][0, 3, 63]
IOB3:PDRIVE[1, 3, 12][1, 3, 11][1, 3, 10][1, 3, 9]
IOB4:PDRIVE[1, 3, 39][1, 3, 38][1, 3, 37][1, 3, 36]
IOB5:PDRIVE[1, 3, 66][1, 3, 65][1, 3, 64][1, 3, 63]
Mixed inversion[3][2]~[1]~[0]
IOB0:PULL[0, 3, 14][0, 2, 14][0, 3, 13]
IOB1:PULL[0, 3, 41][0, 2, 41][0, 3, 40]
IOB2:PULL[0, 3, 68][0, 2, 68][0, 3, 67]
IOB3:PULL[1, 3, 14][1, 2, 14][1, 3, 13]
IOB4:PULL[1, 3, 41][1, 2, 41][1, 3, 40]
IOB5:PULL[1, 3, 68][1, 2, 68][1, 3, 67]
PULLDOWN000
NONE001
PULLUP011
KEEPER101